nas100d-setup.c 7.6 KB

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  1. /*
  2. * arch/arm/mach-ixp4xx/nas100d-setup.c
  3. *
  4. * NAS 100d board-setup
  5. *
  6. * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
  7. *
  8. * based on ixdp425-setup.c:
  9. * Copyright (C) 2003-2004 MontaVista Software, Inc.
  10. * based on nas100d-power.c:
  11. * Copyright (C) 2005 Tower Technologies
  12. * based on nas100d-io.c
  13. * Copyright (C) 2004 Karen Spearel
  14. *
  15. * Author: Alessandro Zummo <a.zummo@towertech.it>
  16. * Author: Rod Whitby <rod@whitby.id.au>
  17. * Maintainers: http://www.nslu2-linux.org/
  18. *
  19. */
  20. #include <linux/if_ether.h>
  21. #include <linux/irq.h>
  22. #include <linux/jiffies.h>
  23. #include <linux/timer.h>
  24. #include <linux/serial.h>
  25. #include <linux/serial_8250.h>
  26. #include <linux/leds.h>
  27. #include <linux/reboot.h>
  28. #include <linux/i2c.h>
  29. #include <linux/i2c-gpio.h>
  30. #include <linux/io.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/flash.h>
  34. #include <asm/gpio.h>
  35. static struct flash_platform_data nas100d_flash_data = {
  36. .map_name = "cfi_probe",
  37. .width = 2,
  38. };
  39. static struct resource nas100d_flash_resource = {
  40. .flags = IORESOURCE_MEM,
  41. };
  42. static struct platform_device nas100d_flash = {
  43. .name = "IXP4XX-Flash",
  44. .id = 0,
  45. .dev.platform_data = &nas100d_flash_data,
  46. .num_resources = 1,
  47. .resource = &nas100d_flash_resource,
  48. };
  49. static struct i2c_board_info __initdata nas100d_i2c_board_info [] = {
  50. {
  51. I2C_BOARD_INFO("pcf8563", 0x51),
  52. },
  53. };
  54. static struct gpio_led nas100d_led_pins[] = {
  55. {
  56. .name = "nas100d:green:wlan",
  57. .gpio = NAS100D_LED_WLAN_GPIO,
  58. .active_low = true,
  59. },
  60. {
  61. .name = "nas100d:blue:power", /* (off=flashing) */
  62. .gpio = NAS100D_LED_PWR_GPIO,
  63. .active_low = true,
  64. },
  65. {
  66. .name = "nas100d:yellow:disk",
  67. .gpio = NAS100D_LED_DISK_GPIO,
  68. .active_low = true,
  69. },
  70. };
  71. static struct gpio_led_platform_data nas100d_led_data = {
  72. .num_leds = ARRAY_SIZE(nas100d_led_pins),
  73. .leds = nas100d_led_pins,
  74. };
  75. static struct platform_device nas100d_leds = {
  76. .name = "leds-gpio",
  77. .id = -1,
  78. .dev.platform_data = &nas100d_led_data,
  79. };
  80. static struct i2c_gpio_platform_data nas100d_i2c_gpio_data = {
  81. .sda_pin = NAS100D_SDA_PIN,
  82. .scl_pin = NAS100D_SCL_PIN,
  83. };
  84. static struct platform_device nas100d_i2c_gpio = {
  85. .name = "i2c-gpio",
  86. .id = 0,
  87. .dev = {
  88. .platform_data = &nas100d_i2c_gpio_data,
  89. },
  90. };
  91. static struct resource nas100d_uart_resources[] = {
  92. {
  93. .start = IXP4XX_UART1_BASE_PHYS,
  94. .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
  95. .flags = IORESOURCE_MEM,
  96. },
  97. {
  98. .start = IXP4XX_UART2_BASE_PHYS,
  99. .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
  100. .flags = IORESOURCE_MEM,
  101. }
  102. };
  103. static struct plat_serial8250_port nas100d_uart_data[] = {
  104. {
  105. .mapbase = IXP4XX_UART1_BASE_PHYS,
  106. .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
  107. .irq = IRQ_IXP4XX_UART1,
  108. .flags = UPF_BOOT_AUTOCONF,
  109. .iotype = UPIO_MEM,
  110. .regshift = 2,
  111. .uartclk = IXP4XX_UART_XTAL,
  112. },
  113. {
  114. .mapbase = IXP4XX_UART2_BASE_PHYS,
  115. .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
  116. .irq = IRQ_IXP4XX_UART2,
  117. .flags = UPF_BOOT_AUTOCONF,
  118. .iotype = UPIO_MEM,
  119. .regshift = 2,
  120. .uartclk = IXP4XX_UART_XTAL,
  121. },
  122. { }
  123. };
  124. static struct platform_device nas100d_uart = {
  125. .name = "serial8250",
  126. .id = PLAT8250_DEV_PLATFORM,
  127. .dev.platform_data = nas100d_uart_data,
  128. .num_resources = 2,
  129. .resource = nas100d_uart_resources,
  130. };
  131. /* Built-in 10/100 Ethernet MAC interfaces */
  132. static struct eth_plat_info nas100d_plat_eth[] = {
  133. {
  134. .phy = 0,
  135. .rxq = 3,
  136. .txreadyq = 20,
  137. }
  138. };
  139. static struct platform_device nas100d_eth[] = {
  140. {
  141. .name = "ixp4xx_eth",
  142. .id = IXP4XX_ETH_NPEB,
  143. .dev.platform_data = nas100d_plat_eth,
  144. }
  145. };
  146. static struct platform_device *nas100d_devices[] __initdata = {
  147. &nas100d_i2c_gpio,
  148. &nas100d_flash,
  149. &nas100d_leds,
  150. &nas100d_eth[0],
  151. };
  152. static void nas100d_power_off(void)
  153. {
  154. /* This causes the box to drop the power and go dead. */
  155. /* enable the pwr cntl gpio */
  156. gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT);
  157. /* do the deed */
  158. gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH);
  159. }
  160. /* This is used to make sure the power-button pusher is serious. The button
  161. * must be held until the value of this counter reaches zero.
  162. */
  163. static int power_button_countdown;
  164. /* Must hold the button down for at least this many counts to be processed */
  165. #define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
  166. static void nas100d_power_handler(unsigned long data);
  167. static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler, 0, 0);
  168. static void nas100d_power_handler(unsigned long data)
  169. {
  170. /* This routine is called twice per second to check the
  171. * state of the power button.
  172. */
  173. if (gpio_get_value(NAS100D_PB_GPIO)) {
  174. /* IO Pin is 1 (button pushed) */
  175. if (power_button_countdown > 0)
  176. power_button_countdown--;
  177. } else {
  178. /* Done on button release, to allow for auto-power-on mods. */
  179. if (power_button_countdown == 0) {
  180. /* Signal init to do the ctrlaltdel action,
  181. * this will bypass init if it hasn't started
  182. * and do a kernel_restart.
  183. */
  184. ctrl_alt_del();
  185. /* Change the state of the power LED to "blink" */
  186. gpio_line_set(NAS100D_LED_PWR_GPIO, IXP4XX_GPIO_LOW);
  187. } else {
  188. power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
  189. }
  190. }
  191. mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
  192. }
  193. static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
  194. {
  195. /* This is the paper-clip reset, it shuts the machine down directly. */
  196. machine_power_off();
  197. return IRQ_HANDLED;
  198. }
  199. static void __init nas100d_init(void)
  200. {
  201. uint8_t __iomem *f;
  202. int i;
  203. ixp4xx_sys_init();
  204. /* gpio 14 and 15 are _not_ clocks */
  205. *IXP4XX_GPIO_GPCLKR = 0;
  206. nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
  207. nas100d_flash_resource.end =
  208. IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
  209. i2c_register_board_info(0, nas100d_i2c_board_info,
  210. ARRAY_SIZE(nas100d_i2c_board_info));
  211. /*
  212. * This is only useful on a modified machine, but it is valuable
  213. * to have it first in order to see debug messages, and so that
  214. * it does *not* get removed if platform_add_devices fails!
  215. */
  216. (void)platform_device_register(&nas100d_uart);
  217. platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
  218. pm_power_off = nas100d_power_off;
  219. if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler,
  220. IRQF_DISABLED | IRQF_TRIGGER_LOW,
  221. "NAS100D reset button", NULL) < 0) {
  222. printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
  223. gpio_to_irq(NAS100D_RB_GPIO));
  224. }
  225. /* The power button on the Iomega NAS100d is on GPIO 14, but
  226. * it cannot handle interrupts on that GPIO line. So we'll
  227. * have to poll it with a kernel timer.
  228. */
  229. /* Make sure that the power button GPIO is set up as an input */
  230. gpio_line_config(NAS100D_PB_GPIO, IXP4XX_GPIO_IN);
  231. /* Set the initial value for the power button IRQ handler */
  232. power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
  233. mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
  234. /*
  235. * Map in a portion of the flash and read the MAC address.
  236. * Since it is stored in BE in the flash itself, we need to
  237. * byteswap it if we're in LE mode.
  238. */
  239. f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
  240. if (f) {
  241. for (i = 0; i < 6; i++)
  242. #ifdef __ARMEB__
  243. nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i);
  244. #else
  245. nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3));
  246. #endif
  247. iounmap(f);
  248. }
  249. printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
  250. nas100d_plat_eth[0].hwaddr);
  251. }
  252. MACHINE_START(NAS100D, "Iomega NAS 100d")
  253. /* Maintainer: www.nslu2-linux.org */
  254. .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
  255. .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
  256. .boot_params = 0x00000100,
  257. .map_io = ixp4xx_map_io,
  258. .init_irq = ixp4xx_init_irq,
  259. .timer = &ixp4xx_timer,
  260. .init_machine = nas100d_init,
  261. MACHINE_END