mux.c 2.4 KB

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  1. /*
  2. * Utility to set the DAVINCI MUX register from a table in mux.h
  3. *
  4. * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
  5. *
  6. * Based on linux/arch/arm/plat-omap/mux.c:
  7. * Copyright (C) 2003 - 2005 Nokia Corporation
  8. *
  9. * Written by Tony Lindgren
  10. *
  11. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  12. * the terms of the GNU General Public License version 2. This program
  13. * is licensed "as is" without any warranty of any kind, whether express
  14. * or implied.
  15. *
  16. * Copyright (C) 2008 Texas Instruments.
  17. */
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/spinlock.h>
  21. #include <mach/hardware.h>
  22. #include <mach/mux.h>
  23. static const struct mux_config *mux_table;
  24. static unsigned long pin_table_sz;
  25. int __init davinci_mux_register(const struct mux_config *pins,
  26. unsigned long size)
  27. {
  28. mux_table = pins;
  29. pin_table_sz = size;
  30. return 0;
  31. }
  32. /*
  33. * Sets the DAVINCI MUX register based on the table
  34. */
  35. int __init_or_module davinci_cfg_reg(const unsigned long index)
  36. {
  37. static DEFINE_SPINLOCK(mux_spin_lock);
  38. void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
  39. unsigned long flags;
  40. const struct mux_config *cfg;
  41. unsigned int reg_orig = 0, reg = 0;
  42. unsigned int mask, warn = 0;
  43. if (!mux_table)
  44. BUG();
  45. if (index >= pin_table_sz) {
  46. printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
  47. index, pin_table_sz);
  48. dump_stack();
  49. return -ENODEV;
  50. }
  51. cfg = &mux_table[index];
  52. if (cfg->name == NULL) {
  53. printk(KERN_ERR "No entry for the specified index\n");
  54. return -ENODEV;
  55. }
  56. /* Update the mux register in question */
  57. if (cfg->mask) {
  58. unsigned tmp1, tmp2;
  59. spin_lock_irqsave(&mux_spin_lock, flags);
  60. reg_orig = __raw_readl(base + cfg->mux_reg);
  61. mask = (cfg->mask << cfg->mask_offset);
  62. tmp1 = reg_orig & mask;
  63. reg = reg_orig & ~mask;
  64. tmp2 = (cfg->mode << cfg->mask_offset);
  65. reg |= tmp2;
  66. if (tmp1 != tmp2)
  67. warn = 1;
  68. __raw_writel(reg, base + cfg->mux_reg);
  69. spin_unlock_irqrestore(&mux_spin_lock, flags);
  70. }
  71. if (warn) {
  72. #ifdef CONFIG_DAVINCI_MUX_WARNINGS
  73. printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
  74. #endif
  75. }
  76. #ifdef CONFIG_DAVINCI_MUX_DEBUG
  77. if (cfg->debug || warn) {
  78. printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name);
  79. printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n",
  80. cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
  81. }
  82. #endif
  83. return 0;
  84. }
  85. EXPORT_SYMBOL(davinci_cfg_reg);