clock.h 2.2 KB

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  1. /*
  2. * TI DaVinci clock definitions
  3. *
  4. * Copyright (C) 2006-2007 Texas Instruments.
  5. * Copyright (C) 2008-2009 Deep Root Systems, LLC
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #ifndef __ARCH_ARM_DAVINCI_CLOCK_H
  12. #define __ARCH_ARM_DAVINCI_CLOCK_H
  13. #include <linux/list.h>
  14. #include <asm/clkdev.h>
  15. #define DAVINCI_PLL1_BASE 0x01c40800
  16. #define DAVINCI_PLL2_BASE 0x01c40c00
  17. #define MAX_PLL 2
  18. /* PLL/Reset register offsets */
  19. #define PLLCTL 0x100
  20. #define PLLCTL_PLLEN BIT(0)
  21. #define PLLCTL_CLKMODE BIT(8)
  22. #define PLLM 0x110
  23. #define PLLM_PLLM_MASK 0xff
  24. #define PREDIV 0x114
  25. #define PLLDIV1 0x118
  26. #define PLLDIV2 0x11c
  27. #define PLLDIV3 0x120
  28. #define POSTDIV 0x128
  29. #define BPDIV 0x12c
  30. #define PLLCMD 0x138
  31. #define PLLSTAT 0x13c
  32. #define PLLALNCTL 0x140
  33. #define PLLDCHANGE 0x144
  34. #define PLLCKEN 0x148
  35. #define PLLCKSTAT 0x14c
  36. #define PLLSYSTAT 0x150
  37. #define PLLDIV4 0x160
  38. #define PLLDIV5 0x164
  39. #define PLLDIV6 0x168
  40. #define PLLDIV7 0x16c
  41. #define PLLDIV8 0x170
  42. #define PLLDIV9 0x174
  43. #define PLLDIV_EN BIT(15)
  44. #define PLLDIV_RATIO_MASK 0x1f
  45. struct pll_data {
  46. u32 phys_base;
  47. void __iomem *base;
  48. u32 num;
  49. u32 flags;
  50. u32 input_rate;
  51. };
  52. #define PLL_HAS_PREDIV 0x01
  53. #define PLL_HAS_POSTDIV 0x02
  54. struct clk {
  55. struct list_head node;
  56. struct module *owner;
  57. const char *name;
  58. unsigned long rate;
  59. u8 usecount;
  60. u8 flags;
  61. u8 lpsc;
  62. struct clk *parent;
  63. struct pll_data *pll_data;
  64. u32 div_reg;
  65. };
  66. /* Clock flags */
  67. #define ALWAYS_ENABLED BIT(1)
  68. #define CLK_PSC BIT(2)
  69. #define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */
  70. #define CLK_PLL BIT(4) /* PLL-derived clock */
  71. #define PRE_PLL BIT(5) /* source is before PLL mult/div */
  72. struct davinci_clk {
  73. struct clk_lookup lk;
  74. };
  75. #define CLK(dev, con, ck) \
  76. { \
  77. .lk = { \
  78. .dev_id = dev, \
  79. .con_id = con, \
  80. .clk = ck, \
  81. }, \
  82. }
  83. int davinci_clk_init(struct davinci_clk *clocks);
  84. #endif