hardware.h 2.4 KB

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  1. /*
  2. * arch/arm/mach-at91/include/mach/hardware.h
  3. *
  4. * Copyright (C) 2003 SAN People
  5. * Copyright (C) 2003 ATMEL
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. */
  13. #ifndef __ASM_ARCH_HARDWARE_H
  14. #define __ASM_ARCH_HARDWARE_H
  15. #include <asm/sizes.h>
  16. #if defined(CONFIG_ARCH_AT91RM9200)
  17. #include <mach/at91rm9200.h>
  18. #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
  19. #include <mach/at91sam9260.h>
  20. #elif defined(CONFIG_ARCH_AT91SAM9261)
  21. #include <mach/at91sam9261.h>
  22. #elif defined(CONFIG_ARCH_AT91SAM9263)
  23. #include <mach/at91sam9263.h>
  24. #elif defined(CONFIG_ARCH_AT91SAM9RL)
  25. #include <mach/at91sam9rl.h>
  26. #elif defined(CONFIG_ARCH_AT91CAP9)
  27. #include <mach/at91cap9.h>
  28. #elif defined(CONFIG_ARCH_AT91X40)
  29. #include <mach/at91x40.h>
  30. #else
  31. #error "Unsupported AT91 processor"
  32. #endif
  33. #ifdef CONFIG_MMU
  34. /*
  35. * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
  36. * to 0xFEF78000 .. 0xFF000000. (544Kb)
  37. */
  38. #define AT91_IO_PHYS_BASE 0xFFF78000
  39. #define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE)
  40. #else
  41. /*
  42. * Identity mapping for the non MMU case.
  43. */
  44. #define AT91_IO_PHYS_BASE AT91_BASE_SYS
  45. #define AT91_IO_VIRT_BASE AT91_IO_PHYS_BASE
  46. #endif
  47. #define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
  48. /* Convert a physical IO address to virtual IO address */
  49. #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
  50. /*
  51. * Virtual to Physical Address mapping for IO devices.
  52. */
  53. #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
  54. #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC)
  55. /* Internal SRAM is mapped below the IO devices */
  56. #define AT91_SRAM_MAX SZ_1M
  57. #define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
  58. /* Serial ports */
  59. #define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */
  60. /* External Memory Map */
  61. #define AT91_CHIPSELECT_0 0x10000000
  62. #define AT91_CHIPSELECT_1 0x20000000
  63. #define AT91_CHIPSELECT_2 0x30000000
  64. #define AT91_CHIPSELECT_3 0x40000000
  65. #define AT91_CHIPSELECT_4 0x50000000
  66. #define AT91_CHIPSELECT_5 0x60000000
  67. #define AT91_CHIPSELECT_6 0x70000000
  68. #define AT91_CHIPSELECT_7 0x80000000
  69. /* SDRAM */
  70. #ifdef CONFIG_DRAM_BASE
  71. #define AT91_SDRAM_BASE CONFIG_DRAM_BASE
  72. #else
  73. #define AT91_SDRAM_BASE AT91_CHIPSELECT_1
  74. #endif
  75. /* Clocks */
  76. #define AT91_SLOW_CLOCK 32768 /* slow clock */
  77. #endif