head-common.S 6.5 KB

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  1. /*
  2. * linux/arch/arm/kernel/head-common.S
  3. *
  4. * Copyright (C) 1994-2002 Russell King
  5. * Copyright (c) 2003 ARM Limited
  6. * All Rights Reserved
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #define ATAG_CORE 0x54410001
  14. #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
  15. .type __switch_data, %object
  16. __switch_data:
  17. .long __mmap_switched
  18. .long __data_loc @ r4
  19. .long _data @ r5
  20. .long __bss_start @ r6
  21. .long _end @ r7
  22. .long processor_id @ r4
  23. .long __machine_arch_type @ r5
  24. .long __atags_pointer @ r6
  25. .long cr_alignment @ r7
  26. .long init_thread_union + THREAD_START_SP @ sp
  27. /*
  28. * The following fragment of code is executed with the MMU on in MMU mode,
  29. * and uses absolute addresses; this is not position independent.
  30. *
  31. * r0 = cp#15 control register
  32. * r1 = machine ID
  33. * r2 = atags pointer
  34. * r9 = processor ID
  35. */
  36. __mmap_switched:
  37. adr r3, __switch_data + 4
  38. ldmia r3!, {r4, r5, r6, r7}
  39. cmp r4, r5 @ Copy data segment if needed
  40. 1: cmpne r5, r6
  41. ldrne fp, [r4], #4
  42. strne fp, [r5], #4
  43. bne 1b
  44. mov fp, #0 @ Clear BSS (and zero fp)
  45. 1: cmp r6, r7
  46. strcc fp, [r6],#4
  47. bcc 1b
  48. ldmia r3, {r4, r5, r6, r7, sp}
  49. str r9, [r4] @ Save processor ID
  50. str r1, [r5] @ Save machine type
  51. str r2, [r6] @ Save atags pointer
  52. bic r4, r0, #CR_A @ Clear 'A' bit
  53. stmia r7, {r0, r4} @ Save control register values
  54. b start_kernel
  55. ENDPROC(__mmap_switched)
  56. /*
  57. * Exception handling. Something went wrong and we can't proceed. We
  58. * ought to tell the user, but since we don't have any guarantee that
  59. * we're even running on the right architecture, we do virtually nothing.
  60. *
  61. * If CONFIG_DEBUG_LL is set we try to print out something about the error
  62. * and hope for the best (useful if bootloader fails to pass a proper
  63. * machine ID for example).
  64. */
  65. __error_p:
  66. #ifdef CONFIG_DEBUG_LL
  67. adr r0, str_p1
  68. bl printascii
  69. mov r0, r9
  70. bl printhex8
  71. adr r0, str_p2
  72. bl printascii
  73. b __error
  74. str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x"
  75. str_p2: .asciz ").\n"
  76. .align
  77. #endif
  78. ENDPROC(__error_p)
  79. __error_a:
  80. #ifdef CONFIG_DEBUG_LL
  81. mov r4, r1 @ preserve machine ID
  82. adr r0, str_a1
  83. bl printascii
  84. mov r0, r4
  85. bl printhex8
  86. adr r0, str_a2
  87. bl printascii
  88. adr r3, 3f
  89. ldmia r3, {r4, r5, r6} @ get machine desc list
  90. sub r4, r3, r4 @ get offset between virt&phys
  91. add r5, r5, r4 @ convert virt addresses to
  92. add r6, r6, r4 @ physical address space
  93. 1: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type
  94. bl printhex8
  95. mov r0, #'\t'
  96. bl printch
  97. ldr r0, [r5, #MACHINFO_NAME] @ get machine name
  98. add r0, r0, r4
  99. bl printascii
  100. mov r0, #'\n'
  101. bl printch
  102. add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
  103. cmp r5, r6
  104. blo 1b
  105. adr r0, str_a3
  106. bl printascii
  107. b __error
  108. ENDPROC(__error_a)
  109. str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
  110. str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
  111. str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
  112. .align
  113. #endif
  114. __error:
  115. #ifdef CONFIG_ARCH_RPC
  116. /*
  117. * Turn the screen red on a error - RiscPC only.
  118. */
  119. mov r0, #0x02000000
  120. mov r3, #0x11
  121. orr r3, r3, r3, lsl #8
  122. orr r3, r3, r3, lsl #16
  123. str r3, [r0], #4
  124. str r3, [r0], #4
  125. str r3, [r0], #4
  126. str r3, [r0], #4
  127. #endif
  128. 1: mov r0, r0
  129. b 1b
  130. ENDPROC(__error)
  131. /*
  132. * Read processor ID register (CP#15, CR0), and look up in the linker-built
  133. * supported processor list. Note that we can't use the absolute addresses
  134. * for the __proc_info lists since we aren't running with the MMU on
  135. * (and therefore, we are not in the correct address space). We have to
  136. * calculate the offset.
  137. *
  138. * r9 = cpuid
  139. * Returns:
  140. * r3, r4, r6 corrupted
  141. * r5 = proc_info pointer in physical address space
  142. * r9 = cpuid (preserved)
  143. */
  144. __lookup_processor_type:
  145. adr r3, 3f
  146. ldmda r3, {r5 - r7}
  147. sub r3, r3, r7 @ get offset between virt&phys
  148. add r5, r5, r3 @ convert virt addresses to
  149. add r6, r6, r3 @ physical address space
  150. 1: ldmia r5, {r3, r4} @ value, mask
  151. and r4, r4, r9 @ mask wanted bits
  152. teq r3, r4
  153. beq 2f
  154. add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
  155. cmp r5, r6
  156. blo 1b
  157. mov r5, #0 @ unknown processor
  158. 2: mov pc, lr
  159. ENDPROC(__lookup_processor_type)
  160. /*
  161. * This provides a C-API version of the above function.
  162. */
  163. ENTRY(lookup_processor_type)
  164. stmfd sp!, {r4 - r7, r9, lr}
  165. mov r9, r0
  166. bl __lookup_processor_type
  167. mov r0, r5
  168. ldmfd sp!, {r4 - r7, r9, pc}
  169. ENDPROC(lookup_processor_type)
  170. /*
  171. * Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for
  172. * more information about the __proc_info and __arch_info structures.
  173. */
  174. .long __proc_info_begin
  175. .long __proc_info_end
  176. 3: .long .
  177. .long __arch_info_begin
  178. .long __arch_info_end
  179. /*
  180. * Lookup machine architecture in the linker-build list of architectures.
  181. * Note that we can't use the absolute addresses for the __arch_info
  182. * lists since we aren't running with the MMU on (and therefore, we are
  183. * not in the correct address space). We have to calculate the offset.
  184. *
  185. * r1 = machine architecture number
  186. * Returns:
  187. * r3, r4, r6 corrupted
  188. * r5 = mach_info pointer in physical address space
  189. */
  190. __lookup_machine_type:
  191. adr r3, 3b
  192. ldmia r3, {r4, r5, r6}
  193. sub r3, r3, r4 @ get offset between virt&phys
  194. add r5, r5, r3 @ convert virt addresses to
  195. add r6, r6, r3 @ physical address space
  196. 1: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type
  197. teq r3, r1 @ matches loader number?
  198. beq 2f @ found
  199. add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
  200. cmp r5, r6
  201. blo 1b
  202. mov r5, #0 @ unknown machine
  203. 2: mov pc, lr
  204. ENDPROC(__lookup_machine_type)
  205. /*
  206. * This provides a C-API version of the above function.
  207. */
  208. ENTRY(lookup_machine_type)
  209. stmfd sp!, {r4 - r6, lr}
  210. mov r1, r0
  211. bl __lookup_machine_type
  212. mov r0, r5
  213. ldmfd sp!, {r4 - r6, pc}
  214. ENDPROC(lookup_machine_type)
  215. /* Determine validity of the r2 atags pointer. The heuristic requires
  216. * that the pointer be aligned, in the first 16k of physical RAM and
  217. * that the ATAG_CORE marker is first and present. Future revisions
  218. * of this function may be more lenient with the physical address and
  219. * may also be able to move the ATAGS block if necessary.
  220. *
  221. * r8 = machinfo
  222. *
  223. * Returns:
  224. * r2 either valid atags pointer, or zero
  225. * r5, r6 corrupted
  226. */
  227. __vet_atags:
  228. tst r2, #0x3 @ aligned?
  229. bne 1f
  230. ldr r5, [r2, #0] @ is first tag ATAG_CORE?
  231. subs r5, r5, #ATAG_CORE_SIZE
  232. bne 1f
  233. ldr r5, [r2, #4]
  234. ldr r6, =ATAG_CORE
  235. cmp r5, r6
  236. bne 1f
  237. mov pc, lr @ atag pointer is ok
  238. 1: mov r2, #0
  239. mov pc, lr
  240. ENDPROC(__vet_atags)