irq_alpha.c 6.7 KB

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  1. /*
  2. * Alpha specific irq code.
  3. */
  4. #include <linux/init.h>
  5. #include <linux/sched.h>
  6. #include <linux/irq.h>
  7. #include <linux/kernel_stat.h>
  8. #include <linux/module.h>
  9. #include <asm/machvec.h>
  10. #include <asm/dma.h>
  11. #include "proto.h"
  12. #include "irq_impl.h"
  13. /* Hack minimum IPL during interrupt processing for broken hardware. */
  14. #ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
  15. int __min_ipl;
  16. EXPORT_SYMBOL(__min_ipl);
  17. #endif
  18. /*
  19. * Performance counter hook. A module can override this to
  20. * do something useful.
  21. */
  22. static void
  23. dummy_perf(unsigned long vector, struct pt_regs *regs)
  24. {
  25. irq_err_count++;
  26. printk(KERN_CRIT "Performance counter interrupt!\n");
  27. }
  28. void (*perf_irq)(unsigned long, struct pt_regs *) = dummy_perf;
  29. EXPORT_SYMBOL(perf_irq);
  30. /*
  31. * The main interrupt entry point.
  32. */
  33. asmlinkage void
  34. do_entInt(unsigned long type, unsigned long vector,
  35. unsigned long la_ptr, struct pt_regs *regs)
  36. {
  37. struct pt_regs *old_regs;
  38. switch (type) {
  39. case 0:
  40. #ifdef CONFIG_SMP
  41. handle_ipi(regs);
  42. return;
  43. #else
  44. irq_err_count++;
  45. printk(KERN_CRIT "Interprocessor interrupt? "
  46. "You must be kidding!\n");
  47. #endif
  48. break;
  49. case 1:
  50. old_regs = set_irq_regs(regs);
  51. #ifdef CONFIG_SMP
  52. {
  53. long cpu;
  54. local_irq_disable();
  55. smp_percpu_timer_interrupt(regs);
  56. cpu = smp_processor_id();
  57. if (cpu != boot_cpuid) {
  58. kstat_incr_irqs_this_cpu(RTC_IRQ, irq_to_desc(RTC_IRQ));
  59. } else {
  60. handle_irq(RTC_IRQ);
  61. }
  62. }
  63. #else
  64. handle_irq(RTC_IRQ);
  65. #endif
  66. set_irq_regs(old_regs);
  67. return;
  68. case 2:
  69. old_regs = set_irq_regs(regs);
  70. alpha_mv.machine_check(vector, la_ptr);
  71. set_irq_regs(old_regs);
  72. return;
  73. case 3:
  74. old_regs = set_irq_regs(regs);
  75. alpha_mv.device_interrupt(vector);
  76. set_irq_regs(old_regs);
  77. return;
  78. case 4:
  79. perf_irq(la_ptr, regs);
  80. return;
  81. default:
  82. printk(KERN_CRIT "Hardware intr %ld %lx? Huh?\n",
  83. type, vector);
  84. }
  85. printk(KERN_CRIT "PC = %016lx PS=%04lx\n", regs->pc, regs->ps);
  86. }
  87. void __init
  88. common_init_isa_dma(void)
  89. {
  90. outb(0, DMA1_RESET_REG);
  91. outb(0, DMA2_RESET_REG);
  92. outb(0, DMA1_CLR_MASK_REG);
  93. outb(0, DMA2_CLR_MASK_REG);
  94. }
  95. void __init
  96. init_IRQ(void)
  97. {
  98. /* Just in case the platform init_irq() causes interrupts/mchecks
  99. (as is the case with RAWHIDE, at least). */
  100. wrent(entInt, 0);
  101. alpha_mv.init_irq();
  102. }
  103. /*
  104. * machine error checks
  105. */
  106. #define MCHK_K_TPERR 0x0080
  107. #define MCHK_K_TCPERR 0x0082
  108. #define MCHK_K_HERR 0x0084
  109. #define MCHK_K_ECC_C 0x0086
  110. #define MCHK_K_ECC_NC 0x0088
  111. #define MCHK_K_OS_BUGCHECK 0x008A
  112. #define MCHK_K_PAL_BUGCHECK 0x0090
  113. #ifndef CONFIG_SMP
  114. struct mcheck_info __mcheck_info;
  115. #endif
  116. void
  117. process_mcheck_info(unsigned long vector, unsigned long la_ptr,
  118. const char *machine, int expected)
  119. {
  120. struct el_common *mchk_header;
  121. const char *reason;
  122. /*
  123. * See if the machine check is due to a badaddr() and if so,
  124. * ignore it.
  125. */
  126. #ifdef CONFIG_VERBOSE_MCHECK
  127. if (alpha_verbose_mcheck > 1) {
  128. printk(KERN_CRIT "%s machine check %s\n", machine,
  129. expected ? "expected." : "NOT expected!!!");
  130. }
  131. #endif
  132. if (expected) {
  133. int cpu = smp_processor_id();
  134. mcheck_expected(cpu) = 0;
  135. mcheck_taken(cpu) = 1;
  136. return;
  137. }
  138. mchk_header = (struct el_common *)la_ptr;
  139. printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
  140. machine, vector, get_irq_regs()->pc, mchk_header->code);
  141. switch (mchk_header->code) {
  142. /* Machine check reasons. Defined according to PALcode sources. */
  143. case 0x80: reason = "tag parity error"; break;
  144. case 0x82: reason = "tag control parity error"; break;
  145. case 0x84: reason = "generic hard error"; break;
  146. case 0x86: reason = "correctable ECC error"; break;
  147. case 0x88: reason = "uncorrectable ECC error"; break;
  148. case 0x8A: reason = "OS-specific PAL bugcheck"; break;
  149. case 0x90: reason = "callsys in kernel mode"; break;
  150. case 0x96: reason = "i-cache read retryable error"; break;
  151. case 0x98: reason = "processor detected hard error"; break;
  152. /* System specific (these are for Alcor, at least): */
  153. case 0x202: reason = "system detected hard error"; break;
  154. case 0x203: reason = "system detected uncorrectable ECC error"; break;
  155. case 0x204: reason = "SIO SERR occurred on PCI bus"; break;
  156. case 0x205: reason = "parity error detected by core logic"; break;
  157. case 0x206: reason = "SIO IOCHK occurred on ISA bus"; break;
  158. case 0x207: reason = "non-existent memory error"; break;
  159. case 0x208: reason = "MCHK_K_DCSR"; break;
  160. case 0x209: reason = "PCI SERR detected"; break;
  161. case 0x20b: reason = "PCI data parity error detected"; break;
  162. case 0x20d: reason = "PCI address parity error detected"; break;
  163. case 0x20f: reason = "PCI master abort error"; break;
  164. case 0x211: reason = "PCI target abort error"; break;
  165. case 0x213: reason = "scatter/gather PTE invalid error"; break;
  166. case 0x215: reason = "flash ROM write error"; break;
  167. case 0x217: reason = "IOA timeout detected"; break;
  168. case 0x219: reason = "IOCHK#, EISA add-in board parity or other catastrophic error"; break;
  169. case 0x21b: reason = "EISA fail-safe timer timeout"; break;
  170. case 0x21d: reason = "EISA bus time-out"; break;
  171. case 0x21f: reason = "EISA software generated NMI"; break;
  172. case 0x221: reason = "unexpected ev5 IRQ[3] interrupt"; break;
  173. default: reason = "unknown"; break;
  174. }
  175. printk(KERN_CRIT "machine check type: %s%s\n",
  176. reason, mchk_header->retry ? " (retryable)" : "");
  177. dik_show_regs(get_irq_regs(), NULL);
  178. #ifdef CONFIG_VERBOSE_MCHECK
  179. if (alpha_verbose_mcheck > 1) {
  180. /* Dump the logout area to give all info. */
  181. unsigned long *ptr = (unsigned long *)la_ptr;
  182. long i;
  183. for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
  184. printk(KERN_CRIT " +%8lx %016lx %016lx\n",
  185. i*sizeof(long), ptr[i], ptr[i+1]);
  186. }
  187. }
  188. #endif /* CONFIG_VERBOSE_MCHECK */
  189. }
  190. /*
  191. * The special RTC interrupt type. The interrupt itself was
  192. * processed by PALcode, and comes in via entInt vector 1.
  193. */
  194. static void rtc_enable_disable(unsigned int irq) { }
  195. static unsigned int rtc_startup(unsigned int irq) { return 0; }
  196. struct irqaction timer_irqaction = {
  197. .handler = timer_interrupt,
  198. .flags = IRQF_DISABLED,
  199. .name = "timer",
  200. };
  201. static struct hw_interrupt_type rtc_irq_type = {
  202. .typename = "RTC",
  203. .startup = rtc_startup,
  204. .shutdown = rtc_enable_disable,
  205. .enable = rtc_enable_disable,
  206. .disable = rtc_enable_disable,
  207. .ack = rtc_enable_disable,
  208. .end = rtc_enable_disable,
  209. };
  210. void __init
  211. init_rtc_irq(void)
  212. {
  213. irq_desc[RTC_IRQ].status = IRQ_DISABLED;
  214. irq_desc[RTC_IRQ].chip = &rtc_irq_type;
  215. setup_irq(RTC_IRQ, &timer_irqaction);
  216. }
  217. /* Dummy irqactions. */
  218. struct irqaction isa_cascade_irqaction = {
  219. .handler = no_action,
  220. .name = "isa-cascade"
  221. };
  222. struct irqaction timer_cascade_irqaction = {
  223. .handler = no_action,
  224. .name = "timer-cascade"
  225. };
  226. struct irqaction halt_switch_irqaction = {
  227. .handler = no_action,
  228. .name = "halt-switch"
  229. };