DMA-API.txt 28 KB

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  1. Dynamic DMA mapping using the generic device
  2. ============================================
  3. James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
  4. This document describes the DMA API. For a more gentle introduction
  5. phrased in terms of the pci_ equivalents (and actual examples) see
  6. Documentation/PCI/PCI-DMA-mapping.txt.
  7. This API is split into two pieces. Part I describes the API and the
  8. corresponding pci_ API. Part II describes the extensions to the API
  9. for supporting non-consistent memory machines. Unless you know that
  10. your driver absolutely has to support non-consistent platforms (this
  11. is usually only legacy platforms) you should only use the API
  12. described in part I.
  13. Part I - pci_ and dma_ Equivalent API
  14. -------------------------------------
  15. To get the pci_ API, you must #include <linux/pci.h>
  16. To get the dma_ API, you must #include <linux/dma-mapping.h>
  17. Part Ia - Using large dma-coherent buffers
  18. ------------------------------------------
  19. void *
  20. dma_alloc_coherent(struct device *dev, size_t size,
  21. dma_addr_t *dma_handle, gfp_t flag)
  22. void *
  23. pci_alloc_consistent(struct pci_dev *dev, size_t size,
  24. dma_addr_t *dma_handle)
  25. Consistent memory is memory for which a write by either the device or
  26. the processor can immediately be read by the processor or device
  27. without having to worry about caching effects. (You may however need
  28. to make sure to flush the processor's write buffers before telling
  29. devices to read that memory.)
  30. This routine allocates a region of <size> bytes of consistent memory.
  31. It also returns a <dma_handle> which may be cast to an unsigned
  32. integer the same width as the bus and used as the physical address
  33. base of the region.
  34. Returns: a pointer to the allocated region (in the processor's virtual
  35. address space) or NULL if the allocation failed.
  36. Note: consistent memory can be expensive on some platforms, and the
  37. minimum allocation length may be as big as a page, so you should
  38. consolidate your requests for consistent memory as much as possible.
  39. The simplest way to do that is to use the dma_pool calls (see below).
  40. The flag parameter (dma_alloc_coherent only) allows the caller to
  41. specify the GFP_ flags (see kmalloc) for the allocation (the
  42. implementation may choose to ignore flags that affect the location of
  43. the returned memory, like GFP_DMA). For pci_alloc_consistent, you
  44. must assume GFP_ATOMIC behaviour.
  45. void
  46. dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
  47. dma_addr_t dma_handle)
  48. void
  49. pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr,
  50. dma_addr_t dma_handle)
  51. Free the region of consistent memory you previously allocated. dev,
  52. size and dma_handle must all be the same as those passed into the
  53. consistent allocate. cpu_addr must be the virtual address returned by
  54. the consistent allocate.
  55. Note that unlike their sibling allocation calls, these routines
  56. may only be called with IRQs enabled.
  57. Part Ib - Using small dma-coherent buffers
  58. ------------------------------------------
  59. To get this part of the dma_ API, you must #include <linux/dmapool.h>
  60. Many drivers need lots of small dma-coherent memory regions for DMA
  61. descriptors or I/O buffers. Rather than allocating in units of a page
  62. or more using dma_alloc_coherent(), you can use DMA pools. These work
  63. much like a struct kmem_cache, except that they use the dma-coherent allocator,
  64. not __get_free_pages(). Also, they understand common hardware constraints
  65. for alignment, like queue heads needing to be aligned on N-byte boundaries.
  66. struct dma_pool *
  67. dma_pool_create(const char *name, struct device *dev,
  68. size_t size, size_t align, size_t alloc);
  69. struct pci_pool *
  70. pci_pool_create(const char *name, struct pci_device *dev,
  71. size_t size, size_t align, size_t alloc);
  72. The pool create() routines initialize a pool of dma-coherent buffers
  73. for use with a given device. It must be called in a context which
  74. can sleep.
  75. The "name" is for diagnostics (like a struct kmem_cache name); dev and size
  76. are like what you'd pass to dma_alloc_coherent(). The device's hardware
  77. alignment requirement for this type of data is "align" (which is expressed
  78. in bytes, and must be a power of two). If your device has no boundary
  79. crossing restrictions, pass 0 for alloc; passing 4096 says memory allocated
  80. from this pool must not cross 4KByte boundaries.
  81. void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,
  82. dma_addr_t *dma_handle);
  83. void *pci_pool_alloc(struct pci_pool *pool, gfp_t gfp_flags,
  84. dma_addr_t *dma_handle);
  85. This allocates memory from the pool; the returned memory will meet the size
  86. and alignment requirements specified at creation time. Pass GFP_ATOMIC to
  87. prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks),
  88. pass GFP_KERNEL to allow blocking. Like dma_alloc_coherent(), this returns
  89. two values: an address usable by the cpu, and the dma address usable by the
  90. pool's device.
  91. void dma_pool_free(struct dma_pool *pool, void *vaddr,
  92. dma_addr_t addr);
  93. void pci_pool_free(struct pci_pool *pool, void *vaddr,
  94. dma_addr_t addr);
  95. This puts memory back into the pool. The pool is what was passed to
  96. the pool allocation routine; the cpu (vaddr) and dma addresses are what
  97. were returned when that routine allocated the memory being freed.
  98. void dma_pool_destroy(struct dma_pool *pool);
  99. void pci_pool_destroy(struct pci_pool *pool);
  100. The pool destroy() routines free the resources of the pool. They must be
  101. called in a context which can sleep. Make sure you've freed all allocated
  102. memory back to the pool before you destroy it.
  103. Part Ic - DMA addressing limitations
  104. ------------------------------------
  105. int
  106. dma_supported(struct device *dev, u64 mask)
  107. int
  108. pci_dma_supported(struct pci_dev *hwdev, u64 mask)
  109. Checks to see if the device can support DMA to the memory described by
  110. mask.
  111. Returns: 1 if it can and 0 if it can't.
  112. Notes: This routine merely tests to see if the mask is possible. It
  113. won't change the current mask settings. It is more intended as an
  114. internal API for use by the platform than an external API for use by
  115. driver writers.
  116. int
  117. dma_set_mask(struct device *dev, u64 mask)
  118. int
  119. pci_set_dma_mask(struct pci_device *dev, u64 mask)
  120. Checks to see if the mask is possible and updates the device
  121. parameters if it is.
  122. Returns: 0 if successful and a negative error if not.
  123. u64
  124. dma_get_required_mask(struct device *dev)
  125. This API returns the mask that the platform requires to
  126. operate efficiently. Usually this means the returned mask
  127. is the minimum required to cover all of memory. Examining the
  128. required mask gives drivers with variable descriptor sizes the
  129. opportunity to use smaller descriptors as necessary.
  130. Requesting the required mask does not alter the current mask. If you
  131. wish to take advantage of it, you should issue a dma_set_mask()
  132. call to set the mask to the value returned.
  133. Part Id - Streaming DMA mappings
  134. --------------------------------
  135. dma_addr_t
  136. dma_map_single(struct device *dev, void *cpu_addr, size_t size,
  137. enum dma_data_direction direction)
  138. dma_addr_t
  139. pci_map_single(struct pci_dev *hwdev, void *cpu_addr, size_t size,
  140. int direction)
  141. Maps a piece of processor virtual memory so it can be accessed by the
  142. device and returns the physical handle of the memory.
  143. The direction for both api's may be converted freely by casting.
  144. However the dma_ API uses a strongly typed enumerator for its
  145. direction:
  146. DMA_NONE = PCI_DMA_NONE no direction (used for
  147. debugging)
  148. DMA_TO_DEVICE = PCI_DMA_TODEVICE data is going from the
  149. memory to the device
  150. DMA_FROM_DEVICE = PCI_DMA_FROMDEVICE data is coming from
  151. the device to the
  152. memory
  153. DMA_BIDIRECTIONAL = PCI_DMA_BIDIRECTIONAL direction isn't known
  154. Notes: Not all memory regions in a machine can be mapped by this
  155. API. Further, regions that appear to be physically contiguous in
  156. kernel virtual space may not be contiguous as physical memory. Since
  157. this API does not provide any scatter/gather capability, it will fail
  158. if the user tries to map a non-physically contiguous piece of memory.
  159. For this reason, it is recommended that memory mapped by this API be
  160. obtained only from sources which guarantee it to be physically contiguous
  161. (like kmalloc).
  162. Further, the physical address of the memory must be within the
  163. dma_mask of the device (the dma_mask represents a bit mask of the
  164. addressable region for the device. I.e., if the physical address of
  165. the memory anded with the dma_mask is still equal to the physical
  166. address, then the device can perform DMA to the memory). In order to
  167. ensure that the memory allocated by kmalloc is within the dma_mask,
  168. the driver may specify various platform-dependent flags to restrict
  169. the physical memory range of the allocation (e.g. on x86, GFP_DMA
  170. guarantees to be within the first 16Mb of available physical memory,
  171. as required by ISA devices).
  172. Note also that the above constraints on physical contiguity and
  173. dma_mask may not apply if the platform has an IOMMU (a device which
  174. supplies a physical to virtual mapping between the I/O memory bus and
  175. the device). However, to be portable, device driver writers may *not*
  176. assume that such an IOMMU exists.
  177. Warnings: Memory coherency operates at a granularity called the cache
  178. line width. In order for memory mapped by this API to operate
  179. correctly, the mapped region must begin exactly on a cache line
  180. boundary and end exactly on one (to prevent two separately mapped
  181. regions from sharing a single cache line). Since the cache line size
  182. may not be known at compile time, the API will not enforce this
  183. requirement. Therefore, it is recommended that driver writers who
  184. don't take special care to determine the cache line size at run time
  185. only map virtual regions that begin and end on page boundaries (which
  186. are guaranteed also to be cache line boundaries).
  187. DMA_TO_DEVICE synchronisation must be done after the last modification
  188. of the memory region by the software and before it is handed off to
  189. the driver. Once this primitive is used, memory covered by this
  190. primitive should be treated as read-only by the device. If the device
  191. may write to it at any point, it should be DMA_BIDIRECTIONAL (see
  192. below).
  193. DMA_FROM_DEVICE synchronisation must be done before the driver
  194. accesses data that may be changed by the device. This memory should
  195. be treated as read-only by the driver. If the driver needs to write
  196. to it at any point, it should be DMA_BIDIRECTIONAL (see below).
  197. DMA_BIDIRECTIONAL requires special handling: it means that the driver
  198. isn't sure if the memory was modified before being handed off to the
  199. device and also isn't sure if the device will also modify it. Thus,
  200. you must always sync bidirectional memory twice: once before the
  201. memory is handed off to the device (to make sure all memory changes
  202. are flushed from the processor) and once before the data may be
  203. accessed after being used by the device (to make sure any processor
  204. cache lines are updated with data that the device may have changed).
  205. void
  206. dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  207. enum dma_data_direction direction)
  208. void
  209. pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
  210. size_t size, int direction)
  211. Unmaps the region previously mapped. All the parameters passed in
  212. must be identical to those passed in (and returned) by the mapping
  213. API.
  214. dma_addr_t
  215. dma_map_page(struct device *dev, struct page *page,
  216. unsigned long offset, size_t size,
  217. enum dma_data_direction direction)
  218. dma_addr_t
  219. pci_map_page(struct pci_dev *hwdev, struct page *page,
  220. unsigned long offset, size_t size, int direction)
  221. void
  222. dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  223. enum dma_data_direction direction)
  224. void
  225. pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
  226. size_t size, int direction)
  227. API for mapping and unmapping for pages. All the notes and warnings
  228. for the other mapping APIs apply here. Also, although the <offset>
  229. and <size> parameters are provided to do partial page mapping, it is
  230. recommended that you never use these unless you really know what the
  231. cache width is.
  232. int
  233. dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  234. int
  235. pci_dma_mapping_error(struct pci_dev *hwdev, dma_addr_t dma_addr)
  236. In some circumstances dma_map_single and dma_map_page will fail to create
  237. a mapping. A driver can check for these errors by testing the returned
  238. dma address with dma_mapping_error(). A non-zero return value means the mapping
  239. could not be created and the driver should take appropriate action (e.g.
  240. reduce current DMA mapping usage or delay and try again later).
  241. int
  242. dma_map_sg(struct device *dev, struct scatterlist *sg,
  243. int nents, enum dma_data_direction direction)
  244. int
  245. pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
  246. int nents, int direction)
  247. Returns: the number of physical segments mapped (this may be shorter
  248. than <nents> passed in if some elements of the scatter/gather list are
  249. physically or virtually adjacent and an IOMMU maps them with a single
  250. entry).
  251. Please note that the sg cannot be mapped again if it has been mapped once.
  252. The mapping process is allowed to destroy information in the sg.
  253. As with the other mapping interfaces, dma_map_sg can fail. When it
  254. does, 0 is returned and a driver must take appropriate action. It is
  255. critical that the driver do something, in the case of a block driver
  256. aborting the request or even oopsing is better than doing nothing and
  257. corrupting the filesystem.
  258. With scatterlists, you use the resulting mapping like this:
  259. int i, count = dma_map_sg(dev, sglist, nents, direction);
  260. struct scatterlist *sg;
  261. for_each_sg(sglist, sg, count, i) {
  262. hw_address[i] = sg_dma_address(sg);
  263. hw_len[i] = sg_dma_len(sg);
  264. }
  265. where nents is the number of entries in the sglist.
  266. The implementation is free to merge several consecutive sglist entries
  267. into one (e.g. with an IOMMU, or if several pages just happen to be
  268. physically contiguous) and returns the actual number of sg entries it
  269. mapped them to. On failure 0, is returned.
  270. Then you should loop count times (note: this can be less than nents times)
  271. and use sg_dma_address() and sg_dma_len() macros where you previously
  272. accessed sg->address and sg->length as shown above.
  273. void
  274. dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  275. int nhwentries, enum dma_data_direction direction)
  276. void
  277. pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
  278. int nents, int direction)
  279. Unmap the previously mapped scatter/gather list. All the parameters
  280. must be the same as those and passed in to the scatter/gather mapping
  281. API.
  282. Note: <nents> must be the number you passed in, *not* the number of
  283. physical entries returned.
  284. void
  285. dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
  286. enum dma_data_direction direction)
  287. void
  288. pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
  289. size_t size, int direction)
  290. void
  291. dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
  292. enum dma_data_direction direction)
  293. void
  294. pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
  295. int nelems, int direction)
  296. Synchronise a single contiguous or scatter/gather mapping. All the
  297. parameters must be the same as those passed into the single mapping
  298. API.
  299. Notes: You must do this:
  300. - Before reading values that have been written by DMA from the device
  301. (use the DMA_FROM_DEVICE direction)
  302. - After writing values that will be written to the device using DMA
  303. (use the DMA_TO_DEVICE) direction
  304. - before *and* after handing memory to the device if the memory is
  305. DMA_BIDIRECTIONAL
  306. See also dma_map_single().
  307. dma_addr_t
  308. dma_map_single_attrs(struct device *dev, void *cpu_addr, size_t size,
  309. enum dma_data_direction dir,
  310. struct dma_attrs *attrs)
  311. void
  312. dma_unmap_single_attrs(struct device *dev, dma_addr_t dma_addr,
  313. size_t size, enum dma_data_direction dir,
  314. struct dma_attrs *attrs)
  315. int
  316. dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
  317. int nents, enum dma_data_direction dir,
  318. struct dma_attrs *attrs)
  319. void
  320. dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sgl,
  321. int nents, enum dma_data_direction dir,
  322. struct dma_attrs *attrs)
  323. The four functions above are just like the counterpart functions
  324. without the _attrs suffixes, except that they pass an optional
  325. struct dma_attrs*.
  326. struct dma_attrs encapsulates a set of "dma attributes". For the
  327. definition of struct dma_attrs see linux/dma-attrs.h.
  328. The interpretation of dma attributes is architecture-specific, and
  329. each attribute should be documented in Documentation/DMA-attributes.txt.
  330. If struct dma_attrs* is NULL, the semantics of each of these
  331. functions is identical to those of the corresponding function
  332. without the _attrs suffix. As a result dma_map_single_attrs()
  333. can generally replace dma_map_single(), etc.
  334. As an example of the use of the *_attrs functions, here's how
  335. you could pass an attribute DMA_ATTR_FOO when mapping memory
  336. for DMA:
  337. #include <linux/dma-attrs.h>
  338. /* DMA_ATTR_FOO should be defined in linux/dma-attrs.h and
  339. * documented in Documentation/DMA-attributes.txt */
  340. ...
  341. DEFINE_DMA_ATTRS(attrs);
  342. dma_set_attr(DMA_ATTR_FOO, &attrs);
  343. ....
  344. n = dma_map_sg_attrs(dev, sg, nents, DMA_TO_DEVICE, &attr);
  345. ....
  346. Architectures that care about DMA_ATTR_FOO would check for its
  347. presence in their implementations of the mapping and unmapping
  348. routines, e.g.:
  349. void whizco_dma_map_sg_attrs(struct device *dev, dma_addr_t dma_addr,
  350. size_t size, enum dma_data_direction dir,
  351. struct dma_attrs *attrs)
  352. {
  353. ....
  354. int foo = dma_get_attr(DMA_ATTR_FOO, attrs);
  355. ....
  356. if (foo)
  357. /* twizzle the frobnozzle */
  358. ....
  359. Part II - Advanced dma_ usage
  360. -----------------------------
  361. Warning: These pieces of the DMA API have no PCI equivalent. They
  362. should also not be used in the majority of cases, since they cater for
  363. unlikely corner cases that don't belong in usual drivers.
  364. If you don't understand how cache line coherency works between a
  365. processor and an I/O device, you should not be using this part of the
  366. API at all.
  367. void *
  368. dma_alloc_noncoherent(struct device *dev, size_t size,
  369. dma_addr_t *dma_handle, gfp_t flag)
  370. Identical to dma_alloc_coherent() except that the platform will
  371. choose to return either consistent or non-consistent memory as it sees
  372. fit. By using this API, you are guaranteeing to the platform that you
  373. have all the correct and necessary sync points for this memory in the
  374. driver should it choose to return non-consistent memory.
  375. Note: where the platform can return consistent memory, it will
  376. guarantee that the sync points become nops.
  377. Warning: Handling non-consistent memory is a real pain. You should
  378. only ever use this API if you positively know your driver will be
  379. required to work on one of the rare (usually non-PCI) architectures
  380. that simply cannot make consistent memory.
  381. void
  382. dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
  383. dma_addr_t dma_handle)
  384. Free memory allocated by the nonconsistent API. All parameters must
  385. be identical to those passed in (and returned by
  386. dma_alloc_noncoherent()).
  387. int
  388. dma_is_consistent(struct device *dev, dma_addr_t dma_handle)
  389. Returns true if the device dev is performing consistent DMA on the memory
  390. area pointed to by the dma_handle.
  391. int
  392. dma_get_cache_alignment(void)
  393. Returns the processor cache alignment. This is the absolute minimum
  394. alignment *and* width that you must observe when either mapping
  395. memory or doing partial flushes.
  396. Notes: This API may return a number *larger* than the actual cache
  397. line, but it will guarantee that one or more cache lines fit exactly
  398. into the width returned by this call. It will also always be a power
  399. of two for easy alignment.
  400. void
  401. dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
  402. unsigned long offset, size_t size,
  403. enum dma_data_direction direction)
  404. Does a partial sync, starting at offset and continuing for size. You
  405. must be careful to observe the cache alignment and width when doing
  406. anything like this. You must also be extra careful about accessing
  407. memory you intend to sync partially.
  408. void
  409. dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  410. enum dma_data_direction direction)
  411. Do a partial sync of memory that was allocated by
  412. dma_alloc_noncoherent(), starting at virtual address vaddr and
  413. continuing on for size. Again, you *must* observe the cache line
  414. boundaries when doing this.
  415. int
  416. dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
  417. dma_addr_t device_addr, size_t size, int
  418. flags)
  419. Declare region of memory to be handed out by dma_alloc_coherent when
  420. it's asked for coherent memory for this device.
  421. bus_addr is the physical address to which the memory is currently
  422. assigned in the bus responding region (this will be used by the
  423. platform to perform the mapping).
  424. device_addr is the physical address the device needs to be programmed
  425. with actually to address this memory (this will be handed out as the
  426. dma_addr_t in dma_alloc_coherent()).
  427. size is the size of the area (must be multiples of PAGE_SIZE).
  428. flags can be or'd together and are:
  429. DMA_MEMORY_MAP - request that the memory returned from
  430. dma_alloc_coherent() be directly writable.
  431. DMA_MEMORY_IO - request that the memory returned from
  432. dma_alloc_coherent() be addressable using read/write/memcpy_toio etc.
  433. One or both of these flags must be present.
  434. DMA_MEMORY_INCLUDES_CHILDREN - make the declared memory be allocated by
  435. dma_alloc_coherent of any child devices of this one (for memory residing
  436. on a bridge).
  437. DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
  438. Do not allow dma_alloc_coherent() to fall back to system memory when
  439. it's out of memory in the declared region.
  440. The return value will be either DMA_MEMORY_MAP or DMA_MEMORY_IO and
  441. must correspond to a passed in flag (i.e. no returning DMA_MEMORY_IO
  442. if only DMA_MEMORY_MAP were passed in) for success or zero for
  443. failure.
  444. Note, for DMA_MEMORY_IO returns, all subsequent memory returned by
  445. dma_alloc_coherent() may no longer be accessed directly, but instead
  446. must be accessed using the correct bus functions. If your driver
  447. isn't prepared to handle this contingency, it should not specify
  448. DMA_MEMORY_IO in the input flags.
  449. As a simplification for the platforms, only *one* such region of
  450. memory may be declared per device.
  451. For reasons of efficiency, most platforms choose to track the declared
  452. region only at the granularity of a page. For smaller allocations,
  453. you should use the dma_pool() API.
  454. void
  455. dma_release_declared_memory(struct device *dev)
  456. Remove the memory region previously declared from the system. This
  457. API performs *no* in-use checking for this region and will return
  458. unconditionally having removed all the required structures. It is the
  459. driver's job to ensure that no parts of this memory region are
  460. currently in use.
  461. void *
  462. dma_mark_declared_memory_occupied(struct device *dev,
  463. dma_addr_t device_addr, size_t size)
  464. This is used to occupy specific regions of the declared space
  465. (dma_alloc_coherent() will hand out the first free region it finds).
  466. device_addr is the *device* address of the region requested.
  467. size is the size (and should be a page-sized multiple).
  468. The return value will be either a pointer to the processor virtual
  469. address of the memory, or an error (via PTR_ERR()) if any part of the
  470. region is occupied.
  471. Part III - Debug drivers use of the DMA-API
  472. -------------------------------------------
  473. The DMA-API as described above as some constraints. DMA addresses must be
  474. released with the corresponding function with the same size for example. With
  475. the advent of hardware IOMMUs it becomes more and more important that drivers
  476. do not violate those constraints. In the worst case such a violation can
  477. result in data corruption up to destroyed filesystems.
  478. To debug drivers and find bugs in the usage of the DMA-API checking code can
  479. be compiled into the kernel which will tell the developer about those
  480. violations. If your architecture supports it you can select the "Enable
  481. debugging of DMA-API usage" option in your kernel configuration. Enabling this
  482. option has a performance impact. Do not enable it in production kernels.
  483. If you boot the resulting kernel will contain code which does some bookkeeping
  484. about what DMA memory was allocated for which device. If this code detects an
  485. error it prints a warning message with some details into your kernel log. An
  486. example warning message may look like this:
  487. ------------[ cut here ]------------
  488. WARNING: at /data2/repos/linux-2.6-iommu/lib/dma-debug.c:448
  489. check_unmap+0x203/0x490()
  490. Hardware name:
  491. forcedeth 0000:00:08.0: DMA-API: device driver frees DMA memory with wrong
  492. function [device address=0x00000000640444be] [size=66 bytes] [mapped as
  493. single] [unmapped as page]
  494. Modules linked in: nfsd exportfs bridge stp llc r8169
  495. Pid: 0, comm: swapper Tainted: G W 2.6.28-dmatest-09289-g8bb99c0 #1
  496. Call Trace:
  497. <IRQ> [<ffffffff80240b22>] warn_slowpath+0xf2/0x130
  498. [<ffffffff80647b70>] _spin_unlock+0x10/0x30
  499. [<ffffffff80537e75>] usb_hcd_link_urb_to_ep+0x75/0xc0
  500. [<ffffffff80647c22>] _spin_unlock_irqrestore+0x12/0x40
  501. [<ffffffff8055347f>] ohci_urb_enqueue+0x19f/0x7c0
  502. [<ffffffff80252f96>] queue_work+0x56/0x60
  503. [<ffffffff80237e10>] enqueue_task_fair+0x20/0x50
  504. [<ffffffff80539279>] usb_hcd_submit_urb+0x379/0xbc0
  505. [<ffffffff803b78c3>] cpumask_next_and+0x23/0x40
  506. [<ffffffff80235177>] find_busiest_group+0x207/0x8a0
  507. [<ffffffff8064784f>] _spin_lock_irqsave+0x1f/0x50
  508. [<ffffffff803c7ea3>] check_unmap+0x203/0x490
  509. [<ffffffff803c8259>] debug_dma_unmap_page+0x49/0x50
  510. [<ffffffff80485f26>] nv_tx_done_optimized+0xc6/0x2c0
  511. [<ffffffff80486c13>] nv_nic_irq_optimized+0x73/0x2b0
  512. [<ffffffff8026df84>] handle_IRQ_event+0x34/0x70
  513. [<ffffffff8026ffe9>] handle_edge_irq+0xc9/0x150
  514. [<ffffffff8020e3ab>] do_IRQ+0xcb/0x1c0
  515. [<ffffffff8020c093>] ret_from_intr+0x0/0xa
  516. <EOI> <4>---[ end trace f6435a98e2a38c0e ]---
  517. The driver developer can find the driver and the device including a stacktrace
  518. of the DMA-API call which caused this warning.
  519. Per default only the first error will result in a warning message. All other
  520. errors will only silently counted. This limitation exist to prevent the code
  521. from flooding your kernel log. To support debugging a device driver this can
  522. be disabled via debugfs. See the debugfs interface documentation below for
  523. details.
  524. The debugfs directory for the DMA-API debugging code is called dma-api/. In
  525. this directory the following files can currently be found:
  526. dma-api/all_errors This file contains a numeric value. If this
  527. value is not equal to zero the debugging code
  528. will print a warning for every error it finds
  529. into the kernel log. Be carefull with this
  530. option. It can easily flood your logs.
  531. dma-api/disabled This read-only file contains the character 'Y'
  532. if the debugging code is disabled. This can
  533. happen when it runs out of memory or if it was
  534. disabled at boot time
  535. dma-api/error_count This file is read-only and shows the total
  536. numbers of errors found.
  537. dma-api/num_errors The number in this file shows how many
  538. warnings will be printed to the kernel log
  539. before it stops. This number is initialized to
  540. one at system boot and be set by writing into
  541. this file
  542. dma-api/min_free_entries
  543. This read-only file can be read to get the
  544. minimum number of free dma_debug_entries the
  545. allocator has ever seen. If this value goes
  546. down to zero the code will disable itself
  547. because it is not longer reliable.
  548. dma-api/num_free_entries
  549. The current number of free dma_debug_entries
  550. in the allocator.
  551. If you have this code compiled into your kernel it will be enabled by default.
  552. If you want to boot without the bookkeeping anyway you can provide
  553. 'dma_debug=off' as a boot parameter. This will disable DMA-API debugging.
  554. Notice that you can not enable it again at runtime. You have to reboot to do
  555. so.
  556. When the code disables itself at runtime this is most likely because it ran
  557. out of dma_debug_entries. These entries are preallocated at boot. The number
  558. of preallocated entries is defined per architecture. If it is too low for you
  559. boot with 'dma_debug_entries=<your_desired_number>' to overwrite the
  560. architectural default.