fsl_qe_udc.c 63 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ioport.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/err.h>
  28. #include <linux/slab.h>
  29. #include <linux/list.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/io.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/of_address.h>
  34. #include <linux/of_irq.h>
  35. #include <linux/of_platform.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/usb/ch9.h>
  38. #include <linux/usb/gadget.h>
  39. #include <linux/usb/otg.h>
  40. #include <asm/qe.h>
  41. #include <asm/cpm.h>
  42. #include <asm/dma.h>
  43. #include <asm/reg.h>
  44. #include "fsl_qe_udc.h"
  45. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  46. #define DRIVER_AUTHOR "Xie XiaoBo"
  47. #define DRIVER_VERSION "1.0"
  48. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  49. static const char driver_name[] = "fsl_qe_udc";
  50. static const char driver_desc[] = DRIVER_DESC;
  51. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  52. static const char *const ep_name[] = {
  53. "ep0-control", /* everyone has ep0 */
  54. /* 3 configurable endpoints */
  55. "ep1",
  56. "ep2",
  57. "ep3",
  58. };
  59. static struct usb_endpoint_descriptor qe_ep0_desc = {
  60. .bLength = USB_DT_ENDPOINT_SIZE,
  61. .bDescriptorType = USB_DT_ENDPOINT,
  62. .bEndpointAddress = 0,
  63. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  64. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  65. };
  66. /********************************************************************
  67. * Internal Used Function Start
  68. ********************************************************************/
  69. /*-----------------------------------------------------------------
  70. * done() - retire a request; caller blocked irqs
  71. *--------------------------------------------------------------*/
  72. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  73. {
  74. struct qe_udc *udc = ep->udc;
  75. unsigned char stopped = ep->stopped;
  76. /* the req->queue pointer is used by ep_queue() func, in which
  77. * the request will be added into a udc_ep->queue 'd tail
  78. * so here the req will be dropped from the ep->queue
  79. */
  80. list_del_init(&req->queue);
  81. /* req.status should be set as -EINPROGRESS in ep_queue() */
  82. if (req->req.status == -EINPROGRESS)
  83. req->req.status = status;
  84. else
  85. status = req->req.status;
  86. if (req->mapped) {
  87. dma_unmap_single(udc->gadget.dev.parent,
  88. req->req.dma, req->req.length,
  89. ep_is_in(ep)
  90. ? DMA_TO_DEVICE
  91. : DMA_FROM_DEVICE);
  92. req->req.dma = DMA_ADDR_INVALID;
  93. req->mapped = 0;
  94. } else
  95. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  96. req->req.dma, req->req.length,
  97. ep_is_in(ep)
  98. ? DMA_TO_DEVICE
  99. : DMA_FROM_DEVICE);
  100. if (status && (status != -ESHUTDOWN))
  101. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  102. ep->ep.name, &req->req, status,
  103. req->req.actual, req->req.length);
  104. /* don't modify queue heads during completion callback */
  105. ep->stopped = 1;
  106. spin_unlock(&udc->lock);
  107. /* this complete() should a func implemented by gadget layer,
  108. * eg fsg->bulk_in_complete() */
  109. if (req->req.complete)
  110. req->req.complete(&ep->ep, &req->req);
  111. spin_lock(&udc->lock);
  112. ep->stopped = stopped;
  113. }
  114. /*-----------------------------------------------------------------
  115. * nuke(): delete all requests related to this ep
  116. *--------------------------------------------------------------*/
  117. static void nuke(struct qe_ep *ep, int status)
  118. {
  119. /* Whether this eq has request linked */
  120. while (!list_empty(&ep->queue)) {
  121. struct qe_req *req = NULL;
  122. req = list_entry(ep->queue.next, struct qe_req, queue);
  123. done(ep, req, status);
  124. }
  125. }
  126. /*---------------------------------------------------------------------------*
  127. * USB and Endpoint manipulate process, include parameter and register *
  128. *---------------------------------------------------------------------------*/
  129. /* @value: 1--set stall 0--clean stall */
  130. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  131. {
  132. u16 tem_usep;
  133. u8 epnum = ep->epnum;
  134. struct qe_udc *udc = ep->udc;
  135. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  136. tem_usep = tem_usep & ~USB_RHS_MASK;
  137. if (value == 1)
  138. tem_usep |= USB_RHS_STALL;
  139. else if (ep->dir == USB_DIR_IN)
  140. tem_usep |= USB_RHS_IGNORE_OUT;
  141. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  142. return 0;
  143. }
  144. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  145. {
  146. u16 tem_usep;
  147. u8 epnum = ep->epnum;
  148. struct qe_udc *udc = ep->udc;
  149. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  150. tem_usep = tem_usep & ~USB_THS_MASK;
  151. if (value == 1)
  152. tem_usep |= USB_THS_STALL;
  153. else if (ep->dir == USB_DIR_OUT)
  154. tem_usep |= USB_THS_IGNORE_IN;
  155. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  156. return 0;
  157. }
  158. static int qe_ep0_stall(struct qe_udc *udc)
  159. {
  160. qe_eptx_stall_change(&udc->eps[0], 1);
  161. qe_eprx_stall_change(&udc->eps[0], 1);
  162. udc->ep0_state = WAIT_FOR_SETUP;
  163. udc->ep0_dir = 0;
  164. return 0;
  165. }
  166. static int qe_eprx_nack(struct qe_ep *ep)
  167. {
  168. u8 epnum = ep->epnum;
  169. struct qe_udc *udc = ep->udc;
  170. if (ep->state == EP_STATE_IDLE) {
  171. /* Set the ep's nack */
  172. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  173. USB_RHS_MASK, USB_RHS_NACK);
  174. /* Mask Rx and Busy interrupts */
  175. clrbits16(&udc->usb_regs->usb_usbmr,
  176. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  177. ep->state = EP_STATE_NACK;
  178. }
  179. return 0;
  180. }
  181. static int qe_eprx_normal(struct qe_ep *ep)
  182. {
  183. struct qe_udc *udc = ep->udc;
  184. if (ep->state == EP_STATE_NACK) {
  185. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  186. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  187. /* Unmask RX interrupts */
  188. out_be16(&udc->usb_regs->usb_usber,
  189. USB_E_BSY_MASK | USB_E_RXB_MASK);
  190. setbits16(&udc->usb_regs->usb_usbmr,
  191. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  192. ep->state = EP_STATE_IDLE;
  193. ep->has_data = 0;
  194. }
  195. return 0;
  196. }
  197. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  198. {
  199. if (ep->udc->soc_type == PORT_CPM)
  200. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  201. CPM_USB_STOP_TX_OPCODE);
  202. else
  203. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  204. ep->epnum, 0);
  205. return 0;
  206. }
  207. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  208. {
  209. if (ep->udc->soc_type == PORT_CPM)
  210. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  211. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  212. else
  213. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  214. ep->epnum, 0);
  215. return 0;
  216. }
  217. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  218. {
  219. struct qe_udc *udc = ep->udc;
  220. int i;
  221. i = (int)ep->epnum;
  222. qe_ep_cmd_stoptx(ep);
  223. out_8(&udc->usb_regs->usb_uscom,
  224. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  225. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  226. out_be32(&udc->ep_param[i]->tstate, 0);
  227. out_be16(&udc->ep_param[i]->tbcnt, 0);
  228. ep->c_txbd = ep->txbase;
  229. ep->n_txbd = ep->txbase;
  230. qe_ep_cmd_restarttx(ep);
  231. return 0;
  232. }
  233. static int qe_ep_filltxfifo(struct qe_ep *ep)
  234. {
  235. struct qe_udc *udc = ep->udc;
  236. out_8(&udc->usb_regs->usb_uscom,
  237. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  238. return 0;
  239. }
  240. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  241. {
  242. struct qe_ep *ep;
  243. u32 bdring_len;
  244. struct qe_bd __iomem *bd;
  245. int i;
  246. ep = &udc->eps[pipe_num];
  247. if (ep->dir == USB_DIR_OUT)
  248. bdring_len = USB_BDRING_LEN_RX;
  249. else
  250. bdring_len = USB_BDRING_LEN;
  251. bd = ep->rxbase;
  252. for (i = 0; i < (bdring_len - 1); i++) {
  253. out_be32((u32 __iomem *)bd, R_E | R_I);
  254. bd++;
  255. }
  256. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  257. bd = ep->txbase;
  258. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  259. out_be32(&bd->buf, 0);
  260. out_be32((u32 __iomem *)bd, 0);
  261. bd++;
  262. }
  263. out_be32((u32 __iomem *)bd, T_W);
  264. return 0;
  265. }
  266. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  267. {
  268. struct qe_ep *ep;
  269. u16 tmpusep;
  270. ep = &udc->eps[pipe_num];
  271. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  272. tmpusep &= ~USB_RTHS_MASK;
  273. switch (ep->dir) {
  274. case USB_DIR_BOTH:
  275. qe_ep_flushtxfifo(ep);
  276. break;
  277. case USB_DIR_OUT:
  278. tmpusep |= USB_THS_IGNORE_IN;
  279. break;
  280. case USB_DIR_IN:
  281. qe_ep_flushtxfifo(ep);
  282. tmpusep |= USB_RHS_IGNORE_OUT;
  283. break;
  284. default:
  285. break;
  286. }
  287. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  288. qe_epbds_reset(udc, pipe_num);
  289. return 0;
  290. }
  291. static int qe_ep_toggledata01(struct qe_ep *ep)
  292. {
  293. ep->data01 ^= 0x1;
  294. return 0;
  295. }
  296. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  297. {
  298. struct qe_ep *ep = &udc->eps[pipe_num];
  299. unsigned long tmp_addr = 0;
  300. struct usb_ep_para __iomem *epparam;
  301. int i;
  302. struct qe_bd __iomem *bd;
  303. int bdring_len;
  304. if (ep->dir == USB_DIR_OUT)
  305. bdring_len = USB_BDRING_LEN_RX;
  306. else
  307. bdring_len = USB_BDRING_LEN;
  308. epparam = udc->ep_param[pipe_num];
  309. /* alloc multi-ram for BD rings and set the ep parameters */
  310. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  311. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  312. if (IS_ERR_VALUE(tmp_addr))
  313. return -ENOMEM;
  314. out_be16(&epparam->rbase, (u16)tmp_addr);
  315. out_be16(&epparam->tbase, (u16)(tmp_addr +
  316. (sizeof(struct qe_bd) * bdring_len)));
  317. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  318. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  319. ep->rxbase = cpm_muram_addr(tmp_addr);
  320. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  321. * bdring_len));
  322. ep->n_rxbd = ep->rxbase;
  323. ep->e_rxbd = ep->rxbase;
  324. ep->n_txbd = ep->txbase;
  325. ep->c_txbd = ep->txbase;
  326. ep->data01 = 0; /* data0 */
  327. /* Init TX and RX bds */
  328. bd = ep->rxbase;
  329. for (i = 0; i < bdring_len - 1; i++) {
  330. out_be32(&bd->buf, 0);
  331. out_be32((u32 __iomem *)bd, 0);
  332. bd++;
  333. }
  334. out_be32(&bd->buf, 0);
  335. out_be32((u32 __iomem *)bd, R_W);
  336. bd = ep->txbase;
  337. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  338. out_be32(&bd->buf, 0);
  339. out_be32((u32 __iomem *)bd, 0);
  340. bd++;
  341. }
  342. out_be32(&bd->buf, 0);
  343. out_be32((u32 __iomem *)bd, T_W);
  344. return 0;
  345. }
  346. static int qe_ep_rxbd_update(struct qe_ep *ep)
  347. {
  348. unsigned int size;
  349. int i;
  350. unsigned int tmp;
  351. struct qe_bd __iomem *bd;
  352. unsigned int bdring_len;
  353. if (ep->rxbase == NULL)
  354. return -EINVAL;
  355. bd = ep->rxbase;
  356. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  357. if (ep->rxframe == NULL) {
  358. dev_err(ep->udc->dev, "malloc rxframe failed\n");
  359. return -ENOMEM;
  360. }
  361. qe_frame_init(ep->rxframe);
  362. if (ep->dir == USB_DIR_OUT)
  363. bdring_len = USB_BDRING_LEN_RX;
  364. else
  365. bdring_len = USB_BDRING_LEN;
  366. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  367. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  368. if (ep->rxbuffer == NULL) {
  369. dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
  370. size);
  371. kfree(ep->rxframe);
  372. return -ENOMEM;
  373. }
  374. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  375. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  376. ep->rxbuf_d = dma_map_single(ep->udc->gadget.dev.parent,
  377. ep->rxbuffer,
  378. size,
  379. DMA_FROM_DEVICE);
  380. ep->rxbufmap = 1;
  381. } else {
  382. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  383. ep->rxbuf_d, size,
  384. DMA_FROM_DEVICE);
  385. ep->rxbufmap = 0;
  386. }
  387. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  388. tmp = ep->rxbuf_d;
  389. tmp = (u32)(((tmp >> 2) << 2) + 4);
  390. for (i = 0; i < bdring_len - 1; i++) {
  391. out_be32(&bd->buf, tmp);
  392. out_be32((u32 __iomem *)bd, (R_E | R_I));
  393. tmp = tmp + size;
  394. bd++;
  395. }
  396. out_be32(&bd->buf, tmp);
  397. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  398. return 0;
  399. }
  400. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  401. {
  402. struct qe_ep *ep = &udc->eps[pipe_num];
  403. struct usb_ep_para __iomem *epparam;
  404. u16 usep, logepnum;
  405. u16 tmp;
  406. u8 rtfcr = 0;
  407. epparam = udc->ep_param[pipe_num];
  408. usep = 0;
  409. logepnum = (ep->ep.desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  410. usep |= (logepnum << USB_EPNUM_SHIFT);
  411. switch (ep->ep.desc->bmAttributes & 0x03) {
  412. case USB_ENDPOINT_XFER_BULK:
  413. usep |= USB_TRANS_BULK;
  414. break;
  415. case USB_ENDPOINT_XFER_ISOC:
  416. usep |= USB_TRANS_ISO;
  417. break;
  418. case USB_ENDPOINT_XFER_INT:
  419. usep |= USB_TRANS_INT;
  420. break;
  421. default:
  422. usep |= USB_TRANS_CTR;
  423. break;
  424. }
  425. switch (ep->dir) {
  426. case USB_DIR_OUT:
  427. usep |= USB_THS_IGNORE_IN;
  428. break;
  429. case USB_DIR_IN:
  430. usep |= USB_RHS_IGNORE_OUT;
  431. break;
  432. default:
  433. break;
  434. }
  435. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  436. rtfcr = 0x30;
  437. out_8(&epparam->rbmr, rtfcr);
  438. out_8(&epparam->tbmr, rtfcr);
  439. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  440. /* MRBLR must be divisble by 4 */
  441. tmp = (u16)(((tmp >> 2) << 2) + 4);
  442. out_be16(&epparam->mrblr, tmp);
  443. return 0;
  444. }
  445. static int qe_ep_init(struct qe_udc *udc,
  446. unsigned char pipe_num,
  447. const struct usb_endpoint_descriptor *desc)
  448. {
  449. struct qe_ep *ep = &udc->eps[pipe_num];
  450. unsigned long flags;
  451. int reval = 0;
  452. u16 max = 0;
  453. max = usb_endpoint_maxp(desc);
  454. /* check the max package size validate for this endpoint */
  455. /* Refer to USB2.0 spec table 9-13,
  456. */
  457. if (pipe_num != 0) {
  458. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  459. case USB_ENDPOINT_XFER_BULK:
  460. if (strstr(ep->ep.name, "-iso")
  461. || strstr(ep->ep.name, "-int"))
  462. goto en_done;
  463. switch (udc->gadget.speed) {
  464. case USB_SPEED_HIGH:
  465. if ((max == 128) || (max == 256) || (max == 512))
  466. break;
  467. default:
  468. switch (max) {
  469. case 4:
  470. case 8:
  471. case 16:
  472. case 32:
  473. case 64:
  474. break;
  475. default:
  476. case USB_SPEED_LOW:
  477. goto en_done;
  478. }
  479. }
  480. break;
  481. case USB_ENDPOINT_XFER_INT:
  482. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  483. goto en_done;
  484. switch (udc->gadget.speed) {
  485. case USB_SPEED_HIGH:
  486. if (max <= 1024)
  487. break;
  488. case USB_SPEED_FULL:
  489. if (max <= 64)
  490. break;
  491. default:
  492. if (max <= 8)
  493. break;
  494. goto en_done;
  495. }
  496. break;
  497. case USB_ENDPOINT_XFER_ISOC:
  498. if (strstr(ep->ep.name, "-bulk")
  499. || strstr(ep->ep.name, "-int"))
  500. goto en_done;
  501. switch (udc->gadget.speed) {
  502. case USB_SPEED_HIGH:
  503. if (max <= 1024)
  504. break;
  505. case USB_SPEED_FULL:
  506. if (max <= 1023)
  507. break;
  508. default:
  509. goto en_done;
  510. }
  511. break;
  512. case USB_ENDPOINT_XFER_CONTROL:
  513. if (strstr(ep->ep.name, "-iso")
  514. || strstr(ep->ep.name, "-int"))
  515. goto en_done;
  516. switch (udc->gadget.speed) {
  517. case USB_SPEED_HIGH:
  518. case USB_SPEED_FULL:
  519. switch (max) {
  520. case 1:
  521. case 2:
  522. case 4:
  523. case 8:
  524. case 16:
  525. case 32:
  526. case 64:
  527. break;
  528. default:
  529. goto en_done;
  530. }
  531. case USB_SPEED_LOW:
  532. switch (max) {
  533. case 1:
  534. case 2:
  535. case 4:
  536. case 8:
  537. break;
  538. default:
  539. goto en_done;
  540. }
  541. default:
  542. goto en_done;
  543. }
  544. break;
  545. default:
  546. goto en_done;
  547. }
  548. } /* if ep0*/
  549. spin_lock_irqsave(&udc->lock, flags);
  550. /* initialize ep structure */
  551. ep->ep.maxpacket = max;
  552. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  553. ep->ep.desc = desc;
  554. ep->stopped = 0;
  555. ep->init = 1;
  556. if (pipe_num == 0) {
  557. ep->dir = USB_DIR_BOTH;
  558. udc->ep0_dir = USB_DIR_OUT;
  559. udc->ep0_state = WAIT_FOR_SETUP;
  560. } else {
  561. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  562. case USB_DIR_OUT:
  563. ep->dir = USB_DIR_OUT;
  564. break;
  565. case USB_DIR_IN:
  566. ep->dir = USB_DIR_IN;
  567. default:
  568. break;
  569. }
  570. }
  571. /* hardware special operation */
  572. qe_ep_bd_init(udc, pipe_num);
  573. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  574. reval = qe_ep_rxbd_update(ep);
  575. if (reval)
  576. goto en_done1;
  577. }
  578. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  579. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  580. if (ep->txframe == NULL) {
  581. dev_err(udc->dev, "malloc txframe failed\n");
  582. goto en_done2;
  583. }
  584. qe_frame_init(ep->txframe);
  585. }
  586. qe_ep_register_init(udc, pipe_num);
  587. /* Now HW will be NAKing transfers to that EP,
  588. * until a buffer is queued to it. */
  589. spin_unlock_irqrestore(&udc->lock, flags);
  590. return 0;
  591. en_done2:
  592. kfree(ep->rxbuffer);
  593. kfree(ep->rxframe);
  594. en_done1:
  595. spin_unlock_irqrestore(&udc->lock, flags);
  596. en_done:
  597. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  598. return -ENODEV;
  599. }
  600. static inline void qe_usb_enable(struct qe_udc *udc)
  601. {
  602. setbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  603. }
  604. static inline void qe_usb_disable(struct qe_udc *udc)
  605. {
  606. clrbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  607. }
  608. /*----------------------------------------------------------------------------*
  609. * USB and EP basic manipulate function end *
  610. *----------------------------------------------------------------------------*/
  611. /******************************************************************************
  612. UDC transmit and receive process
  613. ******************************************************************************/
  614. static void recycle_one_rxbd(struct qe_ep *ep)
  615. {
  616. u32 bdstatus;
  617. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  618. bdstatus = R_I | R_E | (bdstatus & R_W);
  619. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  620. if (bdstatus & R_W)
  621. ep->e_rxbd = ep->rxbase;
  622. else
  623. ep->e_rxbd++;
  624. }
  625. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  626. {
  627. u32 bdstatus;
  628. struct qe_bd __iomem *bd, *nextbd;
  629. unsigned char stop = 0;
  630. nextbd = ep->n_rxbd;
  631. bd = ep->e_rxbd;
  632. bdstatus = in_be32((u32 __iomem *)bd);
  633. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  634. bdstatus = R_E | R_I | (bdstatus & R_W);
  635. out_be32((u32 __iomem *)bd, bdstatus);
  636. if (bdstatus & R_W)
  637. bd = ep->rxbase;
  638. else
  639. bd++;
  640. bdstatus = in_be32((u32 __iomem *)bd);
  641. if (stopatnext && (bd == nextbd))
  642. stop = 1;
  643. }
  644. ep->e_rxbd = bd;
  645. }
  646. static void ep_recycle_rxbds(struct qe_ep *ep)
  647. {
  648. struct qe_bd __iomem *bd = ep->n_rxbd;
  649. u32 bdstatus;
  650. u8 epnum = ep->epnum;
  651. struct qe_udc *udc = ep->udc;
  652. bdstatus = in_be32((u32 __iomem *)bd);
  653. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  654. bd = ep->rxbase +
  655. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  656. in_be16(&udc->ep_param[epnum]->rbase))
  657. >> 3);
  658. bdstatus = in_be32((u32 __iomem *)bd);
  659. if (bdstatus & R_W)
  660. bd = ep->rxbase;
  661. else
  662. bd++;
  663. ep->e_rxbd = bd;
  664. recycle_rxbds(ep, 0);
  665. ep->e_rxbd = ep->n_rxbd;
  666. } else
  667. recycle_rxbds(ep, 1);
  668. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  669. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  670. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  671. qe_eprx_normal(ep);
  672. ep->localnack = 0;
  673. }
  674. static void setup_received_handle(struct qe_udc *udc,
  675. struct usb_ctrlrequest *setup);
  676. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  677. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  678. /* when BD PID is setup, handle the packet */
  679. static int ep0_setup_handle(struct qe_udc *udc)
  680. {
  681. struct qe_ep *ep = &udc->eps[0];
  682. struct qe_frame *pframe;
  683. unsigned int fsize;
  684. u8 *cp;
  685. pframe = ep->rxframe;
  686. if ((frame_get_info(pframe) & PID_SETUP)
  687. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  688. fsize = frame_get_length(pframe);
  689. if (unlikely(fsize != 8))
  690. return -EINVAL;
  691. cp = (u8 *)&udc->local_setup_buff;
  692. memcpy(cp, pframe->data, fsize);
  693. ep->data01 = 1;
  694. /* handle the usb command base on the usb_ctrlrequest */
  695. setup_received_handle(udc, &udc->local_setup_buff);
  696. return 0;
  697. }
  698. return -EINVAL;
  699. }
  700. static int qe_ep0_rx(struct qe_udc *udc)
  701. {
  702. struct qe_ep *ep = &udc->eps[0];
  703. struct qe_frame *pframe;
  704. struct qe_bd __iomem *bd;
  705. u32 bdstatus, length;
  706. u32 vaddr;
  707. pframe = ep->rxframe;
  708. if (ep->dir == USB_DIR_IN) {
  709. dev_err(udc->dev, "ep0 not a control endpoint\n");
  710. return -EINVAL;
  711. }
  712. bd = ep->n_rxbd;
  713. bdstatus = in_be32((u32 __iomem *)bd);
  714. length = bdstatus & BD_LENGTH_MASK;
  715. while (!(bdstatus & R_E) && length) {
  716. if ((bdstatus & R_F) && (bdstatus & R_L)
  717. && !(bdstatus & R_ERROR)) {
  718. if (length == USB_CRC_SIZE) {
  719. udc->ep0_state = WAIT_FOR_SETUP;
  720. dev_vdbg(udc->dev,
  721. "receive a ZLP in status phase\n");
  722. } else {
  723. qe_frame_clean(pframe);
  724. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  725. frame_set_data(pframe, (u8 *)vaddr);
  726. frame_set_length(pframe,
  727. (length - USB_CRC_SIZE));
  728. frame_set_status(pframe, FRAME_OK);
  729. switch (bdstatus & R_PID) {
  730. case R_PID_SETUP:
  731. frame_set_info(pframe, PID_SETUP);
  732. break;
  733. case R_PID_DATA1:
  734. frame_set_info(pframe, PID_DATA1);
  735. break;
  736. default:
  737. frame_set_info(pframe, PID_DATA0);
  738. break;
  739. }
  740. if ((bdstatus & R_PID) == R_PID_SETUP)
  741. ep0_setup_handle(udc);
  742. else
  743. qe_ep_rxframe_handle(ep);
  744. }
  745. } else {
  746. dev_err(udc->dev, "The receive frame with error!\n");
  747. }
  748. /* note: don't clear the rxbd's buffer address */
  749. recycle_one_rxbd(ep);
  750. /* Get next BD */
  751. if (bdstatus & R_W)
  752. bd = ep->rxbase;
  753. else
  754. bd++;
  755. bdstatus = in_be32((u32 __iomem *)bd);
  756. length = bdstatus & BD_LENGTH_MASK;
  757. }
  758. ep->n_rxbd = bd;
  759. return 0;
  760. }
  761. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  762. {
  763. struct qe_frame *pframe;
  764. u8 framepid = 0;
  765. unsigned int fsize;
  766. u8 *cp;
  767. struct qe_req *req;
  768. pframe = ep->rxframe;
  769. if (frame_get_info(pframe) & PID_DATA1)
  770. framepid = 0x1;
  771. if (framepid != ep->data01) {
  772. dev_err(ep->udc->dev, "the data01 error!\n");
  773. return -EIO;
  774. }
  775. fsize = frame_get_length(pframe);
  776. if (list_empty(&ep->queue)) {
  777. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  778. } else {
  779. req = list_entry(ep->queue.next, struct qe_req, queue);
  780. cp = (u8 *)(req->req.buf) + req->req.actual;
  781. if (cp) {
  782. memcpy(cp, pframe->data, fsize);
  783. req->req.actual += fsize;
  784. if ((fsize < ep->ep.maxpacket) ||
  785. (req->req.actual >= req->req.length)) {
  786. if (ep->epnum == 0)
  787. ep0_req_complete(ep->udc, req);
  788. else
  789. done(ep, req, 0);
  790. if (list_empty(&ep->queue) && ep->epnum != 0)
  791. qe_eprx_nack(ep);
  792. }
  793. }
  794. }
  795. qe_ep_toggledata01(ep);
  796. return 0;
  797. }
  798. static void ep_rx_tasklet(unsigned long data)
  799. {
  800. struct qe_udc *udc = (struct qe_udc *)data;
  801. struct qe_ep *ep;
  802. struct qe_frame *pframe;
  803. struct qe_bd __iomem *bd;
  804. unsigned long flags;
  805. u32 bdstatus, length;
  806. u32 vaddr, i;
  807. spin_lock_irqsave(&udc->lock, flags);
  808. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  809. ep = &udc->eps[i];
  810. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  811. dev_dbg(udc->dev,
  812. "This is a transmit ep or disable tasklet!\n");
  813. continue;
  814. }
  815. pframe = ep->rxframe;
  816. bd = ep->n_rxbd;
  817. bdstatus = in_be32((u32 __iomem *)bd);
  818. length = bdstatus & BD_LENGTH_MASK;
  819. while (!(bdstatus & R_E) && length) {
  820. if (list_empty(&ep->queue)) {
  821. qe_eprx_nack(ep);
  822. dev_dbg(udc->dev,
  823. "The rxep have noreq %d\n",
  824. ep->has_data);
  825. break;
  826. }
  827. if ((bdstatus & R_F) && (bdstatus & R_L)
  828. && !(bdstatus & R_ERROR)) {
  829. qe_frame_clean(pframe);
  830. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  831. frame_set_data(pframe, (u8 *)vaddr);
  832. frame_set_length(pframe,
  833. (length - USB_CRC_SIZE));
  834. frame_set_status(pframe, FRAME_OK);
  835. switch (bdstatus & R_PID) {
  836. case R_PID_DATA1:
  837. frame_set_info(pframe, PID_DATA1);
  838. break;
  839. case R_PID_SETUP:
  840. frame_set_info(pframe, PID_SETUP);
  841. break;
  842. default:
  843. frame_set_info(pframe, PID_DATA0);
  844. break;
  845. }
  846. /* handle the rx frame */
  847. qe_ep_rxframe_handle(ep);
  848. } else {
  849. dev_err(udc->dev,
  850. "error in received frame\n");
  851. }
  852. /* note: don't clear the rxbd's buffer address */
  853. /*clear the length */
  854. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  855. ep->has_data--;
  856. if (!(ep->localnack))
  857. recycle_one_rxbd(ep);
  858. /* Get next BD */
  859. if (bdstatus & R_W)
  860. bd = ep->rxbase;
  861. else
  862. bd++;
  863. bdstatus = in_be32((u32 __iomem *)bd);
  864. length = bdstatus & BD_LENGTH_MASK;
  865. }
  866. ep->n_rxbd = bd;
  867. if (ep->localnack)
  868. ep_recycle_rxbds(ep);
  869. ep->enable_tasklet = 0;
  870. } /* for i=1 */
  871. spin_unlock_irqrestore(&udc->lock, flags);
  872. }
  873. static int qe_ep_rx(struct qe_ep *ep)
  874. {
  875. struct qe_udc *udc;
  876. struct qe_frame *pframe;
  877. struct qe_bd __iomem *bd;
  878. u16 swoffs, ucoffs, emptybds;
  879. udc = ep->udc;
  880. pframe = ep->rxframe;
  881. if (ep->dir == USB_DIR_IN) {
  882. dev_err(udc->dev, "transmit ep in rx function\n");
  883. return -EINVAL;
  884. }
  885. bd = ep->n_rxbd;
  886. swoffs = (u16)(bd - ep->rxbase);
  887. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  888. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  889. if (swoffs < ucoffs)
  890. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  891. else
  892. emptybds = swoffs - ucoffs;
  893. if (emptybds < MIN_EMPTY_BDS) {
  894. qe_eprx_nack(ep);
  895. ep->localnack = 1;
  896. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  897. }
  898. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  899. if (list_empty(&ep->queue)) {
  900. qe_eprx_nack(ep);
  901. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  902. ep->has_data);
  903. return 0;
  904. }
  905. tasklet_schedule(&udc->rx_tasklet);
  906. ep->enable_tasklet = 1;
  907. return 0;
  908. }
  909. /* send data from a frame, no matter what tx_req */
  910. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  911. {
  912. struct qe_udc *udc = ep->udc;
  913. struct qe_bd __iomem *bd;
  914. u16 saveusbmr;
  915. u32 bdstatus, pidmask;
  916. u32 paddr;
  917. if (ep->dir == USB_DIR_OUT) {
  918. dev_err(udc->dev, "receive ep passed to tx function\n");
  919. return -EINVAL;
  920. }
  921. /* Disable the Tx interrupt */
  922. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  923. out_be16(&udc->usb_regs->usb_usbmr,
  924. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  925. bd = ep->n_txbd;
  926. bdstatus = in_be32((u32 __iomem *)bd);
  927. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  928. if (frame_get_length(frame) == 0) {
  929. frame_set_data(frame, udc->nullbuf);
  930. frame_set_length(frame, 2);
  931. frame->info |= (ZLP | NO_CRC);
  932. dev_vdbg(udc->dev, "the frame size = 0\n");
  933. }
  934. paddr = virt_to_phys((void *)frame->data);
  935. out_be32(&bd->buf, paddr);
  936. bdstatus = (bdstatus&T_W);
  937. if (!(frame_get_info(frame) & NO_CRC))
  938. bdstatus |= T_R | T_I | T_L | T_TC
  939. | frame_get_length(frame);
  940. else
  941. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  942. /* if the packet is a ZLP in status phase */
  943. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  944. ep->data01 = 0x1;
  945. if (ep->data01) {
  946. pidmask = T_PID_DATA1;
  947. frame->info |= PID_DATA1;
  948. } else {
  949. pidmask = T_PID_DATA0;
  950. frame->info |= PID_DATA0;
  951. }
  952. bdstatus |= T_CNF;
  953. bdstatus |= pidmask;
  954. out_be32((u32 __iomem *)bd, bdstatus);
  955. qe_ep_filltxfifo(ep);
  956. /* enable the TX interrupt */
  957. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  958. qe_ep_toggledata01(ep);
  959. if (bdstatus & T_W)
  960. ep->n_txbd = ep->txbase;
  961. else
  962. ep->n_txbd++;
  963. return 0;
  964. } else {
  965. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  966. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  967. return -EBUSY;
  968. }
  969. }
  970. /* when a bd was transmitted, the function can
  971. * handle the tx_req, not include ep0 */
  972. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  973. {
  974. if (ep->tx_req != NULL) {
  975. struct qe_req *req = ep->tx_req;
  976. unsigned zlp = 0, last_len = 0;
  977. last_len = min_t(unsigned, req->req.length - ep->sent,
  978. ep->ep.maxpacket);
  979. if (!restart) {
  980. int asent = ep->last;
  981. ep->sent += asent;
  982. ep->last -= asent;
  983. } else {
  984. ep->last = 0;
  985. }
  986. /* zlp needed when req->re.zero is set */
  987. if (req->req.zero) {
  988. if (last_len == 0 ||
  989. (req->req.length % ep->ep.maxpacket) != 0)
  990. zlp = 0;
  991. else
  992. zlp = 1;
  993. } else
  994. zlp = 0;
  995. /* a request already were transmitted completely */
  996. if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
  997. done(ep, ep->tx_req, 0);
  998. ep->tx_req = NULL;
  999. ep->last = 0;
  1000. ep->sent = 0;
  1001. }
  1002. }
  1003. /* we should gain a new tx_req fot this endpoint */
  1004. if (ep->tx_req == NULL) {
  1005. if (!list_empty(&ep->queue)) {
  1006. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  1007. queue);
  1008. ep->last = 0;
  1009. ep->sent = 0;
  1010. }
  1011. }
  1012. return 0;
  1013. }
  1014. /* give a frame and a tx_req, send some data */
  1015. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1016. {
  1017. unsigned int size;
  1018. u8 *buf;
  1019. qe_frame_clean(frame);
  1020. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1021. ep->ep.maxpacket);
  1022. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1023. if (buf && size) {
  1024. ep->last = size;
  1025. ep->tx_req->req.actual += size;
  1026. frame_set_data(frame, buf);
  1027. frame_set_length(frame, size);
  1028. frame_set_status(frame, FRAME_OK);
  1029. frame_set_info(frame, 0);
  1030. return qe_ep_tx(ep, frame);
  1031. }
  1032. return -EIO;
  1033. }
  1034. /* give a frame struct,send a ZLP */
  1035. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1036. {
  1037. struct qe_udc *udc = ep->udc;
  1038. if (frame == NULL)
  1039. return -ENODEV;
  1040. qe_frame_clean(frame);
  1041. frame_set_data(frame, (u8 *)udc->nullbuf);
  1042. frame_set_length(frame, 2);
  1043. frame_set_status(frame, FRAME_OK);
  1044. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1045. return qe_ep_tx(ep, frame);
  1046. }
  1047. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1048. {
  1049. struct qe_req *req = ep->tx_req;
  1050. int reval;
  1051. if (req == NULL)
  1052. return -ENODEV;
  1053. if ((req->req.length - ep->sent) > 0)
  1054. reval = qe_usb_senddata(ep, frame);
  1055. else
  1056. reval = sendnulldata(ep, frame, 0);
  1057. return reval;
  1058. }
  1059. /* if direction is DIR_IN, the status is Device->Host
  1060. * if direction is DIR_OUT, the status transaction is Device<-Host
  1061. * in status phase, udc create a request and gain status */
  1062. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1063. {
  1064. struct qe_ep *ep = &udc->eps[0];
  1065. if (direction == USB_DIR_IN) {
  1066. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1067. udc->ep0_dir = USB_DIR_IN;
  1068. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1069. } else {
  1070. udc->ep0_dir = USB_DIR_OUT;
  1071. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1072. }
  1073. return 0;
  1074. }
  1075. /* a request complete in ep0, whether gadget request or udc request */
  1076. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1077. {
  1078. struct qe_ep *ep = &udc->eps[0];
  1079. /* because usb and ep's status already been set in ch9setaddress() */
  1080. switch (udc->ep0_state) {
  1081. case DATA_STATE_XMIT:
  1082. done(ep, req, 0);
  1083. /* receive status phase */
  1084. if (ep0_prime_status(udc, USB_DIR_OUT))
  1085. qe_ep0_stall(udc);
  1086. break;
  1087. case DATA_STATE_NEED_ZLP:
  1088. done(ep, req, 0);
  1089. udc->ep0_state = WAIT_FOR_SETUP;
  1090. break;
  1091. case DATA_STATE_RECV:
  1092. done(ep, req, 0);
  1093. /* send status phase */
  1094. if (ep0_prime_status(udc, USB_DIR_IN))
  1095. qe_ep0_stall(udc);
  1096. break;
  1097. case WAIT_FOR_OUT_STATUS:
  1098. done(ep, req, 0);
  1099. udc->ep0_state = WAIT_FOR_SETUP;
  1100. break;
  1101. case WAIT_FOR_SETUP:
  1102. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1103. break;
  1104. default:
  1105. qe_ep0_stall(udc);
  1106. break;
  1107. }
  1108. }
  1109. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1110. {
  1111. struct qe_req *tx_req = NULL;
  1112. struct qe_frame *frame = ep->txframe;
  1113. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1114. if (!restart)
  1115. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1116. else
  1117. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1118. return 0;
  1119. }
  1120. tx_req = ep->tx_req;
  1121. if (tx_req != NULL) {
  1122. if (!restart) {
  1123. int asent = ep->last;
  1124. ep->sent += asent;
  1125. ep->last -= asent;
  1126. } else {
  1127. ep->last = 0;
  1128. }
  1129. /* a request already were transmitted completely */
  1130. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1131. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1132. ep0_req_complete(ep->udc, ep->tx_req);
  1133. ep->tx_req = NULL;
  1134. ep->last = 0;
  1135. ep->sent = 0;
  1136. }
  1137. } else {
  1138. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1139. }
  1140. return 0;
  1141. }
  1142. static int ep0_txframe_handle(struct qe_ep *ep)
  1143. {
  1144. /* if have error, transmit again */
  1145. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1146. qe_ep_flushtxfifo(ep);
  1147. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1148. if (frame_get_info(ep->txframe) & PID_DATA0)
  1149. ep->data01 = 0;
  1150. else
  1151. ep->data01 = 1;
  1152. ep0_txcomplete(ep, 1);
  1153. } else
  1154. ep0_txcomplete(ep, 0);
  1155. frame_create_tx(ep, ep->txframe);
  1156. return 0;
  1157. }
  1158. static int qe_ep0_txconf(struct qe_ep *ep)
  1159. {
  1160. struct qe_bd __iomem *bd;
  1161. struct qe_frame *pframe;
  1162. u32 bdstatus;
  1163. bd = ep->c_txbd;
  1164. bdstatus = in_be32((u32 __iomem *)bd);
  1165. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1166. pframe = ep->txframe;
  1167. /* clear and recycle the BD */
  1168. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1169. out_be32(&bd->buf, 0);
  1170. if (bdstatus & T_W)
  1171. ep->c_txbd = ep->txbase;
  1172. else
  1173. ep->c_txbd++;
  1174. if (ep->c_txbd == ep->n_txbd) {
  1175. if (bdstatus & DEVICE_T_ERROR) {
  1176. frame_set_status(pframe, FRAME_ERROR);
  1177. if (bdstatus & T_TO)
  1178. pframe->status |= TX_ER_TIMEOUT;
  1179. if (bdstatus & T_UN)
  1180. pframe->status |= TX_ER_UNDERUN;
  1181. }
  1182. ep0_txframe_handle(ep);
  1183. }
  1184. bd = ep->c_txbd;
  1185. bdstatus = in_be32((u32 __iomem *)bd);
  1186. }
  1187. return 0;
  1188. }
  1189. static int ep_txframe_handle(struct qe_ep *ep)
  1190. {
  1191. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1192. qe_ep_flushtxfifo(ep);
  1193. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1194. if (frame_get_info(ep->txframe) & PID_DATA0)
  1195. ep->data01 = 0;
  1196. else
  1197. ep->data01 = 1;
  1198. txcomplete(ep, 1);
  1199. } else
  1200. txcomplete(ep, 0);
  1201. frame_create_tx(ep, ep->txframe); /* send the data */
  1202. return 0;
  1203. }
  1204. /* confirm the already trainsmited bd */
  1205. static int qe_ep_txconf(struct qe_ep *ep)
  1206. {
  1207. struct qe_bd __iomem *bd;
  1208. struct qe_frame *pframe = NULL;
  1209. u32 bdstatus;
  1210. unsigned char breakonrxinterrupt = 0;
  1211. bd = ep->c_txbd;
  1212. bdstatus = in_be32((u32 __iomem *)bd);
  1213. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1214. pframe = ep->txframe;
  1215. if (bdstatus & DEVICE_T_ERROR) {
  1216. frame_set_status(pframe, FRAME_ERROR);
  1217. if (bdstatus & T_TO)
  1218. pframe->status |= TX_ER_TIMEOUT;
  1219. if (bdstatus & T_UN)
  1220. pframe->status |= TX_ER_UNDERUN;
  1221. }
  1222. /* clear and recycle the BD */
  1223. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1224. out_be32(&bd->buf, 0);
  1225. if (bdstatus & T_W)
  1226. ep->c_txbd = ep->txbase;
  1227. else
  1228. ep->c_txbd++;
  1229. /* handle the tx frame */
  1230. ep_txframe_handle(ep);
  1231. bd = ep->c_txbd;
  1232. bdstatus = in_be32((u32 __iomem *)bd);
  1233. }
  1234. if (breakonrxinterrupt)
  1235. return -EIO;
  1236. else
  1237. return 0;
  1238. }
  1239. /* Add a request in queue, and try to transmit a packet */
  1240. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1241. {
  1242. int reval = 0;
  1243. if (ep->tx_req == NULL) {
  1244. ep->sent = 0;
  1245. ep->last = 0;
  1246. txcomplete(ep, 0); /* can gain a new tx_req */
  1247. reval = frame_create_tx(ep, ep->txframe);
  1248. }
  1249. return reval;
  1250. }
  1251. /* Maybe this is a good ideal */
  1252. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1253. {
  1254. struct qe_udc *udc = ep->udc;
  1255. struct qe_frame *pframe = NULL;
  1256. struct qe_bd __iomem *bd;
  1257. u32 bdstatus, length;
  1258. u32 vaddr, fsize;
  1259. u8 *cp;
  1260. u8 finish_req = 0;
  1261. u8 framepid;
  1262. if (list_empty(&ep->queue)) {
  1263. dev_vdbg(udc->dev, "the req already finish!\n");
  1264. return 0;
  1265. }
  1266. pframe = ep->rxframe;
  1267. bd = ep->n_rxbd;
  1268. bdstatus = in_be32((u32 __iomem *)bd);
  1269. length = bdstatus & BD_LENGTH_MASK;
  1270. while (!(bdstatus & R_E) && length) {
  1271. if (finish_req)
  1272. break;
  1273. if ((bdstatus & R_F) && (bdstatus & R_L)
  1274. && !(bdstatus & R_ERROR)) {
  1275. qe_frame_clean(pframe);
  1276. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1277. frame_set_data(pframe, (u8 *)vaddr);
  1278. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1279. frame_set_status(pframe, FRAME_OK);
  1280. switch (bdstatus & R_PID) {
  1281. case R_PID_DATA1:
  1282. frame_set_info(pframe, PID_DATA1); break;
  1283. default:
  1284. frame_set_info(pframe, PID_DATA0); break;
  1285. }
  1286. /* handle the rx frame */
  1287. if (frame_get_info(pframe) & PID_DATA1)
  1288. framepid = 0x1;
  1289. else
  1290. framepid = 0;
  1291. if (framepid != ep->data01) {
  1292. dev_vdbg(udc->dev, "the data01 error!\n");
  1293. } else {
  1294. fsize = frame_get_length(pframe);
  1295. cp = (u8 *)(req->req.buf) + req->req.actual;
  1296. if (cp) {
  1297. memcpy(cp, pframe->data, fsize);
  1298. req->req.actual += fsize;
  1299. if ((fsize < ep->ep.maxpacket)
  1300. || (req->req.actual >=
  1301. req->req.length)) {
  1302. finish_req = 1;
  1303. done(ep, req, 0);
  1304. if (list_empty(&ep->queue))
  1305. qe_eprx_nack(ep);
  1306. }
  1307. }
  1308. qe_ep_toggledata01(ep);
  1309. }
  1310. } else {
  1311. dev_err(udc->dev, "The receive frame with error!\n");
  1312. }
  1313. /* note: don't clear the rxbd's buffer address *
  1314. * only Clear the length */
  1315. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1316. ep->has_data--;
  1317. /* Get next BD */
  1318. if (bdstatus & R_W)
  1319. bd = ep->rxbase;
  1320. else
  1321. bd++;
  1322. bdstatus = in_be32((u32 __iomem *)bd);
  1323. length = bdstatus & BD_LENGTH_MASK;
  1324. }
  1325. ep->n_rxbd = bd;
  1326. ep_recycle_rxbds(ep);
  1327. return 0;
  1328. }
  1329. /* only add the request in queue */
  1330. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1331. {
  1332. if (ep->state == EP_STATE_NACK) {
  1333. if (ep->has_data <= 0) {
  1334. /* Enable rx and unmask rx interrupt */
  1335. qe_eprx_normal(ep);
  1336. } else {
  1337. /* Copy the exist BD data */
  1338. ep_req_rx(ep, req);
  1339. }
  1340. }
  1341. return 0;
  1342. }
  1343. /********************************************************************
  1344. Internal Used Function End
  1345. ********************************************************************/
  1346. /*-----------------------------------------------------------------------
  1347. Endpoint Management Functions For Gadget
  1348. -----------------------------------------------------------------------*/
  1349. static int qe_ep_enable(struct usb_ep *_ep,
  1350. const struct usb_endpoint_descriptor *desc)
  1351. {
  1352. struct qe_udc *udc;
  1353. struct qe_ep *ep;
  1354. int retval = 0;
  1355. unsigned char epnum;
  1356. ep = container_of(_ep, struct qe_ep, ep);
  1357. /* catch various bogus parameters */
  1358. if (!_ep || !desc || _ep->name == ep_name[0] ||
  1359. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1360. return -EINVAL;
  1361. udc = ep->udc;
  1362. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1363. return -ESHUTDOWN;
  1364. epnum = (u8)desc->bEndpointAddress & 0xF;
  1365. retval = qe_ep_init(udc, epnum, desc);
  1366. if (retval != 0) {
  1367. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1368. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1369. return -EINVAL;
  1370. }
  1371. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1372. return 0;
  1373. }
  1374. static int qe_ep_disable(struct usb_ep *_ep)
  1375. {
  1376. struct qe_udc *udc;
  1377. struct qe_ep *ep;
  1378. unsigned long flags;
  1379. unsigned int size;
  1380. ep = container_of(_ep, struct qe_ep, ep);
  1381. udc = ep->udc;
  1382. if (!_ep || !ep->ep.desc) {
  1383. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1384. return -EINVAL;
  1385. }
  1386. spin_lock_irqsave(&udc->lock, flags);
  1387. /* Nuke all pending requests (does flush) */
  1388. nuke(ep, -ESHUTDOWN);
  1389. ep->ep.desc = NULL;
  1390. ep->stopped = 1;
  1391. ep->tx_req = NULL;
  1392. qe_ep_reset(udc, ep->epnum);
  1393. spin_unlock_irqrestore(&udc->lock, flags);
  1394. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1395. if (ep->dir == USB_DIR_OUT)
  1396. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1397. (USB_BDRING_LEN_RX + 1);
  1398. else
  1399. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1400. (USB_BDRING_LEN + 1);
  1401. if (ep->dir != USB_DIR_IN) {
  1402. kfree(ep->rxframe);
  1403. if (ep->rxbufmap) {
  1404. dma_unmap_single(udc->gadget.dev.parent,
  1405. ep->rxbuf_d, size,
  1406. DMA_FROM_DEVICE);
  1407. ep->rxbuf_d = DMA_ADDR_INVALID;
  1408. } else {
  1409. dma_sync_single_for_cpu(
  1410. udc->gadget.dev.parent,
  1411. ep->rxbuf_d, size,
  1412. DMA_FROM_DEVICE);
  1413. }
  1414. kfree(ep->rxbuffer);
  1415. }
  1416. if (ep->dir != USB_DIR_OUT)
  1417. kfree(ep->txframe);
  1418. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1419. return 0;
  1420. }
  1421. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1422. {
  1423. struct qe_req *req;
  1424. req = kzalloc(sizeof(*req), gfp_flags);
  1425. if (!req)
  1426. return NULL;
  1427. req->req.dma = DMA_ADDR_INVALID;
  1428. INIT_LIST_HEAD(&req->queue);
  1429. return &req->req;
  1430. }
  1431. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1432. {
  1433. struct qe_req *req;
  1434. req = container_of(_req, struct qe_req, req);
  1435. if (_req)
  1436. kfree(req);
  1437. }
  1438. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1439. {
  1440. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1441. struct qe_req *req = container_of(_req, struct qe_req, req);
  1442. struct qe_udc *udc;
  1443. int reval;
  1444. udc = ep->udc;
  1445. /* catch various bogus parameters */
  1446. if (!_req || !req->req.complete || !req->req.buf
  1447. || !list_empty(&req->queue)) {
  1448. dev_dbg(udc->dev, "bad params\n");
  1449. return -EINVAL;
  1450. }
  1451. if (!_ep || (!ep->ep.desc && ep_index(ep))) {
  1452. dev_dbg(udc->dev, "bad ep\n");
  1453. return -EINVAL;
  1454. }
  1455. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1456. return -ESHUTDOWN;
  1457. req->ep = ep;
  1458. /* map virtual address to hardware */
  1459. if (req->req.dma == DMA_ADDR_INVALID) {
  1460. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1461. req->req.buf,
  1462. req->req.length,
  1463. ep_is_in(ep)
  1464. ? DMA_TO_DEVICE :
  1465. DMA_FROM_DEVICE);
  1466. req->mapped = 1;
  1467. } else {
  1468. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1469. req->req.dma, req->req.length,
  1470. ep_is_in(ep)
  1471. ? DMA_TO_DEVICE :
  1472. DMA_FROM_DEVICE);
  1473. req->mapped = 0;
  1474. }
  1475. req->req.status = -EINPROGRESS;
  1476. req->req.actual = 0;
  1477. list_add_tail(&req->queue, &ep->queue);
  1478. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1479. ep->name, req->req.length);
  1480. /* push the request to device */
  1481. if (ep_is_in(ep))
  1482. reval = ep_req_send(ep, req);
  1483. /* EP0 */
  1484. if (ep_index(ep) == 0 && req->req.length > 0) {
  1485. if (ep_is_in(ep))
  1486. udc->ep0_state = DATA_STATE_XMIT;
  1487. else
  1488. udc->ep0_state = DATA_STATE_RECV;
  1489. }
  1490. if (ep->dir == USB_DIR_OUT)
  1491. reval = ep_req_receive(ep, req);
  1492. return 0;
  1493. }
  1494. /* queues (submits) an I/O request to an endpoint */
  1495. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1496. gfp_t gfp_flags)
  1497. {
  1498. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1499. struct qe_udc *udc = ep->udc;
  1500. unsigned long flags;
  1501. int ret;
  1502. spin_lock_irqsave(&udc->lock, flags);
  1503. ret = __qe_ep_queue(_ep, _req);
  1504. spin_unlock_irqrestore(&udc->lock, flags);
  1505. return ret;
  1506. }
  1507. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1508. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1509. {
  1510. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1511. struct qe_req *req;
  1512. unsigned long flags;
  1513. if (!_ep || !_req)
  1514. return -EINVAL;
  1515. spin_lock_irqsave(&ep->udc->lock, flags);
  1516. /* make sure it's actually queued on this endpoint */
  1517. list_for_each_entry(req, &ep->queue, queue) {
  1518. if (&req->req == _req)
  1519. break;
  1520. }
  1521. if (&req->req != _req) {
  1522. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1523. return -EINVAL;
  1524. }
  1525. done(ep, req, -ECONNRESET);
  1526. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1527. return 0;
  1528. }
  1529. /*-----------------------------------------------------------------
  1530. * modify the endpoint halt feature
  1531. * @ep: the non-isochronous endpoint being stalled
  1532. * @value: 1--set halt 0--clear halt
  1533. * Returns zero, or a negative error code.
  1534. *----------------------------------------------------------------*/
  1535. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1536. {
  1537. struct qe_ep *ep;
  1538. unsigned long flags;
  1539. int status = -EOPNOTSUPP;
  1540. struct qe_udc *udc;
  1541. ep = container_of(_ep, struct qe_ep, ep);
  1542. if (!_ep || !ep->ep.desc) {
  1543. status = -EINVAL;
  1544. goto out;
  1545. }
  1546. udc = ep->udc;
  1547. /* Attempt to halt IN ep will fail if any transfer requests
  1548. * are still queue */
  1549. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1550. status = -EAGAIN;
  1551. goto out;
  1552. }
  1553. status = 0;
  1554. spin_lock_irqsave(&ep->udc->lock, flags);
  1555. qe_eptx_stall_change(ep, value);
  1556. qe_eprx_stall_change(ep, value);
  1557. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1558. if (ep->epnum == 0) {
  1559. udc->ep0_state = WAIT_FOR_SETUP;
  1560. udc->ep0_dir = 0;
  1561. }
  1562. /* set data toggle to DATA0 on clear halt */
  1563. if (value == 0)
  1564. ep->data01 = 0;
  1565. out:
  1566. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1567. value ? "set" : "clear", status);
  1568. return status;
  1569. }
  1570. static struct usb_ep_ops qe_ep_ops = {
  1571. .enable = qe_ep_enable,
  1572. .disable = qe_ep_disable,
  1573. .alloc_request = qe_alloc_request,
  1574. .free_request = qe_free_request,
  1575. .queue = qe_ep_queue,
  1576. .dequeue = qe_ep_dequeue,
  1577. .set_halt = qe_ep_set_halt,
  1578. };
  1579. /*------------------------------------------------------------------------
  1580. Gadget Driver Layer Operations
  1581. ------------------------------------------------------------------------*/
  1582. /* Get the current frame number */
  1583. static int qe_get_frame(struct usb_gadget *gadget)
  1584. {
  1585. struct qe_udc *udc = container_of(gadget, struct qe_udc, gadget);
  1586. u16 tmp;
  1587. tmp = in_be16(&udc->usb_param->frame_n);
  1588. if (tmp & 0x8000)
  1589. tmp = tmp & 0x07ff;
  1590. else
  1591. tmp = -EINVAL;
  1592. return (int)tmp;
  1593. }
  1594. static int fsl_qe_start(struct usb_gadget *gadget,
  1595. struct usb_gadget_driver *driver);
  1596. static int fsl_qe_stop(struct usb_gadget *gadget,
  1597. struct usb_gadget_driver *driver);
  1598. /* defined in usb_gadget.h */
  1599. static const struct usb_gadget_ops qe_gadget_ops = {
  1600. .get_frame = qe_get_frame,
  1601. .udc_start = fsl_qe_start,
  1602. .udc_stop = fsl_qe_stop,
  1603. };
  1604. /*-------------------------------------------------------------------------
  1605. USB ep0 Setup process in BUS Enumeration
  1606. -------------------------------------------------------------------------*/
  1607. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1608. {
  1609. struct qe_ep *ep = &udc->eps[pipe];
  1610. nuke(ep, -ECONNRESET);
  1611. ep->tx_req = NULL;
  1612. return 0;
  1613. }
  1614. static int reset_queues(struct qe_udc *udc)
  1615. {
  1616. u8 pipe;
  1617. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1618. udc_reset_ep_queue(udc, pipe);
  1619. /* report disconnect; the driver is already quiesced */
  1620. spin_unlock(&udc->lock);
  1621. udc->driver->disconnect(&udc->gadget);
  1622. spin_lock(&udc->lock);
  1623. return 0;
  1624. }
  1625. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1626. u16 length)
  1627. {
  1628. /* Save the new address to device struct */
  1629. udc->device_address = (u8) value;
  1630. /* Update usb state */
  1631. udc->usb_state = USB_STATE_ADDRESS;
  1632. /* Status phase , send a ZLP */
  1633. if (ep0_prime_status(udc, USB_DIR_IN))
  1634. qe_ep0_stall(udc);
  1635. }
  1636. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1637. {
  1638. struct qe_req *req = container_of(_req, struct qe_req, req);
  1639. req->req.buf = NULL;
  1640. kfree(req);
  1641. }
  1642. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1643. u16 index, u16 length)
  1644. {
  1645. u16 usb_status = 0;
  1646. struct qe_req *req;
  1647. struct qe_ep *ep;
  1648. int status = 0;
  1649. ep = &udc->eps[0];
  1650. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1651. /* Get device status */
  1652. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1653. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1654. /* Get interface status */
  1655. /* We don't have interface information in udc driver */
  1656. usb_status = 0;
  1657. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1658. /* Get endpoint status */
  1659. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1660. struct qe_ep *target_ep = &udc->eps[pipe];
  1661. u16 usep;
  1662. /* stall if endpoint doesn't exist */
  1663. if (!target_ep->ep.desc)
  1664. goto stall;
  1665. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1666. if (index & USB_DIR_IN) {
  1667. if (target_ep->dir != USB_DIR_IN)
  1668. goto stall;
  1669. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1670. usb_status = 1 << USB_ENDPOINT_HALT;
  1671. } else {
  1672. if (target_ep->dir != USB_DIR_OUT)
  1673. goto stall;
  1674. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1675. usb_status = 1 << USB_ENDPOINT_HALT;
  1676. }
  1677. }
  1678. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1679. struct qe_req, req);
  1680. req->req.length = 2;
  1681. req->req.buf = udc->statusbuf;
  1682. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1683. req->req.status = -EINPROGRESS;
  1684. req->req.actual = 0;
  1685. req->req.complete = ownercomplete;
  1686. udc->ep0_dir = USB_DIR_IN;
  1687. /* data phase */
  1688. status = __qe_ep_queue(&ep->ep, &req->req);
  1689. if (status == 0)
  1690. return;
  1691. stall:
  1692. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1693. qe_ep0_stall(udc);
  1694. }
  1695. /* only handle the setup request, suppose the device in normal status */
  1696. static void setup_received_handle(struct qe_udc *udc,
  1697. struct usb_ctrlrequest *setup)
  1698. {
  1699. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1700. u16 wValue = le16_to_cpu(setup->wValue);
  1701. u16 wIndex = le16_to_cpu(setup->wIndex);
  1702. u16 wLength = le16_to_cpu(setup->wLength);
  1703. /* clear the previous request in the ep0 */
  1704. udc_reset_ep_queue(udc, 0);
  1705. if (setup->bRequestType & USB_DIR_IN)
  1706. udc->ep0_dir = USB_DIR_IN;
  1707. else
  1708. udc->ep0_dir = USB_DIR_OUT;
  1709. switch (setup->bRequest) {
  1710. case USB_REQ_GET_STATUS:
  1711. /* Data+Status phase form udc */
  1712. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1713. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1714. break;
  1715. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1716. wLength);
  1717. return;
  1718. case USB_REQ_SET_ADDRESS:
  1719. /* Status phase from udc */
  1720. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1721. USB_RECIP_DEVICE))
  1722. break;
  1723. ch9setaddress(udc, wValue, wIndex, wLength);
  1724. return;
  1725. case USB_REQ_CLEAR_FEATURE:
  1726. case USB_REQ_SET_FEATURE:
  1727. /* Requests with no data phase, status phase from udc */
  1728. if ((setup->bRequestType & USB_TYPE_MASK)
  1729. != USB_TYPE_STANDARD)
  1730. break;
  1731. if ((setup->bRequestType & USB_RECIP_MASK)
  1732. == USB_RECIP_ENDPOINT) {
  1733. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1734. struct qe_ep *ep;
  1735. if (wValue != 0 || wLength != 0
  1736. || pipe > USB_MAX_ENDPOINTS)
  1737. break;
  1738. ep = &udc->eps[pipe];
  1739. spin_unlock(&udc->lock);
  1740. qe_ep_set_halt(&ep->ep,
  1741. (setup->bRequest == USB_REQ_SET_FEATURE)
  1742. ? 1 : 0);
  1743. spin_lock(&udc->lock);
  1744. }
  1745. ep0_prime_status(udc, USB_DIR_IN);
  1746. return;
  1747. default:
  1748. break;
  1749. }
  1750. if (wLength) {
  1751. /* Data phase from gadget, status phase from udc */
  1752. if (setup->bRequestType & USB_DIR_IN) {
  1753. udc->ep0_state = DATA_STATE_XMIT;
  1754. udc->ep0_dir = USB_DIR_IN;
  1755. } else {
  1756. udc->ep0_state = DATA_STATE_RECV;
  1757. udc->ep0_dir = USB_DIR_OUT;
  1758. }
  1759. spin_unlock(&udc->lock);
  1760. if (udc->driver->setup(&udc->gadget,
  1761. &udc->local_setup_buff) < 0)
  1762. qe_ep0_stall(udc);
  1763. spin_lock(&udc->lock);
  1764. } else {
  1765. /* No data phase, IN status from gadget */
  1766. udc->ep0_dir = USB_DIR_IN;
  1767. spin_unlock(&udc->lock);
  1768. if (udc->driver->setup(&udc->gadget,
  1769. &udc->local_setup_buff) < 0)
  1770. qe_ep0_stall(udc);
  1771. spin_lock(&udc->lock);
  1772. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1773. }
  1774. }
  1775. /*-------------------------------------------------------------------------
  1776. USB Interrupt handlers
  1777. -------------------------------------------------------------------------*/
  1778. static void suspend_irq(struct qe_udc *udc)
  1779. {
  1780. udc->resume_state = udc->usb_state;
  1781. udc->usb_state = USB_STATE_SUSPENDED;
  1782. /* report suspend to the driver ,serial.c not support this*/
  1783. if (udc->driver->suspend)
  1784. udc->driver->suspend(&udc->gadget);
  1785. }
  1786. static void resume_irq(struct qe_udc *udc)
  1787. {
  1788. udc->usb_state = udc->resume_state;
  1789. udc->resume_state = 0;
  1790. /* report resume to the driver , serial.c not support this*/
  1791. if (udc->driver->resume)
  1792. udc->driver->resume(&udc->gadget);
  1793. }
  1794. static void idle_irq(struct qe_udc *udc)
  1795. {
  1796. u8 usbs;
  1797. usbs = in_8(&udc->usb_regs->usb_usbs);
  1798. if (usbs & USB_IDLE_STATUS_MASK) {
  1799. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1800. suspend_irq(udc);
  1801. } else {
  1802. if (udc->usb_state == USB_STATE_SUSPENDED)
  1803. resume_irq(udc);
  1804. }
  1805. }
  1806. static int reset_irq(struct qe_udc *udc)
  1807. {
  1808. unsigned char i;
  1809. if (udc->usb_state == USB_STATE_DEFAULT)
  1810. return 0;
  1811. qe_usb_disable(udc);
  1812. out_8(&udc->usb_regs->usb_usadr, 0);
  1813. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1814. if (udc->eps[i].init)
  1815. qe_ep_reset(udc, i);
  1816. }
  1817. reset_queues(udc);
  1818. udc->usb_state = USB_STATE_DEFAULT;
  1819. udc->ep0_state = WAIT_FOR_SETUP;
  1820. udc->ep0_dir = USB_DIR_OUT;
  1821. qe_usb_enable(udc);
  1822. return 0;
  1823. }
  1824. static int bsy_irq(struct qe_udc *udc)
  1825. {
  1826. return 0;
  1827. }
  1828. static int txe_irq(struct qe_udc *udc)
  1829. {
  1830. return 0;
  1831. }
  1832. /* ep0 tx interrupt also in here */
  1833. static int tx_irq(struct qe_udc *udc)
  1834. {
  1835. struct qe_ep *ep;
  1836. struct qe_bd __iomem *bd;
  1837. int i, res = 0;
  1838. if ((udc->usb_state == USB_STATE_ADDRESS)
  1839. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1840. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1841. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1842. ep = &udc->eps[i];
  1843. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1844. bd = ep->c_txbd;
  1845. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1846. && (in_be32(&bd->buf))) {
  1847. /* confirm the transmitted bd */
  1848. if (ep->epnum == 0)
  1849. res = qe_ep0_txconf(ep);
  1850. else
  1851. res = qe_ep_txconf(ep);
  1852. }
  1853. }
  1854. }
  1855. return res;
  1856. }
  1857. /* setup packect's rx is handle in the function too */
  1858. static void rx_irq(struct qe_udc *udc)
  1859. {
  1860. struct qe_ep *ep;
  1861. struct qe_bd __iomem *bd;
  1862. int i;
  1863. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1864. ep = &udc->eps[i];
  1865. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1866. bd = ep->n_rxbd;
  1867. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1868. && (in_be32(&bd->buf))) {
  1869. if (ep->epnum == 0) {
  1870. qe_ep0_rx(udc);
  1871. } else {
  1872. /*non-setup package receive*/
  1873. qe_ep_rx(ep);
  1874. }
  1875. }
  1876. }
  1877. }
  1878. }
  1879. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1880. {
  1881. struct qe_udc *udc = (struct qe_udc *)_udc;
  1882. u16 irq_src;
  1883. irqreturn_t status = IRQ_NONE;
  1884. unsigned long flags;
  1885. spin_lock_irqsave(&udc->lock, flags);
  1886. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1887. in_be16(&udc->usb_regs->usb_usbmr);
  1888. /* Clear notification bits */
  1889. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1890. /* USB Interrupt */
  1891. if (irq_src & USB_E_IDLE_MASK) {
  1892. idle_irq(udc);
  1893. irq_src &= ~USB_E_IDLE_MASK;
  1894. status = IRQ_HANDLED;
  1895. }
  1896. if (irq_src & USB_E_TXB_MASK) {
  1897. tx_irq(udc);
  1898. irq_src &= ~USB_E_TXB_MASK;
  1899. status = IRQ_HANDLED;
  1900. }
  1901. if (irq_src & USB_E_RXB_MASK) {
  1902. rx_irq(udc);
  1903. irq_src &= ~USB_E_RXB_MASK;
  1904. status = IRQ_HANDLED;
  1905. }
  1906. if (irq_src & USB_E_RESET_MASK) {
  1907. reset_irq(udc);
  1908. irq_src &= ~USB_E_RESET_MASK;
  1909. status = IRQ_HANDLED;
  1910. }
  1911. if (irq_src & USB_E_BSY_MASK) {
  1912. bsy_irq(udc);
  1913. irq_src &= ~USB_E_BSY_MASK;
  1914. status = IRQ_HANDLED;
  1915. }
  1916. if (irq_src & USB_E_TXE_MASK) {
  1917. txe_irq(udc);
  1918. irq_src &= ~USB_E_TXE_MASK;
  1919. status = IRQ_HANDLED;
  1920. }
  1921. spin_unlock_irqrestore(&udc->lock, flags);
  1922. return status;
  1923. }
  1924. /*-------------------------------------------------------------------------
  1925. Gadget driver probe and unregister.
  1926. --------------------------------------------------------------------------*/
  1927. static int fsl_qe_start(struct usb_gadget *gadget,
  1928. struct usb_gadget_driver *driver)
  1929. {
  1930. struct qe_udc *udc;
  1931. unsigned long flags;
  1932. udc = container_of(gadget, struct qe_udc, gadget);
  1933. /* lock is needed but whether should use this lock or another */
  1934. spin_lock_irqsave(&udc->lock, flags);
  1935. driver->driver.bus = NULL;
  1936. /* hook up the driver */
  1937. udc->driver = driver;
  1938. udc->gadget.speed = driver->max_speed;
  1939. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1940. qe_usb_enable(udc);
  1941. out_be16(&udc->usb_regs->usb_usber, 0xffff);
  1942. out_be16(&udc->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1943. udc->usb_state = USB_STATE_ATTACHED;
  1944. udc->ep0_state = WAIT_FOR_SETUP;
  1945. udc->ep0_dir = USB_DIR_OUT;
  1946. spin_unlock_irqrestore(&udc->lock, flags);
  1947. dev_info(udc->dev, "%s bind to driver %s\n", udc->gadget.name,
  1948. driver->driver.name);
  1949. return 0;
  1950. }
  1951. static int fsl_qe_stop(struct usb_gadget *gadget,
  1952. struct usb_gadget_driver *driver)
  1953. {
  1954. struct qe_udc *udc;
  1955. struct qe_ep *loop_ep;
  1956. unsigned long flags;
  1957. udc = container_of(gadget, struct qe_udc, gadget);
  1958. /* stop usb controller, disable intr */
  1959. qe_usb_disable(udc);
  1960. /* in fact, no needed */
  1961. udc->usb_state = USB_STATE_ATTACHED;
  1962. udc->ep0_state = WAIT_FOR_SETUP;
  1963. udc->ep0_dir = 0;
  1964. /* stand operation */
  1965. spin_lock_irqsave(&udc->lock, flags);
  1966. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1967. nuke(&udc->eps[0], -ESHUTDOWN);
  1968. list_for_each_entry(loop_ep, &udc->gadget.ep_list, ep.ep_list)
  1969. nuke(loop_ep, -ESHUTDOWN);
  1970. spin_unlock_irqrestore(&udc->lock, flags);
  1971. udc->driver = NULL;
  1972. dev_info(udc->dev, "unregistered gadget driver '%s'\r\n",
  1973. driver->driver.name);
  1974. return 0;
  1975. }
  1976. /* udc structure's alloc and setup, include ep-param alloc */
  1977. static struct qe_udc *qe_udc_config(struct platform_device *ofdev)
  1978. {
  1979. struct qe_udc *udc;
  1980. struct device_node *np = ofdev->dev.of_node;
  1981. unsigned int tmp_addr = 0;
  1982. struct usb_device_para __iomem *usbpram;
  1983. unsigned int i;
  1984. u64 size;
  1985. u32 offset;
  1986. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  1987. if (udc == NULL) {
  1988. dev_err(&ofdev->dev, "malloc udc failed\n");
  1989. goto cleanup;
  1990. }
  1991. udc->dev = &ofdev->dev;
  1992. /* get default address of usb parameter in MURAM from device tree */
  1993. offset = *of_get_address(np, 1, &size, NULL);
  1994. udc->usb_param = cpm_muram_addr(offset);
  1995. memset_io(udc->usb_param, 0, size);
  1996. usbpram = udc->usb_param;
  1997. out_be16(&usbpram->frame_n, 0);
  1998. out_be32(&usbpram->rstate, 0);
  1999. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  2000. sizeof(struct usb_ep_para)),
  2001. USB_EP_PARA_ALIGNMENT);
  2002. if (IS_ERR_VALUE(tmp_addr))
  2003. goto cleanup;
  2004. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  2005. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  2006. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  2007. tmp_addr += 32;
  2008. }
  2009. memset_io(udc->ep_param[0], 0,
  2010. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  2011. udc->resume_state = USB_STATE_NOTATTACHED;
  2012. udc->usb_state = USB_STATE_POWERED;
  2013. udc->ep0_dir = 0;
  2014. spin_lock_init(&udc->lock);
  2015. return udc;
  2016. cleanup:
  2017. kfree(udc);
  2018. return NULL;
  2019. }
  2020. /* USB Controller register init */
  2021. static int qe_udc_reg_init(struct qe_udc *udc)
  2022. {
  2023. struct usb_ctlr __iomem *qe_usbregs;
  2024. qe_usbregs = udc->usb_regs;
  2025. /* Spec says that we must enable the USB controller to change mode. */
  2026. out_8(&qe_usbregs->usb_usmod, 0x01);
  2027. /* Mode changed, now disable it, since muram isn't initialized yet. */
  2028. out_8(&qe_usbregs->usb_usmod, 0x00);
  2029. /* Initialize the rest. */
  2030. out_be16(&qe_usbregs->usb_usbmr, 0);
  2031. out_8(&qe_usbregs->usb_uscom, 0);
  2032. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2033. return 0;
  2034. }
  2035. static int qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2036. {
  2037. struct qe_ep *ep = &udc->eps[pipe_num];
  2038. ep->udc = udc;
  2039. strcpy(ep->name, ep_name[pipe_num]);
  2040. ep->ep.name = ep_name[pipe_num];
  2041. ep->ep.ops = &qe_ep_ops;
  2042. ep->stopped = 1;
  2043. ep->ep.maxpacket = (unsigned short) ~0;
  2044. ep->ep.desc = NULL;
  2045. ep->dir = 0xff;
  2046. ep->epnum = (u8)pipe_num;
  2047. ep->sent = 0;
  2048. ep->last = 0;
  2049. ep->init = 0;
  2050. ep->rxframe = NULL;
  2051. ep->txframe = NULL;
  2052. ep->tx_req = NULL;
  2053. ep->state = EP_STATE_IDLE;
  2054. ep->has_data = 0;
  2055. /* the queue lists any req for this ep */
  2056. INIT_LIST_HEAD(&ep->queue);
  2057. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2058. if (pipe_num != 0)
  2059. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2060. ep->gadget = &udc->gadget;
  2061. return 0;
  2062. }
  2063. /*-----------------------------------------------------------------------
  2064. * UDC device Driver operation functions *
  2065. *----------------------------------------------------------------------*/
  2066. static void qe_udc_release(struct device *dev)
  2067. {
  2068. struct qe_udc *udc = container_of(dev, struct qe_udc, gadget.dev);
  2069. int i;
  2070. complete(udc->done);
  2071. cpm_muram_free(cpm_muram_offset(udc->ep_param[0]));
  2072. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2073. udc->ep_param[i] = NULL;
  2074. kfree(udc);
  2075. }
  2076. /* Driver probe functions */
  2077. static const struct of_device_id qe_udc_match[];
  2078. static int qe_udc_probe(struct platform_device *ofdev)
  2079. {
  2080. struct qe_udc *udc;
  2081. const struct of_device_id *match;
  2082. struct device_node *np = ofdev->dev.of_node;
  2083. struct qe_ep *ep;
  2084. unsigned int ret = 0;
  2085. unsigned int i;
  2086. const void *prop;
  2087. match = of_match_device(qe_udc_match, &ofdev->dev);
  2088. if (!match)
  2089. return -EINVAL;
  2090. prop = of_get_property(np, "mode", NULL);
  2091. if (!prop || strcmp(prop, "peripheral"))
  2092. return -ENODEV;
  2093. /* Initialize the udc structure including QH member and other member */
  2094. udc = qe_udc_config(ofdev);
  2095. if (!udc) {
  2096. dev_err(&ofdev->dev, "failed to initialize\n");
  2097. return -ENOMEM;
  2098. }
  2099. udc->soc_type = (unsigned long)match->data;
  2100. udc->usb_regs = of_iomap(np, 0);
  2101. if (!udc->usb_regs) {
  2102. ret = -ENOMEM;
  2103. goto err1;
  2104. }
  2105. /* initialize usb hw reg except for regs for EP,
  2106. * leave usbintr reg untouched*/
  2107. qe_udc_reg_init(udc);
  2108. /* here comes the stand operations for probe
  2109. * set the qe_udc->gadget.xxx */
  2110. udc->gadget.ops = &qe_gadget_ops;
  2111. /* gadget.ep0 is a pointer */
  2112. udc->gadget.ep0 = &udc->eps[0].ep;
  2113. INIT_LIST_HEAD(&udc->gadget.ep_list);
  2114. /* modify in register gadget process */
  2115. udc->gadget.speed = USB_SPEED_UNKNOWN;
  2116. /* name: Identifies the controller hardware type. */
  2117. udc->gadget.name = driver_name;
  2118. udc->gadget.dev.parent = &ofdev->dev;
  2119. /* initialize qe_ep struct */
  2120. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2121. /* because the ep type isn't decide here so
  2122. * qe_ep_init() should be called in ep_enable() */
  2123. /* setup the qe_ep struct and link ep.ep.list
  2124. * into gadget.ep_list */
  2125. qe_ep_config(udc, (unsigned char)i);
  2126. }
  2127. /* ep0 initialization in here */
  2128. ret = qe_ep_init(udc, 0, &qe_ep0_desc);
  2129. if (ret)
  2130. goto err2;
  2131. /* create a buf for ZLP send, need to remain zeroed */
  2132. udc->nullbuf = kzalloc(256, GFP_KERNEL);
  2133. if (udc->nullbuf == NULL) {
  2134. dev_err(udc->dev, "cannot alloc nullbuf\n");
  2135. ret = -ENOMEM;
  2136. goto err3;
  2137. }
  2138. /* buffer for data of get_status request */
  2139. udc->statusbuf = kzalloc(2, GFP_KERNEL);
  2140. if (udc->statusbuf == NULL) {
  2141. ret = -ENOMEM;
  2142. goto err4;
  2143. }
  2144. udc->nullp = virt_to_phys((void *)udc->nullbuf);
  2145. if (udc->nullp == DMA_ADDR_INVALID) {
  2146. udc->nullp = dma_map_single(
  2147. udc->gadget.dev.parent,
  2148. udc->nullbuf,
  2149. 256,
  2150. DMA_TO_DEVICE);
  2151. udc->nullmap = 1;
  2152. } else {
  2153. dma_sync_single_for_device(udc->gadget.dev.parent,
  2154. udc->nullp, 256,
  2155. DMA_TO_DEVICE);
  2156. }
  2157. tasklet_init(&udc->rx_tasklet, ep_rx_tasklet,
  2158. (unsigned long)udc);
  2159. /* request irq and disable DR */
  2160. udc->usb_irq = irq_of_parse_and_map(np, 0);
  2161. if (!udc->usb_irq) {
  2162. ret = -EINVAL;
  2163. goto err_noirq;
  2164. }
  2165. ret = request_irq(udc->usb_irq, qe_udc_irq, 0,
  2166. driver_name, udc);
  2167. if (ret) {
  2168. dev_err(udc->dev, "cannot request irq %d err %d\n",
  2169. udc->usb_irq, ret);
  2170. goto err5;
  2171. }
  2172. ret = usb_add_gadget_udc_release(&ofdev->dev, &udc->gadget,
  2173. qe_udc_release);
  2174. if (ret)
  2175. goto err6;
  2176. platform_set_drvdata(ofdev, udc);
  2177. dev_info(udc->dev,
  2178. "%s USB controller initialized as device\n",
  2179. (udc->soc_type == PORT_QE) ? "QE" : "CPM");
  2180. return 0;
  2181. err6:
  2182. free_irq(udc->usb_irq, udc);
  2183. err5:
  2184. irq_dispose_mapping(udc->usb_irq);
  2185. err_noirq:
  2186. if (udc->nullmap) {
  2187. dma_unmap_single(udc->gadget.dev.parent,
  2188. udc->nullp, 256,
  2189. DMA_TO_DEVICE);
  2190. udc->nullp = DMA_ADDR_INVALID;
  2191. } else {
  2192. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2193. udc->nullp, 256,
  2194. DMA_TO_DEVICE);
  2195. }
  2196. kfree(udc->statusbuf);
  2197. err4:
  2198. kfree(udc->nullbuf);
  2199. err3:
  2200. ep = &udc->eps[0];
  2201. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2202. kfree(ep->rxframe);
  2203. kfree(ep->rxbuffer);
  2204. kfree(ep->txframe);
  2205. err2:
  2206. iounmap(udc->usb_regs);
  2207. err1:
  2208. kfree(udc);
  2209. return ret;
  2210. }
  2211. #ifdef CONFIG_PM
  2212. static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
  2213. {
  2214. return -ENOTSUPP;
  2215. }
  2216. static int qe_udc_resume(struct platform_device *dev)
  2217. {
  2218. return -ENOTSUPP;
  2219. }
  2220. #endif
  2221. static int qe_udc_remove(struct platform_device *ofdev)
  2222. {
  2223. struct qe_udc *udc = platform_get_drvdata(ofdev);
  2224. struct qe_ep *ep;
  2225. unsigned int size;
  2226. DECLARE_COMPLETION(done);
  2227. usb_del_gadget_udc(&udc->gadget);
  2228. udc->done = &done;
  2229. tasklet_disable(&udc->rx_tasklet);
  2230. if (udc->nullmap) {
  2231. dma_unmap_single(udc->gadget.dev.parent,
  2232. udc->nullp, 256,
  2233. DMA_TO_DEVICE);
  2234. udc->nullp = DMA_ADDR_INVALID;
  2235. } else {
  2236. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2237. udc->nullp, 256,
  2238. DMA_TO_DEVICE);
  2239. }
  2240. kfree(udc->statusbuf);
  2241. kfree(udc->nullbuf);
  2242. ep = &udc->eps[0];
  2243. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2244. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2245. kfree(ep->rxframe);
  2246. if (ep->rxbufmap) {
  2247. dma_unmap_single(udc->gadget.dev.parent,
  2248. ep->rxbuf_d, size,
  2249. DMA_FROM_DEVICE);
  2250. ep->rxbuf_d = DMA_ADDR_INVALID;
  2251. } else {
  2252. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2253. ep->rxbuf_d, size,
  2254. DMA_FROM_DEVICE);
  2255. }
  2256. kfree(ep->rxbuffer);
  2257. kfree(ep->txframe);
  2258. free_irq(udc->usb_irq, udc);
  2259. irq_dispose_mapping(udc->usb_irq);
  2260. tasklet_kill(&udc->rx_tasklet);
  2261. iounmap(udc->usb_regs);
  2262. /* wait for release() of gadget.dev to free udc */
  2263. wait_for_completion(&done);
  2264. return 0;
  2265. }
  2266. /*-------------------------------------------------------------------------*/
  2267. static const struct of_device_id qe_udc_match[] = {
  2268. {
  2269. .compatible = "fsl,mpc8323-qe-usb",
  2270. .data = (void *)PORT_QE,
  2271. },
  2272. {
  2273. .compatible = "fsl,mpc8360-qe-usb",
  2274. .data = (void *)PORT_QE,
  2275. },
  2276. {
  2277. .compatible = "fsl,mpc8272-cpm-usb",
  2278. .data = (void *)PORT_CPM,
  2279. },
  2280. {},
  2281. };
  2282. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2283. static struct platform_driver udc_driver = {
  2284. .driver = {
  2285. .name = (char *)driver_name,
  2286. .owner = THIS_MODULE,
  2287. .of_match_table = qe_udc_match,
  2288. },
  2289. .probe = qe_udc_probe,
  2290. .remove = qe_udc_remove,
  2291. #ifdef CONFIG_PM
  2292. .suspend = qe_udc_suspend,
  2293. .resume = qe_udc_resume,
  2294. #endif
  2295. };
  2296. module_platform_driver(udc_driver);
  2297. MODULE_DESCRIPTION(DRIVER_DESC);
  2298. MODULE_AUTHOR(DRIVER_AUTHOR);
  2299. MODULE_LICENSE("GPL");