via-pmu.c 62 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. * Copyright (C) 2006-2007 Johannes Berg
  14. *
  15. * THIS DRIVER IS BECOMING A TOTAL MESS !
  16. * - Cleanup atomically disabling reply to PMU events after
  17. * a sleep or a freq. switch
  18. *
  19. */
  20. #include <stdarg.h>
  21. #include <linux/mutex.h>
  22. #include <linux/types.h>
  23. #include <linux/errno.h>
  24. #include <linux/kernel.h>
  25. #include <linux/delay.h>
  26. #include <linux/sched.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/poll.h>
  32. #include <linux/adb.h>
  33. #include <linux/pmu.h>
  34. #include <linux/cuda.h>
  35. #include <linux/module.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/pm.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/seq_file.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/device.h>
  43. #include <linux/syscore_ops.h>
  44. #include <linux/freezer.h>
  45. #include <linux/syscalls.h>
  46. #include <linux/suspend.h>
  47. #include <linux/cpu.h>
  48. #include <linux/compat.h>
  49. #include <linux/of_address.h>
  50. #include <linux/of_irq.h>
  51. #include <asm/prom.h>
  52. #include <asm/machdep.h>
  53. #include <asm/io.h>
  54. #include <asm/pgtable.h>
  55. #include <asm/sections.h>
  56. #include <asm/irq.h>
  57. #include <asm/pmac_feature.h>
  58. #include <asm/pmac_pfunc.h>
  59. #include <asm/pmac_low_i2c.h>
  60. #include <asm/uaccess.h>
  61. #include <asm/mmu_context.h>
  62. #include <asm/cputable.h>
  63. #include <asm/time.h>
  64. #include <asm/backlight.h>
  65. #include "via-pmu-event.h"
  66. /* Some compile options */
  67. #undef DEBUG_SLEEP
  68. /* Misc minor number allocated for /dev/pmu */
  69. #define PMU_MINOR 154
  70. /* How many iterations between battery polls */
  71. #define BATTERY_POLLING_COUNT 2
  72. static DEFINE_MUTEX(pmu_info_proc_mutex);
  73. static volatile unsigned char __iomem *via;
  74. /* VIA registers - spaced 0x200 bytes apart */
  75. #define RS 0x200 /* skip between registers */
  76. #define B 0 /* B-side data */
  77. #define A RS /* A-side data */
  78. #define DIRB (2*RS) /* B-side direction (1=output) */
  79. #define DIRA (3*RS) /* A-side direction (1=output) */
  80. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  81. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  82. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  83. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  84. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  85. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  86. #define SR (10*RS) /* Shift register */
  87. #define ACR (11*RS) /* Auxiliary control register */
  88. #define PCR (12*RS) /* Peripheral control register */
  89. #define IFR (13*RS) /* Interrupt flag register */
  90. #define IER (14*RS) /* Interrupt enable register */
  91. #define ANH (15*RS) /* A-side data, no handshake */
  92. /* Bits in B data register: both active low */
  93. #define TACK 0x08 /* Transfer acknowledge (input) */
  94. #define TREQ 0x10 /* Transfer request (output) */
  95. /* Bits in ACR */
  96. #define SR_CTRL 0x1c /* Shift register control bits */
  97. #define SR_EXT 0x0c /* Shift on external clock */
  98. #define SR_OUT 0x10 /* Shift out if 1 */
  99. /* Bits in IFR and IER */
  100. #define IER_SET 0x80 /* set bits in IER */
  101. #define IER_CLR 0 /* clear bits in IER */
  102. #define SR_INT 0x04 /* Shift register full/empty */
  103. #define CB2_INT 0x08
  104. #define CB1_INT 0x10 /* transition on CB1 input */
  105. static volatile enum pmu_state {
  106. idle,
  107. sending,
  108. intack,
  109. reading,
  110. reading_intr,
  111. locked,
  112. } pmu_state;
  113. static volatile enum int_data_state {
  114. int_data_empty,
  115. int_data_fill,
  116. int_data_ready,
  117. int_data_flush
  118. } int_data_state[2] = { int_data_empty, int_data_empty };
  119. static struct adb_request *current_req;
  120. static struct adb_request *last_req;
  121. static struct adb_request *req_awaiting_reply;
  122. static unsigned char interrupt_data[2][32];
  123. static int interrupt_data_len[2];
  124. static int int_data_last;
  125. static unsigned char *reply_ptr;
  126. static int data_index;
  127. static int data_len;
  128. static volatile int adb_int_pending;
  129. static volatile int disable_poll;
  130. static struct device_node *vias;
  131. static int pmu_kind = PMU_UNKNOWN;
  132. static int pmu_fully_inited;
  133. static int pmu_has_adb;
  134. static struct device_node *gpio_node;
  135. static unsigned char __iomem *gpio_reg;
  136. static int gpio_irq = NO_IRQ;
  137. static int gpio_irq_enabled = -1;
  138. static volatile int pmu_suspended;
  139. static spinlock_t pmu_lock;
  140. static u8 pmu_intr_mask;
  141. static int pmu_version;
  142. static int drop_interrupts;
  143. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  144. static int option_lid_wakeup = 1;
  145. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  146. static unsigned long async_req_locks;
  147. static unsigned int pmu_irq_stats[11];
  148. static struct proc_dir_entry *proc_pmu_root;
  149. static struct proc_dir_entry *proc_pmu_info;
  150. static struct proc_dir_entry *proc_pmu_irqstats;
  151. static struct proc_dir_entry *proc_pmu_options;
  152. static int option_server_mode;
  153. int pmu_battery_count;
  154. int pmu_cur_battery;
  155. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  156. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  157. static int query_batt_timer = BATTERY_POLLING_COUNT;
  158. static struct adb_request batt_req;
  159. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  160. int __fake_sleep;
  161. int asleep;
  162. #ifdef CONFIG_ADB
  163. static int adb_dev_map;
  164. static int pmu_adb_flags;
  165. static int pmu_probe(void);
  166. static int pmu_init(void);
  167. static int pmu_send_request(struct adb_request *req, int sync);
  168. static int pmu_adb_autopoll(int devs);
  169. static int pmu_adb_reset_bus(void);
  170. #endif /* CONFIG_ADB */
  171. static int init_pmu(void);
  172. static void pmu_start(void);
  173. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  174. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  175. static const struct file_operations pmu_info_proc_fops;
  176. static const struct file_operations pmu_irqstats_proc_fops;
  177. static void pmu_pass_intr(unsigned char *data, int len);
  178. static const struct file_operations pmu_battery_proc_fops;
  179. static const struct file_operations pmu_options_proc_fops;
  180. #ifdef CONFIG_ADB
  181. struct adb_driver via_pmu_driver = {
  182. "PMU",
  183. pmu_probe,
  184. pmu_init,
  185. pmu_send_request,
  186. pmu_adb_autopoll,
  187. pmu_poll_adb,
  188. pmu_adb_reset_bus
  189. };
  190. #endif /* CONFIG_ADB */
  191. extern void low_sleep_handler(void);
  192. extern void enable_kernel_altivec(void);
  193. extern void enable_kernel_fp(void);
  194. #ifdef DEBUG_SLEEP
  195. int pmu_polled_request(struct adb_request *req);
  196. void pmu_blink(int n);
  197. #endif
  198. /*
  199. * This table indicates for each PMU opcode:
  200. * - the number of data bytes to be sent with the command, or -1
  201. * if a length byte should be sent,
  202. * - the number of response bytes which the PMU will return, or
  203. * -1 if it will send a length byte.
  204. */
  205. static const s8 pmu_data_len[256][2] = {
  206. /* 0 1 2 3 4 5 6 7 */
  207. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  208. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  209. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  210. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  211. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  212. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  213. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  214. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  215. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  216. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  217. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  218. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  219. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  220. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  221. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  222. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  223. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  224. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  225. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  226. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  227. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  228. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  229. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  230. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  231. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  232. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  233. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  234. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  235. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  236. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  237. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  238. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  239. };
  240. static char *pbook_type[] = {
  241. "Unknown PowerBook",
  242. "PowerBook 2400/3400/3500(G3)",
  243. "PowerBook G3 Series",
  244. "1999 PowerBook G3",
  245. "Core99"
  246. };
  247. int __init find_via_pmu(void)
  248. {
  249. u64 taddr;
  250. const u32 *reg;
  251. if (via != 0)
  252. return 1;
  253. vias = of_find_node_by_name(NULL, "via-pmu");
  254. if (vias == NULL)
  255. return 0;
  256. reg = of_get_property(vias, "reg", NULL);
  257. if (reg == NULL) {
  258. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  259. goto fail;
  260. }
  261. taddr = of_translate_address(vias, reg);
  262. if (taddr == OF_BAD_ADDR) {
  263. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  264. goto fail;
  265. }
  266. spin_lock_init(&pmu_lock);
  267. pmu_has_adb = 1;
  268. pmu_intr_mask = PMU_INT_PCEJECT |
  269. PMU_INT_SNDBRT |
  270. PMU_INT_ADB |
  271. PMU_INT_TICK;
  272. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  273. || of_device_is_compatible(vias->parent, "ohare")))
  274. pmu_kind = PMU_OHARE_BASED;
  275. else if (of_device_is_compatible(vias->parent, "paddington"))
  276. pmu_kind = PMU_PADDINGTON_BASED;
  277. else if (of_device_is_compatible(vias->parent, "heathrow"))
  278. pmu_kind = PMU_HEATHROW_BASED;
  279. else if (of_device_is_compatible(vias->parent, "Keylargo")
  280. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  281. struct device_node *gpiop;
  282. struct device_node *adbp;
  283. u64 gaddr = OF_BAD_ADDR;
  284. pmu_kind = PMU_KEYLARGO_BASED;
  285. adbp = of_find_node_by_type(NULL, "adb");
  286. pmu_has_adb = (adbp != NULL);
  287. of_node_put(adbp);
  288. pmu_intr_mask = PMU_INT_PCEJECT |
  289. PMU_INT_SNDBRT |
  290. PMU_INT_ADB |
  291. PMU_INT_TICK |
  292. PMU_INT_ENVIRONMENT;
  293. gpiop = of_find_node_by_name(NULL, "gpio");
  294. if (gpiop) {
  295. reg = of_get_property(gpiop, "reg", NULL);
  296. if (reg)
  297. gaddr = of_translate_address(gpiop, reg);
  298. if (gaddr != OF_BAD_ADDR)
  299. gpio_reg = ioremap(gaddr, 0x10);
  300. }
  301. if (gpio_reg == NULL) {
  302. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  303. goto fail_gpio;
  304. }
  305. } else
  306. pmu_kind = PMU_UNKNOWN;
  307. via = ioremap(taddr, 0x2000);
  308. if (via == NULL) {
  309. printk(KERN_ERR "via-pmu: Can't map address !\n");
  310. goto fail;
  311. }
  312. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  313. out_8(&via[IFR], 0x7f); /* clear IFR */
  314. pmu_state = idle;
  315. if (!init_pmu()) {
  316. via = NULL;
  317. return 0;
  318. }
  319. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  320. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  321. sys_ctrler = SYS_CTRLER_PMU;
  322. return 1;
  323. fail:
  324. of_node_put(vias);
  325. iounmap(gpio_reg);
  326. gpio_reg = NULL;
  327. fail_gpio:
  328. vias = NULL;
  329. return 0;
  330. }
  331. #ifdef CONFIG_ADB
  332. static int pmu_probe(void)
  333. {
  334. return vias == NULL? -ENODEV: 0;
  335. }
  336. static int __init pmu_init(void)
  337. {
  338. if (vias == NULL)
  339. return -ENODEV;
  340. return 0;
  341. }
  342. #endif /* CONFIG_ADB */
  343. /*
  344. * We can't wait until pmu_init gets called, that happens too late.
  345. * It happens after IDE and SCSI initialization, which can take a few
  346. * seconds, and by that time the PMU could have given up on us and
  347. * turned us off.
  348. * Thus this is called with arch_initcall rather than device_initcall.
  349. */
  350. static int __init via_pmu_start(void)
  351. {
  352. unsigned int irq;
  353. if (vias == NULL)
  354. return -ENODEV;
  355. batt_req.complete = 1;
  356. irq = irq_of_parse_and_map(vias, 0);
  357. if (irq == NO_IRQ) {
  358. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  359. return -ENODEV;
  360. }
  361. /* We set IRQF_NO_SUSPEND because we don't want the interrupt
  362. * to be disabled between the 2 passes of driver suspend, we
  363. * control our own disabling for that one
  364. */
  365. if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
  366. "VIA-PMU", (void *)0)) {
  367. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  368. return -ENODEV;
  369. }
  370. if (pmu_kind == PMU_KEYLARGO_BASED) {
  371. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  372. if (gpio_node == NULL)
  373. gpio_node = of_find_node_by_name(NULL,
  374. "pmu-interrupt");
  375. if (gpio_node)
  376. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  377. if (gpio_irq != NO_IRQ) {
  378. if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
  379. "GPIO1 ADB", (void *)0))
  380. printk(KERN_ERR "pmu: can't get irq %d"
  381. " (GPIO1)\n", gpio_irq);
  382. else
  383. gpio_irq_enabled = 1;
  384. }
  385. }
  386. /* Enable interrupts */
  387. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  388. pmu_fully_inited = 1;
  389. /* Make sure PMU settle down before continuing. This is _very_ important
  390. * since the IDE probe may shut interrupts down for quite a bit of time. If
  391. * a PMU communication is pending while this happens, the PMU may timeout
  392. * Not that on Core99 machines, the PMU keeps sending us environement
  393. * messages, we should find a way to either fix IDE or make it call
  394. * pmu_suspend() before masking interrupts. This can also happens while
  395. * scolling with some fbdevs.
  396. */
  397. do {
  398. pmu_poll();
  399. } while (pmu_state != idle);
  400. return 0;
  401. }
  402. arch_initcall(via_pmu_start);
  403. /*
  404. * This has to be done after pci_init, which is a subsys_initcall.
  405. */
  406. static int __init via_pmu_dev_init(void)
  407. {
  408. if (vias == NULL)
  409. return -ENODEV;
  410. #ifdef CONFIG_PMAC_BACKLIGHT
  411. /* Initialize backlight */
  412. pmu_backlight_init();
  413. #endif
  414. #ifdef CONFIG_PPC32
  415. if (of_machine_is_compatible("AAPL,3400/2400") ||
  416. of_machine_is_compatible("AAPL,3500")) {
  417. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  418. NULL, PMAC_MB_INFO_MODEL, 0);
  419. pmu_battery_count = 1;
  420. if (mb == PMAC_TYPE_COMET)
  421. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  422. else
  423. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  424. } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
  425. of_machine_is_compatible("PowerBook1,1")) {
  426. pmu_battery_count = 2;
  427. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  428. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  429. } else {
  430. struct device_node* prim =
  431. of_find_node_by_name(NULL, "power-mgt");
  432. const u32 *prim_info = NULL;
  433. if (prim)
  434. prim_info = of_get_property(prim, "prim-info", NULL);
  435. if (prim_info) {
  436. /* Other stuffs here yet unknown */
  437. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  438. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  439. if (pmu_battery_count > 1)
  440. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  441. }
  442. of_node_put(prim);
  443. }
  444. #endif /* CONFIG_PPC32 */
  445. /* Create /proc/pmu */
  446. proc_pmu_root = proc_mkdir("pmu", NULL);
  447. if (proc_pmu_root) {
  448. long i;
  449. for (i=0; i<pmu_battery_count; i++) {
  450. char title[16];
  451. sprintf(title, "battery_%ld", i);
  452. proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
  453. &pmu_battery_proc_fops, (void *)i);
  454. }
  455. proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
  456. proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
  457. &pmu_irqstats_proc_fops);
  458. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  459. &pmu_options_proc_fops);
  460. }
  461. return 0;
  462. }
  463. device_initcall(via_pmu_dev_init);
  464. static int
  465. init_pmu(void)
  466. {
  467. int timeout;
  468. struct adb_request req;
  469. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  470. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  471. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  472. timeout = 100000;
  473. while (!req.complete) {
  474. if (--timeout < 0) {
  475. printk(KERN_ERR "init_pmu: no response from PMU\n");
  476. return 0;
  477. }
  478. udelay(10);
  479. pmu_poll();
  480. }
  481. /* ack all pending interrupts */
  482. timeout = 100000;
  483. interrupt_data[0][0] = 1;
  484. while (interrupt_data[0][0] || pmu_state != idle) {
  485. if (--timeout < 0) {
  486. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  487. return 0;
  488. }
  489. if (pmu_state == idle)
  490. adb_int_pending = 1;
  491. via_pmu_interrupt(0, NULL);
  492. udelay(10);
  493. }
  494. /* Tell PMU we are ready. */
  495. if (pmu_kind == PMU_KEYLARGO_BASED) {
  496. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  497. while (!req.complete)
  498. pmu_poll();
  499. }
  500. /* Read PMU version */
  501. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  502. pmu_wait_complete(&req);
  503. if (req.reply_len > 0)
  504. pmu_version = req.reply[0];
  505. /* Read server mode setting */
  506. if (pmu_kind == PMU_KEYLARGO_BASED) {
  507. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  508. PMU_PWR_GET_POWERUP_EVENTS);
  509. pmu_wait_complete(&req);
  510. if (req.reply_len == 2) {
  511. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  512. option_server_mode = 1;
  513. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  514. option_server_mode ? "enabled" : "disabled");
  515. }
  516. }
  517. return 1;
  518. }
  519. int
  520. pmu_get_model(void)
  521. {
  522. return pmu_kind;
  523. }
  524. static void pmu_set_server_mode(int server_mode)
  525. {
  526. struct adb_request req;
  527. if (pmu_kind != PMU_KEYLARGO_BASED)
  528. return;
  529. option_server_mode = server_mode;
  530. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  531. pmu_wait_complete(&req);
  532. if (req.reply_len < 2)
  533. return;
  534. if (server_mode)
  535. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  536. PMU_PWR_SET_POWERUP_EVENTS,
  537. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  538. else
  539. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  540. PMU_PWR_CLR_POWERUP_EVENTS,
  541. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  542. pmu_wait_complete(&req);
  543. }
  544. /* This new version of the code for 2400/3400/3500 powerbooks
  545. * is inspired from the implementation in gkrellm-pmu
  546. */
  547. static void
  548. done_battery_state_ohare(struct adb_request* req)
  549. {
  550. /* format:
  551. * [0] : flags
  552. * 0x01 : AC indicator
  553. * 0x02 : charging
  554. * 0x04 : battery exist
  555. * 0x08 :
  556. * 0x10 :
  557. * 0x20 : full charged
  558. * 0x40 : pcharge reset
  559. * 0x80 : battery exist
  560. *
  561. * [1][2] : battery voltage
  562. * [3] : CPU temperature
  563. * [4] : battery temperature
  564. * [5] : current
  565. * [6][7] : pcharge
  566. * --tkoba
  567. */
  568. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  569. long pcharge, charge, vb, vmax, lmax;
  570. long vmax_charging, vmax_charged;
  571. long amperage, voltage, time, max;
  572. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  573. NULL, PMAC_MB_INFO_MODEL, 0);
  574. if (req->reply[0] & 0x01)
  575. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  576. else
  577. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  578. if (mb == PMAC_TYPE_COMET) {
  579. vmax_charged = 189;
  580. vmax_charging = 213;
  581. lmax = 6500;
  582. } else {
  583. vmax_charged = 330;
  584. vmax_charging = 330;
  585. lmax = 6500;
  586. }
  587. vmax = vmax_charged;
  588. /* If battery installed */
  589. if (req->reply[0] & 0x04) {
  590. bat_flags |= PMU_BATT_PRESENT;
  591. if (req->reply[0] & 0x02)
  592. bat_flags |= PMU_BATT_CHARGING;
  593. vb = (req->reply[1] << 8) | req->reply[2];
  594. voltage = (vb * 265 + 72665) / 10;
  595. amperage = req->reply[5];
  596. if ((req->reply[0] & 0x01) == 0) {
  597. if (amperage > 200)
  598. vb += ((amperage - 200) * 15)/100;
  599. } else if (req->reply[0] & 0x02) {
  600. vb = (vb * 97) / 100;
  601. vmax = vmax_charging;
  602. }
  603. charge = (100 * vb) / vmax;
  604. if (req->reply[0] & 0x40) {
  605. pcharge = (req->reply[6] << 8) + req->reply[7];
  606. if (pcharge > lmax)
  607. pcharge = lmax;
  608. pcharge *= 100;
  609. pcharge = 100 - pcharge / lmax;
  610. if (pcharge < charge)
  611. charge = pcharge;
  612. }
  613. if (amperage > 0)
  614. time = (charge * 16440) / amperage;
  615. else
  616. time = 0;
  617. max = 100;
  618. amperage = -amperage;
  619. } else
  620. charge = max = amperage = voltage = time = 0;
  621. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  622. pmu_batteries[pmu_cur_battery].charge = charge;
  623. pmu_batteries[pmu_cur_battery].max_charge = max;
  624. pmu_batteries[pmu_cur_battery].amperage = amperage;
  625. pmu_batteries[pmu_cur_battery].voltage = voltage;
  626. pmu_batteries[pmu_cur_battery].time_remaining = time;
  627. clear_bit(0, &async_req_locks);
  628. }
  629. static void
  630. done_battery_state_smart(struct adb_request* req)
  631. {
  632. /* format:
  633. * [0] : format of this structure (known: 3,4,5)
  634. * [1] : flags
  635. *
  636. * format 3 & 4:
  637. *
  638. * [2] : charge
  639. * [3] : max charge
  640. * [4] : current
  641. * [5] : voltage
  642. *
  643. * format 5:
  644. *
  645. * [2][3] : charge
  646. * [4][5] : max charge
  647. * [6][7] : current
  648. * [8][9] : voltage
  649. */
  650. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  651. int amperage;
  652. unsigned int capa, max, voltage;
  653. if (req->reply[1] & 0x01)
  654. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  655. else
  656. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  657. capa = max = amperage = voltage = 0;
  658. if (req->reply[1] & 0x04) {
  659. bat_flags |= PMU_BATT_PRESENT;
  660. switch(req->reply[0]) {
  661. case 3:
  662. case 4: capa = req->reply[2];
  663. max = req->reply[3];
  664. amperage = *((signed char *)&req->reply[4]);
  665. voltage = req->reply[5];
  666. break;
  667. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  668. max = (req->reply[4] << 8) | req->reply[5];
  669. amperage = *((signed short *)&req->reply[6]);
  670. voltage = (req->reply[8] << 8) | req->reply[9];
  671. break;
  672. default:
  673. pr_warn("pmu.c: unrecognized battery info, "
  674. "len: %d, %4ph\n", req->reply_len,
  675. req->reply);
  676. break;
  677. }
  678. }
  679. if ((req->reply[1] & 0x01) && (amperage > 0))
  680. bat_flags |= PMU_BATT_CHARGING;
  681. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  682. pmu_batteries[pmu_cur_battery].charge = capa;
  683. pmu_batteries[pmu_cur_battery].max_charge = max;
  684. pmu_batteries[pmu_cur_battery].amperage = amperage;
  685. pmu_batteries[pmu_cur_battery].voltage = voltage;
  686. if (amperage) {
  687. if ((req->reply[1] & 0x01) && (amperage > 0))
  688. pmu_batteries[pmu_cur_battery].time_remaining
  689. = ((max-capa) * 3600) / amperage;
  690. else
  691. pmu_batteries[pmu_cur_battery].time_remaining
  692. = (capa * 3600) / (-amperage);
  693. } else
  694. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  695. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  696. clear_bit(0, &async_req_locks);
  697. }
  698. static void
  699. query_battery_state(void)
  700. {
  701. if (test_and_set_bit(0, &async_req_locks))
  702. return;
  703. if (pmu_kind == PMU_OHARE_BASED)
  704. pmu_request(&batt_req, done_battery_state_ohare,
  705. 1, PMU_BATTERY_STATE);
  706. else
  707. pmu_request(&batt_req, done_battery_state_smart,
  708. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  709. }
  710. static int pmu_info_proc_show(struct seq_file *m, void *v)
  711. {
  712. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  713. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  714. seq_printf(m, "AC Power : %d\n",
  715. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  716. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  717. return 0;
  718. }
  719. static int pmu_info_proc_open(struct inode *inode, struct file *file)
  720. {
  721. return single_open(file, pmu_info_proc_show, NULL);
  722. }
  723. static const struct file_operations pmu_info_proc_fops = {
  724. .owner = THIS_MODULE,
  725. .open = pmu_info_proc_open,
  726. .read = seq_read,
  727. .llseek = seq_lseek,
  728. .release = single_release,
  729. };
  730. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  731. {
  732. int i;
  733. static const char *irq_names[] = {
  734. "Total CB1 triggered events",
  735. "Total GPIO1 triggered events",
  736. "PC-Card eject button",
  737. "Sound/Brightness button",
  738. "ADB message",
  739. "Battery state change",
  740. "Environment interrupt",
  741. "Tick timer",
  742. "Ghost interrupt (zero len)",
  743. "Empty interrupt (empty mask)",
  744. "Max irqs in a row"
  745. };
  746. for (i=0; i<11; i++) {
  747. seq_printf(m, " %2u: %10u (%s)\n",
  748. i, pmu_irq_stats[i], irq_names[i]);
  749. }
  750. return 0;
  751. }
  752. static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
  753. {
  754. return single_open(file, pmu_irqstats_proc_show, NULL);
  755. }
  756. static const struct file_operations pmu_irqstats_proc_fops = {
  757. .owner = THIS_MODULE,
  758. .open = pmu_irqstats_proc_open,
  759. .read = seq_read,
  760. .llseek = seq_lseek,
  761. .release = single_release,
  762. };
  763. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  764. {
  765. long batnum = (long)m->private;
  766. seq_putc(m, '\n');
  767. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  768. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  769. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  770. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  771. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  772. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  773. return 0;
  774. }
  775. static int pmu_battery_proc_open(struct inode *inode, struct file *file)
  776. {
  777. return single_open(file, pmu_battery_proc_show, PDE_DATA(inode));
  778. }
  779. static const struct file_operations pmu_battery_proc_fops = {
  780. .owner = THIS_MODULE,
  781. .open = pmu_battery_proc_open,
  782. .read = seq_read,
  783. .llseek = seq_lseek,
  784. .release = single_release,
  785. };
  786. static int pmu_options_proc_show(struct seq_file *m, void *v)
  787. {
  788. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  789. if (pmu_kind == PMU_KEYLARGO_BASED &&
  790. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  791. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  792. #endif
  793. if (pmu_kind == PMU_KEYLARGO_BASED)
  794. seq_printf(m, "server_mode=%d\n", option_server_mode);
  795. return 0;
  796. }
  797. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  798. {
  799. return single_open(file, pmu_options_proc_show, NULL);
  800. }
  801. static ssize_t pmu_options_proc_write(struct file *file,
  802. const char __user *buffer, size_t count, loff_t *pos)
  803. {
  804. char tmp[33];
  805. char *label, *val;
  806. size_t fcount = count;
  807. if (!count)
  808. return -EINVAL;
  809. if (count > 32)
  810. count = 32;
  811. if (copy_from_user(tmp, buffer, count))
  812. return -EFAULT;
  813. tmp[count] = 0;
  814. label = tmp;
  815. while(*label == ' ')
  816. label++;
  817. val = label;
  818. while(*val && (*val != '=')) {
  819. if (*val == ' ')
  820. *val = 0;
  821. val++;
  822. }
  823. if ((*val) == 0)
  824. return -EINVAL;
  825. *(val++) = 0;
  826. while(*val == ' ')
  827. val++;
  828. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  829. if (pmu_kind == PMU_KEYLARGO_BASED &&
  830. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  831. if (!strcmp(label, "lid_wakeup"))
  832. option_lid_wakeup = ((*val) == '1');
  833. #endif
  834. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  835. int new_value;
  836. new_value = ((*val) == '1');
  837. if (new_value != option_server_mode)
  838. pmu_set_server_mode(new_value);
  839. }
  840. return fcount;
  841. }
  842. static const struct file_operations pmu_options_proc_fops = {
  843. .owner = THIS_MODULE,
  844. .open = pmu_options_proc_open,
  845. .read = seq_read,
  846. .llseek = seq_lseek,
  847. .release = single_release,
  848. .write = pmu_options_proc_write,
  849. };
  850. #ifdef CONFIG_ADB
  851. /* Send an ADB command */
  852. static int pmu_send_request(struct adb_request *req, int sync)
  853. {
  854. int i, ret;
  855. if ((vias == NULL) || (!pmu_fully_inited)) {
  856. req->complete = 1;
  857. return -ENXIO;
  858. }
  859. ret = -EINVAL;
  860. switch (req->data[0]) {
  861. case PMU_PACKET:
  862. for (i = 0; i < req->nbytes - 1; ++i)
  863. req->data[i] = req->data[i+1];
  864. --req->nbytes;
  865. if (pmu_data_len[req->data[0]][1] != 0) {
  866. req->reply[0] = ADB_RET_OK;
  867. req->reply_len = 1;
  868. } else
  869. req->reply_len = 0;
  870. ret = pmu_queue_request(req);
  871. break;
  872. case CUDA_PACKET:
  873. switch (req->data[1]) {
  874. case CUDA_GET_TIME:
  875. if (req->nbytes != 2)
  876. break;
  877. req->data[0] = PMU_READ_RTC;
  878. req->nbytes = 1;
  879. req->reply_len = 3;
  880. req->reply[0] = CUDA_PACKET;
  881. req->reply[1] = 0;
  882. req->reply[2] = CUDA_GET_TIME;
  883. ret = pmu_queue_request(req);
  884. break;
  885. case CUDA_SET_TIME:
  886. if (req->nbytes != 6)
  887. break;
  888. req->data[0] = PMU_SET_RTC;
  889. req->nbytes = 5;
  890. for (i = 1; i <= 4; ++i)
  891. req->data[i] = req->data[i+1];
  892. req->reply_len = 3;
  893. req->reply[0] = CUDA_PACKET;
  894. req->reply[1] = 0;
  895. req->reply[2] = CUDA_SET_TIME;
  896. ret = pmu_queue_request(req);
  897. break;
  898. }
  899. break;
  900. case ADB_PACKET:
  901. if (!pmu_has_adb)
  902. return -ENXIO;
  903. for (i = req->nbytes - 1; i > 1; --i)
  904. req->data[i+2] = req->data[i];
  905. req->data[3] = req->nbytes - 2;
  906. req->data[2] = pmu_adb_flags;
  907. /*req->data[1] = req->data[1];*/
  908. req->data[0] = PMU_ADB_CMD;
  909. req->nbytes += 2;
  910. req->reply_expected = 1;
  911. req->reply_len = 0;
  912. ret = pmu_queue_request(req);
  913. break;
  914. }
  915. if (ret) {
  916. req->complete = 1;
  917. return ret;
  918. }
  919. if (sync)
  920. while (!req->complete)
  921. pmu_poll();
  922. return 0;
  923. }
  924. /* Enable/disable autopolling */
  925. static int __pmu_adb_autopoll(int devs)
  926. {
  927. struct adb_request req;
  928. if (devs) {
  929. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  930. adb_dev_map >> 8, adb_dev_map);
  931. pmu_adb_flags = 2;
  932. } else {
  933. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  934. pmu_adb_flags = 0;
  935. }
  936. while (!req.complete)
  937. pmu_poll();
  938. return 0;
  939. }
  940. static int pmu_adb_autopoll(int devs)
  941. {
  942. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  943. return -ENXIO;
  944. adb_dev_map = devs;
  945. return __pmu_adb_autopoll(devs);
  946. }
  947. /* Reset the ADB bus */
  948. static int pmu_adb_reset_bus(void)
  949. {
  950. struct adb_request req;
  951. int save_autopoll = adb_dev_map;
  952. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  953. return -ENXIO;
  954. /* anyone got a better idea?? */
  955. __pmu_adb_autopoll(0);
  956. req.nbytes = 4;
  957. req.done = NULL;
  958. req.data[0] = PMU_ADB_CMD;
  959. req.data[1] = ADB_BUSRESET;
  960. req.data[2] = 0;
  961. req.data[3] = 0;
  962. req.data[4] = 0;
  963. req.reply_len = 0;
  964. req.reply_expected = 1;
  965. if (pmu_queue_request(&req) != 0) {
  966. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  967. return -EIO;
  968. }
  969. pmu_wait_complete(&req);
  970. if (save_autopoll != 0)
  971. __pmu_adb_autopoll(save_autopoll);
  972. return 0;
  973. }
  974. #endif /* CONFIG_ADB */
  975. /* Construct and send a pmu request */
  976. int
  977. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  978. int nbytes, ...)
  979. {
  980. va_list list;
  981. int i;
  982. if (vias == NULL)
  983. return -ENXIO;
  984. if (nbytes < 0 || nbytes > 32) {
  985. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  986. req->complete = 1;
  987. return -EINVAL;
  988. }
  989. req->nbytes = nbytes;
  990. req->done = done;
  991. va_start(list, nbytes);
  992. for (i = 0; i < nbytes; ++i)
  993. req->data[i] = va_arg(list, int);
  994. va_end(list);
  995. req->reply_len = 0;
  996. req->reply_expected = 0;
  997. return pmu_queue_request(req);
  998. }
  999. int
  1000. pmu_queue_request(struct adb_request *req)
  1001. {
  1002. unsigned long flags;
  1003. int nsend;
  1004. if (via == NULL) {
  1005. req->complete = 1;
  1006. return -ENXIO;
  1007. }
  1008. if (req->nbytes <= 0) {
  1009. req->complete = 1;
  1010. return 0;
  1011. }
  1012. nsend = pmu_data_len[req->data[0]][0];
  1013. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1014. req->complete = 1;
  1015. return -EINVAL;
  1016. }
  1017. req->next = NULL;
  1018. req->sent = 0;
  1019. req->complete = 0;
  1020. spin_lock_irqsave(&pmu_lock, flags);
  1021. if (current_req != 0) {
  1022. last_req->next = req;
  1023. last_req = req;
  1024. } else {
  1025. current_req = req;
  1026. last_req = req;
  1027. if (pmu_state == idle)
  1028. pmu_start();
  1029. }
  1030. spin_unlock_irqrestore(&pmu_lock, flags);
  1031. return 0;
  1032. }
  1033. static inline void
  1034. wait_for_ack(void)
  1035. {
  1036. /* Sightly increased the delay, I had one occurrence of the message
  1037. * reported
  1038. */
  1039. int timeout = 4000;
  1040. while ((in_8(&via[B]) & TACK) == 0) {
  1041. if (--timeout < 0) {
  1042. printk(KERN_ERR "PMU not responding (!ack)\n");
  1043. return;
  1044. }
  1045. udelay(10);
  1046. }
  1047. }
  1048. /* New PMU seems to be very sensitive to those timings, so we make sure
  1049. * PCI is flushed immediately */
  1050. static inline void
  1051. send_byte(int x)
  1052. {
  1053. volatile unsigned char __iomem *v = via;
  1054. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1055. out_8(&v[SR], x);
  1056. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1057. (void)in_8(&v[B]);
  1058. }
  1059. static inline void
  1060. recv_byte(void)
  1061. {
  1062. volatile unsigned char __iomem *v = via;
  1063. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1064. in_8(&v[SR]); /* resets SR */
  1065. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1066. (void)in_8(&v[B]);
  1067. }
  1068. static inline void
  1069. pmu_done(struct adb_request *req)
  1070. {
  1071. void (*done)(struct adb_request *) = req->done;
  1072. mb();
  1073. req->complete = 1;
  1074. /* Here, we assume that if the request has a done member, the
  1075. * struct request will survive to setting req->complete to 1
  1076. */
  1077. if (done)
  1078. (*done)(req);
  1079. }
  1080. static void
  1081. pmu_start(void)
  1082. {
  1083. struct adb_request *req;
  1084. /* assert pmu_state == idle */
  1085. /* get the packet to send */
  1086. req = current_req;
  1087. if (req == 0 || pmu_state != idle
  1088. || (/*req->reply_expected && */req_awaiting_reply))
  1089. return;
  1090. pmu_state = sending;
  1091. data_index = 1;
  1092. data_len = pmu_data_len[req->data[0]][0];
  1093. /* Sounds safer to make sure ACK is high before writing. This helped
  1094. * kill a problem with ADB and some iBooks
  1095. */
  1096. wait_for_ack();
  1097. /* set the shift register to shift out and send a byte */
  1098. send_byte(req->data[0]);
  1099. }
  1100. void
  1101. pmu_poll(void)
  1102. {
  1103. if (!via)
  1104. return;
  1105. if (disable_poll)
  1106. return;
  1107. via_pmu_interrupt(0, NULL);
  1108. }
  1109. void
  1110. pmu_poll_adb(void)
  1111. {
  1112. if (!via)
  1113. return;
  1114. if (disable_poll)
  1115. return;
  1116. /* Kicks ADB read when PMU is suspended */
  1117. adb_int_pending = 1;
  1118. do {
  1119. via_pmu_interrupt(0, NULL);
  1120. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1121. || req_awaiting_reply));
  1122. }
  1123. void
  1124. pmu_wait_complete(struct adb_request *req)
  1125. {
  1126. if (!via)
  1127. return;
  1128. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1129. via_pmu_interrupt(0, NULL);
  1130. }
  1131. /* This function loops until the PMU is idle and prevents it from
  1132. * anwsering to ADB interrupts. pmu_request can still be called.
  1133. * This is done to avoid spurrious shutdowns when we know we'll have
  1134. * interrupts switched off for a long time
  1135. */
  1136. void
  1137. pmu_suspend(void)
  1138. {
  1139. unsigned long flags;
  1140. if (!via)
  1141. return;
  1142. spin_lock_irqsave(&pmu_lock, flags);
  1143. pmu_suspended++;
  1144. if (pmu_suspended > 1) {
  1145. spin_unlock_irqrestore(&pmu_lock, flags);
  1146. return;
  1147. }
  1148. do {
  1149. spin_unlock_irqrestore(&pmu_lock, flags);
  1150. if (req_awaiting_reply)
  1151. adb_int_pending = 1;
  1152. via_pmu_interrupt(0, NULL);
  1153. spin_lock_irqsave(&pmu_lock, flags);
  1154. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1155. if (gpio_irq >= 0)
  1156. disable_irq_nosync(gpio_irq);
  1157. out_8(&via[IER], CB1_INT | IER_CLR);
  1158. spin_unlock_irqrestore(&pmu_lock, flags);
  1159. break;
  1160. }
  1161. } while (1);
  1162. }
  1163. void
  1164. pmu_resume(void)
  1165. {
  1166. unsigned long flags;
  1167. if (!via || (pmu_suspended < 1))
  1168. return;
  1169. spin_lock_irqsave(&pmu_lock, flags);
  1170. pmu_suspended--;
  1171. if (pmu_suspended > 0) {
  1172. spin_unlock_irqrestore(&pmu_lock, flags);
  1173. return;
  1174. }
  1175. adb_int_pending = 1;
  1176. if (gpio_irq >= 0)
  1177. enable_irq(gpio_irq);
  1178. out_8(&via[IER], CB1_INT | IER_SET);
  1179. spin_unlock_irqrestore(&pmu_lock, flags);
  1180. pmu_poll();
  1181. }
  1182. /* Interrupt data could be the result data from an ADB cmd */
  1183. static void
  1184. pmu_handle_data(unsigned char *data, int len)
  1185. {
  1186. unsigned char ints, pirq;
  1187. int i = 0;
  1188. asleep = 0;
  1189. if (drop_interrupts || len < 1) {
  1190. adb_int_pending = 0;
  1191. pmu_irq_stats[8]++;
  1192. return;
  1193. }
  1194. /* Get PMU interrupt mask */
  1195. ints = data[0];
  1196. /* Record zero interrupts for stats */
  1197. if (ints == 0)
  1198. pmu_irq_stats[9]++;
  1199. /* Hack to deal with ADB autopoll flag */
  1200. if (ints & PMU_INT_ADB)
  1201. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1202. next:
  1203. if (ints == 0) {
  1204. if (i > pmu_irq_stats[10])
  1205. pmu_irq_stats[10] = i;
  1206. return;
  1207. }
  1208. for (pirq = 0; pirq < 8; pirq++)
  1209. if (ints & (1 << pirq))
  1210. break;
  1211. pmu_irq_stats[pirq]++;
  1212. i++;
  1213. ints &= ~(1 << pirq);
  1214. /* Note: for some reason, we get an interrupt with len=1,
  1215. * data[0]==0 after each normal ADB interrupt, at least
  1216. * on the Pismo. Still investigating... --BenH
  1217. */
  1218. if ((1 << pirq) & PMU_INT_ADB) {
  1219. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1220. struct adb_request *req = req_awaiting_reply;
  1221. if (req == 0) {
  1222. printk(KERN_ERR "PMU: extra ADB reply\n");
  1223. return;
  1224. }
  1225. req_awaiting_reply = NULL;
  1226. if (len <= 2)
  1227. req->reply_len = 0;
  1228. else {
  1229. memcpy(req->reply, data + 1, len - 1);
  1230. req->reply_len = len - 1;
  1231. }
  1232. pmu_done(req);
  1233. } else {
  1234. if (len == 4 && data[1] == 0x2c) {
  1235. extern int xmon_wants_key, xmon_adb_keycode;
  1236. if (xmon_wants_key) {
  1237. xmon_adb_keycode = data[2];
  1238. return;
  1239. }
  1240. }
  1241. #ifdef CONFIG_ADB
  1242. /*
  1243. * XXX On the [23]400 the PMU gives us an up
  1244. * event for keycodes 0x74 or 0x75 when the PC
  1245. * card eject buttons are released, so we
  1246. * ignore those events.
  1247. */
  1248. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1249. && data[1] == 0x2c && data[3] == 0xff
  1250. && (data[2] & ~1) == 0xf4))
  1251. adb_input(data+1, len-1, 1);
  1252. #endif /* CONFIG_ADB */
  1253. }
  1254. }
  1255. /* Sound/brightness button pressed */
  1256. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1257. #ifdef CONFIG_PMAC_BACKLIGHT
  1258. if (len == 3)
  1259. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1260. #endif
  1261. }
  1262. /* Tick interrupt */
  1263. else if ((1 << pirq) & PMU_INT_TICK) {
  1264. /* Environement or tick interrupt, query batteries */
  1265. if (pmu_battery_count) {
  1266. if ((--query_batt_timer) == 0) {
  1267. query_battery_state();
  1268. query_batt_timer = BATTERY_POLLING_COUNT;
  1269. }
  1270. }
  1271. }
  1272. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1273. if (pmu_battery_count)
  1274. query_battery_state();
  1275. pmu_pass_intr(data, len);
  1276. /* len == 6 is probably a bad check. But how do I
  1277. * know what PMU versions send what events here? */
  1278. if (len == 6) {
  1279. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1280. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1281. }
  1282. } else {
  1283. pmu_pass_intr(data, len);
  1284. }
  1285. goto next;
  1286. }
  1287. static struct adb_request*
  1288. pmu_sr_intr(void)
  1289. {
  1290. struct adb_request *req;
  1291. int bite = 0;
  1292. if (via[B] & TREQ) {
  1293. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1294. out_8(&via[IFR], SR_INT);
  1295. return NULL;
  1296. }
  1297. /* The ack may not yet be low when we get the interrupt */
  1298. while ((in_8(&via[B]) & TACK) != 0)
  1299. ;
  1300. /* if reading grab the byte, and reset the interrupt */
  1301. if (pmu_state == reading || pmu_state == reading_intr)
  1302. bite = in_8(&via[SR]);
  1303. /* reset TREQ and wait for TACK to go high */
  1304. out_8(&via[B], in_8(&via[B]) | TREQ);
  1305. wait_for_ack();
  1306. switch (pmu_state) {
  1307. case sending:
  1308. req = current_req;
  1309. if (data_len < 0) {
  1310. data_len = req->nbytes - 1;
  1311. send_byte(data_len);
  1312. break;
  1313. }
  1314. if (data_index <= data_len) {
  1315. send_byte(req->data[data_index++]);
  1316. break;
  1317. }
  1318. req->sent = 1;
  1319. data_len = pmu_data_len[req->data[0]][1];
  1320. if (data_len == 0) {
  1321. pmu_state = idle;
  1322. current_req = req->next;
  1323. if (req->reply_expected)
  1324. req_awaiting_reply = req;
  1325. else
  1326. return req;
  1327. } else {
  1328. pmu_state = reading;
  1329. data_index = 0;
  1330. reply_ptr = req->reply + req->reply_len;
  1331. recv_byte();
  1332. }
  1333. break;
  1334. case intack:
  1335. data_index = 0;
  1336. data_len = -1;
  1337. pmu_state = reading_intr;
  1338. reply_ptr = interrupt_data[int_data_last];
  1339. recv_byte();
  1340. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1341. enable_irq(gpio_irq);
  1342. gpio_irq_enabled = 1;
  1343. }
  1344. break;
  1345. case reading:
  1346. case reading_intr:
  1347. if (data_len == -1) {
  1348. data_len = bite;
  1349. if (bite > 32)
  1350. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1351. } else if (data_index < 32) {
  1352. reply_ptr[data_index++] = bite;
  1353. }
  1354. if (data_index < data_len) {
  1355. recv_byte();
  1356. break;
  1357. }
  1358. if (pmu_state == reading_intr) {
  1359. pmu_state = idle;
  1360. int_data_state[int_data_last] = int_data_ready;
  1361. interrupt_data_len[int_data_last] = data_len;
  1362. } else {
  1363. req = current_req;
  1364. /*
  1365. * For PMU sleep and freq change requests, we lock the
  1366. * PMU until it's explicitly unlocked. This avoids any
  1367. * spurrious event polling getting in
  1368. */
  1369. current_req = req->next;
  1370. req->reply_len += data_index;
  1371. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1372. pmu_state = locked;
  1373. else
  1374. pmu_state = idle;
  1375. return req;
  1376. }
  1377. break;
  1378. default:
  1379. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1380. pmu_state);
  1381. }
  1382. return NULL;
  1383. }
  1384. static irqreturn_t
  1385. via_pmu_interrupt(int irq, void *arg)
  1386. {
  1387. unsigned long flags;
  1388. int intr;
  1389. int nloop = 0;
  1390. int int_data = -1;
  1391. struct adb_request *req = NULL;
  1392. int handled = 0;
  1393. /* This is a bit brutal, we can probably do better */
  1394. spin_lock_irqsave(&pmu_lock, flags);
  1395. ++disable_poll;
  1396. for (;;) {
  1397. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1398. if (intr == 0)
  1399. break;
  1400. handled = 1;
  1401. if (++nloop > 1000) {
  1402. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1403. "intr=%x, ier=%x pmu_state=%d\n",
  1404. intr, in_8(&via[IER]), pmu_state);
  1405. break;
  1406. }
  1407. out_8(&via[IFR], intr);
  1408. if (intr & CB1_INT) {
  1409. adb_int_pending = 1;
  1410. pmu_irq_stats[0]++;
  1411. }
  1412. if (intr & SR_INT) {
  1413. req = pmu_sr_intr();
  1414. if (req)
  1415. break;
  1416. }
  1417. }
  1418. recheck:
  1419. if (pmu_state == idle) {
  1420. if (adb_int_pending) {
  1421. if (int_data_state[0] == int_data_empty)
  1422. int_data_last = 0;
  1423. else if (int_data_state[1] == int_data_empty)
  1424. int_data_last = 1;
  1425. else
  1426. goto no_free_slot;
  1427. pmu_state = intack;
  1428. int_data_state[int_data_last] = int_data_fill;
  1429. /* Sounds safer to make sure ACK is high before writing.
  1430. * This helped kill a problem with ADB and some iBooks
  1431. */
  1432. wait_for_ack();
  1433. send_byte(PMU_INT_ACK);
  1434. adb_int_pending = 0;
  1435. } else if (current_req)
  1436. pmu_start();
  1437. }
  1438. no_free_slot:
  1439. /* Mark the oldest buffer for flushing */
  1440. if (int_data_state[!int_data_last] == int_data_ready) {
  1441. int_data_state[!int_data_last] = int_data_flush;
  1442. int_data = !int_data_last;
  1443. } else if (int_data_state[int_data_last] == int_data_ready) {
  1444. int_data_state[int_data_last] = int_data_flush;
  1445. int_data = int_data_last;
  1446. }
  1447. --disable_poll;
  1448. spin_unlock_irqrestore(&pmu_lock, flags);
  1449. /* Deal with completed PMU requests outside of the lock */
  1450. if (req) {
  1451. pmu_done(req);
  1452. req = NULL;
  1453. }
  1454. /* Deal with interrupt datas outside of the lock */
  1455. if (int_data >= 0) {
  1456. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1457. spin_lock_irqsave(&pmu_lock, flags);
  1458. ++disable_poll;
  1459. int_data_state[int_data] = int_data_empty;
  1460. int_data = -1;
  1461. goto recheck;
  1462. }
  1463. return IRQ_RETVAL(handled);
  1464. }
  1465. void
  1466. pmu_unlock(void)
  1467. {
  1468. unsigned long flags;
  1469. spin_lock_irqsave(&pmu_lock, flags);
  1470. if (pmu_state == locked)
  1471. pmu_state = idle;
  1472. adb_int_pending = 1;
  1473. spin_unlock_irqrestore(&pmu_lock, flags);
  1474. }
  1475. static irqreturn_t
  1476. gpio1_interrupt(int irq, void *arg)
  1477. {
  1478. unsigned long flags;
  1479. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1480. spin_lock_irqsave(&pmu_lock, flags);
  1481. if (gpio_irq_enabled > 0) {
  1482. disable_irq_nosync(gpio_irq);
  1483. gpio_irq_enabled = 0;
  1484. }
  1485. pmu_irq_stats[1]++;
  1486. adb_int_pending = 1;
  1487. spin_unlock_irqrestore(&pmu_lock, flags);
  1488. via_pmu_interrupt(0, NULL);
  1489. return IRQ_HANDLED;
  1490. }
  1491. return IRQ_NONE;
  1492. }
  1493. void
  1494. pmu_enable_irled(int on)
  1495. {
  1496. struct adb_request req;
  1497. if (vias == NULL)
  1498. return ;
  1499. if (pmu_kind == PMU_KEYLARGO_BASED)
  1500. return ;
  1501. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1502. (on ? PMU_POW_ON : PMU_POW_OFF));
  1503. pmu_wait_complete(&req);
  1504. }
  1505. void
  1506. pmu_restart(void)
  1507. {
  1508. struct adb_request req;
  1509. if (via == NULL)
  1510. return;
  1511. local_irq_disable();
  1512. drop_interrupts = 1;
  1513. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1514. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1515. PMU_INT_TICK );
  1516. while(!req.complete)
  1517. pmu_poll();
  1518. }
  1519. pmu_request(&req, NULL, 1, PMU_RESET);
  1520. pmu_wait_complete(&req);
  1521. for (;;)
  1522. ;
  1523. }
  1524. void
  1525. pmu_shutdown(void)
  1526. {
  1527. struct adb_request req;
  1528. if (via == NULL)
  1529. return;
  1530. local_irq_disable();
  1531. drop_interrupts = 1;
  1532. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1533. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1534. PMU_INT_TICK );
  1535. pmu_wait_complete(&req);
  1536. } else {
  1537. /* Disable server mode on shutdown or we'll just
  1538. * wake up again
  1539. */
  1540. pmu_set_server_mode(0);
  1541. }
  1542. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1543. 'M', 'A', 'T', 'T');
  1544. pmu_wait_complete(&req);
  1545. for (;;)
  1546. ;
  1547. }
  1548. int
  1549. pmu_present(void)
  1550. {
  1551. return via != 0;
  1552. }
  1553. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1554. /*
  1555. * Put the powerbook to sleep.
  1556. */
  1557. static u32 save_via[8];
  1558. static void
  1559. save_via_state(void)
  1560. {
  1561. save_via[0] = in_8(&via[ANH]);
  1562. save_via[1] = in_8(&via[DIRA]);
  1563. save_via[2] = in_8(&via[B]);
  1564. save_via[3] = in_8(&via[DIRB]);
  1565. save_via[4] = in_8(&via[PCR]);
  1566. save_via[5] = in_8(&via[ACR]);
  1567. save_via[6] = in_8(&via[T1CL]);
  1568. save_via[7] = in_8(&via[T1CH]);
  1569. }
  1570. static void
  1571. restore_via_state(void)
  1572. {
  1573. out_8(&via[ANH], save_via[0]);
  1574. out_8(&via[DIRA], save_via[1]);
  1575. out_8(&via[B], save_via[2]);
  1576. out_8(&via[DIRB], save_via[3]);
  1577. out_8(&via[PCR], save_via[4]);
  1578. out_8(&via[ACR], save_via[5]);
  1579. out_8(&via[T1CL], save_via[6]);
  1580. out_8(&via[T1CH], save_via[7]);
  1581. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  1582. out_8(&via[IFR], 0x7f); /* clear IFR */
  1583. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  1584. }
  1585. #define GRACKLE_PM (1<<7)
  1586. #define GRACKLE_DOZE (1<<5)
  1587. #define GRACKLE_NAP (1<<4)
  1588. #define GRACKLE_SLEEP (1<<3)
  1589. static int powerbook_sleep_grackle(void)
  1590. {
  1591. unsigned long save_l2cr;
  1592. unsigned short pmcr1;
  1593. struct adb_request req;
  1594. struct pci_dev *grackle;
  1595. grackle = pci_get_bus_and_slot(0, 0);
  1596. if (!grackle)
  1597. return -ENODEV;
  1598. /* Turn off various things. Darwin does some retry tests here... */
  1599. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1600. pmu_wait_complete(&req);
  1601. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1602. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1603. pmu_wait_complete(&req);
  1604. /* For 750, save backside cache setting and disable it */
  1605. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1606. if (!__fake_sleep) {
  1607. /* Ask the PMU to put us to sleep */
  1608. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1609. pmu_wait_complete(&req);
  1610. }
  1611. /* The VIA is supposed not to be restored correctly*/
  1612. save_via_state();
  1613. /* We shut down some HW */
  1614. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1615. pci_read_config_word(grackle, 0x70, &pmcr1);
  1616. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1617. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1618. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1619. pci_write_config_word(grackle, 0x70, pmcr1);
  1620. /* Call low-level ASM sleep handler */
  1621. if (__fake_sleep)
  1622. mdelay(5000);
  1623. else
  1624. low_sleep_handler();
  1625. /* We're awake again, stop grackle PM */
  1626. pci_read_config_word(grackle, 0x70, &pmcr1);
  1627. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1628. pci_write_config_word(grackle, 0x70, pmcr1);
  1629. pci_dev_put(grackle);
  1630. /* Make sure the PMU is idle */
  1631. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1632. restore_via_state();
  1633. /* Restore L2 cache */
  1634. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1635. _set_L2CR(save_l2cr);
  1636. /* Restore userland MMU context */
  1637. switch_mmu_context(NULL, current->active_mm);
  1638. /* Power things up */
  1639. pmu_unlock();
  1640. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1641. pmu_wait_complete(&req);
  1642. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1643. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1644. pmu_wait_complete(&req);
  1645. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1646. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1647. pmu_wait_complete(&req);
  1648. return 0;
  1649. }
  1650. static int
  1651. powerbook_sleep_Core99(void)
  1652. {
  1653. unsigned long save_l2cr;
  1654. unsigned long save_l3cr;
  1655. struct adb_request req;
  1656. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1657. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1658. return -ENOSYS;
  1659. }
  1660. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1661. return -EAGAIN;
  1662. /* Stop environment and ADB interrupts */
  1663. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1664. pmu_wait_complete(&req);
  1665. /* Tell PMU what events will wake us up */
  1666. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1667. 0xff, 0xff);
  1668. pmu_wait_complete(&req);
  1669. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1670. 0, PMU_PWR_WAKEUP_KEY |
  1671. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1672. pmu_wait_complete(&req);
  1673. /* Save the state of the L2 and L3 caches */
  1674. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1675. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1676. if (!__fake_sleep) {
  1677. /* Ask the PMU to put us to sleep */
  1678. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1679. pmu_wait_complete(&req);
  1680. }
  1681. /* The VIA is supposed not to be restored correctly*/
  1682. save_via_state();
  1683. /* Shut down various ASICs. There's a chance that we can no longer
  1684. * talk to the PMU after this, so I moved it to _after_ sending the
  1685. * sleep command to it. Still need to be checked.
  1686. */
  1687. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1688. /* Call low-level ASM sleep handler */
  1689. if (__fake_sleep)
  1690. mdelay(5000);
  1691. else
  1692. low_sleep_handler();
  1693. /* Restore Apple core ASICs state */
  1694. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1695. /* Restore VIA */
  1696. restore_via_state();
  1697. /* tweak LPJ before cpufreq is there */
  1698. loops_per_jiffy *= 2;
  1699. /* Restore video */
  1700. pmac_call_early_video_resume();
  1701. /* Restore L2 cache */
  1702. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1703. _set_L2CR(save_l2cr);
  1704. /* Restore L3 cache */
  1705. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1706. _set_L3CR(save_l3cr);
  1707. /* Restore userland MMU context */
  1708. switch_mmu_context(NULL, current->active_mm);
  1709. /* Tell PMU we are ready */
  1710. pmu_unlock();
  1711. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1712. pmu_wait_complete(&req);
  1713. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1714. pmu_wait_complete(&req);
  1715. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1716. loops_per_jiffy /= 2;
  1717. return 0;
  1718. }
  1719. #define PB3400_MEM_CTRL 0xf8000000
  1720. #define PB3400_MEM_CTRL_SLEEP 0x70
  1721. static void __iomem *pb3400_mem_ctrl;
  1722. static void powerbook_sleep_init_3400(void)
  1723. {
  1724. /* map in the memory controller registers */
  1725. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1726. if (pb3400_mem_ctrl == NULL)
  1727. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1728. }
  1729. static int powerbook_sleep_3400(void)
  1730. {
  1731. int i, x;
  1732. unsigned int hid0;
  1733. unsigned long msr;
  1734. struct adb_request sleep_req;
  1735. unsigned int __iomem *mem_ctrl_sleep;
  1736. if (pb3400_mem_ctrl == NULL)
  1737. return -ENOMEM;
  1738. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1739. /* Set the memory controller to keep the memory refreshed
  1740. while we're asleep */
  1741. for (i = 0x403f; i >= 0x4000; --i) {
  1742. out_be32(mem_ctrl_sleep, i);
  1743. do {
  1744. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1745. } while (x == 0);
  1746. if (x >= 0x100)
  1747. break;
  1748. }
  1749. /* Ask the PMU to put us to sleep */
  1750. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1751. pmu_wait_complete(&sleep_req);
  1752. pmu_unlock();
  1753. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1754. asleep = 1;
  1755. /* Put the CPU into sleep mode */
  1756. hid0 = mfspr(SPRN_HID0);
  1757. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1758. mtspr(SPRN_HID0, hid0);
  1759. local_irq_enable();
  1760. msr = mfmsr() | MSR_POW;
  1761. while (asleep) {
  1762. mb();
  1763. mtmsr(msr);
  1764. isync();
  1765. }
  1766. local_irq_disable();
  1767. /* OK, we're awake again, start restoring things */
  1768. out_be32(mem_ctrl_sleep, 0x3f);
  1769. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1770. return 0;
  1771. }
  1772. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1773. /*
  1774. * Support for /dev/pmu device
  1775. */
  1776. #define RB_SIZE 0x10
  1777. struct pmu_private {
  1778. struct list_head list;
  1779. int rb_get;
  1780. int rb_put;
  1781. struct rb_entry {
  1782. unsigned short len;
  1783. unsigned char data[16];
  1784. } rb_buf[RB_SIZE];
  1785. wait_queue_head_t wait;
  1786. spinlock_t lock;
  1787. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1788. int backlight_locker;
  1789. #endif
  1790. };
  1791. static LIST_HEAD(all_pmu_pvt);
  1792. static DEFINE_SPINLOCK(all_pvt_lock);
  1793. static void
  1794. pmu_pass_intr(unsigned char *data, int len)
  1795. {
  1796. struct pmu_private *pp;
  1797. struct list_head *list;
  1798. int i;
  1799. unsigned long flags;
  1800. if (len > sizeof(pp->rb_buf[0].data))
  1801. len = sizeof(pp->rb_buf[0].data);
  1802. spin_lock_irqsave(&all_pvt_lock, flags);
  1803. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1804. pp = list_entry(list, struct pmu_private, list);
  1805. spin_lock(&pp->lock);
  1806. i = pp->rb_put + 1;
  1807. if (i >= RB_SIZE)
  1808. i = 0;
  1809. if (i != pp->rb_get) {
  1810. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1811. rp->len = len;
  1812. memcpy(rp->data, data, len);
  1813. pp->rb_put = i;
  1814. wake_up_interruptible(&pp->wait);
  1815. }
  1816. spin_unlock(&pp->lock);
  1817. }
  1818. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1819. }
  1820. static int
  1821. pmu_open(struct inode *inode, struct file *file)
  1822. {
  1823. struct pmu_private *pp;
  1824. unsigned long flags;
  1825. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1826. if (pp == 0)
  1827. return -ENOMEM;
  1828. pp->rb_get = pp->rb_put = 0;
  1829. spin_lock_init(&pp->lock);
  1830. init_waitqueue_head(&pp->wait);
  1831. mutex_lock(&pmu_info_proc_mutex);
  1832. spin_lock_irqsave(&all_pvt_lock, flags);
  1833. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1834. pp->backlight_locker = 0;
  1835. #endif
  1836. list_add(&pp->list, &all_pmu_pvt);
  1837. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1838. file->private_data = pp;
  1839. mutex_unlock(&pmu_info_proc_mutex);
  1840. return 0;
  1841. }
  1842. static ssize_t
  1843. pmu_read(struct file *file, char __user *buf,
  1844. size_t count, loff_t *ppos)
  1845. {
  1846. struct pmu_private *pp = file->private_data;
  1847. DECLARE_WAITQUEUE(wait, current);
  1848. unsigned long flags;
  1849. int ret = 0;
  1850. if (count < 1 || pp == 0)
  1851. return -EINVAL;
  1852. if (!access_ok(VERIFY_WRITE, buf, count))
  1853. return -EFAULT;
  1854. spin_lock_irqsave(&pp->lock, flags);
  1855. add_wait_queue(&pp->wait, &wait);
  1856. current->state = TASK_INTERRUPTIBLE;
  1857. for (;;) {
  1858. ret = -EAGAIN;
  1859. if (pp->rb_get != pp->rb_put) {
  1860. int i = pp->rb_get;
  1861. struct rb_entry *rp = &pp->rb_buf[i];
  1862. ret = rp->len;
  1863. spin_unlock_irqrestore(&pp->lock, flags);
  1864. if (ret > count)
  1865. ret = count;
  1866. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1867. ret = -EFAULT;
  1868. if (++i >= RB_SIZE)
  1869. i = 0;
  1870. spin_lock_irqsave(&pp->lock, flags);
  1871. pp->rb_get = i;
  1872. }
  1873. if (ret >= 0)
  1874. break;
  1875. if (file->f_flags & O_NONBLOCK)
  1876. break;
  1877. ret = -ERESTARTSYS;
  1878. if (signal_pending(current))
  1879. break;
  1880. spin_unlock_irqrestore(&pp->lock, flags);
  1881. schedule();
  1882. spin_lock_irqsave(&pp->lock, flags);
  1883. }
  1884. current->state = TASK_RUNNING;
  1885. remove_wait_queue(&pp->wait, &wait);
  1886. spin_unlock_irqrestore(&pp->lock, flags);
  1887. return ret;
  1888. }
  1889. static ssize_t
  1890. pmu_write(struct file *file, const char __user *buf,
  1891. size_t count, loff_t *ppos)
  1892. {
  1893. return 0;
  1894. }
  1895. static unsigned int
  1896. pmu_fpoll(struct file *filp, poll_table *wait)
  1897. {
  1898. struct pmu_private *pp = filp->private_data;
  1899. unsigned int mask = 0;
  1900. unsigned long flags;
  1901. if (pp == 0)
  1902. return 0;
  1903. poll_wait(filp, &pp->wait, wait);
  1904. spin_lock_irqsave(&pp->lock, flags);
  1905. if (pp->rb_get != pp->rb_put)
  1906. mask |= POLLIN;
  1907. spin_unlock_irqrestore(&pp->lock, flags);
  1908. return mask;
  1909. }
  1910. static int
  1911. pmu_release(struct inode *inode, struct file *file)
  1912. {
  1913. struct pmu_private *pp = file->private_data;
  1914. unsigned long flags;
  1915. if (pp != 0) {
  1916. file->private_data = NULL;
  1917. spin_lock_irqsave(&all_pvt_lock, flags);
  1918. list_del(&pp->list);
  1919. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1920. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1921. if (pp->backlight_locker)
  1922. pmac_backlight_enable();
  1923. #endif
  1924. kfree(pp);
  1925. }
  1926. return 0;
  1927. }
  1928. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1929. static void pmac_suspend_disable_irqs(void)
  1930. {
  1931. /* Call platform functions marked "on sleep" */
  1932. pmac_pfunc_i2c_suspend();
  1933. pmac_pfunc_base_suspend();
  1934. }
  1935. static int powerbook_sleep(suspend_state_t state)
  1936. {
  1937. int error = 0;
  1938. /* Wait for completion of async requests */
  1939. while (!batt_req.complete)
  1940. pmu_poll();
  1941. /* Giveup the lazy FPU & vec so we don't have to back them
  1942. * up from the low level code
  1943. */
  1944. enable_kernel_fp();
  1945. #ifdef CONFIG_ALTIVEC
  1946. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1947. enable_kernel_altivec();
  1948. #endif /* CONFIG_ALTIVEC */
  1949. switch (pmu_kind) {
  1950. case PMU_OHARE_BASED:
  1951. error = powerbook_sleep_3400();
  1952. break;
  1953. case PMU_HEATHROW_BASED:
  1954. case PMU_PADDINGTON_BASED:
  1955. error = powerbook_sleep_grackle();
  1956. break;
  1957. case PMU_KEYLARGO_BASED:
  1958. error = powerbook_sleep_Core99();
  1959. break;
  1960. default:
  1961. return -ENOSYS;
  1962. }
  1963. if (error)
  1964. return error;
  1965. mdelay(100);
  1966. return 0;
  1967. }
  1968. static void pmac_suspend_enable_irqs(void)
  1969. {
  1970. /* Force a poll of ADB interrupts */
  1971. adb_int_pending = 1;
  1972. via_pmu_interrupt(0, NULL);
  1973. mdelay(10);
  1974. /* Call platform functions marked "on wake" */
  1975. pmac_pfunc_base_resume();
  1976. pmac_pfunc_i2c_resume();
  1977. }
  1978. static int pmu_sleep_valid(suspend_state_t state)
  1979. {
  1980. return state == PM_SUSPEND_MEM
  1981. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  1982. }
  1983. static const struct platform_suspend_ops pmu_pm_ops = {
  1984. .enter = powerbook_sleep,
  1985. .valid = pmu_sleep_valid,
  1986. };
  1987. static int register_pmu_pm_ops(void)
  1988. {
  1989. if (pmu_kind == PMU_OHARE_BASED)
  1990. powerbook_sleep_init_3400();
  1991. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  1992. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  1993. suspend_set_ops(&pmu_pm_ops);
  1994. return 0;
  1995. }
  1996. device_initcall(register_pmu_pm_ops);
  1997. #endif
  1998. static int pmu_ioctl(struct file *filp,
  1999. u_int cmd, u_long arg)
  2000. {
  2001. __u32 __user *argp = (__u32 __user *)arg;
  2002. int error = -EINVAL;
  2003. switch (cmd) {
  2004. case PMU_IOC_SLEEP:
  2005. if (!capable(CAP_SYS_ADMIN))
  2006. return -EACCES;
  2007. return pm_suspend(PM_SUSPEND_MEM);
  2008. case PMU_IOC_CAN_SLEEP:
  2009. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  2010. return put_user(0, argp);
  2011. else
  2012. return put_user(1, argp);
  2013. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  2014. /* Compatibility ioctl's for backlight */
  2015. case PMU_IOC_GET_BACKLIGHT:
  2016. {
  2017. int brightness;
  2018. brightness = pmac_backlight_get_legacy_brightness();
  2019. if (brightness < 0)
  2020. return brightness;
  2021. else
  2022. return put_user(brightness, argp);
  2023. }
  2024. case PMU_IOC_SET_BACKLIGHT:
  2025. {
  2026. int brightness;
  2027. error = get_user(brightness, argp);
  2028. if (error)
  2029. return error;
  2030. return pmac_backlight_set_legacy_brightness(brightness);
  2031. }
  2032. #ifdef CONFIG_INPUT_ADBHID
  2033. case PMU_IOC_GRAB_BACKLIGHT: {
  2034. struct pmu_private *pp = filp->private_data;
  2035. if (pp->backlight_locker)
  2036. return 0;
  2037. pp->backlight_locker = 1;
  2038. pmac_backlight_disable();
  2039. return 0;
  2040. }
  2041. #endif /* CONFIG_INPUT_ADBHID */
  2042. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2043. case PMU_IOC_GET_MODEL:
  2044. return put_user(pmu_kind, argp);
  2045. case PMU_IOC_HAS_ADB:
  2046. return put_user(pmu_has_adb, argp);
  2047. }
  2048. return error;
  2049. }
  2050. static long pmu_unlocked_ioctl(struct file *filp,
  2051. u_int cmd, u_long arg)
  2052. {
  2053. int ret;
  2054. mutex_lock(&pmu_info_proc_mutex);
  2055. ret = pmu_ioctl(filp, cmd, arg);
  2056. mutex_unlock(&pmu_info_proc_mutex);
  2057. return ret;
  2058. }
  2059. #ifdef CONFIG_COMPAT
  2060. #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
  2061. #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
  2062. #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
  2063. #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
  2064. #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
  2065. #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
  2066. static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
  2067. {
  2068. switch (cmd) {
  2069. case PMU_IOC_SLEEP:
  2070. break;
  2071. case PMU_IOC_GET_BACKLIGHT32:
  2072. cmd = PMU_IOC_GET_BACKLIGHT;
  2073. break;
  2074. case PMU_IOC_SET_BACKLIGHT32:
  2075. cmd = PMU_IOC_SET_BACKLIGHT;
  2076. break;
  2077. case PMU_IOC_GET_MODEL32:
  2078. cmd = PMU_IOC_GET_MODEL;
  2079. break;
  2080. case PMU_IOC_HAS_ADB32:
  2081. cmd = PMU_IOC_HAS_ADB;
  2082. break;
  2083. case PMU_IOC_CAN_SLEEP32:
  2084. cmd = PMU_IOC_CAN_SLEEP;
  2085. break;
  2086. case PMU_IOC_GRAB_BACKLIGHT32:
  2087. cmd = PMU_IOC_GRAB_BACKLIGHT;
  2088. break;
  2089. default:
  2090. return -ENOIOCTLCMD;
  2091. }
  2092. return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  2093. }
  2094. #endif
  2095. static const struct file_operations pmu_device_fops = {
  2096. .read = pmu_read,
  2097. .write = pmu_write,
  2098. .poll = pmu_fpoll,
  2099. .unlocked_ioctl = pmu_unlocked_ioctl,
  2100. #ifdef CONFIG_COMPAT
  2101. .compat_ioctl = compat_pmu_ioctl,
  2102. #endif
  2103. .open = pmu_open,
  2104. .release = pmu_release,
  2105. .llseek = noop_llseek,
  2106. };
  2107. static struct miscdevice pmu_device = {
  2108. PMU_MINOR, "pmu", &pmu_device_fops
  2109. };
  2110. static int pmu_device_init(void)
  2111. {
  2112. if (!via)
  2113. return 0;
  2114. if (misc_register(&pmu_device) < 0)
  2115. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2116. return 0;
  2117. }
  2118. device_initcall(pmu_device_init);
  2119. #ifdef DEBUG_SLEEP
  2120. static inline void
  2121. polled_handshake(volatile unsigned char __iomem *via)
  2122. {
  2123. via[B] &= ~TREQ; eieio();
  2124. while ((via[B] & TACK) != 0)
  2125. ;
  2126. via[B] |= TREQ; eieio();
  2127. while ((via[B] & TACK) == 0)
  2128. ;
  2129. }
  2130. static inline void
  2131. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2132. {
  2133. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2134. via[SR] = x; eieio();
  2135. polled_handshake(via);
  2136. }
  2137. static inline int
  2138. polled_recv_byte(volatile unsigned char __iomem *via)
  2139. {
  2140. int x;
  2141. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2142. x = via[SR]; eieio();
  2143. polled_handshake(via);
  2144. x = via[SR]; eieio();
  2145. return x;
  2146. }
  2147. int
  2148. pmu_polled_request(struct adb_request *req)
  2149. {
  2150. unsigned long flags;
  2151. int i, l, c;
  2152. volatile unsigned char __iomem *v = via;
  2153. req->complete = 1;
  2154. c = req->data[0];
  2155. l = pmu_data_len[c][0];
  2156. if (l >= 0 && req->nbytes != l + 1)
  2157. return -EINVAL;
  2158. local_irq_save(flags);
  2159. while (pmu_state != idle)
  2160. pmu_poll();
  2161. while ((via[B] & TACK) == 0)
  2162. ;
  2163. polled_send_byte(v, c);
  2164. if (l < 0) {
  2165. l = req->nbytes - 1;
  2166. polled_send_byte(v, l);
  2167. }
  2168. for (i = 1; i <= l; ++i)
  2169. polled_send_byte(v, req->data[i]);
  2170. l = pmu_data_len[c][1];
  2171. if (l < 0)
  2172. l = polled_recv_byte(v);
  2173. for (i = 0; i < l; ++i)
  2174. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2175. if (req->done)
  2176. (*req->done)(req);
  2177. local_irq_restore(flags);
  2178. return 0;
  2179. }
  2180. /* N.B. This doesn't work on the 3400 */
  2181. void pmu_blink(int n)
  2182. {
  2183. struct adb_request req;
  2184. memset(&req, 0, sizeof(req));
  2185. for (; n > 0; --n) {
  2186. req.nbytes = 4;
  2187. req.done = NULL;
  2188. req.data[0] = 0xee;
  2189. req.data[1] = 4;
  2190. req.data[2] = 0;
  2191. req.data[3] = 1;
  2192. req.reply[0] = ADB_RET_OK;
  2193. req.reply_len = 1;
  2194. req.reply_expected = 0;
  2195. pmu_polled_request(&req);
  2196. mdelay(50);
  2197. req.nbytes = 4;
  2198. req.done = NULL;
  2199. req.data[0] = 0xee;
  2200. req.data[1] = 4;
  2201. req.data[2] = 0;
  2202. req.data[3] = 0;
  2203. req.reply[0] = ADB_RET_OK;
  2204. req.reply_len = 1;
  2205. req.reply_expected = 0;
  2206. pmu_polled_request(&req);
  2207. mdelay(50);
  2208. }
  2209. mdelay(50);
  2210. }
  2211. #endif /* DEBUG_SLEEP */
  2212. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2213. int pmu_sys_suspended;
  2214. static int pmu_syscore_suspend(void)
  2215. {
  2216. /* Suspend PMU event interrupts */
  2217. pmu_suspend();
  2218. pmu_sys_suspended = 1;
  2219. #ifdef CONFIG_PMAC_BACKLIGHT
  2220. /* Tell backlight code not to muck around with the chip anymore */
  2221. pmu_backlight_set_sleep(1);
  2222. #endif
  2223. return 0;
  2224. }
  2225. static void pmu_syscore_resume(void)
  2226. {
  2227. struct adb_request req;
  2228. if (!pmu_sys_suspended)
  2229. return;
  2230. /* Tell PMU we are ready */
  2231. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2232. pmu_wait_complete(&req);
  2233. #ifdef CONFIG_PMAC_BACKLIGHT
  2234. /* Tell backlight code it can use the chip again */
  2235. pmu_backlight_set_sleep(0);
  2236. #endif
  2237. /* Resume PMU event interrupts */
  2238. pmu_resume();
  2239. pmu_sys_suspended = 0;
  2240. }
  2241. static struct syscore_ops pmu_syscore_ops = {
  2242. .suspend = pmu_syscore_suspend,
  2243. .resume = pmu_syscore_resume,
  2244. };
  2245. static int pmu_syscore_register(void)
  2246. {
  2247. register_syscore_ops(&pmu_syscore_ops);
  2248. return 0;
  2249. }
  2250. subsys_initcall(pmu_syscore_register);
  2251. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2252. EXPORT_SYMBOL(pmu_request);
  2253. EXPORT_SYMBOL(pmu_queue_request);
  2254. EXPORT_SYMBOL(pmu_poll);
  2255. EXPORT_SYMBOL(pmu_poll_adb);
  2256. EXPORT_SYMBOL(pmu_wait_complete);
  2257. EXPORT_SYMBOL(pmu_suspend);
  2258. EXPORT_SYMBOL(pmu_resume);
  2259. EXPORT_SYMBOL(pmu_unlock);
  2260. #if defined(CONFIG_PPC32)
  2261. EXPORT_SYMBOL(pmu_enable_irled);
  2262. EXPORT_SYMBOL(pmu_battery_count);
  2263. EXPORT_SYMBOL(pmu_batteries);
  2264. EXPORT_SYMBOL(pmu_power_flags);
  2265. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */