jr.c 11 KB

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  1. /*
  2. * CAAM/SEC 4.x transport/backend driver
  3. * JobR backend functionality
  4. *
  5. * Copyright 2008-2012 Freescale Semiconductor, Inc.
  6. */
  7. #include <linux/of_irq.h>
  8. #include "compat.h"
  9. #include "regs.h"
  10. #include "jr.h"
  11. #include "desc.h"
  12. #include "intern.h"
  13. /* Main per-ring interrupt handler */
  14. static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
  15. {
  16. struct device *dev = st_dev;
  17. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  18. u32 irqstate;
  19. /*
  20. * Check the output ring for ready responses, kick
  21. * tasklet if jobs done.
  22. */
  23. irqstate = rd_reg32(&jrp->rregs->jrintstatus);
  24. if (!irqstate)
  25. return IRQ_NONE;
  26. /*
  27. * If JobR error, we got more development work to do
  28. * Flag a bug now, but we really need to shut down and
  29. * restart the queue (and fix code).
  30. */
  31. if (irqstate & JRINT_JR_ERROR) {
  32. dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
  33. BUG();
  34. }
  35. /* mask valid interrupts */
  36. setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  37. /* Have valid interrupt at this point, just ACK and trigger */
  38. wr_reg32(&jrp->rregs->jrintstatus, irqstate);
  39. preempt_disable();
  40. tasklet_schedule(&jrp->irqtask);
  41. preempt_enable();
  42. return IRQ_HANDLED;
  43. }
  44. /* Deferred service handler, run as interrupt-fired tasklet */
  45. static void caam_jr_dequeue(unsigned long devarg)
  46. {
  47. int hw_idx, sw_idx, i, head, tail;
  48. struct device *dev = (struct device *)devarg;
  49. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  50. void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
  51. u32 *userdesc, userstatus;
  52. void *userarg;
  53. while (rd_reg32(&jrp->rregs->outring_used)) {
  54. head = ACCESS_ONCE(jrp->head);
  55. spin_lock(&jrp->outlock);
  56. sw_idx = tail = jrp->tail;
  57. hw_idx = jrp->out_ring_read_index;
  58. for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
  59. sw_idx = (tail + i) & (JOBR_DEPTH - 1);
  60. smp_read_barrier_depends();
  61. if (jrp->outring[hw_idx].desc ==
  62. jrp->entinfo[sw_idx].desc_addr_dma)
  63. break; /* found */
  64. }
  65. /* we should never fail to find a matching descriptor */
  66. BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
  67. /* Unmap just-run descriptor so we can post-process */
  68. dma_unmap_single(dev, jrp->outring[hw_idx].desc,
  69. jrp->entinfo[sw_idx].desc_size,
  70. DMA_TO_DEVICE);
  71. /* mark completed, avoid matching on a recycled desc addr */
  72. jrp->entinfo[sw_idx].desc_addr_dma = 0;
  73. /* Stash callback params for use outside of lock */
  74. usercall = jrp->entinfo[sw_idx].callbk;
  75. userarg = jrp->entinfo[sw_idx].cbkarg;
  76. userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
  77. userstatus = jrp->outring[hw_idx].jrstatus;
  78. /* set done */
  79. wr_reg32(&jrp->rregs->outring_rmvd, 1);
  80. jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
  81. (JOBR_DEPTH - 1);
  82. /*
  83. * if this job completed out-of-order, do not increment
  84. * the tail. Otherwise, increment tail by 1 plus the
  85. * number of subsequent jobs already completed out-of-order
  86. */
  87. if (sw_idx == tail) {
  88. do {
  89. tail = (tail + 1) & (JOBR_DEPTH - 1);
  90. smp_read_barrier_depends();
  91. } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
  92. jrp->entinfo[tail].desc_addr_dma == 0);
  93. jrp->tail = tail;
  94. }
  95. spin_unlock(&jrp->outlock);
  96. /* Finally, execute user's callback */
  97. usercall(dev, userdesc, userstatus, userarg);
  98. }
  99. /* reenable / unmask IRQs */
  100. clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  101. }
  102. /**
  103. * caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK,
  104. * -EBUSY if the queue is full, -EIO if it cannot map the caller's
  105. * descriptor.
  106. * @dev: device of the job ring to be used. This device should have
  107. * been assigned prior by caam_jr_register().
  108. * @desc: points to a job descriptor that execute our request. All
  109. * descriptors (and all referenced data) must be in a DMAable
  110. * region, and all data references must be physical addresses
  111. * accessible to CAAM (i.e. within a PAMU window granted
  112. * to it).
  113. * @cbk: pointer to a callback function to be invoked upon completion
  114. * of this request. This has the form:
  115. * callback(struct device *dev, u32 *desc, u32 stat, void *arg)
  116. * where:
  117. * @dev: contains the job ring device that processed this
  118. * response.
  119. * @desc: descriptor that initiated the request, same as
  120. * "desc" being argued to caam_jr_enqueue().
  121. * @status: untranslated status received from CAAM. See the
  122. * reference manual for a detailed description of
  123. * error meaning, or see the JRSTA definitions in the
  124. * register header file
  125. * @areq: optional pointer to an argument passed with the
  126. * original request
  127. * @areq: optional pointer to a user argument for use at callback
  128. * time.
  129. **/
  130. int caam_jr_enqueue(struct device *dev, u32 *desc,
  131. void (*cbk)(struct device *dev, u32 *desc,
  132. u32 status, void *areq),
  133. void *areq)
  134. {
  135. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  136. struct caam_jrentry_info *head_entry;
  137. int head, tail, desc_size;
  138. dma_addr_t desc_dma;
  139. desc_size = (*desc & HDR_JD_LENGTH_MASK) * sizeof(u32);
  140. desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
  141. if (dma_mapping_error(dev, desc_dma)) {
  142. dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
  143. return -EIO;
  144. }
  145. spin_lock_bh(&jrp->inplock);
  146. head = jrp->head;
  147. tail = ACCESS_ONCE(jrp->tail);
  148. if (!rd_reg32(&jrp->rregs->inpring_avail) ||
  149. CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
  150. spin_unlock_bh(&jrp->inplock);
  151. dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
  152. return -EBUSY;
  153. }
  154. head_entry = &jrp->entinfo[head];
  155. head_entry->desc_addr_virt = desc;
  156. head_entry->desc_size = desc_size;
  157. head_entry->callbk = (void *)cbk;
  158. head_entry->cbkarg = areq;
  159. head_entry->desc_addr_dma = desc_dma;
  160. jrp->inpring[jrp->inp_ring_write_index] = desc_dma;
  161. smp_wmb();
  162. jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
  163. (JOBR_DEPTH - 1);
  164. jrp->head = (head + 1) & (JOBR_DEPTH - 1);
  165. wr_reg32(&jrp->rregs->inpring_jobadd, 1);
  166. spin_unlock_bh(&jrp->inplock);
  167. return 0;
  168. }
  169. EXPORT_SYMBOL(caam_jr_enqueue);
  170. static int caam_reset_hw_jr(struct device *dev)
  171. {
  172. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  173. unsigned int timeout = 100000;
  174. /*
  175. * mask interrupts since we are going to poll
  176. * for reset completion status
  177. */
  178. setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  179. /* initiate flush (required prior to reset) */
  180. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  181. while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
  182. JRINT_ERR_HALT_INPROGRESS) && --timeout)
  183. cpu_relax();
  184. if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
  185. JRINT_ERR_HALT_COMPLETE || timeout == 0) {
  186. dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
  187. return -EIO;
  188. }
  189. /* initiate reset */
  190. timeout = 100000;
  191. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  192. while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
  193. cpu_relax();
  194. if (timeout == 0) {
  195. dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
  196. return -EIO;
  197. }
  198. /* unmask interrupts */
  199. clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  200. return 0;
  201. }
  202. /*
  203. * Init JobR independent of platform property detection
  204. */
  205. static int caam_jr_init(struct device *dev)
  206. {
  207. struct caam_drv_private_jr *jrp;
  208. dma_addr_t inpbusaddr, outbusaddr;
  209. int i, error;
  210. jrp = dev_get_drvdata(dev);
  211. tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
  212. /* Connect job ring interrupt handler. */
  213. error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED,
  214. "caam-jobr", dev);
  215. if (error) {
  216. dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
  217. jrp->ridx, jrp->irq);
  218. irq_dispose_mapping(jrp->irq);
  219. jrp->irq = 0;
  220. return -EINVAL;
  221. }
  222. error = caam_reset_hw_jr(dev);
  223. if (error)
  224. return error;
  225. jrp->inpring = dma_alloc_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  226. &inpbusaddr, GFP_KERNEL);
  227. jrp->outring = dma_alloc_coherent(dev, sizeof(struct jr_outentry) *
  228. JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
  229. jrp->entinfo = kzalloc(sizeof(struct caam_jrentry_info) * JOBR_DEPTH,
  230. GFP_KERNEL);
  231. if ((jrp->inpring == NULL) || (jrp->outring == NULL) ||
  232. (jrp->entinfo == NULL)) {
  233. dev_err(dev, "can't allocate job rings for %d\n",
  234. jrp->ridx);
  235. return -ENOMEM;
  236. }
  237. for (i = 0; i < JOBR_DEPTH; i++)
  238. jrp->entinfo[i].desc_addr_dma = !0;
  239. /* Setup rings */
  240. jrp->inp_ring_write_index = 0;
  241. jrp->out_ring_read_index = 0;
  242. jrp->head = 0;
  243. jrp->tail = 0;
  244. wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
  245. wr_reg64(&jrp->rregs->outring_base, outbusaddr);
  246. wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
  247. wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
  248. jrp->ringsize = JOBR_DEPTH;
  249. spin_lock_init(&jrp->inplock);
  250. spin_lock_init(&jrp->outlock);
  251. /* Select interrupt coalescing parameters */
  252. setbits32(&jrp->rregs->rconfig_lo, JOBR_INTC |
  253. (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
  254. (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
  255. return 0;
  256. }
  257. /*
  258. * Shutdown JobR independent of platform property code
  259. */
  260. int caam_jr_shutdown(struct device *dev)
  261. {
  262. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  263. dma_addr_t inpbusaddr, outbusaddr;
  264. int ret;
  265. ret = caam_reset_hw_jr(dev);
  266. tasklet_kill(&jrp->irqtask);
  267. /* Release interrupt */
  268. free_irq(jrp->irq, dev);
  269. /* Free rings */
  270. inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
  271. outbusaddr = rd_reg64(&jrp->rregs->outring_base);
  272. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  273. jrp->inpring, inpbusaddr);
  274. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  275. jrp->outring, outbusaddr);
  276. kfree(jrp->entinfo);
  277. of_device_unregister(jrp->jr_pdev);
  278. return ret;
  279. }
  280. /*
  281. * Probe routine for each detected JobR subsystem. It assumes that
  282. * property detection was picked up externally.
  283. */
  284. int caam_jr_probe(struct platform_device *pdev, struct device_node *np,
  285. int ring)
  286. {
  287. struct device *ctrldev, *jrdev;
  288. struct platform_device *jr_pdev;
  289. struct caam_drv_private *ctrlpriv;
  290. struct caam_drv_private_jr *jrpriv;
  291. u32 *jroffset;
  292. int error;
  293. ctrldev = &pdev->dev;
  294. ctrlpriv = dev_get_drvdata(ctrldev);
  295. jrpriv = kmalloc(sizeof(struct caam_drv_private_jr),
  296. GFP_KERNEL);
  297. if (jrpriv == NULL) {
  298. dev_err(ctrldev, "can't alloc private mem for job ring %d\n",
  299. ring);
  300. return -ENOMEM;
  301. }
  302. jrpriv->parentdev = ctrldev; /* point back to parent */
  303. jrpriv->ridx = ring; /* save ring identity relative to detection */
  304. /*
  305. * Derive a pointer to the detected JobRs regs
  306. * Driver has already iomapped the entire space, we just
  307. * need to add in the offset to this JobR. Don't know if I
  308. * like this long-term, but it'll run
  309. */
  310. jroffset = (u32 *)of_get_property(np, "reg", NULL);
  311. jrpriv->rregs = (struct caam_job_ring __iomem *)((void *)ctrlpriv->ctrl
  312. + *jroffset);
  313. /* Build a local dev for each detected queue */
  314. jr_pdev = of_platform_device_create(np, NULL, ctrldev);
  315. if (jr_pdev == NULL) {
  316. kfree(jrpriv);
  317. return -EINVAL;
  318. }
  319. jrpriv->jr_pdev = jr_pdev;
  320. jrdev = &jr_pdev->dev;
  321. dev_set_drvdata(jrdev, jrpriv);
  322. ctrlpriv->jrdev[ring] = jrdev;
  323. if (sizeof(dma_addr_t) == sizeof(u64))
  324. if (of_device_is_compatible(np, "fsl,sec-v5.0-job-ring"))
  325. dma_set_mask(jrdev, DMA_BIT_MASK(40));
  326. else
  327. dma_set_mask(jrdev, DMA_BIT_MASK(36));
  328. else
  329. dma_set_mask(jrdev, DMA_BIT_MASK(32));
  330. /* Identify the interrupt */
  331. jrpriv->irq = of_irq_to_resource(np, 0, NULL);
  332. /* Now do the platform independent part */
  333. error = caam_jr_init(jrdev); /* now turn on hardware */
  334. if (error) {
  335. of_device_unregister(jr_pdev);
  336. kfree(jrpriv);
  337. return error;
  338. }
  339. return error;
  340. }