bcmsdh_sdmmc.c 17 KB

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  1. /*
  2. * Copyright (c) 2010 Broadcom Corporation
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/netdevice.h>
  18. #include <linux/mmc/sdio.h>
  19. #include <linux/mmc/core.h>
  20. #include <linux/mmc/sdio_func.h>
  21. #include <linux/mmc/sdio_ids.h>
  22. #include <linux/mmc/card.h>
  23. #include <linux/suspend.h>
  24. #include <linux/errno.h>
  25. #include <linux/sched.h> /* request_irq() */
  26. #include <linux/module.h>
  27. #include <net/cfg80211.h>
  28. #include <defs.h>
  29. #include <brcm_hw_ids.h>
  30. #include <brcmu_utils.h>
  31. #include <brcmu_wifi.h>
  32. #include "sdio_host.h"
  33. #include "dhd.h"
  34. #include "dhd_dbg.h"
  35. #include "wl_cfg80211.h"
  36. #define SDIO_VENDOR_ID_BROADCOM 0x02d0
  37. #define DMA_ALIGN_MASK 0x03
  38. #define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
  39. #define SDIO_FUNC1_BLOCKSIZE 64
  40. #define SDIO_FUNC2_BLOCKSIZE 512
  41. /* devices we support, null terminated */
  42. static const struct sdio_device_id brcmf_sdmmc_ids[] = {
  43. {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)},
  44. { /* end: all zeroes */ },
  45. };
  46. MODULE_DEVICE_TABLE(sdio, brcmf_sdmmc_ids);
  47. static bool
  48. brcmf_pm_resume_error(struct brcmf_sdio_dev *sdiodev)
  49. {
  50. bool is_err = false;
  51. #ifdef CONFIG_PM_SLEEP
  52. is_err = atomic_read(&sdiodev->suspend);
  53. #endif
  54. return is_err;
  55. }
  56. static void
  57. brcmf_pm_resume_wait(struct brcmf_sdio_dev *sdiodev, wait_queue_head_t *wq)
  58. {
  59. #ifdef CONFIG_PM_SLEEP
  60. int retry = 0;
  61. while (atomic_read(&sdiodev->suspend) && retry++ != 30)
  62. wait_event_timeout(*wq, false, HZ/100);
  63. #endif
  64. }
  65. static inline int brcmf_sdioh_f0_write_byte(struct brcmf_sdio_dev *sdiodev,
  66. uint regaddr, u8 *byte)
  67. {
  68. struct sdio_func *sdfunc = sdiodev->func[0];
  69. int err_ret;
  70. /*
  71. * Can only directly write to some F0 registers.
  72. * Handle F2 enable/disable and Abort command
  73. * as a special case.
  74. */
  75. if (regaddr == SDIO_CCCR_IOEx) {
  76. sdfunc = sdiodev->func[2];
  77. if (sdfunc) {
  78. sdio_claim_host(sdfunc);
  79. if (*byte & SDIO_FUNC_ENABLE_2) {
  80. /* Enable Function 2 */
  81. err_ret = sdio_enable_func(sdfunc);
  82. if (err_ret)
  83. brcmf_dbg(ERROR,
  84. "enable F2 failed:%d\n",
  85. err_ret);
  86. } else {
  87. /* Disable Function 2 */
  88. err_ret = sdio_disable_func(sdfunc);
  89. if (err_ret)
  90. brcmf_dbg(ERROR,
  91. "Disable F2 failed:%d\n",
  92. err_ret);
  93. }
  94. sdio_release_host(sdfunc);
  95. }
  96. } else if (regaddr == SDIO_CCCR_ABORT) {
  97. sdio_claim_host(sdfunc);
  98. sdio_writeb(sdfunc, *byte, regaddr, &err_ret);
  99. sdio_release_host(sdfunc);
  100. } else if (regaddr < 0xF0) {
  101. brcmf_dbg(ERROR, "F0 Wr:0x%02x: write disallowed\n", regaddr);
  102. err_ret = -EPERM;
  103. } else {
  104. sdio_claim_host(sdfunc);
  105. sdio_f0_writeb(sdfunc, *byte, regaddr, &err_ret);
  106. sdio_release_host(sdfunc);
  107. }
  108. return err_ret;
  109. }
  110. int brcmf_sdioh_request_byte(struct brcmf_sdio_dev *sdiodev, uint rw, uint func,
  111. uint regaddr, u8 *byte)
  112. {
  113. int err_ret;
  114. brcmf_dbg(INFO, "rw=%d, func=%d, addr=0x%05x\n", rw, func, regaddr);
  115. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_byte_wait);
  116. if (brcmf_pm_resume_error(sdiodev))
  117. return -EIO;
  118. if (rw && func == 0) {
  119. /* handle F0 separately */
  120. err_ret = brcmf_sdioh_f0_write_byte(sdiodev, regaddr, byte);
  121. } else {
  122. sdio_claim_host(sdiodev->func[func]);
  123. if (rw) /* CMD52 Write */
  124. sdio_writeb(sdiodev->func[func], *byte, regaddr,
  125. &err_ret);
  126. else if (func == 0) {
  127. *byte = sdio_f0_readb(sdiodev->func[func], regaddr,
  128. &err_ret);
  129. } else {
  130. *byte = sdio_readb(sdiodev->func[func], regaddr,
  131. &err_ret);
  132. }
  133. sdio_release_host(sdiodev->func[func]);
  134. }
  135. if (err_ret)
  136. brcmf_dbg(ERROR, "Failed to %s byte F%d:@0x%05x=%02x, Err: %d\n",
  137. rw ? "write" : "read", func, regaddr, *byte, err_ret);
  138. return err_ret;
  139. }
  140. int brcmf_sdioh_request_word(struct brcmf_sdio_dev *sdiodev,
  141. uint rw, uint func, uint addr, u32 *word,
  142. uint nbytes)
  143. {
  144. int err_ret = -EIO;
  145. if (func == 0) {
  146. brcmf_dbg(ERROR, "Only CMD52 allowed to F0\n");
  147. return -EINVAL;
  148. }
  149. brcmf_dbg(INFO, "rw=%d, func=%d, addr=0x%05x, nbytes=%d\n",
  150. rw, func, addr, nbytes);
  151. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_word_wait);
  152. if (brcmf_pm_resume_error(sdiodev))
  153. return -EIO;
  154. /* Claim host controller */
  155. sdio_claim_host(sdiodev->func[func]);
  156. if (rw) { /* CMD52 Write */
  157. if (nbytes == 4)
  158. sdio_writel(sdiodev->func[func], *word, addr,
  159. &err_ret);
  160. else if (nbytes == 2)
  161. sdio_writew(sdiodev->func[func], (*word & 0xFFFF),
  162. addr, &err_ret);
  163. else
  164. brcmf_dbg(ERROR, "Invalid nbytes: %d\n", nbytes);
  165. } else { /* CMD52 Read */
  166. if (nbytes == 4)
  167. *word = sdio_readl(sdiodev->func[func], addr, &err_ret);
  168. else if (nbytes == 2)
  169. *word = sdio_readw(sdiodev->func[func], addr,
  170. &err_ret) & 0xFFFF;
  171. else
  172. brcmf_dbg(ERROR, "Invalid nbytes: %d\n", nbytes);
  173. }
  174. /* Release host controller */
  175. sdio_release_host(sdiodev->func[func]);
  176. if (err_ret)
  177. brcmf_dbg(ERROR, "Failed to %s word, Err: 0x%08x\n",
  178. rw ? "write" : "read", err_ret);
  179. return err_ret;
  180. }
  181. /* precondition: host controller is claimed */
  182. static int
  183. brcmf_sdioh_request_data(struct brcmf_sdio_dev *sdiodev, uint write, bool fifo,
  184. uint func, uint addr, struct sk_buff *pkt, uint pktlen)
  185. {
  186. int err_ret = 0;
  187. if ((write) && (!fifo)) {
  188. err_ret = sdio_memcpy_toio(sdiodev->func[func], addr,
  189. ((u8 *) (pkt->data)), pktlen);
  190. } else if (write) {
  191. err_ret = sdio_memcpy_toio(sdiodev->func[func], addr,
  192. ((u8 *) (pkt->data)), pktlen);
  193. } else if (fifo) {
  194. err_ret = sdio_readsb(sdiodev->func[func],
  195. ((u8 *) (pkt->data)), addr, pktlen);
  196. } else {
  197. err_ret = sdio_memcpy_fromio(sdiodev->func[func],
  198. ((u8 *) (pkt->data)),
  199. addr, pktlen);
  200. }
  201. return err_ret;
  202. }
  203. static int
  204. brcmf_sdioh_request_packet(struct brcmf_sdio_dev *sdiodev, uint fix_inc,
  205. uint write, uint func, uint addr,
  206. struct sk_buff *pkt)
  207. {
  208. bool fifo = (fix_inc == SDIOH_DATA_FIX);
  209. int err_ret = 0;
  210. uint pkt_len = pkt->len;
  211. brcmf_dbg(TRACE, "Enter\n");
  212. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_packet_wait);
  213. if (brcmf_pm_resume_error(sdiodev))
  214. return -EIO;
  215. /* Claim host controller */
  216. sdio_claim_host(sdiodev->func[func]);
  217. pkt_len += 3;
  218. pkt_len &= 0xFFFFFFFC;
  219. err_ret = brcmf_sdioh_request_data(sdiodev, write, fifo, func,
  220. addr, pkt, pkt_len);
  221. if (err_ret) {
  222. brcmf_dbg(ERROR, "%s FAILED %p, addr=0x%05x, pkt_len=%d, ERR=0x%08x\n",
  223. write ? "TX" : "RX", pkt, addr, pkt_len, err_ret);
  224. } else {
  225. brcmf_dbg(TRACE, "%s xfr'd %p, addr=0x%05x, len=%d\n",
  226. write ? "TX" : "RX", pkt, addr, pkt_len);
  227. }
  228. /* Release host controller */
  229. sdio_release_host(sdiodev->func[func]);
  230. brcmf_dbg(TRACE, "Exit\n");
  231. return err_ret;
  232. }
  233. int
  234. brcmf_sdioh_request_chain(struct brcmf_sdio_dev *sdiodev, uint fix_inc,
  235. uint write, uint func, uint addr,
  236. struct sk_buff_head *pktq)
  237. {
  238. bool fifo = (fix_inc == SDIOH_DATA_FIX);
  239. u32 SGCount = 0;
  240. int err_ret = 0;
  241. struct sk_buff *pkt;
  242. brcmf_dbg(TRACE, "Enter\n");
  243. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_packet_wait);
  244. if (brcmf_pm_resume_error(sdiodev))
  245. return -EIO;
  246. /* Claim host controller */
  247. sdio_claim_host(sdiodev->func[func]);
  248. skb_queue_walk(pktq, pkt) {
  249. uint pkt_len = pkt->len;
  250. pkt_len += 3;
  251. pkt_len &= 0xFFFFFFFC;
  252. err_ret = brcmf_sdioh_request_data(sdiodev, write, fifo, func,
  253. addr, pkt, pkt_len);
  254. if (err_ret) {
  255. brcmf_dbg(ERROR, "%s FAILED %p[%d], addr=0x%05x, pkt_len=%d, ERR=0x%08x\n",
  256. write ? "TX" : "RX", pkt, SGCount, addr,
  257. pkt_len, err_ret);
  258. } else {
  259. brcmf_dbg(TRACE, "%s xfr'd %p[%d], addr=0x%05x, len=%d\n",
  260. write ? "TX" : "RX", pkt, SGCount, addr,
  261. pkt_len);
  262. }
  263. if (!fifo)
  264. addr += pkt_len;
  265. SGCount++;
  266. }
  267. /* Release host controller */
  268. sdio_release_host(sdiodev->func[func]);
  269. brcmf_dbg(TRACE, "Exit\n");
  270. return err_ret;
  271. }
  272. /*
  273. * This function takes a buffer or packet, and fixes everything up
  274. * so that in the end, a DMA-able packet is created.
  275. *
  276. * A buffer does not have an associated packet pointer,
  277. * and may or may not be aligned.
  278. * A packet may consist of a single packet, or a packet chain.
  279. * If it is a packet chain, then all the packets in the chain
  280. * must be properly aligned.
  281. *
  282. * If the packet data is not aligned, then there may only be
  283. * one packet, and in this case, it is copied to a new
  284. * aligned packet.
  285. *
  286. */
  287. int brcmf_sdioh_request_buffer(struct brcmf_sdio_dev *sdiodev,
  288. uint fix_inc, uint write, uint func, uint addr,
  289. uint reg_width, uint buflen_u, u8 *buffer,
  290. struct sk_buff *pkt)
  291. {
  292. int Status;
  293. struct sk_buff *mypkt = NULL;
  294. brcmf_dbg(TRACE, "Enter\n");
  295. brcmf_pm_resume_wait(sdiodev, &sdiodev->request_buffer_wait);
  296. if (brcmf_pm_resume_error(sdiodev))
  297. return -EIO;
  298. /* Case 1: we don't have a packet. */
  299. if (pkt == NULL) {
  300. brcmf_dbg(DATA, "Creating new %s Packet, len=%d\n",
  301. write ? "TX" : "RX", buflen_u);
  302. mypkt = brcmu_pkt_buf_get_skb(buflen_u);
  303. if (!mypkt) {
  304. brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: len %d\n",
  305. buflen_u);
  306. return -EIO;
  307. }
  308. /* For a write, copy the buffer data into the packet. */
  309. if (write)
  310. memcpy(mypkt->data, buffer, buflen_u);
  311. Status = brcmf_sdioh_request_packet(sdiodev, fix_inc, write,
  312. func, addr, mypkt);
  313. /* For a read, copy the packet data back to the buffer. */
  314. if (!write)
  315. memcpy(buffer, mypkt->data, buflen_u);
  316. brcmu_pkt_buf_free_skb(mypkt);
  317. } else if (((ulong) (pkt->data) & DMA_ALIGN_MASK) != 0) {
  318. /*
  319. * Case 2: We have a packet, but it is unaligned.
  320. * In this case, we cannot have a chain (pkt->next == NULL)
  321. */
  322. brcmf_dbg(DATA, "Creating aligned %s Packet, len=%d\n",
  323. write ? "TX" : "RX", pkt->len);
  324. mypkt = brcmu_pkt_buf_get_skb(pkt->len);
  325. if (!mypkt) {
  326. brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: len %d\n",
  327. pkt->len);
  328. return -EIO;
  329. }
  330. /* For a write, copy the buffer data into the packet. */
  331. if (write)
  332. memcpy(mypkt->data, pkt->data, pkt->len);
  333. Status = brcmf_sdioh_request_packet(sdiodev, fix_inc, write,
  334. func, addr, mypkt);
  335. /* For a read, copy the packet data back to the buffer. */
  336. if (!write)
  337. memcpy(pkt->data, mypkt->data, mypkt->len);
  338. brcmu_pkt_buf_free_skb(mypkt);
  339. } else { /* case 3: We have a packet and
  340. it is aligned. */
  341. brcmf_dbg(DATA, "Aligned %s Packet, direct DMA\n",
  342. write ? "Tx" : "Rx");
  343. Status = brcmf_sdioh_request_packet(sdiodev, fix_inc, write,
  344. func, addr, pkt);
  345. }
  346. return Status;
  347. }
  348. /* Read client card reg */
  349. static int
  350. brcmf_sdioh_card_regread(struct brcmf_sdio_dev *sdiodev, int func, u32 regaddr,
  351. int regsize, u32 *data)
  352. {
  353. if ((func == 0) || (regsize == 1)) {
  354. u8 temp = 0;
  355. brcmf_sdioh_request_byte(sdiodev, SDIOH_READ, func, regaddr,
  356. &temp);
  357. *data = temp;
  358. *data &= 0xff;
  359. brcmf_dbg(DATA, "byte read data=0x%02x\n", *data);
  360. } else {
  361. brcmf_sdioh_request_word(sdiodev, SDIOH_READ, func, regaddr,
  362. data, regsize);
  363. if (regsize == 2)
  364. *data &= 0xffff;
  365. brcmf_dbg(DATA, "word read data=0x%08x\n", *data);
  366. }
  367. return SUCCESS;
  368. }
  369. static int brcmf_sdioh_get_cisaddr(struct brcmf_sdio_dev *sdiodev, u32 regaddr)
  370. {
  371. /* read 24 bits and return valid 17 bit addr */
  372. int i;
  373. u32 scratch, regdata;
  374. __le32 scratch_le;
  375. u8 *ptr = (u8 *)&scratch_le;
  376. for (i = 0; i < 3; i++) {
  377. if ((brcmf_sdioh_card_regread(sdiodev, 0, regaddr, 1,
  378. &regdata)) != SUCCESS)
  379. brcmf_dbg(ERROR, "Can't read!\n");
  380. *ptr++ = (u8) regdata;
  381. regaddr++;
  382. }
  383. /* Only the lower 17-bits are valid */
  384. scratch = le32_to_cpu(scratch_le);
  385. scratch &= 0x0001FFFF;
  386. return scratch;
  387. }
  388. static int brcmf_sdioh_enablefuncs(struct brcmf_sdio_dev *sdiodev)
  389. {
  390. int err_ret;
  391. u32 fbraddr;
  392. u8 func;
  393. brcmf_dbg(TRACE, "\n");
  394. /* Get the Card's common CIS address */
  395. sdiodev->func_cis_ptr[0] = brcmf_sdioh_get_cisaddr(sdiodev,
  396. SDIO_CCCR_CIS);
  397. brcmf_dbg(INFO, "Card's Common CIS Ptr = 0x%x\n",
  398. sdiodev->func_cis_ptr[0]);
  399. /* Get the Card's function CIS (for each function) */
  400. for (fbraddr = SDIO_FBR_BASE(1), func = 1;
  401. func <= sdiodev->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
  402. sdiodev->func_cis_ptr[func] =
  403. brcmf_sdioh_get_cisaddr(sdiodev, SDIO_FBR_CIS + fbraddr);
  404. brcmf_dbg(INFO, "Function %d CIS Ptr = 0x%x\n",
  405. func, sdiodev->func_cis_ptr[func]);
  406. }
  407. /* Enable Function 1 */
  408. sdio_claim_host(sdiodev->func[1]);
  409. err_ret = sdio_enable_func(sdiodev->func[1]);
  410. sdio_release_host(sdiodev->func[1]);
  411. if (err_ret)
  412. brcmf_dbg(ERROR, "Failed to enable F1 Err: 0x%08x\n", err_ret);
  413. return false;
  414. }
  415. /*
  416. * Public entry points & extern's
  417. */
  418. int brcmf_sdioh_attach(struct brcmf_sdio_dev *sdiodev)
  419. {
  420. int err_ret = 0;
  421. brcmf_dbg(TRACE, "\n");
  422. sdiodev->num_funcs = 2;
  423. sdio_claim_host(sdiodev->func[1]);
  424. err_ret = sdio_set_block_size(sdiodev->func[1], SDIO_FUNC1_BLOCKSIZE);
  425. sdio_release_host(sdiodev->func[1]);
  426. if (err_ret) {
  427. brcmf_dbg(ERROR, "Failed to set F1 blocksize\n");
  428. goto out;
  429. }
  430. sdio_claim_host(sdiodev->func[2]);
  431. err_ret = sdio_set_block_size(sdiodev->func[2], SDIO_FUNC2_BLOCKSIZE);
  432. sdio_release_host(sdiodev->func[2]);
  433. if (err_ret) {
  434. brcmf_dbg(ERROR, "Failed to set F2 blocksize\n");
  435. goto out;
  436. }
  437. brcmf_sdioh_enablefuncs(sdiodev);
  438. out:
  439. brcmf_dbg(TRACE, "Done\n");
  440. return err_ret;
  441. }
  442. void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev)
  443. {
  444. brcmf_dbg(TRACE, "\n");
  445. /* Disable Function 2 */
  446. sdio_claim_host(sdiodev->func[2]);
  447. sdio_disable_func(sdiodev->func[2]);
  448. sdio_release_host(sdiodev->func[2]);
  449. /* Disable Function 1 */
  450. sdio_claim_host(sdiodev->func[1]);
  451. sdio_disable_func(sdiodev->func[1]);
  452. sdio_release_host(sdiodev->func[1]);
  453. }
  454. static int brcmf_ops_sdio_probe(struct sdio_func *func,
  455. const struct sdio_device_id *id)
  456. {
  457. int ret = 0;
  458. struct brcmf_sdio_dev *sdiodev;
  459. brcmf_dbg(TRACE, "Enter\n");
  460. brcmf_dbg(TRACE, "func->class=%x\n", func->class);
  461. brcmf_dbg(TRACE, "sdio_vendor: 0x%04x\n", func->vendor);
  462. brcmf_dbg(TRACE, "sdio_device: 0x%04x\n", func->device);
  463. brcmf_dbg(TRACE, "Function#: 0x%04x\n", func->num);
  464. if (func->num == 1) {
  465. if (dev_get_drvdata(&func->card->dev)) {
  466. brcmf_dbg(ERROR, "card private drvdata occupied\n");
  467. return -ENXIO;
  468. }
  469. sdiodev = kzalloc(sizeof(struct brcmf_sdio_dev), GFP_KERNEL);
  470. if (!sdiodev)
  471. return -ENOMEM;
  472. sdiodev->func[0] = func->card->sdio_func[0];
  473. sdiodev->func[1] = func;
  474. dev_set_drvdata(&func->card->dev, sdiodev);
  475. atomic_set(&sdiodev->suspend, false);
  476. init_waitqueue_head(&sdiodev->request_byte_wait);
  477. init_waitqueue_head(&sdiodev->request_word_wait);
  478. init_waitqueue_head(&sdiodev->request_packet_wait);
  479. init_waitqueue_head(&sdiodev->request_buffer_wait);
  480. }
  481. if (func->num == 2) {
  482. sdiodev = dev_get_drvdata(&func->card->dev);
  483. if ((!sdiodev) || (sdiodev->func[1]->card != func->card))
  484. return -ENODEV;
  485. sdiodev->func[2] = func;
  486. brcmf_dbg(TRACE, "F2 found, calling brcmf_sdio_probe...\n");
  487. ret = brcmf_sdio_probe(sdiodev);
  488. }
  489. return ret;
  490. }
  491. static void brcmf_ops_sdio_remove(struct sdio_func *func)
  492. {
  493. struct brcmf_sdio_dev *sdiodev;
  494. brcmf_dbg(TRACE, "Enter\n");
  495. brcmf_dbg(INFO, "func->class=%x\n", func->class);
  496. brcmf_dbg(INFO, "sdio_vendor: 0x%04x\n", func->vendor);
  497. brcmf_dbg(INFO, "sdio_device: 0x%04x\n", func->device);
  498. brcmf_dbg(INFO, "Function#: 0x%04x\n", func->num);
  499. if (func->num == 2) {
  500. sdiodev = dev_get_drvdata(&func->card->dev);
  501. brcmf_dbg(TRACE, "F2 found, calling brcmf_sdio_remove...\n");
  502. brcmf_sdio_remove(sdiodev);
  503. dev_set_drvdata(&func->card->dev, NULL);
  504. kfree(sdiodev);
  505. }
  506. }
  507. #ifdef CONFIG_PM_SLEEP
  508. static int brcmf_sdio_suspend(struct device *dev)
  509. {
  510. mmc_pm_flag_t sdio_flags;
  511. struct brcmf_sdio_dev *sdiodev;
  512. struct sdio_func *func = dev_to_sdio_func(dev);
  513. int ret = 0;
  514. brcmf_dbg(TRACE, "\n");
  515. sdiodev = dev_get_drvdata(&func->card->dev);
  516. atomic_set(&sdiodev->suspend, true);
  517. sdio_flags = sdio_get_host_pm_caps(sdiodev->func[1]);
  518. if (!(sdio_flags & MMC_PM_KEEP_POWER)) {
  519. brcmf_dbg(ERROR, "Host can't keep power while suspended\n");
  520. return -EINVAL;
  521. }
  522. ret = sdio_set_host_pm_flags(sdiodev->func[1], MMC_PM_KEEP_POWER);
  523. if (ret) {
  524. brcmf_dbg(ERROR, "Failed to set pm_flags\n");
  525. return ret;
  526. }
  527. brcmf_sdio_wdtmr_enable(sdiodev, false);
  528. return ret;
  529. }
  530. static int brcmf_sdio_resume(struct device *dev)
  531. {
  532. struct brcmf_sdio_dev *sdiodev;
  533. struct sdio_func *func = dev_to_sdio_func(dev);
  534. sdiodev = dev_get_drvdata(&func->card->dev);
  535. brcmf_sdio_wdtmr_enable(sdiodev, true);
  536. atomic_set(&sdiodev->suspend, false);
  537. return 0;
  538. }
  539. static const struct dev_pm_ops brcmf_sdio_pm_ops = {
  540. .suspend = brcmf_sdio_suspend,
  541. .resume = brcmf_sdio_resume,
  542. };
  543. #endif /* CONFIG_PM_SLEEP */
  544. static struct sdio_driver brcmf_sdmmc_driver = {
  545. .probe = brcmf_ops_sdio_probe,
  546. .remove = brcmf_ops_sdio_remove,
  547. .name = "brcmfmac",
  548. .id_table = brcmf_sdmmc_ids,
  549. #ifdef CONFIG_PM_SLEEP
  550. .drv = {
  551. .pm = &brcmf_sdio_pm_ops,
  552. },
  553. #endif /* CONFIG_PM_SLEEP */
  554. };
  555. /* bus register interface */
  556. int brcmf_bus_register(void)
  557. {
  558. brcmf_dbg(TRACE, "Enter\n");
  559. return sdio_register_driver(&brcmf_sdmmc_driver);
  560. }
  561. void brcmf_bus_unregister(void)
  562. {
  563. brcmf_dbg(TRACE, "Enter\n");
  564. sdio_unregister_driver(&brcmf_sdmmc_driver);
  565. }