indirect_pci.c 3.3 KB

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  1. /*
  2. * Support for indirect PCI bridges.
  3. *
  4. * Copyright (C) 1998 Gabriel Paubert.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/pci.h>
  13. #include <linux/delay.h>
  14. #include <linux/string.h>
  15. #include <linux/init.h>
  16. #include <asm/io.h>
  17. #include <asm/prom.h>
  18. #include <asm/pci-bridge.h>
  19. #include <asm/machdep.h>
  20. #ifdef CONFIG_PPC_INDIRECT_PCI_BE
  21. #define PCI_CFG_OUT out_be32
  22. #else
  23. #define PCI_CFG_OUT out_le32
  24. #endif
  25. static int
  26. indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
  27. int len, u32 *val)
  28. {
  29. struct pci_controller *hose = bus->sysdata;
  30. volatile void __iomem *cfg_data;
  31. u8 cfg_type = 0;
  32. u32 bus_no;
  33. if (ppc_md.pci_exclude_device)
  34. if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
  35. return PCIBIOS_DEVICE_NOT_FOUND;
  36. if (hose->set_cfg_type)
  37. if (bus->number != hose->first_busno)
  38. cfg_type = 1;
  39. bus_no = (bus->number == hose->first_busno) ?
  40. hose->self_busno : bus->number - hose->bus_offset;
  41. PCI_CFG_OUT(hose->cfg_addr,
  42. (0x80000000 | (bus_no << 16)
  43. | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
  44. /*
  45. * Note: the caller has already checked that offset is
  46. * suitably aligned and that len is 1, 2 or 4.
  47. */
  48. cfg_data = hose->cfg_data + (offset & 3);
  49. switch (len) {
  50. case 1:
  51. *val = in_8(cfg_data);
  52. break;
  53. case 2:
  54. *val = in_le16(cfg_data);
  55. break;
  56. default:
  57. *val = in_le32(cfg_data);
  58. break;
  59. }
  60. return PCIBIOS_SUCCESSFUL;
  61. }
  62. static int
  63. indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
  64. int len, u32 val)
  65. {
  66. struct pci_controller *hose = bus->sysdata;
  67. volatile void __iomem *cfg_data;
  68. u8 cfg_type = 0;
  69. u32 bus_no;
  70. if (ppc_md.pci_exclude_device)
  71. if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
  72. return PCIBIOS_DEVICE_NOT_FOUND;
  73. if (hose->set_cfg_type)
  74. if (bus->number != hose->first_busno)
  75. cfg_type = 1;
  76. bus_no = (bus->number == hose->first_busno) ?
  77. hose->self_busno : bus->number - hose->bus_offset;
  78. PCI_CFG_OUT(hose->cfg_addr,
  79. (0x80000000 | (bus_no << 16)
  80. | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
  81. /*
  82. * Note: the caller has already checked that offset is
  83. * suitably aligned and that len is 1, 2 or 4.
  84. */
  85. cfg_data = hose->cfg_data + (offset & 3);
  86. switch (len) {
  87. case 1:
  88. out_8(cfg_data, val);
  89. break;
  90. case 2:
  91. out_le16(cfg_data, val);
  92. break;
  93. default:
  94. out_le32(cfg_data, val);
  95. break;
  96. }
  97. return PCIBIOS_SUCCESSFUL;
  98. }
  99. static struct pci_ops indirect_pci_ops =
  100. {
  101. indirect_read_config,
  102. indirect_write_config
  103. };
  104. void __init
  105. setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
  106. void __iomem * cfg_data)
  107. {
  108. hose->cfg_addr = cfg_addr;
  109. hose->cfg_data = cfg_data;
  110. hose->ops = &indirect_pci_ops;
  111. }
  112. void __init
  113. setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
  114. {
  115. unsigned long base = cfg_addr & PAGE_MASK;
  116. void __iomem *mbase, *addr, *data;
  117. mbase = ioremap(base, PAGE_SIZE);
  118. addr = mbase + (cfg_addr & ~PAGE_MASK);
  119. if ((cfg_data & PAGE_MASK) != base)
  120. mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
  121. data = mbase + (cfg_data & ~PAGE_MASK);
  122. setup_indirect_pci_nomap(hose, addr, data);
  123. }