setup.c 19 KB

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  1. /*
  2. * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
  3. * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
  4. *
  5. * Description:
  6. * Architecture- / platform-specific boot-time initialization code for
  7. * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
  8. * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
  9. * <dan@net4x.com>.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #undef DEBUG
  17. #include <linux/init.h>
  18. #include <linux/threads.h>
  19. #include <linux/smp.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/kdev_t.h>
  24. #include <linux/major.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/kernel.h>
  27. #include <asm/processor.h>
  28. #include <asm/machdep.h>
  29. #include <asm/page.h>
  30. #include <asm/mmu.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/mmu_context.h>
  33. #include <asm/cputable.h>
  34. #include <asm/sections.h>
  35. #include <asm/iommu.h>
  36. #include <asm/firmware.h>
  37. #include <asm/system.h>
  38. #include <asm/time.h>
  39. #include <asm/paca.h>
  40. #include <asm/cache.h>
  41. #include <asm/sections.h>
  42. #include <asm/abs_addr.h>
  43. #include <asm/iseries/hv_lp_config.h>
  44. #include <asm/iseries/hv_call_event.h>
  45. #include <asm/iseries/hv_call_xm.h>
  46. #include <asm/iseries/it_lp_queue.h>
  47. #include <asm/iseries/mf.h>
  48. #include <asm/iseries/hv_lp_event.h>
  49. #include <asm/iseries/lpar_map.h>
  50. #include <asm/udbg.h>
  51. #include <asm/irq.h>
  52. #include "naca.h"
  53. #include "setup.h"
  54. #include "irq.h"
  55. #include "vpd_areas.h"
  56. #include "processor_vpd.h"
  57. #include "it_lp_naca.h"
  58. #include "main_store.h"
  59. #include "call_sm.h"
  60. #include "call_hpt.h"
  61. #ifdef DEBUG
  62. #define DBG(fmt...) udbg_printf(fmt)
  63. #else
  64. #define DBG(fmt...)
  65. #endif
  66. /* Function Prototypes */
  67. static unsigned long build_iSeries_Memory_Map(void);
  68. static void iseries_shared_idle(void);
  69. static void iseries_dedicated_idle(void);
  70. #ifdef CONFIG_PCI
  71. extern void iSeries_pci_final_fixup(void);
  72. #else
  73. static void iSeries_pci_final_fixup(void) { }
  74. #endif
  75. extern unsigned long iSeries_recal_tb;
  76. extern unsigned long iSeries_recal_titan;
  77. struct MemoryBlock {
  78. unsigned long absStart;
  79. unsigned long absEnd;
  80. unsigned long logicalStart;
  81. unsigned long logicalEnd;
  82. };
  83. /*
  84. * Process the main store vpd to determine where the holes in memory are
  85. * and return the number of physical blocks and fill in the array of
  86. * block data.
  87. */
  88. static unsigned long iSeries_process_Condor_mainstore_vpd(
  89. struct MemoryBlock *mb_array, unsigned long max_entries)
  90. {
  91. unsigned long holeFirstChunk, holeSizeChunks;
  92. unsigned long numMemoryBlocks = 1;
  93. struct IoHriMainStoreSegment4 *msVpd =
  94. (struct IoHriMainStoreSegment4 *)xMsVpd;
  95. unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
  96. unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
  97. unsigned long holeSize = holeEnd - holeStart;
  98. printk("Mainstore_VPD: Condor\n");
  99. /*
  100. * Determine if absolute memory has any
  101. * holes so that we can interpret the
  102. * access map we get back from the hypervisor
  103. * correctly.
  104. */
  105. mb_array[0].logicalStart = 0;
  106. mb_array[0].logicalEnd = 0x100000000;
  107. mb_array[0].absStart = 0;
  108. mb_array[0].absEnd = 0x100000000;
  109. if (holeSize) {
  110. numMemoryBlocks = 2;
  111. holeStart = holeStart & 0x000fffffffffffff;
  112. holeStart = addr_to_chunk(holeStart);
  113. holeFirstChunk = holeStart;
  114. holeSize = addr_to_chunk(holeSize);
  115. holeSizeChunks = holeSize;
  116. printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
  117. holeFirstChunk, holeSizeChunks );
  118. mb_array[0].logicalEnd = holeFirstChunk;
  119. mb_array[0].absEnd = holeFirstChunk;
  120. mb_array[1].logicalStart = holeFirstChunk;
  121. mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
  122. mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
  123. mb_array[1].absEnd = 0x100000000;
  124. }
  125. return numMemoryBlocks;
  126. }
  127. #define MaxSegmentAreas 32
  128. #define MaxSegmentAdrRangeBlocks 128
  129. #define MaxAreaRangeBlocks 4
  130. static unsigned long iSeries_process_Regatta_mainstore_vpd(
  131. struct MemoryBlock *mb_array, unsigned long max_entries)
  132. {
  133. struct IoHriMainStoreSegment5 *msVpdP =
  134. (struct IoHriMainStoreSegment5 *)xMsVpd;
  135. unsigned long numSegmentBlocks = 0;
  136. u32 existsBits = msVpdP->msAreaExists;
  137. unsigned long area_num;
  138. printk("Mainstore_VPD: Regatta\n");
  139. for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
  140. unsigned long numAreaBlocks;
  141. struct IoHriMainStoreArea4 *currentArea;
  142. if (existsBits & 0x80000000) {
  143. unsigned long block_num;
  144. currentArea = &msVpdP->msAreaArray[area_num];
  145. numAreaBlocks = currentArea->numAdrRangeBlocks;
  146. printk("ms_vpd: processing area %2ld blocks=%ld",
  147. area_num, numAreaBlocks);
  148. for (block_num = 0; block_num < numAreaBlocks;
  149. ++block_num ) {
  150. /* Process an address range block */
  151. struct MemoryBlock tempBlock;
  152. unsigned long i;
  153. tempBlock.absStart =
  154. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
  155. tempBlock.absEnd =
  156. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
  157. tempBlock.logicalStart = 0;
  158. tempBlock.logicalEnd = 0;
  159. printk("\n block %ld absStart=%016lx absEnd=%016lx",
  160. block_num, tempBlock.absStart,
  161. tempBlock.absEnd);
  162. for (i = 0; i < numSegmentBlocks; ++i) {
  163. if (mb_array[i].absStart ==
  164. tempBlock.absStart)
  165. break;
  166. }
  167. if (i == numSegmentBlocks) {
  168. if (numSegmentBlocks == max_entries)
  169. panic("iSeries_process_mainstore_vpd: too many memory blocks");
  170. mb_array[numSegmentBlocks] = tempBlock;
  171. ++numSegmentBlocks;
  172. } else
  173. printk(" (duplicate)");
  174. }
  175. printk("\n");
  176. }
  177. existsBits <<= 1;
  178. }
  179. /* Now sort the blocks found into ascending sequence */
  180. if (numSegmentBlocks > 1) {
  181. unsigned long m, n;
  182. for (m = 0; m < numSegmentBlocks - 1; ++m) {
  183. for (n = numSegmentBlocks - 1; m < n; --n) {
  184. if (mb_array[n].absStart <
  185. mb_array[n-1].absStart) {
  186. struct MemoryBlock tempBlock;
  187. tempBlock = mb_array[n];
  188. mb_array[n] = mb_array[n-1];
  189. mb_array[n-1] = tempBlock;
  190. }
  191. }
  192. }
  193. }
  194. /*
  195. * Assign "logical" addresses to each block. These
  196. * addresses correspond to the hypervisor "bitmap" space.
  197. * Convert all addresses into units of 256K chunks.
  198. */
  199. {
  200. unsigned long i, nextBitmapAddress;
  201. printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
  202. nextBitmapAddress = 0;
  203. for (i = 0; i < numSegmentBlocks; ++i) {
  204. unsigned long length = mb_array[i].absEnd -
  205. mb_array[i].absStart;
  206. mb_array[i].logicalStart = nextBitmapAddress;
  207. mb_array[i].logicalEnd = nextBitmapAddress + length;
  208. nextBitmapAddress += length;
  209. printk(" Bitmap range: %016lx - %016lx\n"
  210. " Absolute range: %016lx - %016lx\n",
  211. mb_array[i].logicalStart,
  212. mb_array[i].logicalEnd,
  213. mb_array[i].absStart, mb_array[i].absEnd);
  214. mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
  215. 0x000fffffffffffff);
  216. mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
  217. 0x000fffffffffffff);
  218. mb_array[i].logicalStart =
  219. addr_to_chunk(mb_array[i].logicalStart);
  220. mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
  221. }
  222. }
  223. return numSegmentBlocks;
  224. }
  225. static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
  226. unsigned long max_entries)
  227. {
  228. unsigned long i;
  229. unsigned long mem_blocks = 0;
  230. if (cpu_has_feature(CPU_FTR_SLB))
  231. mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
  232. max_entries);
  233. else
  234. mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
  235. max_entries);
  236. printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
  237. for (i = 0; i < mem_blocks; ++i) {
  238. printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
  239. " abs chunks %016lx - %016lx\n",
  240. i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
  241. mb_array[i].absStart, mb_array[i].absEnd);
  242. }
  243. return mem_blocks;
  244. }
  245. static void __init iSeries_get_cmdline(void)
  246. {
  247. char *p, *q;
  248. /* copy the command line parameter from the primary VSP */
  249. HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
  250. HvLpDma_Direction_RemoteToLocal);
  251. p = cmd_line;
  252. q = cmd_line + 255;
  253. while(p < q) {
  254. if (!*p || *p == '\n')
  255. break;
  256. ++p;
  257. }
  258. *p = 0;
  259. }
  260. static void __init iSeries_init_early(void)
  261. {
  262. DBG(" -> iSeries_init_early()\n");
  263. iSeries_recal_tb = get_tb();
  264. iSeries_recal_titan = HvCallXm_loadTod();
  265. /*
  266. * Initialize the DMA/TCE management
  267. */
  268. iommu_init_early_iSeries();
  269. /* Initialize machine-dependency vectors */
  270. #ifdef CONFIG_SMP
  271. smp_init_iSeries();
  272. #endif
  273. /* Associate Lp Event Queue 0 with processor 0 */
  274. HvCallEvent_setLpEventQueueInterruptProc(0, 0);
  275. mf_init();
  276. DBG(" <- iSeries_init_early()\n");
  277. }
  278. struct mschunks_map mschunks_map = {
  279. /* XXX We don't use these, but Piranha might need them. */
  280. .chunk_size = MSCHUNKS_CHUNK_SIZE,
  281. .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
  282. .chunk_mask = MSCHUNKS_OFFSET_MASK,
  283. };
  284. EXPORT_SYMBOL(mschunks_map);
  285. void mschunks_alloc(unsigned long num_chunks)
  286. {
  287. klimit = _ALIGN(klimit, sizeof(u32));
  288. mschunks_map.mapping = (u32 *)klimit;
  289. klimit += num_chunks * sizeof(u32);
  290. mschunks_map.num_chunks = num_chunks;
  291. }
  292. /*
  293. * The iSeries may have very large memories ( > 128 GB ) and a partition
  294. * may get memory in "chunks" that may be anywhere in the 2**52 real
  295. * address space. The chunks are 256K in size. To map this to the
  296. * memory model Linux expects, the AS/400 specific code builds a
  297. * translation table to translate what Linux thinks are "physical"
  298. * addresses to the actual real addresses. This allows us to make
  299. * it appear to Linux that we have contiguous memory starting at
  300. * physical address zero while in fact this could be far from the truth.
  301. * To avoid confusion, I'll let the words physical and/or real address
  302. * apply to the Linux addresses while I'll use "absolute address" to
  303. * refer to the actual hardware real address.
  304. *
  305. * build_iSeries_Memory_Map gets information from the Hypervisor and
  306. * looks at the Main Store VPD to determine the absolute addresses
  307. * of the memory that has been assigned to our partition and builds
  308. * a table used to translate Linux's physical addresses to these
  309. * absolute addresses. Absolute addresses are needed when
  310. * communicating with the hypervisor (e.g. to build HPT entries)
  311. *
  312. * Returns the physical memory size
  313. */
  314. static unsigned long __init build_iSeries_Memory_Map(void)
  315. {
  316. u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
  317. u32 nextPhysChunk;
  318. u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
  319. u32 totalChunks,moreChunks;
  320. u32 currChunk, thisChunk, absChunk;
  321. u32 currDword;
  322. u32 chunkBit;
  323. u64 map;
  324. struct MemoryBlock mb[32];
  325. unsigned long numMemoryBlocks, curBlock;
  326. /* Chunk size on iSeries is 256K bytes */
  327. totalChunks = (u32)HvLpConfig_getMsChunks();
  328. mschunks_alloc(totalChunks);
  329. /*
  330. * Get absolute address of our load area
  331. * and map it to physical address 0
  332. * This guarantees that the loadarea ends up at physical 0
  333. * otherwise, it might not be returned by PLIC as the first
  334. * chunks
  335. */
  336. loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
  337. loadAreaSize = itLpNaca.xLoadAreaChunks;
  338. /*
  339. * Only add the pages already mapped here.
  340. * Otherwise we might add the hpt pages
  341. * The rest of the pages of the load area
  342. * aren't in the HPT yet and can still
  343. * be assigned an arbitrary physical address
  344. */
  345. if ((loadAreaSize * 64) > HvPagesToMap)
  346. loadAreaSize = HvPagesToMap / 64;
  347. loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
  348. /*
  349. * TODO Do we need to do something if the HPT is in the 64MB load area?
  350. * This would be required if the itLpNaca.xLoadAreaChunks includes
  351. * the HPT size
  352. */
  353. printk("Mapping load area - physical addr = 0000000000000000\n"
  354. " absolute addr = %016lx\n",
  355. chunk_to_addr(loadAreaFirstChunk));
  356. printk("Load area size %dK\n", loadAreaSize * 256);
  357. for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
  358. mschunks_map.mapping[nextPhysChunk] =
  359. loadAreaFirstChunk + nextPhysChunk;
  360. /*
  361. * Get absolute address of our HPT and remember it so
  362. * we won't map it to any physical address
  363. */
  364. hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
  365. hptSizePages = (u32)HvCallHpt_getHptPages();
  366. hptSizeChunks = hptSizePages >>
  367. (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
  368. hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
  369. printk("HPT absolute addr = %016lx, size = %dK\n",
  370. chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
  371. /*
  372. * Determine if absolute memory has any
  373. * holes so that we can interpret the
  374. * access map we get back from the hypervisor
  375. * correctly.
  376. */
  377. numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
  378. /*
  379. * Process the main store access map from the hypervisor
  380. * to build up our physical -> absolute translation table
  381. */
  382. curBlock = 0;
  383. currChunk = 0;
  384. currDword = 0;
  385. moreChunks = totalChunks;
  386. while (moreChunks) {
  387. map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
  388. currDword);
  389. thisChunk = currChunk;
  390. while (map) {
  391. chunkBit = map >> 63;
  392. map <<= 1;
  393. if (chunkBit) {
  394. --moreChunks;
  395. while (thisChunk >= mb[curBlock].logicalEnd) {
  396. ++curBlock;
  397. if (curBlock >= numMemoryBlocks)
  398. panic("out of memory blocks");
  399. }
  400. if (thisChunk < mb[curBlock].logicalStart)
  401. panic("memory block error");
  402. absChunk = mb[curBlock].absStart +
  403. (thisChunk - mb[curBlock].logicalStart);
  404. if (((absChunk < hptFirstChunk) ||
  405. (absChunk > hptLastChunk)) &&
  406. ((absChunk < loadAreaFirstChunk) ||
  407. (absChunk > loadAreaLastChunk))) {
  408. mschunks_map.mapping[nextPhysChunk] =
  409. absChunk;
  410. ++nextPhysChunk;
  411. }
  412. }
  413. ++thisChunk;
  414. }
  415. ++currDword;
  416. currChunk += 64;
  417. }
  418. /*
  419. * main store size (in chunks) is
  420. * totalChunks - hptSizeChunks
  421. * which should be equal to
  422. * nextPhysChunk
  423. */
  424. return chunk_to_addr(nextPhysChunk);
  425. }
  426. /*
  427. * Document me.
  428. */
  429. static void __init iSeries_setup_arch(void)
  430. {
  431. if (get_lppaca()->shared_proc) {
  432. ppc_md.idle_loop = iseries_shared_idle;
  433. printk(KERN_DEBUG "Using shared processor idle loop\n");
  434. } else {
  435. ppc_md.idle_loop = iseries_dedicated_idle;
  436. printk(KERN_DEBUG "Using dedicated idle loop\n");
  437. }
  438. /* Setup the Lp Event Queue */
  439. setup_hvlpevent_queue();
  440. printk("Max logical processors = %d\n",
  441. itVpdAreas.xSlicMaxLogicalProcs);
  442. printk("Max physical processors = %d\n",
  443. itVpdAreas.xSlicMaxPhysicalProcs);
  444. }
  445. static void iSeries_show_cpuinfo(struct seq_file *m)
  446. {
  447. seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
  448. }
  449. static void __init iSeries_progress(char * st, unsigned short code)
  450. {
  451. printk("Progress: [%04x] - %s\n", (unsigned)code, st);
  452. mf_display_progress(code);
  453. }
  454. static void __init iSeries_fixup_klimit(void)
  455. {
  456. /*
  457. * Change klimit to take into account any ram disk
  458. * that may be included
  459. */
  460. if (naca.xRamDisk)
  461. klimit = KERNELBASE + (u64)naca.xRamDisk +
  462. (naca.xRamDiskSize * HW_PAGE_SIZE);
  463. }
  464. static int __init iSeries_src_init(void)
  465. {
  466. /* clear the progress line */
  467. if (firmware_has_feature(FW_FEATURE_ISERIES))
  468. ppc_md.progress(" ", 0xffff);
  469. return 0;
  470. }
  471. late_initcall(iSeries_src_init);
  472. static inline void process_iSeries_events(void)
  473. {
  474. asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
  475. }
  476. static void yield_shared_processor(void)
  477. {
  478. unsigned long tb;
  479. HvCall_setEnabledInterrupts(HvCall_MaskIPI |
  480. HvCall_MaskLpEvent |
  481. HvCall_MaskLpProd |
  482. HvCall_MaskTimeout);
  483. tb = get_tb();
  484. /* Compute future tb value when yield should expire */
  485. HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
  486. /*
  487. * The decrementer stops during the yield. Force a fake decrementer
  488. * here and let the timer_interrupt code sort out the actual time.
  489. */
  490. get_lppaca()->int_dword.fields.decr_int = 1;
  491. ppc64_runlatch_on();
  492. process_iSeries_events();
  493. }
  494. static void iseries_shared_idle(void)
  495. {
  496. while (1) {
  497. while (!need_resched() && !hvlpevent_is_pending()) {
  498. local_irq_disable();
  499. ppc64_runlatch_off();
  500. /* Recheck with irqs off */
  501. if (!need_resched() && !hvlpevent_is_pending())
  502. yield_shared_processor();
  503. HMT_medium();
  504. local_irq_enable();
  505. }
  506. ppc64_runlatch_on();
  507. if (hvlpevent_is_pending())
  508. process_iSeries_events();
  509. preempt_enable_no_resched();
  510. schedule();
  511. preempt_disable();
  512. }
  513. }
  514. static void iseries_dedicated_idle(void)
  515. {
  516. set_thread_flag(TIF_POLLING_NRFLAG);
  517. while (1) {
  518. if (!need_resched()) {
  519. while (!need_resched()) {
  520. ppc64_runlatch_off();
  521. HMT_low();
  522. if (hvlpevent_is_pending()) {
  523. HMT_medium();
  524. ppc64_runlatch_on();
  525. process_iSeries_events();
  526. }
  527. }
  528. HMT_medium();
  529. }
  530. ppc64_runlatch_on();
  531. preempt_enable_no_resched();
  532. schedule();
  533. preempt_disable();
  534. }
  535. }
  536. #ifndef CONFIG_PCI
  537. void __init iSeries_init_IRQ(void) { }
  538. #endif
  539. static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
  540. unsigned long flags)
  541. {
  542. return (void __iomem *)address;
  543. }
  544. static void iseries_iounmap(volatile void __iomem *token)
  545. {
  546. }
  547. /*
  548. * iSeries has no legacy IO, anything calling this function has to
  549. * fail or bad things will happen
  550. */
  551. static int iseries_check_legacy_ioport(unsigned int baseport)
  552. {
  553. return -ENODEV;
  554. }
  555. static int __init iseries_probe(void)
  556. {
  557. unsigned long root = of_get_flat_dt_root();
  558. if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
  559. return 0;
  560. hpte_init_iSeries();
  561. /* iSeries does not support 16M pages */
  562. cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;
  563. return 1;
  564. }
  565. define_machine(iseries) {
  566. .name = "iSeries",
  567. .setup_arch = iSeries_setup_arch,
  568. .show_cpuinfo = iSeries_show_cpuinfo,
  569. .init_IRQ = iSeries_init_IRQ,
  570. .get_irq = iSeries_get_irq,
  571. .init_early = iSeries_init_early,
  572. .pcibios_fixup = iSeries_pci_final_fixup,
  573. .restart = mf_reboot,
  574. .power_off = mf_power_off,
  575. .halt = mf_power_off,
  576. .get_boot_time = iSeries_get_boot_time,
  577. .set_rtc_time = iSeries_set_rtc_time,
  578. .get_rtc_time = iSeries_get_rtc_time,
  579. .calibrate_decr = generic_calibrate_decr,
  580. .progress = iSeries_progress,
  581. .probe = iseries_probe,
  582. .check_legacy_ioport = iseries_check_legacy_ioport,
  583. .ioremap = iseries_ioremap,
  584. .iounmap = iseries_iounmap,
  585. /* XXX Implement enable_pmcs for iSeries */
  586. };
  587. void * __init iSeries_early_setup(void)
  588. {
  589. unsigned long phys_mem_size;
  590. /* Identify CPU type. This is done again by the common code later
  591. * on but calling this function multiple times is fine.
  592. */
  593. identify_cpu(0, mfspr(SPRN_PVR));
  594. powerpc_firmware_features |= FW_FEATURE_ISERIES;
  595. powerpc_firmware_features |= FW_FEATURE_LPAR;
  596. iSeries_fixup_klimit();
  597. /*
  598. * Initialize the table which translate Linux physical addresses to
  599. * AS/400 absolute addresses
  600. */
  601. phys_mem_size = build_iSeries_Memory_Map();
  602. iSeries_get_cmdline();
  603. return (void *) __pa(build_flat_dt(phys_mem_size));
  604. }
  605. static void hvputc(char c)
  606. {
  607. if (c == '\n')
  608. hvputc('\r');
  609. HvCall_writeLogBuffer(&c, 1);
  610. }
  611. void __init udbg_init_iseries(void)
  612. {
  613. udbg_putc = hvputc;
  614. }