pageattr.c 6.3 KB

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  1. /*
  2. * Copyright 2002 Andi Kleen, SuSE Labs.
  3. * Thanks to Ben LaHaise for precious feedback.
  4. */
  5. #include <linux/mm.h>
  6. #include <linux/sched.h>
  7. #include <linux/highmem.h>
  8. #include <linux/module.h>
  9. #include <linux/slab.h>
  10. #include <asm/uaccess.h>
  11. #include <asm/processor.h>
  12. #include <asm/tlbflush.h>
  13. #include <asm/pgalloc.h>
  14. #include <asm/sections.h>
  15. static DEFINE_SPINLOCK(cpa_lock);
  16. static struct list_head df_list = LIST_HEAD_INIT(df_list);
  17. pte_t *lookup_address(unsigned long address)
  18. {
  19. pgd_t *pgd = pgd_offset_k(address);
  20. pud_t *pud;
  21. pmd_t *pmd;
  22. if (pgd_none(*pgd))
  23. return NULL;
  24. pud = pud_offset(pgd, address);
  25. if (pud_none(*pud))
  26. return NULL;
  27. pmd = pmd_offset(pud, address);
  28. if (pmd_none(*pmd))
  29. return NULL;
  30. if (pmd_large(*pmd))
  31. return (pte_t *)pmd;
  32. return pte_offset_kernel(pmd, address);
  33. }
  34. static struct page *split_large_page(unsigned long address, pgprot_t prot,
  35. pgprot_t ref_prot)
  36. {
  37. int i;
  38. unsigned long addr;
  39. struct page *base;
  40. pte_t *pbase;
  41. spin_unlock_irq(&cpa_lock);
  42. base = alloc_pages(GFP_KERNEL, 0);
  43. spin_lock_irq(&cpa_lock);
  44. if (!base)
  45. return NULL;
  46. /*
  47. * page_private is used to track the number of entries in
  48. * the page table page that have non standard attributes.
  49. */
  50. SetPagePrivate(base);
  51. page_private(base) = 0;
  52. address = __pa(address);
  53. addr = address & LARGE_PAGE_MASK;
  54. pbase = (pte_t *)page_address(base);
  55. for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE) {
  56. set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT,
  57. addr == address ? prot : ref_prot));
  58. }
  59. return base;
  60. }
  61. static void flush_kernel_map(void *arg)
  62. {
  63. unsigned long adr = (unsigned long)arg;
  64. if (adr && cpu_has_clflush) {
  65. int i;
  66. for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
  67. asm volatile("clflush (%0)" :: "r" (adr + i));
  68. } else if (boot_cpu_data.x86_model >= 4)
  69. wbinvd();
  70. /* Flush all to work around Errata in early athlons regarding
  71. * large page flushing.
  72. */
  73. __flush_tlb_all();
  74. }
  75. static void set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
  76. {
  77. struct page *page;
  78. unsigned long flags;
  79. set_pte_atomic(kpte, pte); /* change init_mm */
  80. if (PTRS_PER_PMD > 1)
  81. return;
  82. spin_lock_irqsave(&pgd_lock, flags);
  83. for (page = pgd_list; page; page = (struct page *)page->index) {
  84. pgd_t *pgd;
  85. pud_t *pud;
  86. pmd_t *pmd;
  87. pgd = (pgd_t *)page_address(page) + pgd_index(address);
  88. pud = pud_offset(pgd, address);
  89. pmd = pmd_offset(pud, address);
  90. set_pte_atomic((pte_t *)pmd, pte);
  91. }
  92. spin_unlock_irqrestore(&pgd_lock, flags);
  93. }
  94. /*
  95. * No more special protections in this 2/4MB area - revert to a
  96. * large page again.
  97. */
  98. static inline void revert_page(struct page *kpte_page, unsigned long address)
  99. {
  100. pgprot_t ref_prot;
  101. pte_t *linear;
  102. ref_prot =
  103. ((address & LARGE_PAGE_MASK) < (unsigned long)&_etext)
  104. ? PAGE_KERNEL_LARGE_EXEC : PAGE_KERNEL_LARGE;
  105. linear = (pte_t *)
  106. pmd_offset(pud_offset(pgd_offset_k(address), address), address);
  107. set_pmd_pte(linear, address,
  108. pfn_pte((__pa(address) & LARGE_PAGE_MASK) >> PAGE_SHIFT,
  109. ref_prot));
  110. }
  111. static int
  112. __change_page_attr(struct page *page, pgprot_t prot)
  113. {
  114. pte_t *kpte;
  115. unsigned long address;
  116. struct page *kpte_page;
  117. BUG_ON(PageHighMem(page));
  118. address = (unsigned long)page_address(page);
  119. kpte = lookup_address(address);
  120. if (!kpte)
  121. return -EINVAL;
  122. kpte_page = virt_to_page(kpte);
  123. if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL)) {
  124. if ((pte_val(*kpte) & _PAGE_PSE) == 0) {
  125. set_pte_atomic(kpte, mk_pte(page, prot));
  126. } else {
  127. pgprot_t ref_prot;
  128. struct page *split;
  129. ref_prot =
  130. ((address & LARGE_PAGE_MASK) < (unsigned long)&_etext)
  131. ? PAGE_KERNEL_EXEC : PAGE_KERNEL;
  132. split = split_large_page(address, prot, ref_prot);
  133. if (!split)
  134. return -ENOMEM;
  135. set_pmd_pte(kpte,address,mk_pte(split, ref_prot));
  136. kpte_page = split;
  137. }
  138. page_private(kpte_page)++;
  139. } else if ((pte_val(*kpte) & _PAGE_PSE) == 0) {
  140. set_pte_atomic(kpte, mk_pte(page, PAGE_KERNEL));
  141. BUG_ON(page_private(kpte_page) == 0);
  142. page_private(kpte_page)--;
  143. } else
  144. BUG();
  145. /*
  146. * If the pte was reserved, it means it was created at boot
  147. * time (not via split_large_page) and in turn we must not
  148. * replace it with a largepage.
  149. */
  150. if (!PageReserved(kpte_page)) {
  151. if (cpu_has_pse && (page_private(kpte_page) == 0)) {
  152. ClearPagePrivate(kpte_page);
  153. list_add(&kpte_page->lru, &df_list);
  154. revert_page(kpte_page, address);
  155. }
  156. }
  157. return 0;
  158. }
  159. static inline void flush_map(void *adr)
  160. {
  161. on_each_cpu(flush_kernel_map, adr, 1, 1);
  162. }
  163. /*
  164. * Change the page attributes of an page in the linear mapping.
  165. *
  166. * This should be used when a page is mapped with a different caching policy
  167. * than write-back somewhere - some CPUs do not like it when mappings with
  168. * different caching policies exist. This changes the page attributes of the
  169. * in kernel linear mapping too.
  170. *
  171. * The caller needs to ensure that there are no conflicting mappings elsewhere.
  172. * This function only deals with the kernel linear map.
  173. *
  174. * Caller must call global_flush_tlb() after this.
  175. */
  176. int change_page_attr(struct page *page, int numpages, pgprot_t prot)
  177. {
  178. int err = 0;
  179. int i;
  180. unsigned long flags;
  181. spin_lock_irqsave(&cpa_lock, flags);
  182. for (i = 0; i < numpages; i++, page++) {
  183. err = __change_page_attr(page, prot);
  184. if (err)
  185. break;
  186. }
  187. spin_unlock_irqrestore(&cpa_lock, flags);
  188. return err;
  189. }
  190. void global_flush_tlb(void)
  191. {
  192. struct list_head l;
  193. struct page *pg, *next;
  194. BUG_ON(irqs_disabled());
  195. spin_lock_irq(&cpa_lock);
  196. list_replace_init(&df_list, &l);
  197. spin_unlock_irq(&cpa_lock);
  198. if (!cpu_has_clflush)
  199. flush_map(NULL);
  200. list_for_each_entry_safe(pg, next, &l, lru) {
  201. if (cpu_has_clflush)
  202. flush_map(page_address(pg));
  203. __free_page(pg);
  204. }
  205. }
  206. #ifdef CONFIG_DEBUG_PAGEALLOC
  207. void kernel_map_pages(struct page *page, int numpages, int enable)
  208. {
  209. if (PageHighMem(page))
  210. return;
  211. if (!enable)
  212. debug_check_no_locks_freed(page_address(page),
  213. numpages * PAGE_SIZE);
  214. /* the return value is ignored - the calls cannot fail,
  215. * large pages are disabled at boot time.
  216. */
  217. change_page_attr(page, numpages, enable ? PAGE_KERNEL : __pgprot(0));
  218. /* we should perform an IPI and flush all tlbs,
  219. * but that can deadlock->flush only current cpu.
  220. */
  221. __flush_tlb_all();
  222. }
  223. #endif
  224. EXPORT_SYMBOL(change_page_attr);
  225. EXPORT_SYMBOL(global_flush_tlb);