hpsa.c 131 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  96. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  100. /* board_id = Subsystem Device ID & Vendor ID
  101. * product = Marketing Name for the board
  102. * access = Address of the struct of function pointers
  103. */
  104. static struct board_type products[] = {
  105. {0x3241103C, "Smart Array P212", &SA5_access},
  106. {0x3243103C, "Smart Array P410", &SA5_access},
  107. {0x3245103C, "Smart Array P410i", &SA5_access},
  108. {0x3247103C, "Smart Array P411", &SA5_access},
  109. {0x3249103C, "Smart Array P812", &SA5_access},
  110. {0x324a103C, "Smart Array P712m", &SA5_access},
  111. {0x324b103C, "Smart Array P711m", &SA5_access},
  112. {0x3350103C, "Smart Array", &SA5_access},
  113. {0x3351103C, "Smart Array", &SA5_access},
  114. {0x3352103C, "Smart Array", &SA5_access},
  115. {0x3353103C, "Smart Array", &SA5_access},
  116. {0x3354103C, "Smart Array", &SA5_access},
  117. {0x3355103C, "Smart Array", &SA5_access},
  118. {0x3356103C, "Smart Array", &SA5_access},
  119. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  120. };
  121. static int number_of_controllers;
  122. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  123. static spinlock_t lockup_detector_lock;
  124. static struct task_struct *hpsa_lockup_detector;
  125. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  126. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  127. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  128. static void start_io(struct ctlr_info *h);
  129. #ifdef CONFIG_COMPAT
  130. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  131. #endif
  132. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  133. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  134. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  135. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  136. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  137. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  138. int cmd_type);
  139. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  140. static void hpsa_scan_start(struct Scsi_Host *);
  141. static int hpsa_scan_finished(struct Scsi_Host *sh,
  142. unsigned long elapsed_time);
  143. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  144. int qdepth, int reason);
  145. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  146. static int hpsa_slave_alloc(struct scsi_device *sdev);
  147. static void hpsa_slave_destroy(struct scsi_device *sdev);
  148. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  149. static int check_for_unit_attention(struct ctlr_info *h,
  150. struct CommandList *c);
  151. static void check_ioctl_unit_attention(struct ctlr_info *h,
  152. struct CommandList *c);
  153. /* performant mode helper functions */
  154. static void calc_bucket_map(int *bucket, int num_buckets,
  155. int nsgs, int *bucket_map);
  156. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  157. static inline u32 next_command(struct ctlr_info *h);
  158. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  159. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  160. u64 *cfg_offset);
  161. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  162. unsigned long *memory_bar);
  163. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  164. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  165. void __iomem *vaddr, int wait_for_ready);
  166. #define BOARD_NOT_READY 0
  167. #define BOARD_READY 1
  168. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  169. {
  170. unsigned long *priv = shost_priv(sdev->host);
  171. return (struct ctlr_info *) *priv;
  172. }
  173. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  174. {
  175. unsigned long *priv = shost_priv(sh);
  176. return (struct ctlr_info *) *priv;
  177. }
  178. static int check_for_unit_attention(struct ctlr_info *h,
  179. struct CommandList *c)
  180. {
  181. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  182. return 0;
  183. switch (c->err_info->SenseInfo[12]) {
  184. case STATE_CHANGED:
  185. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  186. "detected, command retried\n", h->ctlr);
  187. break;
  188. case LUN_FAILED:
  189. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  190. "detected, action required\n", h->ctlr);
  191. break;
  192. case REPORT_LUNS_CHANGED:
  193. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  194. "changed, action required\n", h->ctlr);
  195. /*
  196. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  197. * target (array) devices.
  198. */
  199. break;
  200. case POWER_OR_RESET:
  201. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  202. "or device reset detected\n", h->ctlr);
  203. break;
  204. case UNIT_ATTENTION_CLEARED:
  205. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  206. "cleared by another initiator\n", h->ctlr);
  207. break;
  208. default:
  209. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  210. "unit attention detected\n", h->ctlr);
  211. break;
  212. }
  213. return 1;
  214. }
  215. static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
  216. {
  217. if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
  218. (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
  219. c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
  220. return 0;
  221. dev_warn(&h->pdev->dev, HPSA "device busy");
  222. return 1;
  223. }
  224. static ssize_t host_store_rescan(struct device *dev,
  225. struct device_attribute *attr,
  226. const char *buf, size_t count)
  227. {
  228. struct ctlr_info *h;
  229. struct Scsi_Host *shost = class_to_shost(dev);
  230. h = shost_to_hba(shost);
  231. hpsa_scan_start(h->scsi_host);
  232. return count;
  233. }
  234. static ssize_t host_show_firmware_revision(struct device *dev,
  235. struct device_attribute *attr, char *buf)
  236. {
  237. struct ctlr_info *h;
  238. struct Scsi_Host *shost = class_to_shost(dev);
  239. unsigned char *fwrev;
  240. h = shost_to_hba(shost);
  241. if (!h->hba_inquiry_data)
  242. return 0;
  243. fwrev = &h->hba_inquiry_data[32];
  244. return snprintf(buf, 20, "%c%c%c%c\n",
  245. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  246. }
  247. static ssize_t host_show_commands_outstanding(struct device *dev,
  248. struct device_attribute *attr, char *buf)
  249. {
  250. struct Scsi_Host *shost = class_to_shost(dev);
  251. struct ctlr_info *h = shost_to_hba(shost);
  252. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  253. }
  254. static ssize_t host_show_transport_mode(struct device *dev,
  255. struct device_attribute *attr, char *buf)
  256. {
  257. struct ctlr_info *h;
  258. struct Scsi_Host *shost = class_to_shost(dev);
  259. h = shost_to_hba(shost);
  260. return snprintf(buf, 20, "%s\n",
  261. h->transMethod & CFGTBL_Trans_Performant ?
  262. "performant" : "simple");
  263. }
  264. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  265. static u32 unresettable_controller[] = {
  266. 0x324a103C, /* Smart Array P712m */
  267. 0x324b103C, /* SmartArray P711m */
  268. 0x3223103C, /* Smart Array P800 */
  269. 0x3234103C, /* Smart Array P400 */
  270. 0x3235103C, /* Smart Array P400i */
  271. 0x3211103C, /* Smart Array E200i */
  272. 0x3212103C, /* Smart Array E200 */
  273. 0x3213103C, /* Smart Array E200i */
  274. 0x3214103C, /* Smart Array E200i */
  275. 0x3215103C, /* Smart Array E200i */
  276. 0x3237103C, /* Smart Array E500 */
  277. 0x323D103C, /* Smart Array P700m */
  278. 0x40800E11, /* Smart Array 5i */
  279. 0x409C0E11, /* Smart Array 6400 */
  280. 0x409D0E11, /* Smart Array 6400 EM */
  281. 0x40700E11, /* Smart Array 5300 */
  282. 0x40820E11, /* Smart Array 532 */
  283. 0x40830E11, /* Smart Array 5312 */
  284. 0x409A0E11, /* Smart Array 641 */
  285. 0x409B0E11, /* Smart Array 642 */
  286. 0x40910E11, /* Smart Array 6i */
  287. };
  288. /* List of controllers which cannot even be soft reset */
  289. static u32 soft_unresettable_controller[] = {
  290. 0x40800E11, /* Smart Array 5i */
  291. 0x40700E11, /* Smart Array 5300 */
  292. 0x40820E11, /* Smart Array 532 */
  293. 0x40830E11, /* Smart Array 5312 */
  294. 0x409A0E11, /* Smart Array 641 */
  295. 0x409B0E11, /* Smart Array 642 */
  296. 0x40910E11, /* Smart Array 6i */
  297. /* Exclude 640x boards. These are two pci devices in one slot
  298. * which share a battery backed cache module. One controls the
  299. * cache, the other accesses the cache through the one that controls
  300. * it. If we reset the one controlling the cache, the other will
  301. * likely not be happy. Just forbid resetting this conjoined mess.
  302. * The 640x isn't really supported by hpsa anyway.
  303. */
  304. 0x409C0E11, /* Smart Array 6400 */
  305. 0x409D0E11, /* Smart Array 6400 EM */
  306. };
  307. static int ctlr_is_hard_resettable(u32 board_id)
  308. {
  309. int i;
  310. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  311. if (unresettable_controller[i] == board_id)
  312. return 0;
  313. return 1;
  314. }
  315. static int ctlr_is_soft_resettable(u32 board_id)
  316. {
  317. int i;
  318. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  319. if (soft_unresettable_controller[i] == board_id)
  320. return 0;
  321. return 1;
  322. }
  323. static int ctlr_is_resettable(u32 board_id)
  324. {
  325. return ctlr_is_hard_resettable(board_id) ||
  326. ctlr_is_soft_resettable(board_id);
  327. }
  328. static ssize_t host_show_resettable(struct device *dev,
  329. struct device_attribute *attr, char *buf)
  330. {
  331. struct ctlr_info *h;
  332. struct Scsi_Host *shost = class_to_shost(dev);
  333. h = shost_to_hba(shost);
  334. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  335. }
  336. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  337. {
  338. return (scsi3addr[3] & 0xC0) == 0x40;
  339. }
  340. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  341. "UNKNOWN"
  342. };
  343. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  344. static ssize_t raid_level_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. ssize_t l = 0;
  348. unsigned char rlevel;
  349. struct ctlr_info *h;
  350. struct scsi_device *sdev;
  351. struct hpsa_scsi_dev_t *hdev;
  352. unsigned long flags;
  353. sdev = to_scsi_device(dev);
  354. h = sdev_to_hba(sdev);
  355. spin_lock_irqsave(&h->lock, flags);
  356. hdev = sdev->hostdata;
  357. if (!hdev) {
  358. spin_unlock_irqrestore(&h->lock, flags);
  359. return -ENODEV;
  360. }
  361. /* Is this even a logical drive? */
  362. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  363. spin_unlock_irqrestore(&h->lock, flags);
  364. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  365. return l;
  366. }
  367. rlevel = hdev->raid_level;
  368. spin_unlock_irqrestore(&h->lock, flags);
  369. if (rlevel > RAID_UNKNOWN)
  370. rlevel = RAID_UNKNOWN;
  371. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  372. return l;
  373. }
  374. static ssize_t lunid_show(struct device *dev,
  375. struct device_attribute *attr, char *buf)
  376. {
  377. struct ctlr_info *h;
  378. struct scsi_device *sdev;
  379. struct hpsa_scsi_dev_t *hdev;
  380. unsigned long flags;
  381. unsigned char lunid[8];
  382. sdev = to_scsi_device(dev);
  383. h = sdev_to_hba(sdev);
  384. spin_lock_irqsave(&h->lock, flags);
  385. hdev = sdev->hostdata;
  386. if (!hdev) {
  387. spin_unlock_irqrestore(&h->lock, flags);
  388. return -ENODEV;
  389. }
  390. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  391. spin_unlock_irqrestore(&h->lock, flags);
  392. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  393. lunid[0], lunid[1], lunid[2], lunid[3],
  394. lunid[4], lunid[5], lunid[6], lunid[7]);
  395. }
  396. static ssize_t unique_id_show(struct device *dev,
  397. struct device_attribute *attr, char *buf)
  398. {
  399. struct ctlr_info *h;
  400. struct scsi_device *sdev;
  401. struct hpsa_scsi_dev_t *hdev;
  402. unsigned long flags;
  403. unsigned char sn[16];
  404. sdev = to_scsi_device(dev);
  405. h = sdev_to_hba(sdev);
  406. spin_lock_irqsave(&h->lock, flags);
  407. hdev = sdev->hostdata;
  408. if (!hdev) {
  409. spin_unlock_irqrestore(&h->lock, flags);
  410. return -ENODEV;
  411. }
  412. memcpy(sn, hdev->device_id, sizeof(sn));
  413. spin_unlock_irqrestore(&h->lock, flags);
  414. return snprintf(buf, 16 * 2 + 2,
  415. "%02X%02X%02X%02X%02X%02X%02X%02X"
  416. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  417. sn[0], sn[1], sn[2], sn[3],
  418. sn[4], sn[5], sn[6], sn[7],
  419. sn[8], sn[9], sn[10], sn[11],
  420. sn[12], sn[13], sn[14], sn[15]);
  421. }
  422. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  423. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  424. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  425. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  426. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  427. host_show_firmware_revision, NULL);
  428. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  429. host_show_commands_outstanding, NULL);
  430. static DEVICE_ATTR(transport_mode, S_IRUGO,
  431. host_show_transport_mode, NULL);
  432. static DEVICE_ATTR(resettable, S_IRUGO,
  433. host_show_resettable, NULL);
  434. static struct device_attribute *hpsa_sdev_attrs[] = {
  435. &dev_attr_raid_level,
  436. &dev_attr_lunid,
  437. &dev_attr_unique_id,
  438. NULL,
  439. };
  440. static struct device_attribute *hpsa_shost_attrs[] = {
  441. &dev_attr_rescan,
  442. &dev_attr_firmware_revision,
  443. &dev_attr_commands_outstanding,
  444. &dev_attr_transport_mode,
  445. &dev_attr_resettable,
  446. NULL,
  447. };
  448. static struct scsi_host_template hpsa_driver_template = {
  449. .module = THIS_MODULE,
  450. .name = HPSA,
  451. .proc_name = HPSA,
  452. .queuecommand = hpsa_scsi_queue_command,
  453. .scan_start = hpsa_scan_start,
  454. .scan_finished = hpsa_scan_finished,
  455. .change_queue_depth = hpsa_change_queue_depth,
  456. .this_id = -1,
  457. .use_clustering = ENABLE_CLUSTERING,
  458. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  459. .ioctl = hpsa_ioctl,
  460. .slave_alloc = hpsa_slave_alloc,
  461. .slave_destroy = hpsa_slave_destroy,
  462. #ifdef CONFIG_COMPAT
  463. .compat_ioctl = hpsa_compat_ioctl,
  464. #endif
  465. .sdev_attrs = hpsa_sdev_attrs,
  466. .shost_attrs = hpsa_shost_attrs,
  467. .max_sectors = 8192,
  468. };
  469. /* Enqueuing and dequeuing functions for cmdlists. */
  470. static inline void addQ(struct list_head *list, struct CommandList *c)
  471. {
  472. list_add_tail(&c->list, list);
  473. }
  474. static inline u32 next_command(struct ctlr_info *h)
  475. {
  476. u32 a;
  477. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  478. return h->access.command_completed(h);
  479. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  480. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  481. (h->reply_pool_head)++;
  482. h->commands_outstanding--;
  483. } else {
  484. a = FIFO_EMPTY;
  485. }
  486. /* Check for wraparound */
  487. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  488. h->reply_pool_head = h->reply_pool;
  489. h->reply_pool_wraparound ^= 1;
  490. }
  491. return a;
  492. }
  493. /* set_performant_mode: Modify the tag for cciss performant
  494. * set bit 0 for pull model, bits 3-1 for block fetch
  495. * register number
  496. */
  497. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  498. {
  499. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  500. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  501. }
  502. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  503. struct CommandList *c)
  504. {
  505. unsigned long flags;
  506. set_performant_mode(h, c);
  507. spin_lock_irqsave(&h->lock, flags);
  508. addQ(&h->reqQ, c);
  509. h->Qdepth++;
  510. start_io(h);
  511. spin_unlock_irqrestore(&h->lock, flags);
  512. }
  513. static inline void removeQ(struct CommandList *c)
  514. {
  515. if (WARN_ON(list_empty(&c->list)))
  516. return;
  517. list_del_init(&c->list);
  518. }
  519. static inline int is_hba_lunid(unsigned char scsi3addr[])
  520. {
  521. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  522. }
  523. static inline int is_scsi_rev_5(struct ctlr_info *h)
  524. {
  525. if (!h->hba_inquiry_data)
  526. return 0;
  527. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  528. return 1;
  529. return 0;
  530. }
  531. static int hpsa_find_target_lun(struct ctlr_info *h,
  532. unsigned char scsi3addr[], int bus, int *target, int *lun)
  533. {
  534. /* finds an unused bus, target, lun for a new physical device
  535. * assumes h->devlock is held
  536. */
  537. int i, found = 0;
  538. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  539. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  540. for (i = 0; i < h->ndevices; i++) {
  541. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  542. __set_bit(h->dev[i]->target, lun_taken);
  543. }
  544. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  545. if (i < HPSA_MAX_DEVICES) {
  546. /* *bus = 1; */
  547. *target = i;
  548. *lun = 0;
  549. found = 1;
  550. }
  551. return !found;
  552. }
  553. /* Add an entry into h->dev[] array. */
  554. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  555. struct hpsa_scsi_dev_t *device,
  556. struct hpsa_scsi_dev_t *added[], int *nadded)
  557. {
  558. /* assumes h->devlock is held */
  559. int n = h->ndevices;
  560. int i;
  561. unsigned char addr1[8], addr2[8];
  562. struct hpsa_scsi_dev_t *sd;
  563. if (n >= HPSA_MAX_DEVICES) {
  564. dev_err(&h->pdev->dev, "too many devices, some will be "
  565. "inaccessible.\n");
  566. return -1;
  567. }
  568. /* physical devices do not have lun or target assigned until now. */
  569. if (device->lun != -1)
  570. /* Logical device, lun is already assigned. */
  571. goto lun_assigned;
  572. /* If this device a non-zero lun of a multi-lun device
  573. * byte 4 of the 8-byte LUN addr will contain the logical
  574. * unit no, zero otherise.
  575. */
  576. if (device->scsi3addr[4] == 0) {
  577. /* This is not a non-zero lun of a multi-lun device */
  578. if (hpsa_find_target_lun(h, device->scsi3addr,
  579. device->bus, &device->target, &device->lun) != 0)
  580. return -1;
  581. goto lun_assigned;
  582. }
  583. /* This is a non-zero lun of a multi-lun device.
  584. * Search through our list and find the device which
  585. * has the same 8 byte LUN address, excepting byte 4.
  586. * Assign the same bus and target for this new LUN.
  587. * Use the logical unit number from the firmware.
  588. */
  589. memcpy(addr1, device->scsi3addr, 8);
  590. addr1[4] = 0;
  591. for (i = 0; i < n; i++) {
  592. sd = h->dev[i];
  593. memcpy(addr2, sd->scsi3addr, 8);
  594. addr2[4] = 0;
  595. /* differ only in byte 4? */
  596. if (memcmp(addr1, addr2, 8) == 0) {
  597. device->bus = sd->bus;
  598. device->target = sd->target;
  599. device->lun = device->scsi3addr[4];
  600. break;
  601. }
  602. }
  603. if (device->lun == -1) {
  604. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  605. " suspect firmware bug or unsupported hardware "
  606. "configuration.\n");
  607. return -1;
  608. }
  609. lun_assigned:
  610. h->dev[n] = device;
  611. h->ndevices++;
  612. added[*nadded] = device;
  613. (*nadded)++;
  614. /* initially, (before registering with scsi layer) we don't
  615. * know our hostno and we don't want to print anything first
  616. * time anyway (the scsi layer's inquiries will show that info)
  617. */
  618. /* if (hostno != -1) */
  619. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  620. scsi_device_type(device->devtype), hostno,
  621. device->bus, device->target, device->lun);
  622. return 0;
  623. }
  624. /* Update an entry in h->dev[] array. */
  625. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  626. int entry, struct hpsa_scsi_dev_t *new_entry)
  627. {
  628. /* assumes h->devlock is held */
  629. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  630. /* Raid level changed. */
  631. h->dev[entry]->raid_level = new_entry->raid_level;
  632. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  633. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  634. new_entry->target, new_entry->lun);
  635. }
  636. /* Replace an entry from h->dev[] array. */
  637. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  638. int entry, struct hpsa_scsi_dev_t *new_entry,
  639. struct hpsa_scsi_dev_t *added[], int *nadded,
  640. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  641. {
  642. /* assumes h->devlock is held */
  643. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  644. removed[*nremoved] = h->dev[entry];
  645. (*nremoved)++;
  646. /*
  647. * New physical devices won't have target/lun assigned yet
  648. * so we need to preserve the values in the slot we are replacing.
  649. */
  650. if (new_entry->target == -1) {
  651. new_entry->target = h->dev[entry]->target;
  652. new_entry->lun = h->dev[entry]->lun;
  653. }
  654. h->dev[entry] = new_entry;
  655. added[*nadded] = new_entry;
  656. (*nadded)++;
  657. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  658. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  659. new_entry->target, new_entry->lun);
  660. }
  661. /* Remove an entry from h->dev[] array. */
  662. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  663. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  664. {
  665. /* assumes h->devlock is held */
  666. int i;
  667. struct hpsa_scsi_dev_t *sd;
  668. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  669. sd = h->dev[entry];
  670. removed[*nremoved] = h->dev[entry];
  671. (*nremoved)++;
  672. for (i = entry; i < h->ndevices-1; i++)
  673. h->dev[i] = h->dev[i+1];
  674. h->ndevices--;
  675. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  676. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  677. sd->lun);
  678. }
  679. #define SCSI3ADDR_EQ(a, b) ( \
  680. (a)[7] == (b)[7] && \
  681. (a)[6] == (b)[6] && \
  682. (a)[5] == (b)[5] && \
  683. (a)[4] == (b)[4] && \
  684. (a)[3] == (b)[3] && \
  685. (a)[2] == (b)[2] && \
  686. (a)[1] == (b)[1] && \
  687. (a)[0] == (b)[0])
  688. static void fixup_botched_add(struct ctlr_info *h,
  689. struct hpsa_scsi_dev_t *added)
  690. {
  691. /* called when scsi_add_device fails in order to re-adjust
  692. * h->dev[] to match the mid layer's view.
  693. */
  694. unsigned long flags;
  695. int i, j;
  696. spin_lock_irqsave(&h->lock, flags);
  697. for (i = 0; i < h->ndevices; i++) {
  698. if (h->dev[i] == added) {
  699. for (j = i; j < h->ndevices-1; j++)
  700. h->dev[j] = h->dev[j+1];
  701. h->ndevices--;
  702. break;
  703. }
  704. }
  705. spin_unlock_irqrestore(&h->lock, flags);
  706. kfree(added);
  707. }
  708. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  709. struct hpsa_scsi_dev_t *dev2)
  710. {
  711. /* we compare everything except lun and target as these
  712. * are not yet assigned. Compare parts likely
  713. * to differ first
  714. */
  715. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  716. sizeof(dev1->scsi3addr)) != 0)
  717. return 0;
  718. if (memcmp(dev1->device_id, dev2->device_id,
  719. sizeof(dev1->device_id)) != 0)
  720. return 0;
  721. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  722. return 0;
  723. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  724. return 0;
  725. if (dev1->devtype != dev2->devtype)
  726. return 0;
  727. if (dev1->bus != dev2->bus)
  728. return 0;
  729. return 1;
  730. }
  731. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  732. struct hpsa_scsi_dev_t *dev2)
  733. {
  734. /* Device attributes that can change, but don't mean
  735. * that the device is a different device, nor that the OS
  736. * needs to be told anything about the change.
  737. */
  738. if (dev1->raid_level != dev2->raid_level)
  739. return 1;
  740. return 0;
  741. }
  742. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  743. * and return needle location in *index. If scsi3addr matches, but not
  744. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  745. * location in *index.
  746. * In the case of a minor device attribute change, such as RAID level, just
  747. * return DEVICE_UPDATED, along with the updated device's location in index.
  748. * If needle not found, return DEVICE_NOT_FOUND.
  749. */
  750. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  751. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  752. int *index)
  753. {
  754. int i;
  755. #define DEVICE_NOT_FOUND 0
  756. #define DEVICE_CHANGED 1
  757. #define DEVICE_SAME 2
  758. #define DEVICE_UPDATED 3
  759. for (i = 0; i < haystack_size; i++) {
  760. if (haystack[i] == NULL) /* previously removed. */
  761. continue;
  762. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  763. *index = i;
  764. if (device_is_the_same(needle, haystack[i])) {
  765. if (device_updated(needle, haystack[i]))
  766. return DEVICE_UPDATED;
  767. return DEVICE_SAME;
  768. } else {
  769. return DEVICE_CHANGED;
  770. }
  771. }
  772. }
  773. *index = -1;
  774. return DEVICE_NOT_FOUND;
  775. }
  776. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  777. struct hpsa_scsi_dev_t *sd[], int nsds)
  778. {
  779. /* sd contains scsi3 addresses and devtypes, and inquiry
  780. * data. This function takes what's in sd to be the current
  781. * reality and updates h->dev[] to reflect that reality.
  782. */
  783. int i, entry, device_change, changes = 0;
  784. struct hpsa_scsi_dev_t *csd;
  785. unsigned long flags;
  786. struct hpsa_scsi_dev_t **added, **removed;
  787. int nadded, nremoved;
  788. struct Scsi_Host *sh = NULL;
  789. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  790. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  791. if (!added || !removed) {
  792. dev_warn(&h->pdev->dev, "out of memory in "
  793. "adjust_hpsa_scsi_table\n");
  794. goto free_and_out;
  795. }
  796. spin_lock_irqsave(&h->devlock, flags);
  797. /* find any devices in h->dev[] that are not in
  798. * sd[] and remove them from h->dev[], and for any
  799. * devices which have changed, remove the old device
  800. * info and add the new device info.
  801. * If minor device attributes change, just update
  802. * the existing device structure.
  803. */
  804. i = 0;
  805. nremoved = 0;
  806. nadded = 0;
  807. while (i < h->ndevices) {
  808. csd = h->dev[i];
  809. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  810. if (device_change == DEVICE_NOT_FOUND) {
  811. changes++;
  812. hpsa_scsi_remove_entry(h, hostno, i,
  813. removed, &nremoved);
  814. continue; /* remove ^^^, hence i not incremented */
  815. } else if (device_change == DEVICE_CHANGED) {
  816. changes++;
  817. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  818. added, &nadded, removed, &nremoved);
  819. /* Set it to NULL to prevent it from being freed
  820. * at the bottom of hpsa_update_scsi_devices()
  821. */
  822. sd[entry] = NULL;
  823. } else if (device_change == DEVICE_UPDATED) {
  824. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  825. }
  826. i++;
  827. }
  828. /* Now, make sure every device listed in sd[] is also
  829. * listed in h->dev[], adding them if they aren't found
  830. */
  831. for (i = 0; i < nsds; i++) {
  832. if (!sd[i]) /* if already added above. */
  833. continue;
  834. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  835. h->ndevices, &entry);
  836. if (device_change == DEVICE_NOT_FOUND) {
  837. changes++;
  838. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  839. added, &nadded) != 0)
  840. break;
  841. sd[i] = NULL; /* prevent from being freed later. */
  842. } else if (device_change == DEVICE_CHANGED) {
  843. /* should never happen... */
  844. changes++;
  845. dev_warn(&h->pdev->dev,
  846. "device unexpectedly changed.\n");
  847. /* but if it does happen, we just ignore that device */
  848. }
  849. }
  850. spin_unlock_irqrestore(&h->devlock, flags);
  851. /* Don't notify scsi mid layer of any changes the first time through
  852. * (or if there are no changes) scsi_scan_host will do it later the
  853. * first time through.
  854. */
  855. if (hostno == -1 || !changes)
  856. goto free_and_out;
  857. sh = h->scsi_host;
  858. /* Notify scsi mid layer of any removed devices */
  859. for (i = 0; i < nremoved; i++) {
  860. struct scsi_device *sdev =
  861. scsi_device_lookup(sh, removed[i]->bus,
  862. removed[i]->target, removed[i]->lun);
  863. if (sdev != NULL) {
  864. scsi_remove_device(sdev);
  865. scsi_device_put(sdev);
  866. } else {
  867. /* We don't expect to get here.
  868. * future cmds to this device will get selection
  869. * timeout as if the device was gone.
  870. */
  871. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  872. " for removal.", hostno, removed[i]->bus,
  873. removed[i]->target, removed[i]->lun);
  874. }
  875. kfree(removed[i]);
  876. removed[i] = NULL;
  877. }
  878. /* Notify scsi mid layer of any added devices */
  879. for (i = 0; i < nadded; i++) {
  880. if (scsi_add_device(sh, added[i]->bus,
  881. added[i]->target, added[i]->lun) == 0)
  882. continue;
  883. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  884. "device not added.\n", hostno, added[i]->bus,
  885. added[i]->target, added[i]->lun);
  886. /* now we have to remove it from h->dev,
  887. * since it didn't get added to scsi mid layer
  888. */
  889. fixup_botched_add(h, added[i]);
  890. }
  891. free_and_out:
  892. kfree(added);
  893. kfree(removed);
  894. }
  895. /*
  896. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  897. * Assume's h->devlock is held.
  898. */
  899. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  900. int bus, int target, int lun)
  901. {
  902. int i;
  903. struct hpsa_scsi_dev_t *sd;
  904. for (i = 0; i < h->ndevices; i++) {
  905. sd = h->dev[i];
  906. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  907. return sd;
  908. }
  909. return NULL;
  910. }
  911. /* link sdev->hostdata to our per-device structure. */
  912. static int hpsa_slave_alloc(struct scsi_device *sdev)
  913. {
  914. struct hpsa_scsi_dev_t *sd;
  915. unsigned long flags;
  916. struct ctlr_info *h;
  917. h = sdev_to_hba(sdev);
  918. spin_lock_irqsave(&h->devlock, flags);
  919. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  920. sdev_id(sdev), sdev->lun);
  921. if (sd != NULL)
  922. sdev->hostdata = sd;
  923. spin_unlock_irqrestore(&h->devlock, flags);
  924. return 0;
  925. }
  926. static void hpsa_slave_destroy(struct scsi_device *sdev)
  927. {
  928. /* nothing to do. */
  929. }
  930. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  931. {
  932. int i;
  933. if (!h->cmd_sg_list)
  934. return;
  935. for (i = 0; i < h->nr_cmds; i++) {
  936. kfree(h->cmd_sg_list[i]);
  937. h->cmd_sg_list[i] = NULL;
  938. }
  939. kfree(h->cmd_sg_list);
  940. h->cmd_sg_list = NULL;
  941. }
  942. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  943. {
  944. int i;
  945. if (h->chainsize <= 0)
  946. return 0;
  947. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  948. GFP_KERNEL);
  949. if (!h->cmd_sg_list)
  950. return -ENOMEM;
  951. for (i = 0; i < h->nr_cmds; i++) {
  952. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  953. h->chainsize, GFP_KERNEL);
  954. if (!h->cmd_sg_list[i])
  955. goto clean;
  956. }
  957. return 0;
  958. clean:
  959. hpsa_free_sg_chain_blocks(h);
  960. return -ENOMEM;
  961. }
  962. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  963. struct CommandList *c)
  964. {
  965. struct SGDescriptor *chain_sg, *chain_block;
  966. u64 temp64;
  967. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  968. chain_block = h->cmd_sg_list[c->cmdindex];
  969. chain_sg->Ext = HPSA_SG_CHAIN;
  970. chain_sg->Len = sizeof(*chain_sg) *
  971. (c->Header.SGTotal - h->max_cmd_sg_entries);
  972. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  973. PCI_DMA_TODEVICE);
  974. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  975. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  976. }
  977. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  978. struct CommandList *c)
  979. {
  980. struct SGDescriptor *chain_sg;
  981. union u64bit temp64;
  982. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  983. return;
  984. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  985. temp64.val32.lower = chain_sg->Addr.lower;
  986. temp64.val32.upper = chain_sg->Addr.upper;
  987. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  988. }
  989. static void complete_scsi_command(struct CommandList *cp)
  990. {
  991. struct scsi_cmnd *cmd;
  992. struct ctlr_info *h;
  993. struct ErrorInfo *ei;
  994. unsigned char sense_key;
  995. unsigned char asc; /* additional sense code */
  996. unsigned char ascq; /* additional sense code qualifier */
  997. unsigned long sense_data_size;
  998. ei = cp->err_info;
  999. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1000. h = cp->h;
  1001. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1002. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1003. hpsa_unmap_sg_chain_block(h, cp);
  1004. cmd->result = (DID_OK << 16); /* host byte */
  1005. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1006. cmd->result |= ei->ScsiStatus;
  1007. /* copy the sense data whether we need to or not. */
  1008. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1009. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1010. else
  1011. sense_data_size = sizeof(ei->SenseInfo);
  1012. if (ei->SenseLen < sense_data_size)
  1013. sense_data_size = ei->SenseLen;
  1014. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1015. scsi_set_resid(cmd, ei->ResidualCnt);
  1016. if (ei->CommandStatus == 0) {
  1017. cmd->scsi_done(cmd);
  1018. cmd_free(h, cp);
  1019. return;
  1020. }
  1021. /* an error has occurred */
  1022. switch (ei->CommandStatus) {
  1023. case CMD_TARGET_STATUS:
  1024. if (ei->ScsiStatus) {
  1025. /* Get sense key */
  1026. sense_key = 0xf & ei->SenseInfo[2];
  1027. /* Get additional sense code */
  1028. asc = ei->SenseInfo[12];
  1029. /* Get addition sense code qualifier */
  1030. ascq = ei->SenseInfo[13];
  1031. }
  1032. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1033. if (check_for_unit_attention(h, cp)) {
  1034. cmd->result = DID_SOFT_ERROR << 16;
  1035. break;
  1036. }
  1037. if (sense_key == ILLEGAL_REQUEST) {
  1038. /*
  1039. * SCSI REPORT_LUNS is commonly unsupported on
  1040. * Smart Array. Suppress noisy complaint.
  1041. */
  1042. if (cp->Request.CDB[0] == REPORT_LUNS)
  1043. break;
  1044. /* If ASC/ASCQ indicate Logical Unit
  1045. * Not Supported condition,
  1046. */
  1047. if ((asc == 0x25) && (ascq == 0x0)) {
  1048. dev_warn(&h->pdev->dev, "cp %p "
  1049. "has check condition\n", cp);
  1050. break;
  1051. }
  1052. }
  1053. if (sense_key == NOT_READY) {
  1054. /* If Sense is Not Ready, Logical Unit
  1055. * Not ready, Manual Intervention
  1056. * required
  1057. */
  1058. if ((asc == 0x04) && (ascq == 0x03)) {
  1059. dev_warn(&h->pdev->dev, "cp %p "
  1060. "has check condition: unit "
  1061. "not ready, manual "
  1062. "intervention required\n", cp);
  1063. break;
  1064. }
  1065. }
  1066. if (sense_key == ABORTED_COMMAND) {
  1067. /* Aborted command is retryable */
  1068. dev_warn(&h->pdev->dev, "cp %p "
  1069. "has check condition: aborted command: "
  1070. "ASC: 0x%x, ASCQ: 0x%x\n",
  1071. cp, asc, ascq);
  1072. cmd->result = DID_SOFT_ERROR << 16;
  1073. break;
  1074. }
  1075. /* Must be some other type of check condition */
  1076. dev_dbg(&h->pdev->dev, "cp %p has check condition: "
  1077. "unknown type: "
  1078. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1079. "Returning result: 0x%x, "
  1080. "cmd=[%02x %02x %02x %02x %02x "
  1081. "%02x %02x %02x %02x %02x %02x "
  1082. "%02x %02x %02x %02x %02x]\n",
  1083. cp, sense_key, asc, ascq,
  1084. cmd->result,
  1085. cmd->cmnd[0], cmd->cmnd[1],
  1086. cmd->cmnd[2], cmd->cmnd[3],
  1087. cmd->cmnd[4], cmd->cmnd[5],
  1088. cmd->cmnd[6], cmd->cmnd[7],
  1089. cmd->cmnd[8], cmd->cmnd[9],
  1090. cmd->cmnd[10], cmd->cmnd[11],
  1091. cmd->cmnd[12], cmd->cmnd[13],
  1092. cmd->cmnd[14], cmd->cmnd[15]);
  1093. break;
  1094. }
  1095. /* Problem was not a check condition
  1096. * Pass it up to the upper layers...
  1097. */
  1098. if (ei->ScsiStatus) {
  1099. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1100. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1101. "Returning result: 0x%x\n",
  1102. cp, ei->ScsiStatus,
  1103. sense_key, asc, ascq,
  1104. cmd->result);
  1105. } else { /* scsi status is zero??? How??? */
  1106. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1107. "Returning no connection.\n", cp),
  1108. /* Ordinarily, this case should never happen,
  1109. * but there is a bug in some released firmware
  1110. * revisions that allows it to happen if, for
  1111. * example, a 4100 backplane loses power and
  1112. * the tape drive is in it. We assume that
  1113. * it's a fatal error of some kind because we
  1114. * can't show that it wasn't. We will make it
  1115. * look like selection timeout since that is
  1116. * the most common reason for this to occur,
  1117. * and it's severe enough.
  1118. */
  1119. cmd->result = DID_NO_CONNECT << 16;
  1120. }
  1121. break;
  1122. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1123. break;
  1124. case CMD_DATA_OVERRUN:
  1125. dev_warn(&h->pdev->dev, "cp %p has"
  1126. " completed with data overrun "
  1127. "reported\n", cp);
  1128. break;
  1129. case CMD_INVALID: {
  1130. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1131. print_cmd(cp); */
  1132. /* We get CMD_INVALID if you address a non-existent device
  1133. * instead of a selection timeout (no response). You will
  1134. * see this if you yank out a drive, then try to access it.
  1135. * This is kind of a shame because it means that any other
  1136. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1137. * missing target. */
  1138. cmd->result = DID_NO_CONNECT << 16;
  1139. }
  1140. break;
  1141. case CMD_PROTOCOL_ERR:
  1142. dev_warn(&h->pdev->dev, "cp %p has "
  1143. "protocol error \n", cp);
  1144. break;
  1145. case CMD_HARDWARE_ERR:
  1146. cmd->result = DID_ERROR << 16;
  1147. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1148. break;
  1149. case CMD_CONNECTION_LOST:
  1150. cmd->result = DID_ERROR << 16;
  1151. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1152. break;
  1153. case CMD_ABORTED:
  1154. cmd->result = DID_ABORT << 16;
  1155. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1156. cp, ei->ScsiStatus);
  1157. break;
  1158. case CMD_ABORT_FAILED:
  1159. cmd->result = DID_ERROR << 16;
  1160. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1161. break;
  1162. case CMD_UNSOLICITED_ABORT:
  1163. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1164. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1165. "abort\n", cp);
  1166. break;
  1167. case CMD_TIMEOUT:
  1168. cmd->result = DID_TIME_OUT << 16;
  1169. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1170. break;
  1171. case CMD_UNABORTABLE:
  1172. cmd->result = DID_ERROR << 16;
  1173. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1174. break;
  1175. default:
  1176. cmd->result = DID_ERROR << 16;
  1177. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1178. cp, ei->CommandStatus);
  1179. }
  1180. cmd->scsi_done(cmd);
  1181. cmd_free(h, cp);
  1182. }
  1183. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1184. struct CommandList *c, int sg_used, int data_direction)
  1185. {
  1186. int i;
  1187. union u64bit addr64;
  1188. for (i = 0; i < sg_used; i++) {
  1189. addr64.val32.lower = c->SG[i].Addr.lower;
  1190. addr64.val32.upper = c->SG[i].Addr.upper;
  1191. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1192. data_direction);
  1193. }
  1194. }
  1195. static void hpsa_map_one(struct pci_dev *pdev,
  1196. struct CommandList *cp,
  1197. unsigned char *buf,
  1198. size_t buflen,
  1199. int data_direction)
  1200. {
  1201. u64 addr64;
  1202. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1203. cp->Header.SGList = 0;
  1204. cp->Header.SGTotal = 0;
  1205. return;
  1206. }
  1207. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1208. cp->SG[0].Addr.lower =
  1209. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1210. cp->SG[0].Addr.upper =
  1211. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1212. cp->SG[0].Len = buflen;
  1213. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1214. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1215. }
  1216. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1217. struct CommandList *c)
  1218. {
  1219. DECLARE_COMPLETION_ONSTACK(wait);
  1220. c->waiting = &wait;
  1221. enqueue_cmd_and_start_io(h, c);
  1222. wait_for_completion(&wait);
  1223. }
  1224. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1225. struct CommandList *c)
  1226. {
  1227. unsigned long flags;
  1228. /* If controller lockup detected, fake a hardware error. */
  1229. spin_lock_irqsave(&h->lock, flags);
  1230. if (unlikely(h->lockup_detected)) {
  1231. spin_unlock_irqrestore(&h->lock, flags);
  1232. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1233. } else {
  1234. spin_unlock_irqrestore(&h->lock, flags);
  1235. hpsa_scsi_do_simple_cmd_core(h, c);
  1236. }
  1237. }
  1238. #define MAX_DRIVER_CMD_RETRIES 25
  1239. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1240. struct CommandList *c, int data_direction)
  1241. {
  1242. int backoff_time = 10, retry_count = 0;
  1243. do {
  1244. memset(c->err_info, 0, sizeof(*c->err_info));
  1245. hpsa_scsi_do_simple_cmd_core(h, c);
  1246. retry_count++;
  1247. if (retry_count > 3) {
  1248. msleep(backoff_time);
  1249. if (backoff_time < 1000)
  1250. backoff_time *= 2;
  1251. }
  1252. } while ((check_for_unit_attention(h, c) ||
  1253. check_for_busy(h, c)) &&
  1254. retry_count <= MAX_DRIVER_CMD_RETRIES);
  1255. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1256. }
  1257. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1258. {
  1259. struct ErrorInfo *ei;
  1260. struct device *d = &cp->h->pdev->dev;
  1261. ei = cp->err_info;
  1262. switch (ei->CommandStatus) {
  1263. case CMD_TARGET_STATUS:
  1264. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1265. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1266. ei->ScsiStatus);
  1267. if (ei->ScsiStatus == 0)
  1268. dev_warn(d, "SCSI status is abnormally zero. "
  1269. "(probably indicates selection timeout "
  1270. "reported incorrectly due to a known "
  1271. "firmware bug, circa July, 2001.)\n");
  1272. break;
  1273. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1274. dev_info(d, "UNDERRUN\n");
  1275. break;
  1276. case CMD_DATA_OVERRUN:
  1277. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1278. break;
  1279. case CMD_INVALID: {
  1280. /* controller unfortunately reports SCSI passthru's
  1281. * to non-existent targets as invalid commands.
  1282. */
  1283. dev_warn(d, "cp %p is reported invalid (probably means "
  1284. "target device no longer present)\n", cp);
  1285. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1286. print_cmd(cp); */
  1287. }
  1288. break;
  1289. case CMD_PROTOCOL_ERR:
  1290. dev_warn(d, "cp %p has protocol error \n", cp);
  1291. break;
  1292. case CMD_HARDWARE_ERR:
  1293. /* cmd->result = DID_ERROR << 16; */
  1294. dev_warn(d, "cp %p had hardware error\n", cp);
  1295. break;
  1296. case CMD_CONNECTION_LOST:
  1297. dev_warn(d, "cp %p had connection lost\n", cp);
  1298. break;
  1299. case CMD_ABORTED:
  1300. dev_warn(d, "cp %p was aborted\n", cp);
  1301. break;
  1302. case CMD_ABORT_FAILED:
  1303. dev_warn(d, "cp %p reports abort failed\n", cp);
  1304. break;
  1305. case CMD_UNSOLICITED_ABORT:
  1306. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1307. break;
  1308. case CMD_TIMEOUT:
  1309. dev_warn(d, "cp %p timed out\n", cp);
  1310. break;
  1311. case CMD_UNABORTABLE:
  1312. dev_warn(d, "Command unabortable\n");
  1313. break;
  1314. default:
  1315. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1316. ei->CommandStatus);
  1317. }
  1318. }
  1319. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1320. unsigned char page, unsigned char *buf,
  1321. unsigned char bufsize)
  1322. {
  1323. int rc = IO_OK;
  1324. struct CommandList *c;
  1325. struct ErrorInfo *ei;
  1326. c = cmd_special_alloc(h);
  1327. if (c == NULL) { /* trouble... */
  1328. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1329. return -ENOMEM;
  1330. }
  1331. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1332. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1333. ei = c->err_info;
  1334. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1335. hpsa_scsi_interpret_error(c);
  1336. rc = -1;
  1337. }
  1338. cmd_special_free(h, c);
  1339. return rc;
  1340. }
  1341. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1342. {
  1343. int rc = IO_OK;
  1344. struct CommandList *c;
  1345. struct ErrorInfo *ei;
  1346. c = cmd_special_alloc(h);
  1347. if (c == NULL) { /* trouble... */
  1348. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1349. return -ENOMEM;
  1350. }
  1351. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1352. hpsa_scsi_do_simple_cmd_core(h, c);
  1353. /* no unmap needed here because no data xfer. */
  1354. ei = c->err_info;
  1355. if (ei->CommandStatus != 0) {
  1356. hpsa_scsi_interpret_error(c);
  1357. rc = -1;
  1358. }
  1359. cmd_special_free(h, c);
  1360. return rc;
  1361. }
  1362. static void hpsa_get_raid_level(struct ctlr_info *h,
  1363. unsigned char *scsi3addr, unsigned char *raid_level)
  1364. {
  1365. int rc;
  1366. unsigned char *buf;
  1367. *raid_level = RAID_UNKNOWN;
  1368. buf = kzalloc(64, GFP_KERNEL);
  1369. if (!buf)
  1370. return;
  1371. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1372. if (rc == 0)
  1373. *raid_level = buf[8];
  1374. if (*raid_level > RAID_UNKNOWN)
  1375. *raid_level = RAID_UNKNOWN;
  1376. kfree(buf);
  1377. return;
  1378. }
  1379. /* Get the device id from inquiry page 0x83 */
  1380. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1381. unsigned char *device_id, int buflen)
  1382. {
  1383. int rc;
  1384. unsigned char *buf;
  1385. if (buflen > 16)
  1386. buflen = 16;
  1387. buf = kzalloc(64, GFP_KERNEL);
  1388. if (!buf)
  1389. return -1;
  1390. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1391. if (rc == 0)
  1392. memcpy(device_id, &buf[8], buflen);
  1393. kfree(buf);
  1394. return rc != 0;
  1395. }
  1396. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1397. struct ReportLUNdata *buf, int bufsize,
  1398. int extended_response)
  1399. {
  1400. int rc = IO_OK;
  1401. struct CommandList *c;
  1402. unsigned char scsi3addr[8];
  1403. struct ErrorInfo *ei;
  1404. c = cmd_special_alloc(h);
  1405. if (c == NULL) { /* trouble... */
  1406. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1407. return -1;
  1408. }
  1409. /* address the controller */
  1410. memset(scsi3addr, 0, sizeof(scsi3addr));
  1411. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1412. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1413. if (extended_response)
  1414. c->Request.CDB[1] = extended_response;
  1415. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1416. ei = c->err_info;
  1417. if (ei->CommandStatus != 0 &&
  1418. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1419. hpsa_scsi_interpret_error(c);
  1420. rc = -1;
  1421. }
  1422. cmd_special_free(h, c);
  1423. return rc;
  1424. }
  1425. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1426. struct ReportLUNdata *buf,
  1427. int bufsize, int extended_response)
  1428. {
  1429. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1430. }
  1431. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1432. struct ReportLUNdata *buf, int bufsize)
  1433. {
  1434. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1435. }
  1436. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1437. int bus, int target, int lun)
  1438. {
  1439. device->bus = bus;
  1440. device->target = target;
  1441. device->lun = lun;
  1442. }
  1443. static int hpsa_update_device_info(struct ctlr_info *h,
  1444. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1445. unsigned char *is_OBDR_device)
  1446. {
  1447. #define OBDR_SIG_OFFSET 43
  1448. #define OBDR_TAPE_SIG "$DR-10"
  1449. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1450. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1451. unsigned char *inq_buff;
  1452. unsigned char *obdr_sig;
  1453. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1454. if (!inq_buff)
  1455. goto bail_out;
  1456. /* Do an inquiry to the device to see what it is. */
  1457. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1458. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1459. /* Inquiry failed (msg printed already) */
  1460. dev_err(&h->pdev->dev,
  1461. "hpsa_update_device_info: inquiry failed\n");
  1462. goto bail_out;
  1463. }
  1464. this_device->devtype = (inq_buff[0] & 0x1f);
  1465. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1466. memcpy(this_device->vendor, &inq_buff[8],
  1467. sizeof(this_device->vendor));
  1468. memcpy(this_device->model, &inq_buff[16],
  1469. sizeof(this_device->model));
  1470. memset(this_device->device_id, 0,
  1471. sizeof(this_device->device_id));
  1472. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1473. sizeof(this_device->device_id));
  1474. if (this_device->devtype == TYPE_DISK &&
  1475. is_logical_dev_addr_mode(scsi3addr))
  1476. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1477. else
  1478. this_device->raid_level = RAID_UNKNOWN;
  1479. if (is_OBDR_device) {
  1480. /* See if this is a One-Button-Disaster-Recovery device
  1481. * by looking for "$DR-10" at offset 43 in inquiry data.
  1482. */
  1483. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1484. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1485. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1486. OBDR_SIG_LEN) == 0);
  1487. }
  1488. kfree(inq_buff);
  1489. return 0;
  1490. bail_out:
  1491. kfree(inq_buff);
  1492. return 1;
  1493. }
  1494. static unsigned char *ext_target_model[] = {
  1495. "MSA2012",
  1496. "MSA2024",
  1497. "MSA2312",
  1498. "MSA2324",
  1499. "P2000 G3 SAS",
  1500. NULL,
  1501. };
  1502. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1503. {
  1504. int i;
  1505. for (i = 0; ext_target_model[i]; i++)
  1506. if (strncmp(device->model, ext_target_model[i],
  1507. strlen(ext_target_model[i])) == 0)
  1508. return 1;
  1509. return 0;
  1510. }
  1511. /* Helper function to assign bus, target, lun mapping of devices.
  1512. * Puts non-external target logical volumes on bus 0, external target logical
  1513. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1514. * Logical drive target and lun are assigned at this time, but
  1515. * physical device lun and target assignment are deferred (assigned
  1516. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1517. */
  1518. static void figure_bus_target_lun(struct ctlr_info *h,
  1519. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1520. {
  1521. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1522. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1523. /* physical device, target and lun filled in later */
  1524. if (is_hba_lunid(lunaddrbytes))
  1525. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1526. else
  1527. /* defer target, lun assignment for physical devices */
  1528. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1529. return;
  1530. }
  1531. /* It's a logical device */
  1532. if (is_ext_target(h, device)) {
  1533. /* external target way, put logicals on bus 1
  1534. * and match target/lun numbers box
  1535. * reports, other smart array, bus 0, target 0, match lunid
  1536. */
  1537. hpsa_set_bus_target_lun(device,
  1538. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1539. return;
  1540. }
  1541. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1542. }
  1543. /*
  1544. * If there is no lun 0 on a target, linux won't find any devices.
  1545. * For the external targets (arrays), we have to manually detect the enclosure
  1546. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1547. * it for some reason. *tmpdevice is the target we're adding,
  1548. * this_device is a pointer into the current element of currentsd[]
  1549. * that we're building up in update_scsi_devices(), below.
  1550. * lunzerobits is a bitmap that tracks which targets already have a
  1551. * lun 0 assigned.
  1552. * Returns 1 if an enclosure was added, 0 if not.
  1553. */
  1554. static int add_ext_target_dev(struct ctlr_info *h,
  1555. struct hpsa_scsi_dev_t *tmpdevice,
  1556. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1557. unsigned long lunzerobits[], int *n_ext_target_devs)
  1558. {
  1559. unsigned char scsi3addr[8];
  1560. if (test_bit(tmpdevice->target, lunzerobits))
  1561. return 0; /* There is already a lun 0 on this target. */
  1562. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1563. return 0; /* It's the logical targets that may lack lun 0. */
  1564. if (!is_ext_target(h, tmpdevice))
  1565. return 0; /* Only external target devices have this problem. */
  1566. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1567. return 0;
  1568. memset(scsi3addr, 0, 8);
  1569. scsi3addr[3] = tmpdevice->target;
  1570. if (is_hba_lunid(scsi3addr))
  1571. return 0; /* Don't add the RAID controller here. */
  1572. if (is_scsi_rev_5(h))
  1573. return 0; /* p1210m doesn't need to do this. */
  1574. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1575. dev_warn(&h->pdev->dev, "Maximum number of external "
  1576. "target devices exceeded. Check your hardware "
  1577. "configuration.");
  1578. return 0;
  1579. }
  1580. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1581. return 0;
  1582. (*n_ext_target_devs)++;
  1583. hpsa_set_bus_target_lun(this_device,
  1584. tmpdevice->bus, tmpdevice->target, 0);
  1585. set_bit(tmpdevice->target, lunzerobits);
  1586. return 1;
  1587. }
  1588. /*
  1589. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1590. * logdev. The number of luns in physdev and logdev are returned in
  1591. * *nphysicals and *nlogicals, respectively.
  1592. * Returns 0 on success, -1 otherwise.
  1593. */
  1594. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1595. int reportlunsize,
  1596. struct ReportLUNdata *physdev, u32 *nphysicals,
  1597. struct ReportLUNdata *logdev, u32 *nlogicals)
  1598. {
  1599. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1600. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1601. return -1;
  1602. }
  1603. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1604. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1605. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1606. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1607. *nphysicals - HPSA_MAX_PHYS_LUN);
  1608. *nphysicals = HPSA_MAX_PHYS_LUN;
  1609. }
  1610. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1611. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1612. return -1;
  1613. }
  1614. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1615. /* Reject Logicals in excess of our max capability. */
  1616. if (*nlogicals > HPSA_MAX_LUN) {
  1617. dev_warn(&h->pdev->dev,
  1618. "maximum logical LUNs (%d) exceeded. "
  1619. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1620. *nlogicals - HPSA_MAX_LUN);
  1621. *nlogicals = HPSA_MAX_LUN;
  1622. }
  1623. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1624. dev_warn(&h->pdev->dev,
  1625. "maximum logical + physical LUNs (%d) exceeded. "
  1626. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1627. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1628. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1629. }
  1630. return 0;
  1631. }
  1632. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1633. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1634. struct ReportLUNdata *logdev_list)
  1635. {
  1636. /* Helper function, figure out where the LUN ID info is coming from
  1637. * given index i, lists of physical and logical devices, where in
  1638. * the list the raid controller is supposed to appear (first or last)
  1639. */
  1640. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1641. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1642. if (i == raid_ctlr_position)
  1643. return RAID_CTLR_LUNID;
  1644. if (i < logicals_start)
  1645. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1646. if (i < last_device)
  1647. return &logdev_list->LUN[i - nphysicals -
  1648. (raid_ctlr_position == 0)][0];
  1649. BUG();
  1650. return NULL;
  1651. }
  1652. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1653. {
  1654. /* the idea here is we could get notified
  1655. * that some devices have changed, so we do a report
  1656. * physical luns and report logical luns cmd, and adjust
  1657. * our list of devices accordingly.
  1658. *
  1659. * The scsi3addr's of devices won't change so long as the
  1660. * adapter is not reset. That means we can rescan and
  1661. * tell which devices we already know about, vs. new
  1662. * devices, vs. disappearing devices.
  1663. */
  1664. struct ReportLUNdata *physdev_list = NULL;
  1665. struct ReportLUNdata *logdev_list = NULL;
  1666. u32 nphysicals = 0;
  1667. u32 nlogicals = 0;
  1668. u32 ndev_allocated = 0;
  1669. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1670. int ncurrent = 0;
  1671. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1672. int i, n_ext_target_devs, ndevs_to_allocate;
  1673. int raid_ctlr_position;
  1674. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1675. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1676. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1677. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1678. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1679. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1680. dev_err(&h->pdev->dev, "out of memory\n");
  1681. goto out;
  1682. }
  1683. memset(lunzerobits, 0, sizeof(lunzerobits));
  1684. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1685. logdev_list, &nlogicals))
  1686. goto out;
  1687. /* We might see up to the maximum number of logical and physical disks
  1688. * plus external target devices, and a device for the local RAID
  1689. * controller.
  1690. */
  1691. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1692. /* Allocate the per device structures */
  1693. for (i = 0; i < ndevs_to_allocate; i++) {
  1694. if (i >= HPSA_MAX_DEVICES) {
  1695. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1696. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1697. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1698. break;
  1699. }
  1700. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1701. if (!currentsd[i]) {
  1702. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1703. __FILE__, __LINE__);
  1704. goto out;
  1705. }
  1706. ndev_allocated++;
  1707. }
  1708. if (unlikely(is_scsi_rev_5(h)))
  1709. raid_ctlr_position = 0;
  1710. else
  1711. raid_ctlr_position = nphysicals + nlogicals;
  1712. /* adjust our table of devices */
  1713. n_ext_target_devs = 0;
  1714. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1715. u8 *lunaddrbytes, is_OBDR = 0;
  1716. /* Figure out where the LUN ID info is coming from */
  1717. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1718. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1719. /* skip masked physical devices. */
  1720. if (lunaddrbytes[3] & 0xC0 &&
  1721. i < nphysicals + (raid_ctlr_position == 0))
  1722. continue;
  1723. /* Get device type, vendor, model, device id */
  1724. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1725. &is_OBDR))
  1726. continue; /* skip it if we can't talk to it. */
  1727. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1728. this_device = currentsd[ncurrent];
  1729. /*
  1730. * For external target devices, we have to insert a LUN 0 which
  1731. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1732. * is nonetheless an enclosure device there. We have to
  1733. * present that otherwise linux won't find anything if
  1734. * there is no lun 0.
  1735. */
  1736. if (add_ext_target_dev(h, tmpdevice, this_device,
  1737. lunaddrbytes, lunzerobits,
  1738. &n_ext_target_devs)) {
  1739. ncurrent++;
  1740. this_device = currentsd[ncurrent];
  1741. }
  1742. *this_device = *tmpdevice;
  1743. switch (this_device->devtype) {
  1744. case TYPE_ROM:
  1745. /* We don't *really* support actual CD-ROM devices,
  1746. * just "One Button Disaster Recovery" tape drive
  1747. * which temporarily pretends to be a CD-ROM drive.
  1748. * So we check that the device is really an OBDR tape
  1749. * device by checking for "$DR-10" in bytes 43-48 of
  1750. * the inquiry data.
  1751. */
  1752. if (is_OBDR)
  1753. ncurrent++;
  1754. break;
  1755. case TYPE_DISK:
  1756. if (i < nphysicals)
  1757. break;
  1758. ncurrent++;
  1759. break;
  1760. case TYPE_TAPE:
  1761. case TYPE_MEDIUM_CHANGER:
  1762. ncurrent++;
  1763. break;
  1764. case TYPE_RAID:
  1765. /* Only present the Smartarray HBA as a RAID controller.
  1766. * If it's a RAID controller other than the HBA itself
  1767. * (an external RAID controller, MSA500 or similar)
  1768. * don't present it.
  1769. */
  1770. if (!is_hba_lunid(lunaddrbytes))
  1771. break;
  1772. ncurrent++;
  1773. break;
  1774. default:
  1775. break;
  1776. }
  1777. if (ncurrent >= HPSA_MAX_DEVICES)
  1778. break;
  1779. }
  1780. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1781. out:
  1782. kfree(tmpdevice);
  1783. for (i = 0; i < ndev_allocated; i++)
  1784. kfree(currentsd[i]);
  1785. kfree(currentsd);
  1786. kfree(physdev_list);
  1787. kfree(logdev_list);
  1788. }
  1789. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1790. * dma mapping and fills in the scatter gather entries of the
  1791. * hpsa command, cp.
  1792. */
  1793. static int hpsa_scatter_gather(struct ctlr_info *h,
  1794. struct CommandList *cp,
  1795. struct scsi_cmnd *cmd)
  1796. {
  1797. unsigned int len;
  1798. struct scatterlist *sg;
  1799. u64 addr64;
  1800. int use_sg, i, sg_index, chained;
  1801. struct SGDescriptor *curr_sg;
  1802. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1803. use_sg = scsi_dma_map(cmd);
  1804. if (use_sg < 0)
  1805. return use_sg;
  1806. if (!use_sg)
  1807. goto sglist_finished;
  1808. curr_sg = cp->SG;
  1809. chained = 0;
  1810. sg_index = 0;
  1811. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1812. if (i == h->max_cmd_sg_entries - 1 &&
  1813. use_sg > h->max_cmd_sg_entries) {
  1814. chained = 1;
  1815. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1816. sg_index = 0;
  1817. }
  1818. addr64 = (u64) sg_dma_address(sg);
  1819. len = sg_dma_len(sg);
  1820. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1821. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1822. curr_sg->Len = len;
  1823. curr_sg->Ext = 0; /* we are not chaining */
  1824. curr_sg++;
  1825. }
  1826. if (use_sg + chained > h->maxSG)
  1827. h->maxSG = use_sg + chained;
  1828. if (chained) {
  1829. cp->Header.SGList = h->max_cmd_sg_entries;
  1830. cp->Header.SGTotal = (u16) (use_sg + 1);
  1831. hpsa_map_sg_chain_block(h, cp);
  1832. return 0;
  1833. }
  1834. sglist_finished:
  1835. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1836. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1837. return 0;
  1838. }
  1839. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1840. void (*done)(struct scsi_cmnd *))
  1841. {
  1842. struct ctlr_info *h;
  1843. struct hpsa_scsi_dev_t *dev;
  1844. unsigned char scsi3addr[8];
  1845. struct CommandList *c;
  1846. unsigned long flags;
  1847. /* Get the ptr to our adapter structure out of cmd->host. */
  1848. h = sdev_to_hba(cmd->device);
  1849. dev = cmd->device->hostdata;
  1850. if (!dev) {
  1851. cmd->result = DID_NO_CONNECT << 16;
  1852. done(cmd);
  1853. return 0;
  1854. }
  1855. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1856. spin_lock_irqsave(&h->lock, flags);
  1857. if (unlikely(h->lockup_detected)) {
  1858. spin_unlock_irqrestore(&h->lock, flags);
  1859. cmd->result = DID_ERROR << 16;
  1860. done(cmd);
  1861. return 0;
  1862. }
  1863. /* Need a lock as this is being allocated from the pool */
  1864. c = cmd_alloc(h);
  1865. spin_unlock_irqrestore(&h->lock, flags);
  1866. if (c == NULL) { /* trouble... */
  1867. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1868. return SCSI_MLQUEUE_HOST_BUSY;
  1869. }
  1870. /* Fill in the command list header */
  1871. cmd->scsi_done = done; /* save this for use by completion code */
  1872. /* save c in case we have to abort it */
  1873. cmd->host_scribble = (unsigned char *) c;
  1874. c->cmd_type = CMD_SCSI;
  1875. c->scsi_cmd = cmd;
  1876. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1877. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1878. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1879. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1880. /* Fill in the request block... */
  1881. c->Request.Timeout = 0;
  1882. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1883. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1884. c->Request.CDBLen = cmd->cmd_len;
  1885. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1886. c->Request.Type.Type = TYPE_CMD;
  1887. c->Request.Type.Attribute = ATTR_SIMPLE;
  1888. switch (cmd->sc_data_direction) {
  1889. case DMA_TO_DEVICE:
  1890. c->Request.Type.Direction = XFER_WRITE;
  1891. break;
  1892. case DMA_FROM_DEVICE:
  1893. c->Request.Type.Direction = XFER_READ;
  1894. break;
  1895. case DMA_NONE:
  1896. c->Request.Type.Direction = XFER_NONE;
  1897. break;
  1898. case DMA_BIDIRECTIONAL:
  1899. /* This can happen if a buggy application does a scsi passthru
  1900. * and sets both inlen and outlen to non-zero. ( see
  1901. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1902. */
  1903. c->Request.Type.Direction = XFER_RSVD;
  1904. /* This is technically wrong, and hpsa controllers should
  1905. * reject it with CMD_INVALID, which is the most correct
  1906. * response, but non-fibre backends appear to let it
  1907. * slide by, and give the same results as if this field
  1908. * were set correctly. Either way is acceptable for
  1909. * our purposes here.
  1910. */
  1911. break;
  1912. default:
  1913. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1914. cmd->sc_data_direction);
  1915. BUG();
  1916. break;
  1917. }
  1918. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1919. cmd_free(h, c);
  1920. return SCSI_MLQUEUE_HOST_BUSY;
  1921. }
  1922. enqueue_cmd_and_start_io(h, c);
  1923. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1924. return 0;
  1925. }
  1926. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1927. static void hpsa_scan_start(struct Scsi_Host *sh)
  1928. {
  1929. struct ctlr_info *h = shost_to_hba(sh);
  1930. unsigned long flags;
  1931. /* wait until any scan already in progress is finished. */
  1932. while (1) {
  1933. spin_lock_irqsave(&h->scan_lock, flags);
  1934. if (h->scan_finished)
  1935. break;
  1936. spin_unlock_irqrestore(&h->scan_lock, flags);
  1937. wait_event(h->scan_wait_queue, h->scan_finished);
  1938. /* Note: We don't need to worry about a race between this
  1939. * thread and driver unload because the midlayer will
  1940. * have incremented the reference count, so unload won't
  1941. * happen if we're in here.
  1942. */
  1943. }
  1944. h->scan_finished = 0; /* mark scan as in progress */
  1945. spin_unlock_irqrestore(&h->scan_lock, flags);
  1946. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1947. spin_lock_irqsave(&h->scan_lock, flags);
  1948. h->scan_finished = 1; /* mark scan as finished. */
  1949. wake_up_all(&h->scan_wait_queue);
  1950. spin_unlock_irqrestore(&h->scan_lock, flags);
  1951. }
  1952. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1953. unsigned long elapsed_time)
  1954. {
  1955. struct ctlr_info *h = shost_to_hba(sh);
  1956. unsigned long flags;
  1957. int finished;
  1958. spin_lock_irqsave(&h->scan_lock, flags);
  1959. finished = h->scan_finished;
  1960. spin_unlock_irqrestore(&h->scan_lock, flags);
  1961. return finished;
  1962. }
  1963. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1964. int qdepth, int reason)
  1965. {
  1966. struct ctlr_info *h = sdev_to_hba(sdev);
  1967. if (reason != SCSI_QDEPTH_DEFAULT)
  1968. return -ENOTSUPP;
  1969. if (qdepth < 1)
  1970. qdepth = 1;
  1971. else
  1972. if (qdepth > h->nr_cmds)
  1973. qdepth = h->nr_cmds;
  1974. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1975. return sdev->queue_depth;
  1976. }
  1977. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1978. {
  1979. /* we are being forcibly unloaded, and may not refuse. */
  1980. scsi_remove_host(h->scsi_host);
  1981. scsi_host_put(h->scsi_host);
  1982. h->scsi_host = NULL;
  1983. }
  1984. static int hpsa_register_scsi(struct ctlr_info *h)
  1985. {
  1986. struct Scsi_Host *sh;
  1987. int error;
  1988. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1989. if (sh == NULL)
  1990. goto fail;
  1991. sh->io_port = 0;
  1992. sh->n_io_port = 0;
  1993. sh->this_id = -1;
  1994. sh->max_channel = 3;
  1995. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1996. sh->max_lun = HPSA_MAX_LUN;
  1997. sh->max_id = HPSA_MAX_LUN;
  1998. sh->can_queue = h->nr_cmds;
  1999. sh->cmd_per_lun = h->nr_cmds;
  2000. sh->sg_tablesize = h->maxsgentries;
  2001. h->scsi_host = sh;
  2002. sh->hostdata[0] = (unsigned long) h;
  2003. sh->irq = h->intr[h->intr_mode];
  2004. sh->unique_id = sh->irq;
  2005. error = scsi_add_host(sh, &h->pdev->dev);
  2006. if (error)
  2007. goto fail_host_put;
  2008. scsi_scan_host(sh);
  2009. return 0;
  2010. fail_host_put:
  2011. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2012. " failed for controller %d\n", __func__, h->ctlr);
  2013. scsi_host_put(sh);
  2014. return error;
  2015. fail:
  2016. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2017. " failed for controller %d\n", __func__, h->ctlr);
  2018. return -ENOMEM;
  2019. }
  2020. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2021. unsigned char lunaddr[])
  2022. {
  2023. int rc = 0;
  2024. int count = 0;
  2025. int waittime = 1; /* seconds */
  2026. struct CommandList *c;
  2027. c = cmd_special_alloc(h);
  2028. if (!c) {
  2029. dev_warn(&h->pdev->dev, "out of memory in "
  2030. "wait_for_device_to_become_ready.\n");
  2031. return IO_ERROR;
  2032. }
  2033. /* Send test unit ready until device ready, or give up. */
  2034. while (count < HPSA_TUR_RETRY_LIMIT) {
  2035. /* Wait for a bit. do this first, because if we send
  2036. * the TUR right away, the reset will just abort it.
  2037. */
  2038. msleep(1000 * waittime);
  2039. count++;
  2040. /* Increase wait time with each try, up to a point. */
  2041. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2042. waittime = waittime * 2;
  2043. /* Send the Test Unit Ready */
  2044. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  2045. hpsa_scsi_do_simple_cmd_core(h, c);
  2046. /* no unmap needed here because no data xfer. */
  2047. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2048. break;
  2049. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2050. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2051. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2052. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2053. break;
  2054. dev_warn(&h->pdev->dev, "waiting %d secs "
  2055. "for device to become ready.\n", waittime);
  2056. rc = 1; /* device not ready. */
  2057. }
  2058. if (rc)
  2059. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2060. else
  2061. dev_warn(&h->pdev->dev, "device is ready.\n");
  2062. cmd_special_free(h, c);
  2063. return rc;
  2064. }
  2065. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2066. * complaining. Doing a host- or bus-reset can't do anything good here.
  2067. */
  2068. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2069. {
  2070. int rc;
  2071. struct ctlr_info *h;
  2072. struct hpsa_scsi_dev_t *dev;
  2073. /* find the controller to which the command to be aborted was sent */
  2074. h = sdev_to_hba(scsicmd->device);
  2075. if (h == NULL) /* paranoia */
  2076. return FAILED;
  2077. dev = scsicmd->device->hostdata;
  2078. if (!dev) {
  2079. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2080. "device lookup failed.\n");
  2081. return FAILED;
  2082. }
  2083. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2084. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2085. /* send a reset to the SCSI LUN which the command was sent to */
  2086. rc = hpsa_send_reset(h, dev->scsi3addr);
  2087. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2088. return SUCCESS;
  2089. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2090. return FAILED;
  2091. }
  2092. /*
  2093. * For operations that cannot sleep, a command block is allocated at init,
  2094. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2095. * which ones are free or in use. Lock must be held when calling this.
  2096. * cmd_free() is the complement.
  2097. */
  2098. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2099. {
  2100. struct CommandList *c;
  2101. int i;
  2102. union u64bit temp64;
  2103. dma_addr_t cmd_dma_handle, err_dma_handle;
  2104. do {
  2105. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2106. if (i == h->nr_cmds)
  2107. return NULL;
  2108. } while (test_and_set_bit
  2109. (i & (BITS_PER_LONG - 1),
  2110. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2111. c = h->cmd_pool + i;
  2112. memset(c, 0, sizeof(*c));
  2113. cmd_dma_handle = h->cmd_pool_dhandle
  2114. + i * sizeof(*c);
  2115. c->err_info = h->errinfo_pool + i;
  2116. memset(c->err_info, 0, sizeof(*c->err_info));
  2117. err_dma_handle = h->errinfo_pool_dhandle
  2118. + i * sizeof(*c->err_info);
  2119. h->nr_allocs++;
  2120. c->cmdindex = i;
  2121. INIT_LIST_HEAD(&c->list);
  2122. c->busaddr = (u32) cmd_dma_handle;
  2123. temp64.val = (u64) err_dma_handle;
  2124. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2125. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2126. c->ErrDesc.Len = sizeof(*c->err_info);
  2127. c->h = h;
  2128. return c;
  2129. }
  2130. /* For operations that can wait for kmalloc to possibly sleep,
  2131. * this routine can be called. Lock need not be held to call
  2132. * cmd_special_alloc. cmd_special_free() is the complement.
  2133. */
  2134. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2135. {
  2136. struct CommandList *c;
  2137. union u64bit temp64;
  2138. dma_addr_t cmd_dma_handle, err_dma_handle;
  2139. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2140. if (c == NULL)
  2141. return NULL;
  2142. memset(c, 0, sizeof(*c));
  2143. c->cmdindex = -1;
  2144. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2145. &err_dma_handle);
  2146. if (c->err_info == NULL) {
  2147. pci_free_consistent(h->pdev,
  2148. sizeof(*c), c, cmd_dma_handle);
  2149. return NULL;
  2150. }
  2151. memset(c->err_info, 0, sizeof(*c->err_info));
  2152. INIT_LIST_HEAD(&c->list);
  2153. c->busaddr = (u32) cmd_dma_handle;
  2154. temp64.val = (u64) err_dma_handle;
  2155. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2156. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2157. c->ErrDesc.Len = sizeof(*c->err_info);
  2158. c->h = h;
  2159. return c;
  2160. }
  2161. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2162. {
  2163. int i;
  2164. i = c - h->cmd_pool;
  2165. clear_bit(i & (BITS_PER_LONG - 1),
  2166. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2167. h->nr_frees++;
  2168. }
  2169. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2170. {
  2171. union u64bit temp64;
  2172. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2173. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2174. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2175. c->err_info, (dma_addr_t) temp64.val);
  2176. pci_free_consistent(h->pdev, sizeof(*c),
  2177. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2178. }
  2179. #ifdef CONFIG_COMPAT
  2180. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2181. {
  2182. IOCTL32_Command_struct __user *arg32 =
  2183. (IOCTL32_Command_struct __user *) arg;
  2184. IOCTL_Command_struct arg64;
  2185. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2186. int err;
  2187. u32 cp;
  2188. memset(&arg64, 0, sizeof(arg64));
  2189. err = 0;
  2190. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2191. sizeof(arg64.LUN_info));
  2192. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2193. sizeof(arg64.Request));
  2194. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2195. sizeof(arg64.error_info));
  2196. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2197. err |= get_user(cp, &arg32->buf);
  2198. arg64.buf = compat_ptr(cp);
  2199. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2200. if (err)
  2201. return -EFAULT;
  2202. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2203. if (err)
  2204. return err;
  2205. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2206. sizeof(arg32->error_info));
  2207. if (err)
  2208. return -EFAULT;
  2209. return err;
  2210. }
  2211. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2212. int cmd, void *arg)
  2213. {
  2214. BIG_IOCTL32_Command_struct __user *arg32 =
  2215. (BIG_IOCTL32_Command_struct __user *) arg;
  2216. BIG_IOCTL_Command_struct arg64;
  2217. BIG_IOCTL_Command_struct __user *p =
  2218. compat_alloc_user_space(sizeof(arg64));
  2219. int err;
  2220. u32 cp;
  2221. memset(&arg64, 0, sizeof(arg64));
  2222. err = 0;
  2223. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2224. sizeof(arg64.LUN_info));
  2225. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2226. sizeof(arg64.Request));
  2227. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2228. sizeof(arg64.error_info));
  2229. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2230. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2231. err |= get_user(cp, &arg32->buf);
  2232. arg64.buf = compat_ptr(cp);
  2233. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2234. if (err)
  2235. return -EFAULT;
  2236. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2237. if (err)
  2238. return err;
  2239. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2240. sizeof(arg32->error_info));
  2241. if (err)
  2242. return -EFAULT;
  2243. return err;
  2244. }
  2245. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2246. {
  2247. switch (cmd) {
  2248. case CCISS_GETPCIINFO:
  2249. case CCISS_GETINTINFO:
  2250. case CCISS_SETINTINFO:
  2251. case CCISS_GETNODENAME:
  2252. case CCISS_SETNODENAME:
  2253. case CCISS_GETHEARTBEAT:
  2254. case CCISS_GETBUSTYPES:
  2255. case CCISS_GETFIRMVER:
  2256. case CCISS_GETDRIVVER:
  2257. case CCISS_REVALIDVOLS:
  2258. case CCISS_DEREGDISK:
  2259. case CCISS_REGNEWDISK:
  2260. case CCISS_REGNEWD:
  2261. case CCISS_RESCANDISK:
  2262. case CCISS_GETLUNINFO:
  2263. return hpsa_ioctl(dev, cmd, arg);
  2264. case CCISS_PASSTHRU32:
  2265. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2266. case CCISS_BIG_PASSTHRU32:
  2267. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2268. default:
  2269. return -ENOIOCTLCMD;
  2270. }
  2271. }
  2272. #endif
  2273. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2274. {
  2275. struct hpsa_pci_info pciinfo;
  2276. if (!argp)
  2277. return -EINVAL;
  2278. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2279. pciinfo.bus = h->pdev->bus->number;
  2280. pciinfo.dev_fn = h->pdev->devfn;
  2281. pciinfo.board_id = h->board_id;
  2282. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2283. return -EFAULT;
  2284. return 0;
  2285. }
  2286. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2287. {
  2288. DriverVer_type DriverVer;
  2289. unsigned char vmaj, vmin, vsubmin;
  2290. int rc;
  2291. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2292. &vmaj, &vmin, &vsubmin);
  2293. if (rc != 3) {
  2294. dev_info(&h->pdev->dev, "driver version string '%s' "
  2295. "unrecognized.", HPSA_DRIVER_VERSION);
  2296. vmaj = 0;
  2297. vmin = 0;
  2298. vsubmin = 0;
  2299. }
  2300. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2301. if (!argp)
  2302. return -EINVAL;
  2303. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2304. return -EFAULT;
  2305. return 0;
  2306. }
  2307. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2308. {
  2309. IOCTL_Command_struct iocommand;
  2310. struct CommandList *c;
  2311. char *buff = NULL;
  2312. union u64bit temp64;
  2313. if (!argp)
  2314. return -EINVAL;
  2315. if (!capable(CAP_SYS_RAWIO))
  2316. return -EPERM;
  2317. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2318. return -EFAULT;
  2319. if ((iocommand.buf_size < 1) &&
  2320. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2321. return -EINVAL;
  2322. }
  2323. if (iocommand.buf_size > 0) {
  2324. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2325. if (buff == NULL)
  2326. return -EFAULT;
  2327. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2328. /* Copy the data into the buffer we created */
  2329. if (copy_from_user(buff, iocommand.buf,
  2330. iocommand.buf_size)) {
  2331. kfree(buff);
  2332. return -EFAULT;
  2333. }
  2334. } else {
  2335. memset(buff, 0, iocommand.buf_size);
  2336. }
  2337. }
  2338. c = cmd_special_alloc(h);
  2339. if (c == NULL) {
  2340. kfree(buff);
  2341. return -ENOMEM;
  2342. }
  2343. /* Fill in the command type */
  2344. c->cmd_type = CMD_IOCTL_PEND;
  2345. /* Fill in Command Header */
  2346. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2347. if (iocommand.buf_size > 0) { /* buffer to fill */
  2348. c->Header.SGList = 1;
  2349. c->Header.SGTotal = 1;
  2350. } else { /* no buffers to fill */
  2351. c->Header.SGList = 0;
  2352. c->Header.SGTotal = 0;
  2353. }
  2354. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2355. /* use the kernel address the cmd block for tag */
  2356. c->Header.Tag.lower = c->busaddr;
  2357. /* Fill in Request block */
  2358. memcpy(&c->Request, &iocommand.Request,
  2359. sizeof(c->Request));
  2360. /* Fill in the scatter gather information */
  2361. if (iocommand.buf_size > 0) {
  2362. temp64.val = pci_map_single(h->pdev, buff,
  2363. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2364. c->SG[0].Addr.lower = temp64.val32.lower;
  2365. c->SG[0].Addr.upper = temp64.val32.upper;
  2366. c->SG[0].Len = iocommand.buf_size;
  2367. c->SG[0].Ext = 0; /* we are not chaining*/
  2368. }
  2369. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2370. if (iocommand.buf_size > 0)
  2371. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2372. check_ioctl_unit_attention(h, c);
  2373. /* Copy the error information out */
  2374. memcpy(&iocommand.error_info, c->err_info,
  2375. sizeof(iocommand.error_info));
  2376. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2377. kfree(buff);
  2378. cmd_special_free(h, c);
  2379. return -EFAULT;
  2380. }
  2381. if (iocommand.Request.Type.Direction == XFER_READ &&
  2382. iocommand.buf_size > 0) {
  2383. /* Copy the data out of the buffer we created */
  2384. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2385. kfree(buff);
  2386. cmd_special_free(h, c);
  2387. return -EFAULT;
  2388. }
  2389. }
  2390. kfree(buff);
  2391. cmd_special_free(h, c);
  2392. return 0;
  2393. }
  2394. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2395. {
  2396. BIG_IOCTL_Command_struct *ioc;
  2397. struct CommandList *c;
  2398. unsigned char **buff = NULL;
  2399. int *buff_size = NULL;
  2400. union u64bit temp64;
  2401. BYTE sg_used = 0;
  2402. int status = 0;
  2403. int i;
  2404. u32 left;
  2405. u32 sz;
  2406. BYTE __user *data_ptr;
  2407. if (!argp)
  2408. return -EINVAL;
  2409. if (!capable(CAP_SYS_RAWIO))
  2410. return -EPERM;
  2411. ioc = (BIG_IOCTL_Command_struct *)
  2412. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2413. if (!ioc) {
  2414. status = -ENOMEM;
  2415. goto cleanup1;
  2416. }
  2417. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2418. status = -EFAULT;
  2419. goto cleanup1;
  2420. }
  2421. if ((ioc->buf_size < 1) &&
  2422. (ioc->Request.Type.Direction != XFER_NONE)) {
  2423. status = -EINVAL;
  2424. goto cleanup1;
  2425. }
  2426. /* Check kmalloc limits using all SGs */
  2427. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2428. status = -EINVAL;
  2429. goto cleanup1;
  2430. }
  2431. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2432. status = -EINVAL;
  2433. goto cleanup1;
  2434. }
  2435. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2436. if (!buff) {
  2437. status = -ENOMEM;
  2438. goto cleanup1;
  2439. }
  2440. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2441. if (!buff_size) {
  2442. status = -ENOMEM;
  2443. goto cleanup1;
  2444. }
  2445. left = ioc->buf_size;
  2446. data_ptr = ioc->buf;
  2447. while (left) {
  2448. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2449. buff_size[sg_used] = sz;
  2450. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2451. if (buff[sg_used] == NULL) {
  2452. status = -ENOMEM;
  2453. goto cleanup1;
  2454. }
  2455. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2456. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2457. status = -ENOMEM;
  2458. goto cleanup1;
  2459. }
  2460. } else
  2461. memset(buff[sg_used], 0, sz);
  2462. left -= sz;
  2463. data_ptr += sz;
  2464. sg_used++;
  2465. }
  2466. c = cmd_special_alloc(h);
  2467. if (c == NULL) {
  2468. status = -ENOMEM;
  2469. goto cleanup1;
  2470. }
  2471. c->cmd_type = CMD_IOCTL_PEND;
  2472. c->Header.ReplyQueue = 0;
  2473. c->Header.SGList = c->Header.SGTotal = sg_used;
  2474. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2475. c->Header.Tag.lower = c->busaddr;
  2476. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2477. if (ioc->buf_size > 0) {
  2478. int i;
  2479. for (i = 0; i < sg_used; i++) {
  2480. temp64.val = pci_map_single(h->pdev, buff[i],
  2481. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2482. c->SG[i].Addr.lower = temp64.val32.lower;
  2483. c->SG[i].Addr.upper = temp64.val32.upper;
  2484. c->SG[i].Len = buff_size[i];
  2485. /* we are not chaining */
  2486. c->SG[i].Ext = 0;
  2487. }
  2488. }
  2489. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2490. if (sg_used)
  2491. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2492. check_ioctl_unit_attention(h, c);
  2493. /* Copy the error information out */
  2494. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2495. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2496. cmd_special_free(h, c);
  2497. status = -EFAULT;
  2498. goto cleanup1;
  2499. }
  2500. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2501. /* Copy the data out of the buffer we created */
  2502. BYTE __user *ptr = ioc->buf;
  2503. for (i = 0; i < sg_used; i++) {
  2504. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2505. cmd_special_free(h, c);
  2506. status = -EFAULT;
  2507. goto cleanup1;
  2508. }
  2509. ptr += buff_size[i];
  2510. }
  2511. }
  2512. cmd_special_free(h, c);
  2513. status = 0;
  2514. cleanup1:
  2515. if (buff) {
  2516. for (i = 0; i < sg_used; i++)
  2517. kfree(buff[i]);
  2518. kfree(buff);
  2519. }
  2520. kfree(buff_size);
  2521. kfree(ioc);
  2522. return status;
  2523. }
  2524. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2525. struct CommandList *c)
  2526. {
  2527. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2528. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2529. (void) check_for_unit_attention(h, c);
  2530. }
  2531. /*
  2532. * ioctl
  2533. */
  2534. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2535. {
  2536. struct ctlr_info *h;
  2537. void __user *argp = (void __user *)arg;
  2538. h = sdev_to_hba(dev);
  2539. switch (cmd) {
  2540. case CCISS_DEREGDISK:
  2541. case CCISS_REGNEWDISK:
  2542. case CCISS_REGNEWD:
  2543. hpsa_scan_start(h->scsi_host);
  2544. return 0;
  2545. case CCISS_GETPCIINFO:
  2546. return hpsa_getpciinfo_ioctl(h, argp);
  2547. case CCISS_GETDRIVVER:
  2548. return hpsa_getdrivver_ioctl(h, argp);
  2549. case CCISS_PASSTHRU:
  2550. return hpsa_passthru_ioctl(h, argp);
  2551. case CCISS_BIG_PASSTHRU:
  2552. return hpsa_big_passthru_ioctl(h, argp);
  2553. default:
  2554. return -ENOTTY;
  2555. }
  2556. }
  2557. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2558. unsigned char *scsi3addr, u8 reset_type)
  2559. {
  2560. struct CommandList *c;
  2561. c = cmd_alloc(h);
  2562. if (!c)
  2563. return -ENOMEM;
  2564. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2565. RAID_CTLR_LUNID, TYPE_MSG);
  2566. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2567. c->waiting = NULL;
  2568. enqueue_cmd_and_start_io(h, c);
  2569. /* Don't wait for completion, the reset won't complete. Don't free
  2570. * the command either. This is the last command we will send before
  2571. * re-initializing everything, so it doesn't matter and won't leak.
  2572. */
  2573. return 0;
  2574. }
  2575. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2576. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2577. int cmd_type)
  2578. {
  2579. int pci_dir = XFER_NONE;
  2580. c->cmd_type = CMD_IOCTL_PEND;
  2581. c->Header.ReplyQueue = 0;
  2582. if (buff != NULL && size > 0) {
  2583. c->Header.SGList = 1;
  2584. c->Header.SGTotal = 1;
  2585. } else {
  2586. c->Header.SGList = 0;
  2587. c->Header.SGTotal = 0;
  2588. }
  2589. c->Header.Tag.lower = c->busaddr;
  2590. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2591. c->Request.Type.Type = cmd_type;
  2592. if (cmd_type == TYPE_CMD) {
  2593. switch (cmd) {
  2594. case HPSA_INQUIRY:
  2595. /* are we trying to read a vital product page */
  2596. if (page_code != 0) {
  2597. c->Request.CDB[1] = 0x01;
  2598. c->Request.CDB[2] = page_code;
  2599. }
  2600. c->Request.CDBLen = 6;
  2601. c->Request.Type.Attribute = ATTR_SIMPLE;
  2602. c->Request.Type.Direction = XFER_READ;
  2603. c->Request.Timeout = 0;
  2604. c->Request.CDB[0] = HPSA_INQUIRY;
  2605. c->Request.CDB[4] = size & 0xFF;
  2606. break;
  2607. case HPSA_REPORT_LOG:
  2608. case HPSA_REPORT_PHYS:
  2609. /* Talking to controller so It's a physical command
  2610. mode = 00 target = 0. Nothing to write.
  2611. */
  2612. c->Request.CDBLen = 12;
  2613. c->Request.Type.Attribute = ATTR_SIMPLE;
  2614. c->Request.Type.Direction = XFER_READ;
  2615. c->Request.Timeout = 0;
  2616. c->Request.CDB[0] = cmd;
  2617. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2618. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2619. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2620. c->Request.CDB[9] = size & 0xFF;
  2621. break;
  2622. case HPSA_CACHE_FLUSH:
  2623. c->Request.CDBLen = 12;
  2624. c->Request.Type.Attribute = ATTR_SIMPLE;
  2625. c->Request.Type.Direction = XFER_WRITE;
  2626. c->Request.Timeout = 0;
  2627. c->Request.CDB[0] = BMIC_WRITE;
  2628. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2629. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2630. c->Request.CDB[8] = size & 0xFF;
  2631. break;
  2632. case TEST_UNIT_READY:
  2633. c->Request.CDBLen = 6;
  2634. c->Request.Type.Attribute = ATTR_SIMPLE;
  2635. c->Request.Type.Direction = XFER_NONE;
  2636. c->Request.Timeout = 0;
  2637. break;
  2638. default:
  2639. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2640. BUG();
  2641. return;
  2642. }
  2643. } else if (cmd_type == TYPE_MSG) {
  2644. switch (cmd) {
  2645. case HPSA_DEVICE_RESET_MSG:
  2646. c->Request.CDBLen = 16;
  2647. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2648. c->Request.Type.Attribute = ATTR_SIMPLE;
  2649. c->Request.Type.Direction = XFER_NONE;
  2650. c->Request.Timeout = 0; /* Don't time out */
  2651. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2652. c->Request.CDB[0] = cmd;
  2653. c->Request.CDB[1] = 0x03; /* Reset target above */
  2654. /* If bytes 4-7 are zero, it means reset the */
  2655. /* LunID device */
  2656. c->Request.CDB[4] = 0x00;
  2657. c->Request.CDB[5] = 0x00;
  2658. c->Request.CDB[6] = 0x00;
  2659. c->Request.CDB[7] = 0x00;
  2660. break;
  2661. default:
  2662. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2663. cmd);
  2664. BUG();
  2665. }
  2666. } else {
  2667. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2668. BUG();
  2669. }
  2670. switch (c->Request.Type.Direction) {
  2671. case XFER_READ:
  2672. pci_dir = PCI_DMA_FROMDEVICE;
  2673. break;
  2674. case XFER_WRITE:
  2675. pci_dir = PCI_DMA_TODEVICE;
  2676. break;
  2677. case XFER_NONE:
  2678. pci_dir = PCI_DMA_NONE;
  2679. break;
  2680. default:
  2681. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2682. }
  2683. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2684. return;
  2685. }
  2686. /*
  2687. * Map (physical) PCI mem into (virtual) kernel space
  2688. */
  2689. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2690. {
  2691. ulong page_base = ((ulong) base) & PAGE_MASK;
  2692. ulong page_offs = ((ulong) base) - page_base;
  2693. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2694. return page_remapped ? (page_remapped + page_offs) : NULL;
  2695. }
  2696. /* Takes cmds off the submission queue and sends them to the hardware,
  2697. * then puts them on the queue of cmds waiting for completion.
  2698. */
  2699. static void start_io(struct ctlr_info *h)
  2700. {
  2701. struct CommandList *c;
  2702. while (!list_empty(&h->reqQ)) {
  2703. c = list_entry(h->reqQ.next, struct CommandList, list);
  2704. /* can't do anything if fifo is full */
  2705. if ((h->access.fifo_full(h))) {
  2706. dev_warn(&h->pdev->dev, "fifo full\n");
  2707. break;
  2708. }
  2709. /* Get the first entry from the Request Q */
  2710. removeQ(c);
  2711. h->Qdepth--;
  2712. /* Tell the controller execute command */
  2713. h->access.submit_command(h, c);
  2714. /* Put job onto the completed Q */
  2715. addQ(&h->cmpQ, c);
  2716. }
  2717. }
  2718. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2719. {
  2720. return h->access.command_completed(h);
  2721. }
  2722. static inline bool interrupt_pending(struct ctlr_info *h)
  2723. {
  2724. return h->access.intr_pending(h);
  2725. }
  2726. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2727. {
  2728. return (h->access.intr_pending(h) == 0) ||
  2729. (h->interrupts_enabled == 0);
  2730. }
  2731. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2732. u32 raw_tag)
  2733. {
  2734. if (unlikely(tag_index >= h->nr_cmds)) {
  2735. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2736. return 1;
  2737. }
  2738. return 0;
  2739. }
  2740. static inline void finish_cmd(struct CommandList *c)
  2741. {
  2742. removeQ(c);
  2743. if (likely(c->cmd_type == CMD_SCSI))
  2744. complete_scsi_command(c);
  2745. else if (c->cmd_type == CMD_IOCTL_PEND)
  2746. complete(c->waiting);
  2747. }
  2748. static inline u32 hpsa_tag_contains_index(u32 tag)
  2749. {
  2750. return tag & DIRECT_LOOKUP_BIT;
  2751. }
  2752. static inline u32 hpsa_tag_to_index(u32 tag)
  2753. {
  2754. return tag >> DIRECT_LOOKUP_SHIFT;
  2755. }
  2756. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2757. {
  2758. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2759. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2760. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2761. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2762. return tag & ~HPSA_PERF_ERROR_BITS;
  2763. }
  2764. /* process completion of an indexed ("direct lookup") command */
  2765. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2766. u32 raw_tag)
  2767. {
  2768. u32 tag_index;
  2769. struct CommandList *c;
  2770. tag_index = hpsa_tag_to_index(raw_tag);
  2771. if (bad_tag(h, tag_index, raw_tag))
  2772. return next_command(h);
  2773. c = h->cmd_pool + tag_index;
  2774. finish_cmd(c);
  2775. return next_command(h);
  2776. }
  2777. /* process completion of a non-indexed command */
  2778. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2779. u32 raw_tag)
  2780. {
  2781. u32 tag;
  2782. struct CommandList *c = NULL;
  2783. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2784. list_for_each_entry(c, &h->cmpQ, list) {
  2785. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2786. finish_cmd(c);
  2787. return next_command(h);
  2788. }
  2789. }
  2790. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2791. return next_command(h);
  2792. }
  2793. /* Some controllers, like p400, will give us one interrupt
  2794. * after a soft reset, even if we turned interrupts off.
  2795. * Only need to check for this in the hpsa_xxx_discard_completions
  2796. * functions.
  2797. */
  2798. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2799. {
  2800. if (likely(!reset_devices))
  2801. return 0;
  2802. if (likely(h->interrupts_enabled))
  2803. return 0;
  2804. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2805. "(known firmware bug.) Ignoring.\n");
  2806. return 1;
  2807. }
  2808. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2809. {
  2810. struct ctlr_info *h = dev_id;
  2811. unsigned long flags;
  2812. u32 raw_tag;
  2813. if (ignore_bogus_interrupt(h))
  2814. return IRQ_NONE;
  2815. if (interrupt_not_for_us(h))
  2816. return IRQ_NONE;
  2817. spin_lock_irqsave(&h->lock, flags);
  2818. h->last_intr_timestamp = get_jiffies_64();
  2819. while (interrupt_pending(h)) {
  2820. raw_tag = get_next_completion(h);
  2821. while (raw_tag != FIFO_EMPTY)
  2822. raw_tag = next_command(h);
  2823. }
  2824. spin_unlock_irqrestore(&h->lock, flags);
  2825. return IRQ_HANDLED;
  2826. }
  2827. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2828. {
  2829. struct ctlr_info *h = dev_id;
  2830. unsigned long flags;
  2831. u32 raw_tag;
  2832. if (ignore_bogus_interrupt(h))
  2833. return IRQ_NONE;
  2834. spin_lock_irqsave(&h->lock, flags);
  2835. h->last_intr_timestamp = get_jiffies_64();
  2836. raw_tag = get_next_completion(h);
  2837. while (raw_tag != FIFO_EMPTY)
  2838. raw_tag = next_command(h);
  2839. spin_unlock_irqrestore(&h->lock, flags);
  2840. return IRQ_HANDLED;
  2841. }
  2842. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2843. {
  2844. struct ctlr_info *h = dev_id;
  2845. unsigned long flags;
  2846. u32 raw_tag;
  2847. if (interrupt_not_for_us(h))
  2848. return IRQ_NONE;
  2849. spin_lock_irqsave(&h->lock, flags);
  2850. h->last_intr_timestamp = get_jiffies_64();
  2851. while (interrupt_pending(h)) {
  2852. raw_tag = get_next_completion(h);
  2853. while (raw_tag != FIFO_EMPTY) {
  2854. if (hpsa_tag_contains_index(raw_tag))
  2855. raw_tag = process_indexed_cmd(h, raw_tag);
  2856. else
  2857. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2858. }
  2859. }
  2860. spin_unlock_irqrestore(&h->lock, flags);
  2861. return IRQ_HANDLED;
  2862. }
  2863. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2864. {
  2865. struct ctlr_info *h = dev_id;
  2866. unsigned long flags;
  2867. u32 raw_tag;
  2868. spin_lock_irqsave(&h->lock, flags);
  2869. h->last_intr_timestamp = get_jiffies_64();
  2870. raw_tag = get_next_completion(h);
  2871. while (raw_tag != FIFO_EMPTY) {
  2872. if (hpsa_tag_contains_index(raw_tag))
  2873. raw_tag = process_indexed_cmd(h, raw_tag);
  2874. else
  2875. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2876. }
  2877. spin_unlock_irqrestore(&h->lock, flags);
  2878. return IRQ_HANDLED;
  2879. }
  2880. /* Send a message CDB to the firmware. Careful, this only works
  2881. * in simple mode, not performant mode due to the tag lookup.
  2882. * We only ever use this immediately after a controller reset.
  2883. */
  2884. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2885. unsigned char type)
  2886. {
  2887. struct Command {
  2888. struct CommandListHeader CommandHeader;
  2889. struct RequestBlock Request;
  2890. struct ErrDescriptor ErrorDescriptor;
  2891. };
  2892. struct Command *cmd;
  2893. static const size_t cmd_sz = sizeof(*cmd) +
  2894. sizeof(cmd->ErrorDescriptor);
  2895. dma_addr_t paddr64;
  2896. uint32_t paddr32, tag;
  2897. void __iomem *vaddr;
  2898. int i, err;
  2899. vaddr = pci_ioremap_bar(pdev, 0);
  2900. if (vaddr == NULL)
  2901. return -ENOMEM;
  2902. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2903. * CCISS commands, so they must be allocated from the lower 4GiB of
  2904. * memory.
  2905. */
  2906. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2907. if (err) {
  2908. iounmap(vaddr);
  2909. return -ENOMEM;
  2910. }
  2911. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2912. if (cmd == NULL) {
  2913. iounmap(vaddr);
  2914. return -ENOMEM;
  2915. }
  2916. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2917. * although there's no guarantee, we assume that the address is at
  2918. * least 4-byte aligned (most likely, it's page-aligned).
  2919. */
  2920. paddr32 = paddr64;
  2921. cmd->CommandHeader.ReplyQueue = 0;
  2922. cmd->CommandHeader.SGList = 0;
  2923. cmd->CommandHeader.SGTotal = 0;
  2924. cmd->CommandHeader.Tag.lower = paddr32;
  2925. cmd->CommandHeader.Tag.upper = 0;
  2926. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2927. cmd->Request.CDBLen = 16;
  2928. cmd->Request.Type.Type = TYPE_MSG;
  2929. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2930. cmd->Request.Type.Direction = XFER_NONE;
  2931. cmd->Request.Timeout = 0; /* Don't time out */
  2932. cmd->Request.CDB[0] = opcode;
  2933. cmd->Request.CDB[1] = type;
  2934. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2935. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2936. cmd->ErrorDescriptor.Addr.upper = 0;
  2937. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2938. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2939. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2940. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2941. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2942. break;
  2943. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2944. }
  2945. iounmap(vaddr);
  2946. /* we leak the DMA buffer here ... no choice since the controller could
  2947. * still complete the command.
  2948. */
  2949. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2950. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2951. opcode, type);
  2952. return -ETIMEDOUT;
  2953. }
  2954. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2955. if (tag & HPSA_ERROR_BIT) {
  2956. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2957. opcode, type);
  2958. return -EIO;
  2959. }
  2960. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2961. opcode, type);
  2962. return 0;
  2963. }
  2964. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2965. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2966. void * __iomem vaddr, u32 use_doorbell)
  2967. {
  2968. u16 pmcsr;
  2969. int pos;
  2970. if (use_doorbell) {
  2971. /* For everything after the P600, the PCI power state method
  2972. * of resetting the controller doesn't work, so we have this
  2973. * other way using the doorbell register.
  2974. */
  2975. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2976. writel(use_doorbell, vaddr + SA5_DOORBELL);
  2977. } else { /* Try to do it the PCI power state way */
  2978. /* Quoting from the Open CISS Specification: "The Power
  2979. * Management Control/Status Register (CSR) controls the power
  2980. * state of the device. The normal operating state is D0,
  2981. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2982. * the controller, place the interface device in D3 then to D0,
  2983. * this causes a secondary PCI reset which will reset the
  2984. * controller." */
  2985. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2986. if (pos == 0) {
  2987. dev_err(&pdev->dev,
  2988. "hpsa_reset_controller: "
  2989. "PCI PM not supported\n");
  2990. return -ENODEV;
  2991. }
  2992. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2993. /* enter the D3hot power management state */
  2994. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2995. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2996. pmcsr |= PCI_D3hot;
  2997. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2998. msleep(500);
  2999. /* enter the D0 power management state */
  3000. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3001. pmcsr |= PCI_D0;
  3002. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3003. /*
  3004. * The P600 requires a small delay when changing states.
  3005. * Otherwise we may think the board did not reset and we bail.
  3006. * This for kdump only and is particular to the P600.
  3007. */
  3008. msleep(500);
  3009. }
  3010. return 0;
  3011. }
  3012. static __devinit void init_driver_version(char *driver_version, int len)
  3013. {
  3014. memset(driver_version, 0, len);
  3015. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3016. }
  3017. static __devinit int write_driver_ver_to_cfgtable(
  3018. struct CfgTable __iomem *cfgtable)
  3019. {
  3020. char *driver_version;
  3021. int i, size = sizeof(cfgtable->driver_version);
  3022. driver_version = kmalloc(size, GFP_KERNEL);
  3023. if (!driver_version)
  3024. return -ENOMEM;
  3025. init_driver_version(driver_version, size);
  3026. for (i = 0; i < size; i++)
  3027. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3028. kfree(driver_version);
  3029. return 0;
  3030. }
  3031. static __devinit void read_driver_ver_from_cfgtable(
  3032. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  3033. {
  3034. int i;
  3035. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3036. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3037. }
  3038. static __devinit int controller_reset_failed(
  3039. struct CfgTable __iomem *cfgtable)
  3040. {
  3041. char *driver_ver, *old_driver_ver;
  3042. int rc, size = sizeof(cfgtable->driver_version);
  3043. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3044. if (!old_driver_ver)
  3045. return -ENOMEM;
  3046. driver_ver = old_driver_ver + size;
  3047. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3048. * should have been changed, otherwise we know the reset failed.
  3049. */
  3050. init_driver_version(old_driver_ver, size);
  3051. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3052. rc = !memcmp(driver_ver, old_driver_ver, size);
  3053. kfree(old_driver_ver);
  3054. return rc;
  3055. }
  3056. /* This does a hard reset of the controller using PCI power management
  3057. * states or the using the doorbell register.
  3058. */
  3059. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3060. {
  3061. u64 cfg_offset;
  3062. u32 cfg_base_addr;
  3063. u64 cfg_base_addr_index;
  3064. void __iomem *vaddr;
  3065. unsigned long paddr;
  3066. u32 misc_fw_support;
  3067. int rc;
  3068. struct CfgTable __iomem *cfgtable;
  3069. u32 use_doorbell;
  3070. u32 board_id;
  3071. u16 command_register;
  3072. /* For controllers as old as the P600, this is very nearly
  3073. * the same thing as
  3074. *
  3075. * pci_save_state(pci_dev);
  3076. * pci_set_power_state(pci_dev, PCI_D3hot);
  3077. * pci_set_power_state(pci_dev, PCI_D0);
  3078. * pci_restore_state(pci_dev);
  3079. *
  3080. * For controllers newer than the P600, the pci power state
  3081. * method of resetting doesn't work so we have another way
  3082. * using the doorbell register.
  3083. */
  3084. rc = hpsa_lookup_board_id(pdev, &board_id);
  3085. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3086. dev_warn(&pdev->dev, "Not resetting device.\n");
  3087. return -ENODEV;
  3088. }
  3089. /* if controller is soft- but not hard resettable... */
  3090. if (!ctlr_is_hard_resettable(board_id))
  3091. return -ENOTSUPP; /* try soft reset later. */
  3092. /* Save the PCI command register */
  3093. pci_read_config_word(pdev, 4, &command_register);
  3094. /* Turn the board off. This is so that later pci_restore_state()
  3095. * won't turn the board on before the rest of config space is ready.
  3096. */
  3097. pci_disable_device(pdev);
  3098. pci_save_state(pdev);
  3099. /* find the first memory BAR, so we can find the cfg table */
  3100. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3101. if (rc)
  3102. return rc;
  3103. vaddr = remap_pci_mem(paddr, 0x250);
  3104. if (!vaddr)
  3105. return -ENOMEM;
  3106. /* find cfgtable in order to check if reset via doorbell is supported */
  3107. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3108. &cfg_base_addr_index, &cfg_offset);
  3109. if (rc)
  3110. goto unmap_vaddr;
  3111. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3112. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3113. if (!cfgtable) {
  3114. rc = -ENOMEM;
  3115. goto unmap_vaddr;
  3116. }
  3117. rc = write_driver_ver_to_cfgtable(cfgtable);
  3118. if (rc)
  3119. goto unmap_vaddr;
  3120. /* If reset via doorbell register is supported, use that.
  3121. * There are two such methods. Favor the newest method.
  3122. */
  3123. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3124. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3125. if (use_doorbell) {
  3126. use_doorbell = DOORBELL_CTLR_RESET2;
  3127. } else {
  3128. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3129. if (use_doorbell) {
  3130. dev_warn(&pdev->dev, "Soft reset not supported. "
  3131. "Firmware update is required.\n");
  3132. rc = -ENOTSUPP; /* try soft reset */
  3133. goto unmap_cfgtable;
  3134. }
  3135. }
  3136. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3137. if (rc)
  3138. goto unmap_cfgtable;
  3139. pci_restore_state(pdev);
  3140. rc = pci_enable_device(pdev);
  3141. if (rc) {
  3142. dev_warn(&pdev->dev, "failed to enable device.\n");
  3143. goto unmap_cfgtable;
  3144. }
  3145. pci_write_config_word(pdev, 4, command_register);
  3146. /* Some devices (notably the HP Smart Array 5i Controller)
  3147. need a little pause here */
  3148. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3149. /* Wait for board to become not ready, then ready. */
  3150. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3151. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3152. if (rc) {
  3153. dev_warn(&pdev->dev,
  3154. "failed waiting for board to reset."
  3155. " Will try soft reset.\n");
  3156. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3157. goto unmap_cfgtable;
  3158. }
  3159. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3160. if (rc) {
  3161. dev_warn(&pdev->dev,
  3162. "failed waiting for board to become ready "
  3163. "after hard reset\n");
  3164. goto unmap_cfgtable;
  3165. }
  3166. rc = controller_reset_failed(vaddr);
  3167. if (rc < 0)
  3168. goto unmap_cfgtable;
  3169. if (rc) {
  3170. dev_warn(&pdev->dev, "Unable to successfully reset "
  3171. "controller. Will try soft reset.\n");
  3172. rc = -ENOTSUPP;
  3173. } else {
  3174. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3175. }
  3176. unmap_cfgtable:
  3177. iounmap(cfgtable);
  3178. unmap_vaddr:
  3179. iounmap(vaddr);
  3180. return rc;
  3181. }
  3182. /*
  3183. * We cannot read the structure directly, for portability we must use
  3184. * the io functions.
  3185. * This is for debug only.
  3186. */
  3187. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3188. {
  3189. #ifdef HPSA_DEBUG
  3190. int i;
  3191. char temp_name[17];
  3192. dev_info(dev, "Controller Configuration information\n");
  3193. dev_info(dev, "------------------------------------\n");
  3194. for (i = 0; i < 4; i++)
  3195. temp_name[i] = readb(&(tb->Signature[i]));
  3196. temp_name[4] = '\0';
  3197. dev_info(dev, " Signature = %s\n", temp_name);
  3198. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3199. dev_info(dev, " Transport methods supported = 0x%x\n",
  3200. readl(&(tb->TransportSupport)));
  3201. dev_info(dev, " Transport methods active = 0x%x\n",
  3202. readl(&(tb->TransportActive)));
  3203. dev_info(dev, " Requested transport Method = 0x%x\n",
  3204. readl(&(tb->HostWrite.TransportRequest)));
  3205. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3206. readl(&(tb->HostWrite.CoalIntDelay)));
  3207. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3208. readl(&(tb->HostWrite.CoalIntCount)));
  3209. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3210. readl(&(tb->CmdsOutMax)));
  3211. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3212. for (i = 0; i < 16; i++)
  3213. temp_name[i] = readb(&(tb->ServerName[i]));
  3214. temp_name[16] = '\0';
  3215. dev_info(dev, " Server Name = %s\n", temp_name);
  3216. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3217. readl(&(tb->HeartBeat)));
  3218. #endif /* HPSA_DEBUG */
  3219. }
  3220. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3221. {
  3222. int i, offset, mem_type, bar_type;
  3223. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3224. return 0;
  3225. offset = 0;
  3226. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3227. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3228. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3229. offset += 4;
  3230. else {
  3231. mem_type = pci_resource_flags(pdev, i) &
  3232. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3233. switch (mem_type) {
  3234. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3235. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3236. offset += 4; /* 32 bit */
  3237. break;
  3238. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3239. offset += 8;
  3240. break;
  3241. default: /* reserved in PCI 2.2 */
  3242. dev_warn(&pdev->dev,
  3243. "base address is invalid\n");
  3244. return -1;
  3245. break;
  3246. }
  3247. }
  3248. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3249. return i + 1;
  3250. }
  3251. return -1;
  3252. }
  3253. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3254. * controllers that are capable. If not, we use IO-APIC mode.
  3255. */
  3256. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3257. {
  3258. #ifdef CONFIG_PCI_MSI
  3259. int err;
  3260. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3261. {0, 2}, {0, 3}
  3262. };
  3263. /* Some boards advertise MSI but don't really support it */
  3264. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3265. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3266. goto default_int_mode;
  3267. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3268. dev_info(&h->pdev->dev, "MSIX\n");
  3269. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3270. if (!err) {
  3271. h->intr[0] = hpsa_msix_entries[0].vector;
  3272. h->intr[1] = hpsa_msix_entries[1].vector;
  3273. h->intr[2] = hpsa_msix_entries[2].vector;
  3274. h->intr[3] = hpsa_msix_entries[3].vector;
  3275. h->msix_vector = 1;
  3276. return;
  3277. }
  3278. if (err > 0) {
  3279. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3280. "available\n", err);
  3281. goto default_int_mode;
  3282. } else {
  3283. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3284. err);
  3285. goto default_int_mode;
  3286. }
  3287. }
  3288. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3289. dev_info(&h->pdev->dev, "MSI\n");
  3290. if (!pci_enable_msi(h->pdev))
  3291. h->msi_vector = 1;
  3292. else
  3293. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3294. }
  3295. default_int_mode:
  3296. #endif /* CONFIG_PCI_MSI */
  3297. /* if we get here we're going to use the default interrupt mode */
  3298. h->intr[h->intr_mode] = h->pdev->irq;
  3299. }
  3300. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3301. {
  3302. int i;
  3303. u32 subsystem_vendor_id, subsystem_device_id;
  3304. subsystem_vendor_id = pdev->subsystem_vendor;
  3305. subsystem_device_id = pdev->subsystem_device;
  3306. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3307. subsystem_vendor_id;
  3308. for (i = 0; i < ARRAY_SIZE(products); i++)
  3309. if (*board_id == products[i].board_id)
  3310. return i;
  3311. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3312. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3313. !hpsa_allow_any) {
  3314. dev_warn(&pdev->dev, "unrecognized board ID: "
  3315. "0x%08x, ignoring.\n", *board_id);
  3316. return -ENODEV;
  3317. }
  3318. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3319. }
  3320. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3321. unsigned long *memory_bar)
  3322. {
  3323. int i;
  3324. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3325. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3326. /* addressing mode bits already removed */
  3327. *memory_bar = pci_resource_start(pdev, i);
  3328. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3329. *memory_bar);
  3330. return 0;
  3331. }
  3332. dev_warn(&pdev->dev, "no memory BAR found\n");
  3333. return -ENODEV;
  3334. }
  3335. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3336. void __iomem *vaddr, int wait_for_ready)
  3337. {
  3338. int i, iterations;
  3339. u32 scratchpad;
  3340. if (wait_for_ready)
  3341. iterations = HPSA_BOARD_READY_ITERATIONS;
  3342. else
  3343. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3344. for (i = 0; i < iterations; i++) {
  3345. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3346. if (wait_for_ready) {
  3347. if (scratchpad == HPSA_FIRMWARE_READY)
  3348. return 0;
  3349. } else {
  3350. if (scratchpad != HPSA_FIRMWARE_READY)
  3351. return 0;
  3352. }
  3353. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3354. }
  3355. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3356. return -ENODEV;
  3357. }
  3358. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3359. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3360. u64 *cfg_offset)
  3361. {
  3362. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3363. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3364. *cfg_base_addr &= (u32) 0x0000ffff;
  3365. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3366. if (*cfg_base_addr_index == -1) {
  3367. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3368. return -ENODEV;
  3369. }
  3370. return 0;
  3371. }
  3372. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3373. {
  3374. u64 cfg_offset;
  3375. u32 cfg_base_addr;
  3376. u64 cfg_base_addr_index;
  3377. u32 trans_offset;
  3378. int rc;
  3379. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3380. &cfg_base_addr_index, &cfg_offset);
  3381. if (rc)
  3382. return rc;
  3383. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3384. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3385. if (!h->cfgtable)
  3386. return -ENOMEM;
  3387. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3388. if (rc)
  3389. return rc;
  3390. /* Find performant mode table. */
  3391. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3392. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3393. cfg_base_addr_index)+cfg_offset+trans_offset,
  3394. sizeof(*h->transtable));
  3395. if (!h->transtable)
  3396. return -ENOMEM;
  3397. return 0;
  3398. }
  3399. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3400. {
  3401. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3402. /* Limit commands in memory limited kdump scenario. */
  3403. if (reset_devices && h->max_commands > 32)
  3404. h->max_commands = 32;
  3405. if (h->max_commands < 16) {
  3406. dev_warn(&h->pdev->dev, "Controller reports "
  3407. "max supported commands of %d, an obvious lie. "
  3408. "Using 16. Ensure that firmware is up to date.\n",
  3409. h->max_commands);
  3410. h->max_commands = 16;
  3411. }
  3412. }
  3413. /* Interrogate the hardware for some limits:
  3414. * max commands, max SG elements without chaining, and with chaining,
  3415. * SG chain block size, etc.
  3416. */
  3417. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3418. {
  3419. hpsa_get_max_perf_mode_cmds(h);
  3420. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3421. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3422. /*
  3423. * Limit in-command s/g elements to 32 save dma'able memory.
  3424. * Howvever spec says if 0, use 31
  3425. */
  3426. h->max_cmd_sg_entries = 31;
  3427. if (h->maxsgentries > 512) {
  3428. h->max_cmd_sg_entries = 32;
  3429. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3430. h->maxsgentries--; /* save one for chain pointer */
  3431. } else {
  3432. h->maxsgentries = 31; /* default to traditional values */
  3433. h->chainsize = 0;
  3434. }
  3435. }
  3436. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3437. {
  3438. if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
  3439. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3440. return false;
  3441. }
  3442. return true;
  3443. }
  3444. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3445. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3446. {
  3447. #ifdef CONFIG_X86
  3448. u32 prefetch;
  3449. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3450. prefetch |= 0x100;
  3451. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3452. #endif
  3453. }
  3454. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3455. * in a prefetch beyond physical memory.
  3456. */
  3457. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3458. {
  3459. u32 dma_prefetch;
  3460. if (h->board_id != 0x3225103C)
  3461. return;
  3462. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3463. dma_prefetch |= 0x8000;
  3464. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3465. }
  3466. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3467. {
  3468. int i;
  3469. u32 doorbell_value;
  3470. unsigned long flags;
  3471. /* under certain very rare conditions, this can take awhile.
  3472. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3473. * as we enter this code.)
  3474. */
  3475. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3476. spin_lock_irqsave(&h->lock, flags);
  3477. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3478. spin_unlock_irqrestore(&h->lock, flags);
  3479. if (!(doorbell_value & CFGTBL_ChangeReq))
  3480. break;
  3481. /* delay and try again */
  3482. usleep_range(10000, 20000);
  3483. }
  3484. }
  3485. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3486. {
  3487. u32 trans_support;
  3488. trans_support = readl(&(h->cfgtable->TransportSupport));
  3489. if (!(trans_support & SIMPLE_MODE))
  3490. return -ENOTSUPP;
  3491. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3492. /* Update the field, and then ring the doorbell */
  3493. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3494. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3495. hpsa_wait_for_mode_change_ack(h);
  3496. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3497. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3498. dev_warn(&h->pdev->dev,
  3499. "unable to get board into simple mode\n");
  3500. return -ENODEV;
  3501. }
  3502. h->transMethod = CFGTBL_Trans_Simple;
  3503. return 0;
  3504. }
  3505. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3506. {
  3507. int prod_index, err;
  3508. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3509. if (prod_index < 0)
  3510. return -ENODEV;
  3511. h->product_name = products[prod_index].product_name;
  3512. h->access = *(products[prod_index].access);
  3513. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3514. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3515. err = pci_enable_device(h->pdev);
  3516. if (err) {
  3517. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3518. return err;
  3519. }
  3520. /* Enable bus mastering (pci_disable_device may disable this) */
  3521. pci_set_master(h->pdev);
  3522. err = pci_request_regions(h->pdev, HPSA);
  3523. if (err) {
  3524. dev_err(&h->pdev->dev,
  3525. "cannot obtain PCI resources, aborting\n");
  3526. return err;
  3527. }
  3528. hpsa_interrupt_mode(h);
  3529. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3530. if (err)
  3531. goto err_out_free_res;
  3532. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3533. if (!h->vaddr) {
  3534. err = -ENOMEM;
  3535. goto err_out_free_res;
  3536. }
  3537. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3538. if (err)
  3539. goto err_out_free_res;
  3540. err = hpsa_find_cfgtables(h);
  3541. if (err)
  3542. goto err_out_free_res;
  3543. hpsa_find_board_params(h);
  3544. if (!hpsa_CISS_signature_present(h)) {
  3545. err = -ENODEV;
  3546. goto err_out_free_res;
  3547. }
  3548. hpsa_enable_scsi_prefetch(h);
  3549. hpsa_p600_dma_prefetch_quirk(h);
  3550. err = hpsa_enter_simple_mode(h);
  3551. if (err)
  3552. goto err_out_free_res;
  3553. return 0;
  3554. err_out_free_res:
  3555. if (h->transtable)
  3556. iounmap(h->transtable);
  3557. if (h->cfgtable)
  3558. iounmap(h->cfgtable);
  3559. if (h->vaddr)
  3560. iounmap(h->vaddr);
  3561. pci_disable_device(h->pdev);
  3562. pci_release_regions(h->pdev);
  3563. return err;
  3564. }
  3565. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3566. {
  3567. int rc;
  3568. #define HBA_INQUIRY_BYTE_COUNT 64
  3569. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3570. if (!h->hba_inquiry_data)
  3571. return;
  3572. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3573. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3574. if (rc != 0) {
  3575. kfree(h->hba_inquiry_data);
  3576. h->hba_inquiry_data = NULL;
  3577. }
  3578. }
  3579. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3580. {
  3581. int rc, i;
  3582. if (!reset_devices)
  3583. return 0;
  3584. /* Reset the controller with a PCI power-cycle or via doorbell */
  3585. rc = hpsa_kdump_hard_reset_controller(pdev);
  3586. /* -ENOTSUPP here means we cannot reset the controller
  3587. * but it's already (and still) up and running in
  3588. * "performant mode". Or, it might be 640x, which can't reset
  3589. * due to concerns about shared bbwc between 6402/6404 pair.
  3590. */
  3591. if (rc == -ENOTSUPP)
  3592. return rc; /* just try to do the kdump anyhow. */
  3593. if (rc)
  3594. return -ENODEV;
  3595. /* Now try to get the controller to respond to a no-op */
  3596. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3597. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3598. if (hpsa_noop(pdev) == 0)
  3599. break;
  3600. else
  3601. dev_warn(&pdev->dev, "no-op failed%s\n",
  3602. (i < 11 ? "; re-trying" : ""));
  3603. }
  3604. return 0;
  3605. }
  3606. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3607. {
  3608. h->cmd_pool_bits = kzalloc(
  3609. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3610. sizeof(unsigned long), GFP_KERNEL);
  3611. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3612. h->nr_cmds * sizeof(*h->cmd_pool),
  3613. &(h->cmd_pool_dhandle));
  3614. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3615. h->nr_cmds * sizeof(*h->errinfo_pool),
  3616. &(h->errinfo_pool_dhandle));
  3617. if ((h->cmd_pool_bits == NULL)
  3618. || (h->cmd_pool == NULL)
  3619. || (h->errinfo_pool == NULL)) {
  3620. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3621. return -ENOMEM;
  3622. }
  3623. return 0;
  3624. }
  3625. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3626. {
  3627. kfree(h->cmd_pool_bits);
  3628. if (h->cmd_pool)
  3629. pci_free_consistent(h->pdev,
  3630. h->nr_cmds * sizeof(struct CommandList),
  3631. h->cmd_pool, h->cmd_pool_dhandle);
  3632. if (h->errinfo_pool)
  3633. pci_free_consistent(h->pdev,
  3634. h->nr_cmds * sizeof(struct ErrorInfo),
  3635. h->errinfo_pool,
  3636. h->errinfo_pool_dhandle);
  3637. }
  3638. static int hpsa_request_irq(struct ctlr_info *h,
  3639. irqreturn_t (*msixhandler)(int, void *),
  3640. irqreturn_t (*intxhandler)(int, void *))
  3641. {
  3642. int rc;
  3643. if (h->msix_vector || h->msi_vector)
  3644. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3645. 0, h->devname, h);
  3646. else
  3647. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3648. IRQF_SHARED, h->devname, h);
  3649. if (rc) {
  3650. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3651. h->intr[h->intr_mode], h->devname);
  3652. return -ENODEV;
  3653. }
  3654. return 0;
  3655. }
  3656. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3657. {
  3658. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3659. HPSA_RESET_TYPE_CONTROLLER)) {
  3660. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3661. return -EIO;
  3662. }
  3663. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3664. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3665. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3666. return -1;
  3667. }
  3668. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3669. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3670. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3671. "after soft reset.\n");
  3672. return -1;
  3673. }
  3674. return 0;
  3675. }
  3676. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3677. {
  3678. free_irq(h->intr[h->intr_mode], h);
  3679. #ifdef CONFIG_PCI_MSI
  3680. if (h->msix_vector)
  3681. pci_disable_msix(h->pdev);
  3682. else if (h->msi_vector)
  3683. pci_disable_msi(h->pdev);
  3684. #endif /* CONFIG_PCI_MSI */
  3685. hpsa_free_sg_chain_blocks(h);
  3686. hpsa_free_cmd_pool(h);
  3687. kfree(h->blockFetchTable);
  3688. pci_free_consistent(h->pdev, h->reply_pool_size,
  3689. h->reply_pool, h->reply_pool_dhandle);
  3690. if (h->vaddr)
  3691. iounmap(h->vaddr);
  3692. if (h->transtable)
  3693. iounmap(h->transtable);
  3694. if (h->cfgtable)
  3695. iounmap(h->cfgtable);
  3696. pci_release_regions(h->pdev);
  3697. kfree(h);
  3698. }
  3699. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  3700. {
  3701. assert_spin_locked(&lockup_detector_lock);
  3702. if (!hpsa_lockup_detector)
  3703. return;
  3704. if (h->lockup_detected)
  3705. return; /* already stopped the lockup detector */
  3706. list_del(&h->lockup_list);
  3707. }
  3708. /* Called when controller lockup detected. */
  3709. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  3710. {
  3711. struct CommandList *c = NULL;
  3712. assert_spin_locked(&h->lock);
  3713. /* Mark all outstanding commands as failed and complete them. */
  3714. while (!list_empty(list)) {
  3715. c = list_entry(list->next, struct CommandList, list);
  3716. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  3717. finish_cmd(c);
  3718. }
  3719. }
  3720. static void controller_lockup_detected(struct ctlr_info *h)
  3721. {
  3722. unsigned long flags;
  3723. assert_spin_locked(&lockup_detector_lock);
  3724. remove_ctlr_from_lockup_detector_list(h);
  3725. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3726. spin_lock_irqsave(&h->lock, flags);
  3727. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3728. spin_unlock_irqrestore(&h->lock, flags);
  3729. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  3730. h->lockup_detected);
  3731. pci_disable_device(h->pdev);
  3732. spin_lock_irqsave(&h->lock, flags);
  3733. fail_all_cmds_on_list(h, &h->cmpQ);
  3734. fail_all_cmds_on_list(h, &h->reqQ);
  3735. spin_unlock_irqrestore(&h->lock, flags);
  3736. }
  3737. #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
  3738. #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
  3739. static void detect_controller_lockup(struct ctlr_info *h)
  3740. {
  3741. u64 now;
  3742. u32 heartbeat;
  3743. unsigned long flags;
  3744. assert_spin_locked(&lockup_detector_lock);
  3745. now = get_jiffies_64();
  3746. /* If we've received an interrupt recently, we're ok. */
  3747. if (time_after64(h->last_intr_timestamp +
  3748. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  3749. return;
  3750. /*
  3751. * If we've already checked the heartbeat recently, we're ok.
  3752. * This could happen if someone sends us a signal. We
  3753. * otherwise don't care about signals in this thread.
  3754. */
  3755. if (time_after64(h->last_heartbeat_timestamp +
  3756. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  3757. return;
  3758. /* If heartbeat has not changed since we last looked, we're not ok. */
  3759. spin_lock_irqsave(&h->lock, flags);
  3760. heartbeat = readl(&h->cfgtable->HeartBeat);
  3761. spin_unlock_irqrestore(&h->lock, flags);
  3762. if (h->last_heartbeat == heartbeat) {
  3763. controller_lockup_detected(h);
  3764. return;
  3765. }
  3766. /* We're ok. */
  3767. h->last_heartbeat = heartbeat;
  3768. h->last_heartbeat_timestamp = now;
  3769. }
  3770. static int detect_controller_lockup_thread(void *notused)
  3771. {
  3772. struct ctlr_info *h;
  3773. unsigned long flags;
  3774. while (1) {
  3775. struct list_head *this, *tmp;
  3776. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  3777. if (kthread_should_stop())
  3778. break;
  3779. spin_lock_irqsave(&lockup_detector_lock, flags);
  3780. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  3781. h = list_entry(this, struct ctlr_info, lockup_list);
  3782. detect_controller_lockup(h);
  3783. }
  3784. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3785. }
  3786. return 0;
  3787. }
  3788. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  3789. {
  3790. unsigned long flags;
  3791. spin_lock_irqsave(&lockup_detector_lock, flags);
  3792. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  3793. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3794. }
  3795. static void start_controller_lockup_detector(struct ctlr_info *h)
  3796. {
  3797. /* Start the lockup detector thread if not already started */
  3798. if (!hpsa_lockup_detector) {
  3799. spin_lock_init(&lockup_detector_lock);
  3800. hpsa_lockup_detector =
  3801. kthread_run(detect_controller_lockup_thread,
  3802. NULL, HPSA);
  3803. }
  3804. if (!hpsa_lockup_detector) {
  3805. dev_warn(&h->pdev->dev,
  3806. "Could not start lockup detector thread\n");
  3807. return;
  3808. }
  3809. add_ctlr_to_lockup_detector_list(h);
  3810. }
  3811. static void stop_controller_lockup_detector(struct ctlr_info *h)
  3812. {
  3813. unsigned long flags;
  3814. spin_lock_irqsave(&lockup_detector_lock, flags);
  3815. remove_ctlr_from_lockup_detector_list(h);
  3816. /* If the list of ctlr's to monitor is empty, stop the thread */
  3817. if (list_empty(&hpsa_ctlr_list)) {
  3818. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3819. kthread_stop(hpsa_lockup_detector);
  3820. spin_lock_irqsave(&lockup_detector_lock, flags);
  3821. hpsa_lockup_detector = NULL;
  3822. }
  3823. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  3824. }
  3825. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3826. const struct pci_device_id *ent)
  3827. {
  3828. int dac, rc;
  3829. struct ctlr_info *h;
  3830. int try_soft_reset = 0;
  3831. unsigned long flags;
  3832. if (number_of_controllers == 0)
  3833. printk(KERN_INFO DRIVER_NAME "\n");
  3834. rc = hpsa_init_reset_devices(pdev);
  3835. if (rc) {
  3836. if (rc != -ENOTSUPP)
  3837. return rc;
  3838. /* If the reset fails in a particular way (it has no way to do
  3839. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3840. * a soft reset once we get the controller configured up to the
  3841. * point that it can accept a command.
  3842. */
  3843. try_soft_reset = 1;
  3844. rc = 0;
  3845. }
  3846. reinit_after_soft_reset:
  3847. /* Command structures must be aligned on a 32-byte boundary because
  3848. * the 5 lower bits of the address are used by the hardware. and by
  3849. * the driver. See comments in hpsa.h for more info.
  3850. */
  3851. #define COMMANDLIST_ALIGNMENT 32
  3852. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3853. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3854. if (!h)
  3855. return -ENOMEM;
  3856. h->pdev = pdev;
  3857. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3858. INIT_LIST_HEAD(&h->cmpQ);
  3859. INIT_LIST_HEAD(&h->reqQ);
  3860. spin_lock_init(&h->lock);
  3861. spin_lock_init(&h->scan_lock);
  3862. rc = hpsa_pci_init(h);
  3863. if (rc != 0)
  3864. goto clean1;
  3865. sprintf(h->devname, HPSA "%d", number_of_controllers);
  3866. h->ctlr = number_of_controllers;
  3867. number_of_controllers++;
  3868. /* configure PCI DMA stuff */
  3869. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3870. if (rc == 0) {
  3871. dac = 1;
  3872. } else {
  3873. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3874. if (rc == 0) {
  3875. dac = 0;
  3876. } else {
  3877. dev_err(&pdev->dev, "no suitable DMA available\n");
  3878. goto clean1;
  3879. }
  3880. }
  3881. /* make sure the board interrupts are off */
  3882. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3883. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3884. goto clean2;
  3885. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3886. h->devname, pdev->device,
  3887. h->intr[h->intr_mode], dac ? "" : " not");
  3888. if (hpsa_allocate_cmd_pool(h))
  3889. goto clean4;
  3890. if (hpsa_allocate_sg_chain_blocks(h))
  3891. goto clean4;
  3892. init_waitqueue_head(&h->scan_wait_queue);
  3893. h->scan_finished = 1; /* no scan currently in progress */
  3894. pci_set_drvdata(pdev, h);
  3895. h->ndevices = 0;
  3896. h->scsi_host = NULL;
  3897. spin_lock_init(&h->devlock);
  3898. hpsa_put_ctlr_into_performant_mode(h);
  3899. /* At this point, the controller is ready to take commands.
  3900. * Now, if reset_devices and the hard reset didn't work, try
  3901. * the soft reset and see if that works.
  3902. */
  3903. if (try_soft_reset) {
  3904. /* This is kind of gross. We may or may not get a completion
  3905. * from the soft reset command, and if we do, then the value
  3906. * from the fifo may or may not be valid. So, we wait 10 secs
  3907. * after the reset throwing away any completions we get during
  3908. * that time. Unregister the interrupt handler and register
  3909. * fake ones to scoop up any residual completions.
  3910. */
  3911. spin_lock_irqsave(&h->lock, flags);
  3912. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3913. spin_unlock_irqrestore(&h->lock, flags);
  3914. free_irq(h->intr[h->intr_mode], h);
  3915. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3916. hpsa_intx_discard_completions);
  3917. if (rc) {
  3918. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3919. "soft reset.\n");
  3920. goto clean4;
  3921. }
  3922. rc = hpsa_kdump_soft_reset(h);
  3923. if (rc)
  3924. /* Neither hard nor soft reset worked, we're hosed. */
  3925. goto clean4;
  3926. dev_info(&h->pdev->dev, "Board READY.\n");
  3927. dev_info(&h->pdev->dev,
  3928. "Waiting for stale completions to drain.\n");
  3929. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3930. msleep(10000);
  3931. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3932. rc = controller_reset_failed(h->cfgtable);
  3933. if (rc)
  3934. dev_info(&h->pdev->dev,
  3935. "Soft reset appears to have failed.\n");
  3936. /* since the controller's reset, we have to go back and re-init
  3937. * everything. Easiest to just forget what we've done and do it
  3938. * all over again.
  3939. */
  3940. hpsa_undo_allocations_after_kdump_soft_reset(h);
  3941. try_soft_reset = 0;
  3942. if (rc)
  3943. /* don't go to clean4, we already unallocated */
  3944. return -ENODEV;
  3945. goto reinit_after_soft_reset;
  3946. }
  3947. /* Turn the interrupts on so we can service requests */
  3948. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3949. hpsa_hba_inquiry(h);
  3950. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3951. start_controller_lockup_detector(h);
  3952. return 1;
  3953. clean4:
  3954. hpsa_free_sg_chain_blocks(h);
  3955. hpsa_free_cmd_pool(h);
  3956. free_irq(h->intr[h->intr_mode], h);
  3957. clean2:
  3958. clean1:
  3959. kfree(h);
  3960. return rc;
  3961. }
  3962. static void hpsa_flush_cache(struct ctlr_info *h)
  3963. {
  3964. char *flush_buf;
  3965. struct CommandList *c;
  3966. flush_buf = kzalloc(4, GFP_KERNEL);
  3967. if (!flush_buf)
  3968. return;
  3969. c = cmd_special_alloc(h);
  3970. if (!c) {
  3971. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3972. goto out_of_memory;
  3973. }
  3974. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3975. RAID_CTLR_LUNID, TYPE_CMD);
  3976. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3977. if (c->err_info->CommandStatus != 0)
  3978. dev_warn(&h->pdev->dev,
  3979. "error flushing cache on controller\n");
  3980. cmd_special_free(h, c);
  3981. out_of_memory:
  3982. kfree(flush_buf);
  3983. }
  3984. static void hpsa_shutdown(struct pci_dev *pdev)
  3985. {
  3986. struct ctlr_info *h;
  3987. h = pci_get_drvdata(pdev);
  3988. /* Turn board interrupts off and send the flush cache command
  3989. * sendcmd will turn off interrupt, and send the flush...
  3990. * To write all data in the battery backed cache to disks
  3991. */
  3992. hpsa_flush_cache(h);
  3993. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3994. free_irq(h->intr[h->intr_mode], h);
  3995. #ifdef CONFIG_PCI_MSI
  3996. if (h->msix_vector)
  3997. pci_disable_msix(h->pdev);
  3998. else if (h->msi_vector)
  3999. pci_disable_msi(h->pdev);
  4000. #endif /* CONFIG_PCI_MSI */
  4001. }
  4002. static void __devexit hpsa_free_device_info(struct ctlr_info *h)
  4003. {
  4004. int i;
  4005. for (i = 0; i < h->ndevices; i++)
  4006. kfree(h->dev[i]);
  4007. }
  4008. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  4009. {
  4010. struct ctlr_info *h;
  4011. if (pci_get_drvdata(pdev) == NULL) {
  4012. dev_err(&pdev->dev, "unable to remove device\n");
  4013. return;
  4014. }
  4015. h = pci_get_drvdata(pdev);
  4016. stop_controller_lockup_detector(h);
  4017. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4018. hpsa_shutdown(pdev);
  4019. iounmap(h->vaddr);
  4020. iounmap(h->transtable);
  4021. iounmap(h->cfgtable);
  4022. hpsa_free_device_info(h);
  4023. hpsa_free_sg_chain_blocks(h);
  4024. pci_free_consistent(h->pdev,
  4025. h->nr_cmds * sizeof(struct CommandList),
  4026. h->cmd_pool, h->cmd_pool_dhandle);
  4027. pci_free_consistent(h->pdev,
  4028. h->nr_cmds * sizeof(struct ErrorInfo),
  4029. h->errinfo_pool, h->errinfo_pool_dhandle);
  4030. pci_free_consistent(h->pdev, h->reply_pool_size,
  4031. h->reply_pool, h->reply_pool_dhandle);
  4032. kfree(h->cmd_pool_bits);
  4033. kfree(h->blockFetchTable);
  4034. kfree(h->hba_inquiry_data);
  4035. pci_disable_device(pdev);
  4036. pci_release_regions(pdev);
  4037. pci_set_drvdata(pdev, NULL);
  4038. kfree(h);
  4039. }
  4040. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4041. __attribute__((unused)) pm_message_t state)
  4042. {
  4043. return -ENOSYS;
  4044. }
  4045. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4046. {
  4047. return -ENOSYS;
  4048. }
  4049. static struct pci_driver hpsa_pci_driver = {
  4050. .name = HPSA,
  4051. .probe = hpsa_init_one,
  4052. .remove = __devexit_p(hpsa_remove_one),
  4053. .id_table = hpsa_pci_device_id, /* id_table */
  4054. .shutdown = hpsa_shutdown,
  4055. .suspend = hpsa_suspend,
  4056. .resume = hpsa_resume,
  4057. };
  4058. /* Fill in bucket_map[], given nsgs (the max number of
  4059. * scatter gather elements supported) and bucket[],
  4060. * which is an array of 8 integers. The bucket[] array
  4061. * contains 8 different DMA transfer sizes (in 16
  4062. * byte increments) which the controller uses to fetch
  4063. * commands. This function fills in bucket_map[], which
  4064. * maps a given number of scatter gather elements to one of
  4065. * the 8 DMA transfer sizes. The point of it is to allow the
  4066. * controller to only do as much DMA as needed to fetch the
  4067. * command, with the DMA transfer size encoded in the lower
  4068. * bits of the command address.
  4069. */
  4070. static void calc_bucket_map(int bucket[], int num_buckets,
  4071. int nsgs, int *bucket_map)
  4072. {
  4073. int i, j, b, size;
  4074. /* even a command with 0 SGs requires 4 blocks */
  4075. #define MINIMUM_TRANSFER_BLOCKS 4
  4076. #define NUM_BUCKETS 8
  4077. /* Note, bucket_map must have nsgs+1 entries. */
  4078. for (i = 0; i <= nsgs; i++) {
  4079. /* Compute size of a command with i SG entries */
  4080. size = i + MINIMUM_TRANSFER_BLOCKS;
  4081. b = num_buckets; /* Assume the biggest bucket */
  4082. /* Find the bucket that is just big enough */
  4083. for (j = 0; j < 8; j++) {
  4084. if (bucket[j] >= size) {
  4085. b = j;
  4086. break;
  4087. }
  4088. }
  4089. /* for a command with i SG entries, use bucket b. */
  4090. bucket_map[i] = b;
  4091. }
  4092. }
  4093. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  4094. u32 use_short_tags)
  4095. {
  4096. int i;
  4097. unsigned long register_value;
  4098. /* This is a bit complicated. There are 8 registers on
  4099. * the controller which we write to to tell it 8 different
  4100. * sizes of commands which there may be. It's a way of
  4101. * reducing the DMA done to fetch each command. Encoded into
  4102. * each command's tag are 3 bits which communicate to the controller
  4103. * which of the eight sizes that command fits within. The size of
  4104. * each command depends on how many scatter gather entries there are.
  4105. * Each SG entry requires 16 bytes. The eight registers are programmed
  4106. * with the number of 16-byte blocks a command of that size requires.
  4107. * The smallest command possible requires 5 such 16 byte blocks.
  4108. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4109. * blocks. Note, this only extends to the SG entries contained
  4110. * within the command block, and does not extend to chained blocks
  4111. * of SG elements. bft[] contains the eight values we write to
  4112. * the registers. They are not evenly distributed, but have more
  4113. * sizes for small commands, and fewer sizes for larger commands.
  4114. */
  4115. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4116. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4117. /* 5 = 1 s/g entry or 4k
  4118. * 6 = 2 s/g entry or 8k
  4119. * 8 = 4 s/g entry or 16k
  4120. * 10 = 6 s/g entry or 24k
  4121. */
  4122. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  4123. /* Controller spec: zero out this buffer. */
  4124. memset(h->reply_pool, 0, h->reply_pool_size);
  4125. h->reply_pool_head = h->reply_pool;
  4126. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4127. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4128. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4129. for (i = 0; i < 8; i++)
  4130. writel(bft[i], &h->transtable->BlockFetch[i]);
  4131. /* size of controller ring buffer */
  4132. writel(h->max_commands, &h->transtable->RepQSize);
  4133. writel(1, &h->transtable->RepQCount);
  4134. writel(0, &h->transtable->RepQCtrAddrLow32);
  4135. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4136. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  4137. writel(0, &h->transtable->RepQAddr0High32);
  4138. writel(CFGTBL_Trans_Performant | use_short_tags,
  4139. &(h->cfgtable->HostWrite.TransportRequest));
  4140. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4141. hpsa_wait_for_mode_change_ack(h);
  4142. register_value = readl(&(h->cfgtable->TransportActive));
  4143. if (!(register_value & CFGTBL_Trans_Performant)) {
  4144. dev_warn(&h->pdev->dev, "unable to get board into"
  4145. " performant mode\n");
  4146. return;
  4147. }
  4148. /* Change the access methods to the performant access methods */
  4149. h->access = SA5_performant_access;
  4150. h->transMethod = CFGTBL_Trans_Performant;
  4151. }
  4152. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4153. {
  4154. u32 trans_support;
  4155. if (hpsa_simple_mode)
  4156. return;
  4157. trans_support = readl(&(h->cfgtable->TransportSupport));
  4158. if (!(trans_support & PERFORMANT_MODE))
  4159. return;
  4160. hpsa_get_max_perf_mode_cmds(h);
  4161. /* Performant mode ring buffer and supporting data structures */
  4162. h->reply_pool_size = h->max_commands * sizeof(u64);
  4163. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4164. &(h->reply_pool_dhandle));
  4165. /* Need a block fetch table for performant mode */
  4166. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4167. sizeof(u32)), GFP_KERNEL);
  4168. if ((h->reply_pool == NULL)
  4169. || (h->blockFetchTable == NULL))
  4170. goto clean_up;
  4171. hpsa_enter_performant_mode(h,
  4172. trans_support & CFGTBL_Trans_use_short_tags);
  4173. return;
  4174. clean_up:
  4175. if (h->reply_pool)
  4176. pci_free_consistent(h->pdev, h->reply_pool_size,
  4177. h->reply_pool, h->reply_pool_dhandle);
  4178. kfree(h->blockFetchTable);
  4179. }
  4180. /*
  4181. * This is it. Register the PCI driver information for the cards we control
  4182. * the OS will call our registered routines when it finds one of our cards.
  4183. */
  4184. static int __init hpsa_init(void)
  4185. {
  4186. return pci_register_driver(&hpsa_pci_driver);
  4187. }
  4188. static void __exit hpsa_cleanup(void)
  4189. {
  4190. pci_unregister_driver(&hpsa_pci_driver);
  4191. }
  4192. module_init(hpsa_init);
  4193. module_exit(hpsa_cleanup);