atmel_lcdfb.c 39 KB

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  1. /*
  2. * Driver for AT91/AT32 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <linux/gfp.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_data/atmel.h>
  22. #include <linux/of.h>
  23. #include <linux/of_device.h>
  24. #include <linux/of_gpio.h>
  25. #include <video/of_display_timing.h>
  26. #include <video/videomode.h>
  27. #include <mach/cpu.h>
  28. #include <asm/gpio.h>
  29. #include <video/atmel_lcdc.h>
  30. struct atmel_lcdfb_config {
  31. bool have_alt_pixclock;
  32. bool have_hozval;
  33. bool have_intensity_bit;
  34. };
  35. /* LCD Controller info data structure, stored in device platform_data */
  36. struct atmel_lcdfb_info {
  37. spinlock_t lock;
  38. struct fb_info *info;
  39. void __iomem *mmio;
  40. int irq_base;
  41. struct work_struct task;
  42. unsigned int smem_len;
  43. struct platform_device *pdev;
  44. struct clk *bus_clk;
  45. struct clk *lcdc_clk;
  46. struct backlight_device *backlight;
  47. u8 bl_power;
  48. u8 saved_lcdcon;
  49. u32 pseudo_palette[16];
  50. bool have_intensity_bit;
  51. struct atmel_lcdfb_pdata pdata;
  52. struct atmel_lcdfb_config *config;
  53. };
  54. struct atmel_lcdfb_power_ctrl_gpio {
  55. int gpio;
  56. int active_low;
  57. struct list_head list;
  58. };
  59. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  60. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  61. /* configurable parameters */
  62. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  63. #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
  64. #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
  65. static struct atmel_lcdfb_config at91sam9261_config = {
  66. .have_hozval = true,
  67. .have_intensity_bit = true,
  68. };
  69. static struct atmel_lcdfb_config at91sam9263_config = {
  70. .have_intensity_bit = true,
  71. };
  72. static struct atmel_lcdfb_config at91sam9g10_config = {
  73. .have_hozval = true,
  74. };
  75. static struct atmel_lcdfb_config at91sam9g45_config = {
  76. .have_alt_pixclock = true,
  77. };
  78. static struct atmel_lcdfb_config at91sam9g45es_config = {
  79. };
  80. static struct atmel_lcdfb_config at91sam9rl_config = {
  81. .have_intensity_bit = true,
  82. };
  83. static struct atmel_lcdfb_config at32ap_config = {
  84. .have_hozval = true,
  85. };
  86. static const struct platform_device_id atmel_lcdfb_devtypes[] = {
  87. {
  88. .name = "at91sam9261-lcdfb",
  89. .driver_data = (unsigned long)&at91sam9261_config,
  90. }, {
  91. .name = "at91sam9263-lcdfb",
  92. .driver_data = (unsigned long)&at91sam9263_config,
  93. }, {
  94. .name = "at91sam9g10-lcdfb",
  95. .driver_data = (unsigned long)&at91sam9g10_config,
  96. }, {
  97. .name = "at91sam9g45-lcdfb",
  98. .driver_data = (unsigned long)&at91sam9g45_config,
  99. }, {
  100. .name = "at91sam9g45es-lcdfb",
  101. .driver_data = (unsigned long)&at91sam9g45es_config,
  102. }, {
  103. .name = "at91sam9rl-lcdfb",
  104. .driver_data = (unsigned long)&at91sam9rl_config,
  105. }, {
  106. .name = "at32ap-lcdfb",
  107. .driver_data = (unsigned long)&at32ap_config,
  108. }, {
  109. /* terminator */
  110. }
  111. };
  112. MODULE_DEVICE_TABLE(platform, atmel_lcdfb_devtypes);
  113. static struct atmel_lcdfb_config *
  114. atmel_lcdfb_get_config(struct platform_device *pdev)
  115. {
  116. unsigned long data;
  117. data = platform_get_device_id(pdev)->driver_data;
  118. return (struct atmel_lcdfb_config *)data;
  119. }
  120. #if defined(CONFIG_ARCH_AT91)
  121. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  122. | FBINFO_PARTIAL_PAN_OK \
  123. | FBINFO_HWACCEL_YPAN)
  124. static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  125. struct fb_var_screeninfo *var,
  126. struct fb_info *info)
  127. {
  128. }
  129. #elif defined(CONFIG_AVR32)
  130. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  131. | FBINFO_PARTIAL_PAN_OK \
  132. | FBINFO_HWACCEL_XPAN \
  133. | FBINFO_HWACCEL_YPAN)
  134. static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  135. struct fb_var_screeninfo *var,
  136. struct fb_info *info)
  137. {
  138. u32 dma2dcfg;
  139. u32 pixeloff;
  140. pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
  141. dma2dcfg = (info->var.xres_virtual - info->var.xres)
  142. * info->var.bits_per_pixel / 8;
  143. dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  144. lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  145. /* Update configuration */
  146. lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  147. lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  148. | ATMEL_LCDC_DMAUPDT);
  149. }
  150. #endif
  151. static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  152. | ATMEL_LCDC_POL_POSITIVE
  153. | ATMEL_LCDC_ENA_PWMENABLE;
  154. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  155. /* some bl->props field just changed */
  156. static int atmel_bl_update_status(struct backlight_device *bl)
  157. {
  158. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  159. int power = sinfo->bl_power;
  160. int brightness = bl->props.brightness;
  161. /* REVISIT there may be a meaningful difference between
  162. * fb_blank and power ... there seem to be some cases
  163. * this doesn't handle correctly.
  164. */
  165. if (bl->props.fb_blank != sinfo->bl_power)
  166. power = bl->props.fb_blank;
  167. else if (bl->props.power != sinfo->bl_power)
  168. power = bl->props.power;
  169. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  170. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  171. else if (power != FB_BLANK_UNBLANK)
  172. brightness = 0;
  173. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  174. if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
  175. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  176. brightness ? contrast_ctr : 0);
  177. else
  178. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  179. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  180. return 0;
  181. }
  182. static int atmel_bl_get_brightness(struct backlight_device *bl)
  183. {
  184. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  185. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  186. }
  187. static const struct backlight_ops atmel_lcdc_bl_ops = {
  188. .update_status = atmel_bl_update_status,
  189. .get_brightness = atmel_bl_get_brightness,
  190. };
  191. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  192. {
  193. struct backlight_properties props;
  194. struct backlight_device *bl;
  195. sinfo->bl_power = FB_BLANK_UNBLANK;
  196. if (sinfo->backlight)
  197. return;
  198. memset(&props, 0, sizeof(struct backlight_properties));
  199. props.type = BACKLIGHT_RAW;
  200. props.max_brightness = 0xff;
  201. bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
  202. &atmel_lcdc_bl_ops, &props);
  203. if (IS_ERR(bl)) {
  204. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  205. PTR_ERR(bl));
  206. return;
  207. }
  208. sinfo->backlight = bl;
  209. bl->props.power = FB_BLANK_UNBLANK;
  210. bl->props.fb_blank = FB_BLANK_UNBLANK;
  211. bl->props.brightness = atmel_bl_get_brightness(bl);
  212. }
  213. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  214. {
  215. if (!sinfo->backlight)
  216. return;
  217. if (sinfo->backlight->ops) {
  218. sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
  219. sinfo->backlight->ops->update_status(sinfo->backlight);
  220. }
  221. backlight_device_unregister(sinfo->backlight);
  222. }
  223. #else
  224. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  225. {
  226. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  227. }
  228. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  229. {
  230. }
  231. #endif
  232. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  233. {
  234. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  235. /* contrast pwm can be 'inverted' */
  236. if (pdata->lcdcon_pol_negative)
  237. contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
  238. /* have some default contrast/backlight settings */
  239. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  240. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  241. if (pdata->lcdcon_is_backlight)
  242. init_backlight(sinfo);
  243. }
  244. static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
  245. {
  246. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  247. if (pdata->atmel_lcdfb_power_control)
  248. pdata->atmel_lcdfb_power_control(pdata, on);
  249. }
  250. static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
  251. .type = FB_TYPE_PACKED_PIXELS,
  252. .visual = FB_VISUAL_TRUECOLOR,
  253. .xpanstep = 0,
  254. .ypanstep = 1,
  255. .ywrapstep = 0,
  256. .accel = FB_ACCEL_NONE,
  257. };
  258. static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
  259. unsigned long xres)
  260. {
  261. unsigned long lcdcon2;
  262. unsigned long value;
  263. if (!sinfo->config->have_hozval)
  264. return xres;
  265. lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
  266. value = xres;
  267. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  268. /* STN display */
  269. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  270. value *= 3;
  271. }
  272. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  273. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  274. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  275. value = DIV_ROUND_UP(value, 4);
  276. else
  277. value = DIV_ROUND_UP(value, 8);
  278. }
  279. return value;
  280. }
  281. static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
  282. {
  283. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  284. /* Turn off the LCD controller and the DMA controller */
  285. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  286. pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  287. /* Wait for the LCDC core to become idle */
  288. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  289. msleep(10);
  290. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  291. }
  292. static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
  293. {
  294. atmel_lcdfb_stop_nowait(sinfo);
  295. /* Wait for DMA engine to become idle... */
  296. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  297. msleep(10);
  298. }
  299. static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
  300. {
  301. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  302. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
  303. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  304. (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
  305. | ATMEL_LCDC_PWR);
  306. }
  307. static void atmel_lcdfb_update_dma(struct fb_info *info,
  308. struct fb_var_screeninfo *var)
  309. {
  310. struct atmel_lcdfb_info *sinfo = info->par;
  311. struct fb_fix_screeninfo *fix = &info->fix;
  312. unsigned long dma_addr;
  313. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  314. + var->xoffset * info->var.bits_per_pixel / 8);
  315. dma_addr &= ~3UL;
  316. /* Set framebuffer DMA base address and pixel offset */
  317. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  318. atmel_lcdfb_update_dma2d(sinfo, var, info);
  319. }
  320. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  321. {
  322. struct fb_info *info = sinfo->info;
  323. dma_free_writecombine(info->device, info->fix.smem_len,
  324. info->screen_base, info->fix.smem_start);
  325. }
  326. /**
  327. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  328. * @sinfo: the frame buffer to allocate memory for
  329. *
  330. * This function is called only from the atmel_lcdfb_probe()
  331. * so no locking by fb_info->mm_lock around smem_len setting is needed.
  332. */
  333. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  334. {
  335. struct fb_info *info = sinfo->info;
  336. struct fb_var_screeninfo *var = &info->var;
  337. unsigned int smem_len;
  338. smem_len = (var->xres_virtual * var->yres_virtual
  339. * ((var->bits_per_pixel + 7) / 8));
  340. info->fix.smem_len = max(smem_len, sinfo->smem_len);
  341. info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
  342. (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
  343. if (!info->screen_base) {
  344. return -ENOMEM;
  345. }
  346. memset(info->screen_base, 0, info->fix.smem_len);
  347. return 0;
  348. }
  349. static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
  350. struct fb_info *info)
  351. {
  352. struct fb_videomode varfbmode;
  353. const struct fb_videomode *fbmode = NULL;
  354. fb_var_to_videomode(&varfbmode, var);
  355. fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
  356. if (fbmode)
  357. fb_videomode_to_var(var, fbmode);
  358. return fbmode;
  359. }
  360. /**
  361. * atmel_lcdfb_check_var - Validates a var passed in.
  362. * @var: frame buffer variable screen structure
  363. * @info: frame buffer structure that represents a single frame buffer
  364. *
  365. * Checks to see if the hardware supports the state requested by
  366. * var passed in. This function does not alter the hardware
  367. * state!!! This means the data stored in struct fb_info and
  368. * struct atmel_lcdfb_info do not change. This includes the var
  369. * inside of struct fb_info. Do NOT change these. This function
  370. * can be called on its own if we intent to only test a mode and
  371. * not actually set it. The stuff in modedb.c is a example of
  372. * this. If the var passed in is slightly off by what the
  373. * hardware can support then we alter the var PASSED in to what
  374. * we can do. If the hardware doesn't support mode change a
  375. * -EINVAL will be returned by the upper layers. You don't need
  376. * to implement this function then. If you hardware doesn't
  377. * support changing the resolution then this function is not
  378. * needed. In this case the driver would just provide a var that
  379. * represents the static state the screen is in.
  380. *
  381. * Returns negative errno on error, or zero on success.
  382. */
  383. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  384. struct fb_info *info)
  385. {
  386. struct device *dev = info->device;
  387. struct atmel_lcdfb_info *sinfo = info->par;
  388. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  389. unsigned long clk_value_khz;
  390. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  391. dev_dbg(dev, "%s:\n", __func__);
  392. if (!(var->pixclock && var->bits_per_pixel)) {
  393. /* choose a suitable mode if possible */
  394. if (!atmel_lcdfb_choose_mode(var, info)) {
  395. dev_err(dev, "needed value not specified\n");
  396. return -EINVAL;
  397. }
  398. }
  399. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  400. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  401. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  402. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  403. if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
  404. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  405. return -EINVAL;
  406. }
  407. /* Do not allow to have real resoulution larger than virtual */
  408. if (var->xres > var->xres_virtual)
  409. var->xres_virtual = var->xres;
  410. if (var->yres > var->yres_virtual)
  411. var->yres_virtual = var->yres;
  412. /* Force same alignment for each line */
  413. var->xres = (var->xres + 3) & ~3UL;
  414. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  415. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  416. var->transp.msb_right = 0;
  417. var->transp.offset = var->transp.length = 0;
  418. var->xoffset = var->yoffset = 0;
  419. if (info->fix.smem_len) {
  420. unsigned int smem_len = (var->xres_virtual * var->yres_virtual
  421. * ((var->bits_per_pixel + 7) / 8));
  422. if (smem_len > info->fix.smem_len) {
  423. dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
  424. info->fix.smem_len, smem_len);
  425. return -EINVAL;
  426. }
  427. }
  428. /* Saturate vertical and horizontal timings at maximum values */
  429. var->vsync_len = min_t(u32, var->vsync_len,
  430. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  431. var->upper_margin = min_t(u32, var->upper_margin,
  432. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  433. var->lower_margin = min_t(u32, var->lower_margin,
  434. ATMEL_LCDC_VFP);
  435. var->right_margin = min_t(u32, var->right_margin,
  436. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  437. var->hsync_len = min_t(u32, var->hsync_len,
  438. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  439. var->left_margin = min_t(u32, var->left_margin,
  440. ATMEL_LCDC_HBP + 1);
  441. /* Some parameters can't be zero */
  442. var->vsync_len = max_t(u32, var->vsync_len, 1);
  443. var->right_margin = max_t(u32, var->right_margin, 1);
  444. var->hsync_len = max_t(u32, var->hsync_len, 1);
  445. var->left_margin = max_t(u32, var->left_margin, 1);
  446. switch (var->bits_per_pixel) {
  447. case 1:
  448. case 2:
  449. case 4:
  450. case 8:
  451. var->red.offset = var->green.offset = var->blue.offset = 0;
  452. var->red.length = var->green.length = var->blue.length
  453. = var->bits_per_pixel;
  454. break;
  455. case 16:
  456. /* Older SOCs use IBGR:555 rather than BGR:565. */
  457. if (sinfo->config->have_intensity_bit)
  458. var->green.length = 5;
  459. else
  460. var->green.length = 6;
  461. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  462. /* RGB:5X5 mode */
  463. var->red.offset = var->green.length + 5;
  464. var->blue.offset = 0;
  465. } else {
  466. /* BGR:5X5 mode */
  467. var->red.offset = 0;
  468. var->blue.offset = var->green.length + 5;
  469. }
  470. var->green.offset = 5;
  471. var->red.length = var->blue.length = 5;
  472. break;
  473. case 32:
  474. var->transp.offset = 24;
  475. var->transp.length = 8;
  476. /* fall through */
  477. case 24:
  478. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  479. /* RGB:888 mode */
  480. var->red.offset = 16;
  481. var->blue.offset = 0;
  482. } else {
  483. /* BGR:888 mode */
  484. var->red.offset = 0;
  485. var->blue.offset = 16;
  486. }
  487. var->green.offset = 8;
  488. var->red.length = var->green.length = var->blue.length = 8;
  489. break;
  490. default:
  491. dev_err(dev, "color depth %d not supported\n",
  492. var->bits_per_pixel);
  493. return -EINVAL;
  494. }
  495. return 0;
  496. }
  497. /*
  498. * LCD reset sequence
  499. */
  500. static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
  501. {
  502. might_sleep();
  503. atmel_lcdfb_stop(sinfo);
  504. atmel_lcdfb_start(sinfo);
  505. }
  506. /**
  507. * atmel_lcdfb_set_par - Alters the hardware state.
  508. * @info: frame buffer structure that represents a single frame buffer
  509. *
  510. * Using the fb_var_screeninfo in fb_info we set the resolution
  511. * of the this particular framebuffer. This function alters the
  512. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  513. * not alter var in fb_info since we are using that data. This
  514. * means we depend on the data in var inside fb_info to be
  515. * supported by the hardware. atmel_lcdfb_check_var is always called
  516. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  517. * change the resolution you don't need this function.
  518. *
  519. */
  520. static int atmel_lcdfb_set_par(struct fb_info *info)
  521. {
  522. struct atmel_lcdfb_info *sinfo = info->par;
  523. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  524. unsigned long hozval_linesz;
  525. unsigned long value;
  526. unsigned long clk_value_khz;
  527. unsigned long bits_per_line;
  528. unsigned long pix_factor = 2;
  529. might_sleep();
  530. dev_dbg(info->device, "%s:\n", __func__);
  531. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  532. info->var.xres, info->var.yres,
  533. info->var.xres_virtual, info->var.yres_virtual);
  534. atmel_lcdfb_stop_nowait(sinfo);
  535. if (info->var.bits_per_pixel == 1)
  536. info->fix.visual = FB_VISUAL_MONO01;
  537. else if (info->var.bits_per_pixel <= 8)
  538. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  539. else
  540. info->fix.visual = FB_VISUAL_TRUECOLOR;
  541. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  542. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  543. /* Re-initialize the DMA engine... */
  544. dev_dbg(info->device, " * update DMA engine\n");
  545. atmel_lcdfb_update_dma(info, &info->var);
  546. /* ...set frame size and burst length = 8 words (?) */
  547. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  548. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  549. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  550. /* Now, the LCDC core... */
  551. /* Set pixel clock */
  552. if (sinfo->config->have_alt_pixclock)
  553. pix_factor = 1;
  554. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  555. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  556. if (value < pix_factor) {
  557. dev_notice(info->device, "Bypassing pixel clock divider\n");
  558. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  559. } else {
  560. value = (value / pix_factor) - 1;
  561. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
  562. value);
  563. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
  564. value << ATMEL_LCDC_CLKVAL_OFFSET);
  565. info->var.pixclock =
  566. KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
  567. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  568. PICOS2KHZ(info->var.pixclock));
  569. }
  570. /* Initialize control register 2 */
  571. value = pdata->default_lcdcon2;
  572. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  573. value |= ATMEL_LCDC_INVLINE_INVERTED;
  574. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  575. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  576. switch (info->var.bits_per_pixel) {
  577. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  578. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  579. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  580. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  581. case 15: /* fall through */
  582. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  583. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  584. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  585. default: BUG(); break;
  586. }
  587. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  588. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  589. /* Vertical timing */
  590. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  591. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  592. value |= info->var.lower_margin;
  593. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  594. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  595. /* Horizontal timing */
  596. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  597. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  598. value |= (info->var.left_margin - 1);
  599. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  600. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  601. /* Horizontal value (aka line size) */
  602. hozval_linesz = compute_hozval(sinfo, info->var.xres);
  603. /* Display size */
  604. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  605. value |= info->var.yres - 1;
  606. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  607. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  608. /* FIFO Threshold: Use formula from data sheet */
  609. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  610. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  611. /* Toggle LCD_MODE every frame */
  612. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  613. /* Disable all interrupts */
  614. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  615. /* Enable FIFO & DMA errors */
  616. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  617. /* ...wait for DMA engine to become idle... */
  618. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  619. msleep(10);
  620. atmel_lcdfb_start(sinfo);
  621. dev_dbg(info->device, " * DONE\n");
  622. return 0;
  623. }
  624. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  625. {
  626. chan &= 0xffff;
  627. chan >>= 16 - bf->length;
  628. return chan << bf->offset;
  629. }
  630. /**
  631. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  632. * @regno: Which register in the CLUT we are programming
  633. * @red: The red value which can be up to 16 bits wide
  634. * @green: The green value which can be up to 16 bits wide
  635. * @blue: The blue value which can be up to 16 bits wide.
  636. * @transp: If supported the alpha value which can be up to 16 bits wide.
  637. * @info: frame buffer info structure
  638. *
  639. * Set a single color register. The values supplied have a 16 bit
  640. * magnitude which needs to be scaled in this function for the hardware.
  641. * Things to take into consideration are how many color registers, if
  642. * any, are supported with the current color visual. With truecolor mode
  643. * no color palettes are supported. Here a pseudo palette is created
  644. * which we store the value in pseudo_palette in struct fb_info. For
  645. * pseudocolor mode we have a limited color palette. To deal with this
  646. * we can program what color is displayed for a particular pixel value.
  647. * DirectColor is similar in that we can program each color field. If
  648. * we have a static colormap we don't need to implement this function.
  649. *
  650. * Returns negative errno on error, or zero on success. In an
  651. * ideal world, this would have been the case, but as it turns
  652. * out, the other drivers return 1 on failure, so that's what
  653. * we're going to do.
  654. */
  655. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  656. unsigned int green, unsigned int blue,
  657. unsigned int transp, struct fb_info *info)
  658. {
  659. struct atmel_lcdfb_info *sinfo = info->par;
  660. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  661. unsigned int val;
  662. u32 *pal;
  663. int ret = 1;
  664. if (info->var.grayscale)
  665. red = green = blue = (19595 * red + 38470 * green
  666. + 7471 * blue) >> 16;
  667. switch (info->fix.visual) {
  668. case FB_VISUAL_TRUECOLOR:
  669. if (regno < 16) {
  670. pal = info->pseudo_palette;
  671. val = chan_to_field(red, &info->var.red);
  672. val |= chan_to_field(green, &info->var.green);
  673. val |= chan_to_field(blue, &info->var.blue);
  674. pal[regno] = val;
  675. ret = 0;
  676. }
  677. break;
  678. case FB_VISUAL_PSEUDOCOLOR:
  679. if (regno < 256) {
  680. if (sinfo->config->have_intensity_bit) {
  681. /* old style I+BGR:555 */
  682. val = ((red >> 11) & 0x001f);
  683. val |= ((green >> 6) & 0x03e0);
  684. val |= ((blue >> 1) & 0x7c00);
  685. /*
  686. * TODO: intensity bit. Maybe something like
  687. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  688. */
  689. } else {
  690. /* new style BGR:565 / RGB:565 */
  691. if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  692. val = ((blue >> 11) & 0x001f);
  693. val |= ((red >> 0) & 0xf800);
  694. } else {
  695. val = ((red >> 11) & 0x001f);
  696. val |= ((blue >> 0) & 0xf800);
  697. }
  698. val |= ((green >> 5) & 0x07e0);
  699. }
  700. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  701. ret = 0;
  702. }
  703. break;
  704. case FB_VISUAL_MONO01:
  705. if (regno < 2) {
  706. val = (regno == 0) ? 0x00 : 0x1F;
  707. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  708. ret = 0;
  709. }
  710. break;
  711. }
  712. return ret;
  713. }
  714. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  715. struct fb_info *info)
  716. {
  717. dev_dbg(info->device, "%s\n", __func__);
  718. atmel_lcdfb_update_dma(info, var);
  719. return 0;
  720. }
  721. static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
  722. {
  723. struct atmel_lcdfb_info *sinfo = info->par;
  724. switch (blank_mode) {
  725. case FB_BLANK_UNBLANK:
  726. case FB_BLANK_NORMAL:
  727. atmel_lcdfb_start(sinfo);
  728. break;
  729. case FB_BLANK_VSYNC_SUSPEND:
  730. case FB_BLANK_HSYNC_SUSPEND:
  731. break;
  732. case FB_BLANK_POWERDOWN:
  733. atmel_lcdfb_stop(sinfo);
  734. break;
  735. default:
  736. return -EINVAL;
  737. }
  738. /* let fbcon do a soft blank for us */
  739. return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
  740. }
  741. static struct fb_ops atmel_lcdfb_ops = {
  742. .owner = THIS_MODULE,
  743. .fb_check_var = atmel_lcdfb_check_var,
  744. .fb_set_par = atmel_lcdfb_set_par,
  745. .fb_setcolreg = atmel_lcdfb_setcolreg,
  746. .fb_blank = atmel_lcdfb_blank,
  747. .fb_pan_display = atmel_lcdfb_pan_display,
  748. .fb_fillrect = cfb_fillrect,
  749. .fb_copyarea = cfb_copyarea,
  750. .fb_imageblit = cfb_imageblit,
  751. };
  752. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  753. {
  754. struct fb_info *info = dev_id;
  755. struct atmel_lcdfb_info *sinfo = info->par;
  756. u32 status;
  757. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  758. if (status & ATMEL_LCDC_UFLWI) {
  759. dev_warn(info->device, "FIFO underflow %#x\n", status);
  760. /* reset DMA and FIFO to avoid screen shifting */
  761. schedule_work(&sinfo->task);
  762. }
  763. lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
  764. return IRQ_HANDLED;
  765. }
  766. /*
  767. * LCD controller task (to reset the LCD)
  768. */
  769. static void atmel_lcdfb_task(struct work_struct *work)
  770. {
  771. struct atmel_lcdfb_info *sinfo =
  772. container_of(work, struct atmel_lcdfb_info, task);
  773. atmel_lcdfb_reset(sinfo);
  774. }
  775. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  776. {
  777. struct fb_info *info = sinfo->info;
  778. int ret = 0;
  779. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  780. dev_info(info->device,
  781. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  782. (unsigned long)info->fix.smem_len / 1024,
  783. (unsigned long)info->fix.smem_start,
  784. info->screen_base);
  785. /* Allocate colormap */
  786. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  787. if (ret < 0)
  788. dev_err(info->device, "Alloc color map failed\n");
  789. return ret;
  790. }
  791. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  792. {
  793. clk_prepare_enable(sinfo->bus_clk);
  794. clk_prepare_enable(sinfo->lcdc_clk);
  795. }
  796. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  797. {
  798. clk_disable_unprepare(sinfo->bus_clk);
  799. clk_disable_unprepare(sinfo->lcdc_clk);
  800. }
  801. #ifdef CONFIG_OF
  802. static const struct of_device_id atmel_lcdfb_dt_ids[] = {
  803. { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
  804. { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
  805. { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
  806. { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
  807. { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
  808. { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
  809. { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, },
  810. { /* sentinel */ }
  811. };
  812. MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);
  813. static const char *atmel_lcdfb_wiring_modes[] = {
  814. [ATMEL_LCDC_WIRING_BGR] = "BRG",
  815. [ATMEL_LCDC_WIRING_RGB] = "RGB",
  816. };
  817. const int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)
  818. {
  819. const char *mode;
  820. int err, i;
  821. err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);
  822. if (err < 0)
  823. return ATMEL_LCDC_WIRING_BGR;
  824. for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)
  825. if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))
  826. return i;
  827. return -ENODEV;
  828. }
  829. static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)
  830. {
  831. struct atmel_lcdfb_power_ctrl_gpio *og;
  832. list_for_each_entry(og, &pdata->pwr_gpios, list)
  833. gpio_set_value(og->gpio, on);
  834. }
  835. static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
  836. {
  837. struct fb_info *info = sinfo->info;
  838. struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
  839. struct fb_var_screeninfo *var = &info->var;
  840. struct device *dev = &sinfo->pdev->dev;
  841. struct device_node *np =dev->of_node;
  842. struct device_node *display_np;
  843. struct device_node *timings_np;
  844. struct display_timings *timings;
  845. enum of_gpio_flags flags;
  846. struct atmel_lcdfb_power_ctrl_gpio *og;
  847. bool is_gpio_power = false;
  848. int ret = -ENOENT;
  849. int i, gpio;
  850. sinfo->config = (struct atmel_lcdfb_config*)
  851. of_match_device(atmel_lcdfb_dt_ids, dev)->data;
  852. display_np = of_parse_phandle(np, "display", 0);
  853. if (!display_np) {
  854. dev_err(dev, "failed to find display phandle\n");
  855. return -ENOENT;
  856. }
  857. ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);
  858. if (ret < 0) {
  859. dev_err(dev, "failed to get property bits-per-pixel\n");
  860. goto put_display_node;
  861. }
  862. ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);
  863. if (ret < 0) {
  864. dev_err(dev, "failed to get property atmel,guard-time\n");
  865. goto put_display_node;
  866. }
  867. ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);
  868. if (ret < 0) {
  869. dev_err(dev, "failed to get property atmel,lcdcon2\n");
  870. goto put_display_node;
  871. }
  872. ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);
  873. if (ret < 0) {
  874. dev_err(dev, "failed to get property bits-per-pixel\n");
  875. goto put_display_node;
  876. }
  877. ret = -ENOMEM;
  878. for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) {
  879. gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio",
  880. i, &flags);
  881. if (gpio < 0)
  882. continue;
  883. og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
  884. if (!og)
  885. goto put_display_node;
  886. og->gpio = gpio;
  887. og->active_low = flags & OF_GPIO_ACTIVE_LOW;
  888. is_gpio_power = true;
  889. ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio");
  890. if (ret) {
  891. dev_err(dev, "request gpio %d failed\n", gpio);
  892. goto put_display_node;
  893. }
  894. ret = gpio_direction_output(gpio, og->active_low);
  895. if (ret) {
  896. dev_err(dev, "set direction output gpio %d failed\n", gpio);
  897. goto put_display_node;
  898. }
  899. }
  900. if (is_gpio_power)
  901. pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;
  902. ret = atmel_lcdfb_get_of_wiring_modes(display_np);
  903. if (ret < 0) {
  904. dev_err(dev, "invalid atmel,lcd-wiring-mode\n");
  905. goto put_display_node;
  906. }
  907. pdata->lcd_wiring_mode = ret;
  908. pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");
  909. timings = of_get_display_timings(display_np);
  910. if (!timings) {
  911. dev_err(dev, "failed to get display timings\n");
  912. goto put_display_node;
  913. }
  914. timings_np = of_find_node_by_name(display_np, "display-timings");
  915. if (!timings_np) {
  916. dev_err(dev, "failed to find display-timings node\n");
  917. goto put_display_node;
  918. }
  919. for (i = 0; i < of_get_child_count(timings_np); i++) {
  920. struct videomode vm;
  921. struct fb_videomode fb_vm;
  922. ret = videomode_from_timings(timings, &vm, i);
  923. if (ret < 0)
  924. goto put_timings_node;
  925. ret = fb_videomode_from_videomode(&vm, &fb_vm);
  926. if (ret < 0)
  927. goto put_timings_node;
  928. fb_add_videomode(&fb_vm, &info->modelist);
  929. }
  930. return 0;
  931. put_timings_node:
  932. of_node_put(timings_np);
  933. put_display_node:
  934. of_node_put(display_np);
  935. return ret;
  936. }
  937. #else
  938. static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
  939. {
  940. return 0;
  941. }
  942. #endif
  943. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  944. {
  945. struct device *dev = &pdev->dev;
  946. struct fb_info *info;
  947. struct atmel_lcdfb_info *sinfo;
  948. struct atmel_lcdfb_pdata *pdata = NULL;
  949. struct resource *regs = NULL;
  950. struct resource *map = NULL;
  951. struct fb_modelist *modelist;
  952. int ret;
  953. dev_dbg(dev, "%s BEGIN\n", __func__);
  954. ret = -ENOMEM;
  955. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  956. if (!info) {
  957. dev_err(dev, "cannot allocate memory\n");
  958. goto out;
  959. }
  960. sinfo = info->par;
  961. sinfo->pdev = pdev;
  962. sinfo->info = info;
  963. INIT_LIST_HEAD(&info->modelist);
  964. if (pdev->dev.of_node) {
  965. ret = atmel_lcdfb_of_init(sinfo);
  966. if (ret)
  967. goto free_info;
  968. } else if (dev_get_platdata(dev)) {
  969. struct fb_monspecs *monspecs;
  970. int i;
  971. pdata = dev_get_platdata(dev);
  972. monspecs = pdata->default_monspecs;
  973. sinfo->pdata = *pdata;
  974. for (i = 0; i < monspecs->modedb_len; i++)
  975. fb_add_videomode(&monspecs->modedb[i], &info->modelist);
  976. sinfo->config = atmel_lcdfb_get_config(pdev);
  977. info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
  978. memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs));
  979. } else {
  980. dev_err(dev, "cannot get default configuration\n");
  981. goto free_info;
  982. }
  983. if (!sinfo->config)
  984. goto free_info;
  985. strcpy(info->fix.id, sinfo->pdev->name);
  986. info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
  987. info->pseudo_palette = sinfo->pseudo_palette;
  988. info->fbops = &atmel_lcdfb_ops;
  989. info->fix = atmel_lcdfb_fix;
  990. /* Enable LCDC Clocks */
  991. sinfo->bus_clk = clk_get(dev, "hclk");
  992. if (IS_ERR(sinfo->bus_clk)) {
  993. ret = PTR_ERR(sinfo->bus_clk);
  994. goto free_info;
  995. }
  996. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  997. if (IS_ERR(sinfo->lcdc_clk)) {
  998. ret = PTR_ERR(sinfo->lcdc_clk);
  999. goto put_bus_clk;
  1000. }
  1001. atmel_lcdfb_start_clock(sinfo);
  1002. modelist = list_first_entry(&info->modelist,
  1003. struct fb_modelist, list);
  1004. fb_videomode_to_var(&info->var, &modelist->mode);
  1005. atmel_lcdfb_check_var(&info->var, info);
  1006. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1007. if (!regs) {
  1008. dev_err(dev, "resources unusable\n");
  1009. ret = -ENXIO;
  1010. goto stop_clk;
  1011. }
  1012. sinfo->irq_base = platform_get_irq(pdev, 0);
  1013. if (sinfo->irq_base < 0) {
  1014. dev_err(dev, "unable to get irq\n");
  1015. ret = sinfo->irq_base;
  1016. goto stop_clk;
  1017. }
  1018. /* Initialize video memory */
  1019. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1020. if (map) {
  1021. /* use a pre-allocated memory buffer */
  1022. info->fix.smem_start = map->start;
  1023. info->fix.smem_len = resource_size(map);
  1024. if (!request_mem_region(info->fix.smem_start,
  1025. info->fix.smem_len, pdev->name)) {
  1026. ret = -EBUSY;
  1027. goto stop_clk;
  1028. }
  1029. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  1030. if (!info->screen_base) {
  1031. ret = -ENOMEM;
  1032. goto release_intmem;
  1033. }
  1034. /*
  1035. * Don't clear the framebuffer -- someone may have set
  1036. * up a splash image.
  1037. */
  1038. } else {
  1039. /* allocate memory buffer */
  1040. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  1041. if (ret < 0) {
  1042. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  1043. goto stop_clk;
  1044. }
  1045. }
  1046. /* LCDC registers */
  1047. info->fix.mmio_start = regs->start;
  1048. info->fix.mmio_len = resource_size(regs);
  1049. if (!request_mem_region(info->fix.mmio_start,
  1050. info->fix.mmio_len, pdev->name)) {
  1051. ret = -EBUSY;
  1052. goto free_fb;
  1053. }
  1054. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  1055. if (!sinfo->mmio) {
  1056. dev_err(dev, "cannot map LCDC registers\n");
  1057. ret = -ENOMEM;
  1058. goto release_mem;
  1059. }
  1060. /* Initialize PWM for contrast or backlight ("off") */
  1061. init_contrast(sinfo);
  1062. /* interrupt */
  1063. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  1064. if (ret) {
  1065. dev_err(dev, "request_irq failed: %d\n", ret);
  1066. goto unmap_mmio;
  1067. }
  1068. /* Some operations on the LCDC might sleep and
  1069. * require a preemptible task context */
  1070. INIT_WORK(&sinfo->task, atmel_lcdfb_task);
  1071. ret = atmel_lcdfb_init_fbinfo(sinfo);
  1072. if (ret < 0) {
  1073. dev_err(dev, "init fbinfo failed: %d\n", ret);
  1074. goto unregister_irqs;
  1075. }
  1076. dev_set_drvdata(dev, info);
  1077. /*
  1078. * Tell the world that we're ready to go
  1079. */
  1080. ret = register_framebuffer(info);
  1081. if (ret < 0) {
  1082. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  1083. goto reset_drvdata;
  1084. }
  1085. /* Power up the LCDC screen */
  1086. atmel_lcdfb_power_control(sinfo, 1);
  1087. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
  1088. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  1089. return 0;
  1090. reset_drvdata:
  1091. dev_set_drvdata(dev, NULL);
  1092. fb_dealloc_cmap(&info->cmap);
  1093. unregister_irqs:
  1094. cancel_work_sync(&sinfo->task);
  1095. free_irq(sinfo->irq_base, info);
  1096. unmap_mmio:
  1097. exit_backlight(sinfo);
  1098. iounmap(sinfo->mmio);
  1099. release_mem:
  1100. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  1101. free_fb:
  1102. if (map)
  1103. iounmap(info->screen_base);
  1104. else
  1105. atmel_lcdfb_free_video_memory(sinfo);
  1106. release_intmem:
  1107. if (map)
  1108. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  1109. stop_clk:
  1110. atmel_lcdfb_stop_clock(sinfo);
  1111. clk_put(sinfo->lcdc_clk);
  1112. put_bus_clk:
  1113. clk_put(sinfo->bus_clk);
  1114. free_info:
  1115. framebuffer_release(info);
  1116. out:
  1117. dev_dbg(dev, "%s FAILED\n", __func__);
  1118. return ret;
  1119. }
  1120. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  1121. {
  1122. struct device *dev = &pdev->dev;
  1123. struct fb_info *info = dev_get_drvdata(dev);
  1124. struct atmel_lcdfb_info *sinfo;
  1125. struct atmel_lcdfb_pdata *pdata;
  1126. if (!info || !info->par)
  1127. return 0;
  1128. sinfo = info->par;
  1129. pdata = &sinfo->pdata;
  1130. cancel_work_sync(&sinfo->task);
  1131. exit_backlight(sinfo);
  1132. atmel_lcdfb_power_control(sinfo, 0);
  1133. unregister_framebuffer(info);
  1134. atmel_lcdfb_stop_clock(sinfo);
  1135. clk_put(sinfo->lcdc_clk);
  1136. clk_put(sinfo->bus_clk);
  1137. fb_dealloc_cmap(&info->cmap);
  1138. free_irq(sinfo->irq_base, info);
  1139. iounmap(sinfo->mmio);
  1140. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  1141. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  1142. iounmap(info->screen_base);
  1143. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  1144. } else {
  1145. atmel_lcdfb_free_video_memory(sinfo);
  1146. }
  1147. framebuffer_release(info);
  1148. return 0;
  1149. }
  1150. #ifdef CONFIG_PM
  1151. static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
  1152. {
  1153. struct fb_info *info = platform_get_drvdata(pdev);
  1154. struct atmel_lcdfb_info *sinfo = info->par;
  1155. /*
  1156. * We don't want to handle interrupts while the clock is
  1157. * stopped. It may take forever.
  1158. */
  1159. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  1160. sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
  1161. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
  1162. atmel_lcdfb_power_control(sinfo, 0);
  1163. atmel_lcdfb_stop(sinfo);
  1164. atmel_lcdfb_stop_clock(sinfo);
  1165. return 0;
  1166. }
  1167. static int atmel_lcdfb_resume(struct platform_device *pdev)
  1168. {
  1169. struct fb_info *info = platform_get_drvdata(pdev);
  1170. struct atmel_lcdfb_info *sinfo = info->par;
  1171. atmel_lcdfb_start_clock(sinfo);
  1172. atmel_lcdfb_start(sinfo);
  1173. atmel_lcdfb_power_control(sinfo, 1);
  1174. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
  1175. /* Enable FIFO & DMA errors */
  1176. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
  1177. | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  1178. return 0;
  1179. }
  1180. #else
  1181. #define atmel_lcdfb_suspend NULL
  1182. #define atmel_lcdfb_resume NULL
  1183. #endif
  1184. static struct platform_driver atmel_lcdfb_driver = {
  1185. .remove = __exit_p(atmel_lcdfb_remove),
  1186. .suspend = atmel_lcdfb_suspend,
  1187. .resume = atmel_lcdfb_resume,
  1188. .id_table = atmel_lcdfb_devtypes,
  1189. .driver = {
  1190. .name = "atmel_lcdfb",
  1191. .owner = THIS_MODULE,
  1192. .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids),
  1193. },
  1194. };
  1195. module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
  1196. MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
  1197. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  1198. MODULE_LICENSE("GPL");