mptbase.c 199 KB

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  1. /*
  2. * linux/drivers/message/fusion/mptbase.c
  3. * This is the Fusion MPT base driver which supports multiple
  4. * (SCSI + LAN) specialized protocol drivers.
  5. * For use with LSI Logic PCI chip/adapter(s)
  6. * running LSI Logic Fusion MPT (Message Passing Technology) firmware.
  7. *
  8. * Copyright (c) 1999-2007 LSI Logic Corporation
  9. * (mailto:mpt_linux_developer@lsi.com)
  10. *
  11. */
  12. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  13. /*
  14. This program is free software; you can redistribute it and/or modify
  15. it under the terms of the GNU General Public License as published by
  16. the Free Software Foundation; version 2 of the License.
  17. This program is distributed in the hope that it will be useful,
  18. but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. GNU General Public License for more details.
  21. NO WARRANTY
  22. THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  23. CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  24. LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  25. MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  26. solely responsible for determining the appropriateness of using and
  27. distributing the Program and assumes all risks associated with its
  28. exercise of rights under this Agreement, including but not limited to
  29. the risks and costs of program errors, damage to or loss of data,
  30. programs or equipment, and unavailability or interruption of operations.
  31. DISCLAIMER OF LIABILITY
  32. NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33. DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34. DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35. ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36. TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37. USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38. HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39. You should have received a copy of the GNU General Public License
  40. along with this program; if not, write to the Free Software
  41. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  42. */
  43. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  44. #include <linux/kernel.h>
  45. #include <linux/module.h>
  46. #include <linux/errno.h>
  47. #include <linux/init.h>
  48. #include <linux/slab.h>
  49. #include <linux/types.h>
  50. #include <linux/pci.h>
  51. #include <linux/kdev_t.h>
  52. #include <linux/blkdev.h>
  53. #include <linux/delay.h>
  54. #include <linux/interrupt.h> /* needed for in_interrupt() proto */
  55. #include <linux/dma-mapping.h>
  56. #include <asm/io.h>
  57. #ifdef CONFIG_MTRR
  58. #include <asm/mtrr.h>
  59. #endif
  60. #include "mptbase.h"
  61. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  62. #define my_NAME "Fusion MPT base driver"
  63. #define my_VERSION MPT_LINUX_VERSION_COMMON
  64. #define MYNAM "mptbase"
  65. MODULE_AUTHOR(MODULEAUTHOR);
  66. MODULE_DESCRIPTION(my_NAME);
  67. MODULE_LICENSE("GPL");
  68. MODULE_VERSION(my_VERSION);
  69. /*
  70. * cmd line parameters
  71. */
  72. static int mpt_msi_enable;
  73. module_param(mpt_msi_enable, int, 0);
  74. MODULE_PARM_DESC(mpt_msi_enable, " MSI Support Enable (default=0)");
  75. static int mpt_channel_mapping;
  76. module_param(mpt_channel_mapping, int, 0);
  77. MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
  78. #ifdef MFCNT
  79. static int mfcounter = 0;
  80. #define PRINT_MF_COUNT 20000
  81. #endif
  82. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  83. /*
  84. * Public data...
  85. */
  86. int mpt_lan_index = -1;
  87. int mpt_stm_index = -1;
  88. struct proc_dir_entry *mpt_proc_root_dir;
  89. #define WHOINIT_UNKNOWN 0xAA
  90. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  91. /*
  92. * Private data...
  93. */
  94. /* Adapter link list */
  95. LIST_HEAD(ioc_list);
  96. /* Callback lookup table */
  97. static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
  98. /* Protocol driver class lookup table */
  99. static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
  100. /* Event handler lookup table */
  101. static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  102. /* Reset handler lookup table */
  103. static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  104. static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  105. static int mpt_base_index = -1;
  106. static int last_drv_idx = -1;
  107. static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
  108. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  109. /*
  110. * Forward protos...
  111. */
  112. static irqreturn_t mpt_interrupt(int irq, void *bus_id);
  113. static int mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
  114. static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
  115. u32 *req, int replyBytes, u16 *u16reply, int maxwait,
  116. int sleepFlag);
  117. static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
  118. static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
  119. static void mpt_adapter_disable(MPT_ADAPTER *ioc);
  120. static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
  121. static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
  122. static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
  123. static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
  124. static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
  125. static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
  126. static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
  127. static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
  128. static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
  129. static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
  130. static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
  131. static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
  132. static int PrimeIocFifos(MPT_ADAPTER *ioc);
  133. static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  134. static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  135. static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  136. static int GetLanConfigPages(MPT_ADAPTER *ioc);
  137. static int GetIoUnitPage2(MPT_ADAPTER *ioc);
  138. int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
  139. static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
  140. static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
  141. static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
  142. static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
  143. static void mpt_timer_expired(unsigned long data);
  144. static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
  145. static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
  146. static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
  147. static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
  148. #ifdef CONFIG_PROC_FS
  149. static int procmpt_summary_read(char *buf, char **start, off_t offset,
  150. int request, int *eof, void *data);
  151. static int procmpt_version_read(char *buf, char **start, off_t offset,
  152. int request, int *eof, void *data);
  153. static int procmpt_iocinfo_read(char *buf, char **start, off_t offset,
  154. int request, int *eof, void *data);
  155. #endif
  156. static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
  157. //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
  158. static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
  159. #ifdef MPT_DEBUG_REPLY
  160. static void mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
  161. #endif
  162. static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
  163. static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
  164. static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
  165. static int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
  166. static void mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
  167. /* module entry point */
  168. static int __init fusion_init (void);
  169. static void __exit fusion_exit (void);
  170. #define CHIPREG_READ32(addr) readl_relaxed(addr)
  171. #define CHIPREG_READ32_dmasync(addr) readl(addr)
  172. #define CHIPREG_WRITE32(addr,val) writel(val, addr)
  173. #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
  174. #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
  175. static void
  176. pci_disable_io_access(struct pci_dev *pdev)
  177. {
  178. u16 command_reg;
  179. pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
  180. command_reg &= ~1;
  181. pci_write_config_word(pdev, PCI_COMMAND, command_reg);
  182. }
  183. static void
  184. pci_enable_io_access(struct pci_dev *pdev)
  185. {
  186. u16 command_reg;
  187. pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
  188. command_reg |= 1;
  189. pci_write_config_word(pdev, PCI_COMMAND, command_reg);
  190. }
  191. /*
  192. * Process turbo (context) reply...
  193. */
  194. static void
  195. mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
  196. {
  197. MPT_FRAME_HDR *mf = NULL;
  198. MPT_FRAME_HDR *mr = NULL;
  199. int req_idx = 0;
  200. int cb_idx;
  201. dmfprintk((MYIOC_s_INFO_FMT "Got TURBO reply req_idx=%08x\n",
  202. ioc->name, pa));
  203. switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
  204. case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
  205. req_idx = pa & 0x0000FFFF;
  206. cb_idx = (pa & 0x00FF0000) >> 16;
  207. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  208. break;
  209. case MPI_CONTEXT_REPLY_TYPE_LAN:
  210. cb_idx = mpt_lan_index;
  211. /*
  212. * Blind set of mf to NULL here was fatal
  213. * after lan_reply says "freeme"
  214. * Fix sort of combined with an optimization here;
  215. * added explicit check for case where lan_reply
  216. * was just returning 1 and doing nothing else.
  217. * For this case skip the callback, but set up
  218. * proper mf value first here:-)
  219. */
  220. if ((pa & 0x58000000) == 0x58000000) {
  221. req_idx = pa & 0x0000FFFF;
  222. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  223. mpt_free_msg_frame(ioc, mf);
  224. mb();
  225. return;
  226. break;
  227. }
  228. mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
  229. break;
  230. case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
  231. cb_idx = mpt_stm_index;
  232. mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
  233. break;
  234. default:
  235. cb_idx = 0;
  236. BUG();
  237. }
  238. /* Check for (valid) IO callback! */
  239. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
  240. MptCallbacks[cb_idx] == NULL) {
  241. printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
  242. __FUNCTION__, ioc->name, cb_idx);
  243. goto out;
  244. }
  245. if (MptCallbacks[cb_idx](ioc, mf, mr))
  246. mpt_free_msg_frame(ioc, mf);
  247. out:
  248. mb();
  249. }
  250. static void
  251. mpt_reply(MPT_ADAPTER *ioc, u32 pa)
  252. {
  253. MPT_FRAME_HDR *mf;
  254. MPT_FRAME_HDR *mr;
  255. int req_idx;
  256. int cb_idx;
  257. int freeme;
  258. u32 reply_dma_low;
  259. u16 ioc_stat;
  260. /* non-TURBO reply! Hmmm, something may be up...
  261. * Newest turbo reply mechanism; get address
  262. * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
  263. */
  264. /* Map DMA address of reply header to cpu address.
  265. * pa is 32 bits - but the dma address may be 32 or 64 bits
  266. * get offset based only only the low addresses
  267. */
  268. reply_dma_low = (pa <<= 1);
  269. mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
  270. (reply_dma_low - ioc->reply_frames_low_dma));
  271. req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
  272. cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
  273. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  274. dmfprintk((MYIOC_s_INFO_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
  275. ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
  276. DBG_DUMP_REPLY_FRAME(mr)
  277. /* Check/log IOC log info
  278. */
  279. ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
  280. if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
  281. u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
  282. if (ioc->bus_type == FC)
  283. mpt_fc_log_info(ioc, log_info);
  284. else if (ioc->bus_type == SPI)
  285. mpt_spi_log_info(ioc, log_info);
  286. else if (ioc->bus_type == SAS)
  287. mpt_sas_log_info(ioc, log_info);
  288. }
  289. #ifdef MPT_DEBUG_REPLY
  290. if (ioc_stat & MPI_IOCSTATUS_MASK)
  291. mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
  292. #endif
  293. /* Check for (valid) IO callback! */
  294. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
  295. MptCallbacks[cb_idx] == NULL) {
  296. printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
  297. __FUNCTION__, ioc->name, cb_idx);
  298. freeme = 0;
  299. goto out;
  300. }
  301. freeme = MptCallbacks[cb_idx](ioc, mf, mr);
  302. out:
  303. /* Flush (non-TURBO) reply with a WRITE! */
  304. CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
  305. if (freeme)
  306. mpt_free_msg_frame(ioc, mf);
  307. mb();
  308. }
  309. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  310. /**
  311. * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
  312. * @irq: irq number (not used)
  313. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  314. *
  315. * This routine is registered via the request_irq() kernel API call,
  316. * and handles all interrupts generated from a specific MPT adapter
  317. * (also referred to as a IO Controller or IOC).
  318. * This routine must clear the interrupt from the adapter and does
  319. * so by reading the reply FIFO. Multiple replies may be processed
  320. * per single call to this routine.
  321. *
  322. * This routine handles register-level access of the adapter but
  323. * dispatches (calls) a protocol-specific callback routine to handle
  324. * the protocol-specific details of the MPT request completion.
  325. */
  326. static irqreturn_t
  327. mpt_interrupt(int irq, void *bus_id)
  328. {
  329. MPT_ADAPTER *ioc = bus_id;
  330. u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
  331. if (pa == 0xFFFFFFFF)
  332. return IRQ_NONE;
  333. /*
  334. * Drain the reply FIFO!
  335. */
  336. do {
  337. if (pa & MPI_ADDRESS_REPLY_A_BIT)
  338. mpt_reply(ioc, pa);
  339. else
  340. mpt_turbo_reply(ioc, pa);
  341. pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
  342. } while (pa != 0xFFFFFFFF);
  343. return IRQ_HANDLED;
  344. }
  345. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  346. /**
  347. * mpt_base_reply - MPT base driver's callback routine
  348. * @ioc: Pointer to MPT_ADAPTER structure
  349. * @mf: Pointer to original MPT request frame
  350. * @reply: Pointer to MPT reply frame (NULL if TurboReply)
  351. *
  352. * MPT base driver's callback routine; all base driver
  353. * "internal" request/reply processing is routed here.
  354. * Currently used for EventNotification and EventAck handling.
  355. *
  356. * Returns 1 indicating original alloc'd request frame ptr
  357. * should be freed, or 0 if it shouldn't.
  358. */
  359. static int
  360. mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
  361. {
  362. int freereq = 1;
  363. u8 func;
  364. dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply() called\n", ioc->name));
  365. #if defined(MPT_DEBUG_MSG_FRAME)
  366. if (!(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
  367. dmfprintk((KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf));
  368. DBG_DUMP_REQUEST_FRAME_HDR(mf)
  369. }
  370. #endif
  371. func = reply->u.hdr.Function;
  372. dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply, Function=%02Xh\n",
  373. ioc->name, func));
  374. if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
  375. EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
  376. int evHandlers = 0;
  377. int results;
  378. results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
  379. if (results != evHandlers) {
  380. /* CHECKME! Any special handling needed here? */
  381. devtverboseprintk((MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
  382. ioc->name, evHandlers, results));
  383. }
  384. /*
  385. * Hmmm... It seems that EventNotificationReply is an exception
  386. * to the rule of one reply per request.
  387. */
  388. if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
  389. freereq = 0;
  390. } else {
  391. devtverboseprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
  392. ioc->name, pEvReply));
  393. }
  394. #ifdef CONFIG_PROC_FS
  395. // LogEvent(ioc, pEvReply);
  396. #endif
  397. } else if (func == MPI_FUNCTION_EVENT_ACK) {
  398. dprintk((MYIOC_s_INFO_FMT "mpt_base_reply, EventAck reply received\n",
  399. ioc->name));
  400. } else if (func == MPI_FUNCTION_CONFIG) {
  401. CONFIGPARMS *pCfg;
  402. unsigned long flags;
  403. dcprintk((MYIOC_s_INFO_FMT "config_complete (mf=%p,mr=%p)\n",
  404. ioc->name, mf, reply));
  405. pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
  406. if (pCfg) {
  407. /* disable timer and remove from linked list */
  408. del_timer(&pCfg->timer);
  409. spin_lock_irqsave(&ioc->FreeQlock, flags);
  410. list_del(&pCfg->linkage);
  411. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  412. /*
  413. * If IOC Status is SUCCESS, save the header
  414. * and set the status code to GOOD.
  415. */
  416. pCfg->status = MPT_CONFIG_ERROR;
  417. if (reply) {
  418. ConfigReply_t *pReply = (ConfigReply_t *)reply;
  419. u16 status;
  420. status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
  421. dcprintk((KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n",
  422. status, le32_to_cpu(pReply->IOCLogInfo)));
  423. pCfg->status = status;
  424. if (status == MPI_IOCSTATUS_SUCCESS) {
  425. if ((pReply->Header.PageType &
  426. MPI_CONFIG_PAGETYPE_MASK) ==
  427. MPI_CONFIG_PAGETYPE_EXTENDED) {
  428. pCfg->cfghdr.ehdr->ExtPageLength =
  429. le16_to_cpu(pReply->ExtPageLength);
  430. pCfg->cfghdr.ehdr->ExtPageType =
  431. pReply->ExtPageType;
  432. }
  433. pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
  434. /* If this is a regular header, save PageLength. */
  435. /* LMP Do this better so not using a reserved field! */
  436. pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
  437. pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
  438. pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
  439. }
  440. }
  441. /*
  442. * Wake up the original calling thread
  443. */
  444. pCfg->wait_done = 1;
  445. wake_up(&mpt_waitq);
  446. }
  447. } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
  448. /* we should be always getting a reply frame */
  449. memcpy(ioc->persist_reply_frame, reply,
  450. min(MPT_DEFAULT_FRAME_SIZE,
  451. 4*reply->u.reply.MsgLength));
  452. del_timer(&ioc->persist_timer);
  453. ioc->persist_wait_done = 1;
  454. wake_up(&mpt_waitq);
  455. } else {
  456. printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
  457. ioc->name, func);
  458. }
  459. /*
  460. * Conditionally tell caller to free the original
  461. * EventNotification/EventAck/unexpected request frame!
  462. */
  463. return freereq;
  464. }
  465. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  466. /**
  467. * mpt_register - Register protocol-specific main callback handler.
  468. * @cbfunc: callback function pointer
  469. * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
  470. *
  471. * This routine is called by a protocol-specific driver (SCSI host,
  472. * LAN, SCSI target) to register its reply callback routine. Each
  473. * protocol-specific driver must do this before it will be able to
  474. * use any IOC resources, such as obtaining request frames.
  475. *
  476. * NOTES: The SCSI protocol driver currently calls this routine thrice
  477. * in order to register separate callbacks; one for "normal" SCSI IO;
  478. * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
  479. *
  480. * Returns a positive integer valued "handle" in the
  481. * range (and S.O.D. order) {N,...,7,6,5,...,1} if successful.
  482. * Any non-positive return value (including zero!) should be considered
  483. * an error by the caller.
  484. */
  485. int
  486. mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
  487. {
  488. int i;
  489. last_drv_idx = -1;
  490. /*
  491. * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
  492. * (slot/handle 0 is reserved!)
  493. */
  494. for (i = MPT_MAX_PROTOCOL_DRIVERS-1; i; i--) {
  495. if (MptCallbacks[i] == NULL) {
  496. MptCallbacks[i] = cbfunc;
  497. MptDriverClass[i] = dclass;
  498. MptEvHandlers[i] = NULL;
  499. last_drv_idx = i;
  500. break;
  501. }
  502. }
  503. return last_drv_idx;
  504. }
  505. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  506. /**
  507. * mpt_deregister - Deregister a protocol drivers resources.
  508. * @cb_idx: previously registered callback handle
  509. *
  510. * Each protocol-specific driver should call this routine when its
  511. * module is unloaded.
  512. */
  513. void
  514. mpt_deregister(int cb_idx)
  515. {
  516. if ((cb_idx >= 0) && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
  517. MptCallbacks[cb_idx] = NULL;
  518. MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
  519. MptEvHandlers[cb_idx] = NULL;
  520. last_drv_idx++;
  521. }
  522. }
  523. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  524. /**
  525. * mpt_event_register - Register protocol-specific event callback
  526. * handler.
  527. * @cb_idx: previously registered (via mpt_register) callback handle
  528. * @ev_cbfunc: callback function
  529. *
  530. * This routine can be called by one or more protocol-specific drivers
  531. * if/when they choose to be notified of MPT events.
  532. *
  533. * Returns 0 for success.
  534. */
  535. int
  536. mpt_event_register(int cb_idx, MPT_EVHANDLER ev_cbfunc)
  537. {
  538. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  539. return -1;
  540. MptEvHandlers[cb_idx] = ev_cbfunc;
  541. return 0;
  542. }
  543. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  544. /**
  545. * mpt_event_deregister - Deregister protocol-specific event callback
  546. * handler.
  547. * @cb_idx: previously registered callback handle
  548. *
  549. * Each protocol-specific driver should call this routine
  550. * when it does not (or can no longer) handle events,
  551. * or when its module is unloaded.
  552. */
  553. void
  554. mpt_event_deregister(int cb_idx)
  555. {
  556. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  557. return;
  558. MptEvHandlers[cb_idx] = NULL;
  559. }
  560. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  561. /**
  562. * mpt_reset_register - Register protocol-specific IOC reset handler.
  563. * @cb_idx: previously registered (via mpt_register) callback handle
  564. * @reset_func: reset function
  565. *
  566. * This routine can be called by one or more protocol-specific drivers
  567. * if/when they choose to be notified of IOC resets.
  568. *
  569. * Returns 0 for success.
  570. */
  571. int
  572. mpt_reset_register(int cb_idx, MPT_RESETHANDLER reset_func)
  573. {
  574. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  575. return -1;
  576. MptResetHandlers[cb_idx] = reset_func;
  577. return 0;
  578. }
  579. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  580. /**
  581. * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
  582. * @cb_idx: previously registered callback handle
  583. *
  584. * Each protocol-specific driver should call this routine
  585. * when it does not (or can no longer) handle IOC reset handling,
  586. * or when its module is unloaded.
  587. */
  588. void
  589. mpt_reset_deregister(int cb_idx)
  590. {
  591. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  592. return;
  593. MptResetHandlers[cb_idx] = NULL;
  594. }
  595. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  596. /**
  597. * mpt_device_driver_register - Register device driver hooks
  598. * @dd_cbfunc: driver callbacks struct
  599. * @cb_idx: MPT protocol driver index
  600. */
  601. int
  602. mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, int cb_idx)
  603. {
  604. MPT_ADAPTER *ioc;
  605. const struct pci_device_id *id;
  606. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  607. return -EINVAL;
  608. MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
  609. /* call per pci device probe entry point */
  610. list_for_each_entry(ioc, &ioc_list, list) {
  611. id = ioc->pcidev->driver ?
  612. ioc->pcidev->driver->id_table : NULL;
  613. if (dd_cbfunc->probe)
  614. dd_cbfunc->probe(ioc->pcidev, id);
  615. }
  616. return 0;
  617. }
  618. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  619. /**
  620. * mpt_device_driver_deregister - DeRegister device driver hooks
  621. * @cb_idx: MPT protocol driver index
  622. */
  623. void
  624. mpt_device_driver_deregister(int cb_idx)
  625. {
  626. struct mpt_pci_driver *dd_cbfunc;
  627. MPT_ADAPTER *ioc;
  628. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  629. return;
  630. dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
  631. list_for_each_entry(ioc, &ioc_list, list) {
  632. if (dd_cbfunc->remove)
  633. dd_cbfunc->remove(ioc->pcidev);
  634. }
  635. MptDeviceDriverHandlers[cb_idx] = NULL;
  636. }
  637. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  638. /**
  639. * mpt_get_msg_frame - Obtain a MPT request frame from the pool (of 1024)
  640. * allocated per MPT adapter.
  641. * @handle: Handle of registered MPT protocol driver
  642. * @ioc: Pointer to MPT adapter structure
  643. *
  644. * Returns pointer to a MPT request frame or %NULL if none are available
  645. * or IOC is not active.
  646. */
  647. MPT_FRAME_HDR*
  648. mpt_get_msg_frame(int handle, MPT_ADAPTER *ioc)
  649. {
  650. MPT_FRAME_HDR *mf;
  651. unsigned long flags;
  652. u16 req_idx; /* Request index */
  653. /* validate handle and ioc identifier */
  654. #ifdef MFCNT
  655. if (!ioc->active)
  656. printk(KERN_WARNING "IOC Not Active! mpt_get_msg_frame returning NULL!\n");
  657. #endif
  658. /* If interrupts are not attached, do not return a request frame */
  659. if (!ioc->active)
  660. return NULL;
  661. spin_lock_irqsave(&ioc->FreeQlock, flags);
  662. if (!list_empty(&ioc->FreeQ)) {
  663. int req_offset;
  664. mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
  665. u.frame.linkage.list);
  666. list_del(&mf->u.frame.linkage.list);
  667. mf->u.frame.linkage.arg1 = 0;
  668. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
  669. req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
  670. /* u16! */
  671. req_idx = req_offset / ioc->req_sz;
  672. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
  673. mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
  674. ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame; /* Default, will be changed if necessary in SG generation */
  675. #ifdef MFCNT
  676. ioc->mfcnt++;
  677. #endif
  678. }
  679. else
  680. mf = NULL;
  681. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  682. #ifdef MFCNT
  683. if (mf == NULL)
  684. printk(KERN_WARNING "IOC Active. No free Msg Frames! Count 0x%x Max 0x%x\n", ioc->mfcnt, ioc->req_depth);
  685. mfcounter++;
  686. if (mfcounter == PRINT_MF_COUNT)
  687. printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth);
  688. #endif
  689. dmfprintk((KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n",
  690. ioc->name, handle, ioc->id, mf));
  691. return mf;
  692. }
  693. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  694. /**
  695. * mpt_put_msg_frame - Send a protocol specific MPT request frame
  696. * to a IOC.
  697. * @handle: Handle of registered MPT protocol driver
  698. * @ioc: Pointer to MPT adapter structure
  699. * @mf: Pointer to MPT request frame
  700. *
  701. * This routine posts a MPT request frame to the request post FIFO of a
  702. * specific MPT adapter.
  703. */
  704. void
  705. mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
  706. {
  707. u32 mf_dma_addr;
  708. int req_offset;
  709. u16 req_idx; /* Request index */
  710. /* ensure values are reset properly! */
  711. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
  712. req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
  713. /* u16! */
  714. req_idx = req_offset / ioc->req_sz;
  715. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
  716. mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
  717. #ifdef MPT_DEBUG_MSG_FRAME
  718. {
  719. u32 *m = mf->u.frame.hwhdr.__hdr;
  720. int ii, n;
  721. printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ",
  722. ioc->name, m);
  723. n = ioc->req_sz/4 - 1;
  724. while (m[n] == 0)
  725. n--;
  726. for (ii=0; ii<=n; ii++) {
  727. if (ii && ((ii%8)==0))
  728. printk("\n" KERN_INFO " ");
  729. printk(" %08x", le32_to_cpu(m[ii]));
  730. }
  731. printk("\n");
  732. }
  733. #endif
  734. mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
  735. dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));
  736. CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
  737. }
  738. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  739. /**
  740. * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
  741. * @handle: Handle of registered MPT protocol driver
  742. * @ioc: Pointer to MPT adapter structure
  743. * @mf: Pointer to MPT request frame
  744. *
  745. * This routine places a MPT request frame back on the MPT adapter's
  746. * FreeQ.
  747. */
  748. void
  749. mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
  750. {
  751. unsigned long flags;
  752. /* Put Request back on FreeQ! */
  753. spin_lock_irqsave(&ioc->FreeQlock, flags);
  754. mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
  755. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
  756. #ifdef MFCNT
  757. ioc->mfcnt--;
  758. #endif
  759. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  760. }
  761. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  762. /**
  763. * mpt_add_sge - Place a simple SGE at address pAddr.
  764. * @pAddr: virtual address for SGE
  765. * @flagslength: SGE flags and data transfer length
  766. * @dma_addr: Physical address
  767. *
  768. * This routine places a MPT request frame back on the MPT adapter's
  769. * FreeQ.
  770. */
  771. void
  772. mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
  773. {
  774. if (sizeof(dma_addr_t) == sizeof(u64)) {
  775. SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
  776. u32 tmp = dma_addr & 0xFFFFFFFF;
  777. pSge->FlagsLength = cpu_to_le32(flagslength);
  778. pSge->Address.Low = cpu_to_le32(tmp);
  779. tmp = (u32) ((u64)dma_addr >> 32);
  780. pSge->Address.High = cpu_to_le32(tmp);
  781. } else {
  782. SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
  783. pSge->FlagsLength = cpu_to_le32(flagslength);
  784. pSge->Address = cpu_to_le32(dma_addr);
  785. }
  786. }
  787. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  788. /**
  789. * mpt_send_handshake_request - Send MPT request via doorbell handshake method.
  790. * @handle: Handle of registered MPT protocol driver
  791. * @ioc: Pointer to MPT adapter structure
  792. * @reqBytes: Size of the request in bytes
  793. * @req: Pointer to MPT request frame
  794. * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
  795. *
  796. * This routine is used exclusively to send MptScsiTaskMgmt
  797. * requests since they are required to be sent via doorbell handshake.
  798. *
  799. * NOTE: It is the callers responsibility to byte-swap fields in the
  800. * request which are greater than 1 byte in size.
  801. *
  802. * Returns 0 for success, non-zero for failure.
  803. */
  804. int
  805. mpt_send_handshake_request(int handle, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
  806. {
  807. int r = 0;
  808. u8 *req_as_bytes;
  809. int ii;
  810. /* State is known to be good upon entering
  811. * this function so issue the bus reset
  812. * request.
  813. */
  814. /*
  815. * Emulate what mpt_put_msg_frame() does /wrt to sanity
  816. * setting cb_idx/req_idx. But ONLY if this request
  817. * is in proper (pre-alloc'd) request buffer range...
  818. */
  819. ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
  820. if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
  821. MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
  822. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
  823. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle;
  824. }
  825. /* Make sure there are no doorbells */
  826. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  827. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  828. ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
  829. ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
  830. /* Wait for IOC doorbell int */
  831. if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
  832. return ii;
  833. }
  834. /* Read doorbell and check for active bit */
  835. if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
  836. return -5;
  837. dhsprintk((KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n",
  838. ioc->name, ii));
  839. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  840. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  841. return -2;
  842. }
  843. /* Send request via doorbell handshake */
  844. req_as_bytes = (u8 *) req;
  845. for (ii = 0; ii < reqBytes/4; ii++) {
  846. u32 word;
  847. word = ((req_as_bytes[(ii*4) + 0] << 0) |
  848. (req_as_bytes[(ii*4) + 1] << 8) |
  849. (req_as_bytes[(ii*4) + 2] << 16) |
  850. (req_as_bytes[(ii*4) + 3] << 24));
  851. CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
  852. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  853. r = -3;
  854. break;
  855. }
  856. }
  857. if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
  858. r = 0;
  859. else
  860. r = -4;
  861. /* Make sure there are no doorbells */
  862. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  863. return r;
  864. }
  865. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  866. /**
  867. * mpt_host_page_access_control - control the IOC's Host Page Buffer access
  868. * @ioc: Pointer to MPT adapter structure
  869. * @access_control_value: define bits below
  870. * @sleepFlag: Specifies whether the process can sleep
  871. *
  872. * Provides mechanism for the host driver to control the IOC's
  873. * Host Page Buffer access.
  874. *
  875. * Access Control Value - bits[15:12]
  876. * 0h Reserved
  877. * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
  878. * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
  879. * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
  880. *
  881. * Returns 0 for success, non-zero for failure.
  882. */
  883. static int
  884. mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
  885. {
  886. int r = 0;
  887. /* return if in use */
  888. if (CHIPREG_READ32(&ioc->chip->Doorbell)
  889. & MPI_DOORBELL_ACTIVE)
  890. return -1;
  891. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  892. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  893. ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
  894. <<MPI_DOORBELL_FUNCTION_SHIFT) |
  895. (access_control_value<<12)));
  896. /* Wait for IOC to clear Doorbell Status bit */
  897. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  898. return -2;
  899. }else
  900. return 0;
  901. }
  902. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  903. /**
  904. * mpt_host_page_alloc - allocate system memory for the fw
  905. * @ioc: Pointer to pointer to IOC adapter
  906. * @ioc_init: Pointer to ioc init config page
  907. *
  908. * If we already allocated memory in past, then resend the same pointer.
  909. * Returns 0 for success, non-zero for failure.
  910. */
  911. static int
  912. mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
  913. {
  914. char *psge;
  915. int flags_length;
  916. u32 host_page_buffer_sz=0;
  917. if(!ioc->HostPageBuffer) {
  918. host_page_buffer_sz =
  919. le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
  920. if(!host_page_buffer_sz)
  921. return 0; /* fw doesn't need any host buffers */
  922. /* spin till we get enough memory */
  923. while(host_page_buffer_sz > 0) {
  924. if((ioc->HostPageBuffer = pci_alloc_consistent(
  925. ioc->pcidev,
  926. host_page_buffer_sz,
  927. &ioc->HostPageBuffer_dma)) != NULL) {
  928. dinitprintk((MYIOC_s_INFO_FMT
  929. "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
  930. ioc->name, ioc->HostPageBuffer,
  931. (u32)ioc->HostPageBuffer_dma,
  932. host_page_buffer_sz));
  933. ioc->alloc_total += host_page_buffer_sz;
  934. ioc->HostPageBuffer_sz = host_page_buffer_sz;
  935. break;
  936. }
  937. host_page_buffer_sz -= (4*1024);
  938. }
  939. }
  940. if(!ioc->HostPageBuffer) {
  941. printk(MYIOC_s_ERR_FMT
  942. "Failed to alloc memory for host_page_buffer!\n",
  943. ioc->name);
  944. return -999;
  945. }
  946. psge = (char *)&ioc_init->HostPageBufferSGE;
  947. flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
  948. MPI_SGE_FLAGS_SYSTEM_ADDRESS |
  949. MPI_SGE_FLAGS_32_BIT_ADDRESSING |
  950. MPI_SGE_FLAGS_HOST_TO_IOC |
  951. MPI_SGE_FLAGS_END_OF_BUFFER;
  952. if (sizeof(dma_addr_t) == sizeof(u64)) {
  953. flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
  954. }
  955. flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
  956. flags_length |= ioc->HostPageBuffer_sz;
  957. mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
  958. ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
  959. return 0;
  960. }
  961. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  962. /**
  963. * mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
  964. * @iocid: IOC unique identifier (integer)
  965. * @iocpp: Pointer to pointer to IOC adapter
  966. *
  967. * Given a unique IOC identifier, set pointer to the associated MPT
  968. * adapter structure.
  969. *
  970. * Returns iocid and sets iocpp if iocid is found.
  971. * Returns -1 if iocid is not found.
  972. */
  973. int
  974. mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
  975. {
  976. MPT_ADAPTER *ioc;
  977. list_for_each_entry(ioc,&ioc_list,list) {
  978. if (ioc->id == iocid) {
  979. *iocpp =ioc;
  980. return iocid;
  981. }
  982. }
  983. *iocpp = NULL;
  984. return -1;
  985. }
  986. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  987. /**
  988. * mpt_attach - Install a PCI intelligent MPT adapter.
  989. * @pdev: Pointer to pci_dev structure
  990. * @id: PCI device ID information
  991. *
  992. * This routine performs all the steps necessary to bring the IOC of
  993. * a MPT adapter to a OPERATIONAL state. This includes registering
  994. * memory regions, registering the interrupt, and allocating request
  995. * and reply memory pools.
  996. *
  997. * This routine also pre-fetches the LAN MAC address of a Fibre Channel
  998. * MPT adapter.
  999. *
  1000. * Returns 0 for success, non-zero for failure.
  1001. *
  1002. * TODO: Add support for polled controllers
  1003. */
  1004. int
  1005. mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
  1006. {
  1007. MPT_ADAPTER *ioc;
  1008. u8 __iomem *mem;
  1009. unsigned long mem_phys;
  1010. unsigned long port;
  1011. u32 msize;
  1012. u32 psize;
  1013. int ii;
  1014. int r = -ENODEV;
  1015. u8 revision;
  1016. u8 pcixcmd;
  1017. static int mpt_ids = 0;
  1018. #ifdef CONFIG_PROC_FS
  1019. struct proc_dir_entry *dent, *ent;
  1020. #endif
  1021. if (pci_enable_device(pdev))
  1022. return r;
  1023. dinitprintk((KERN_WARNING MYNAM ": mpt_adapter_install\n"));
  1024. if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
  1025. dprintk((KERN_INFO MYNAM
  1026. ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n"));
  1027. } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
  1028. printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
  1029. return r;
  1030. }
  1031. if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
  1032. dprintk((KERN_INFO MYNAM
  1033. ": Using 64 bit consistent mask\n"));
  1034. else
  1035. dprintk((KERN_INFO MYNAM
  1036. ": Not using 64 bit consistent mask\n"));
  1037. ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
  1038. if (ioc == NULL) {
  1039. printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
  1040. return -ENOMEM;
  1041. }
  1042. ioc->alloc_total = sizeof(MPT_ADAPTER);
  1043. ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
  1044. ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
  1045. ioc->pcidev = pdev;
  1046. ioc->diagPending = 0;
  1047. spin_lock_init(&ioc->diagLock);
  1048. spin_lock_init(&ioc->initializing_hba_lock);
  1049. /* Initialize the event logging.
  1050. */
  1051. ioc->eventTypes = 0; /* None */
  1052. ioc->eventContext = 0;
  1053. ioc->eventLogSize = 0;
  1054. ioc->events = NULL;
  1055. #ifdef MFCNT
  1056. ioc->mfcnt = 0;
  1057. #endif
  1058. ioc->cached_fw = NULL;
  1059. /* Initilize SCSI Config Data structure
  1060. */
  1061. memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
  1062. /* Initialize the running configQ head.
  1063. */
  1064. INIT_LIST_HEAD(&ioc->configQ);
  1065. /* Initialize the fc rport list head.
  1066. */
  1067. INIT_LIST_HEAD(&ioc->fc_rports);
  1068. /* Find lookup slot. */
  1069. INIT_LIST_HEAD(&ioc->list);
  1070. ioc->id = mpt_ids++;
  1071. mem_phys = msize = 0;
  1072. port = psize = 0;
  1073. for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
  1074. if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
  1075. if (psize)
  1076. continue;
  1077. /* Get I/O space! */
  1078. port = pci_resource_start(pdev, ii);
  1079. psize = pci_resource_len(pdev,ii);
  1080. } else {
  1081. if (msize)
  1082. continue;
  1083. /* Get memmap */
  1084. mem_phys = pci_resource_start(pdev, ii);
  1085. msize = pci_resource_len(pdev,ii);
  1086. }
  1087. }
  1088. ioc->mem_size = msize;
  1089. mem = NULL;
  1090. /* Get logical ptr for PciMem0 space */
  1091. /*mem = ioremap(mem_phys, msize);*/
  1092. mem = ioremap(mem_phys, msize);
  1093. if (mem == NULL) {
  1094. printk(KERN_ERR MYNAM ": ERROR - Unable to map adapter memory!\n");
  1095. kfree(ioc);
  1096. return -EINVAL;
  1097. }
  1098. ioc->memmap = mem;
  1099. dinitprintk((KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys));
  1100. dinitprintk((KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n",
  1101. &ioc->facts, &ioc->pfacts[0]));
  1102. ioc->mem_phys = mem_phys;
  1103. ioc->chip = (SYSIF_REGS __iomem *)mem;
  1104. /* Save Port IO values in case we need to do downloadboot */
  1105. {
  1106. u8 *pmem = (u8*)port;
  1107. ioc->pio_mem_phys = port;
  1108. ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
  1109. }
  1110. if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC909) {
  1111. ioc->prod_name = "LSIFC909";
  1112. ioc->bus_type = FC;
  1113. }
  1114. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929) {
  1115. ioc->prod_name = "LSIFC929";
  1116. ioc->bus_type = FC;
  1117. }
  1118. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919) {
  1119. ioc->prod_name = "LSIFC919";
  1120. ioc->bus_type = FC;
  1121. }
  1122. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929X) {
  1123. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
  1124. ioc->bus_type = FC;
  1125. if (revision < XL_929) {
  1126. ioc->prod_name = "LSIFC929X";
  1127. /* 929X Chip Fix. Set Split transactions level
  1128. * for PCIX. Set MOST bits to zero.
  1129. */
  1130. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1131. pcixcmd &= 0x8F;
  1132. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1133. } else {
  1134. ioc->prod_name = "LSIFC929XL";
  1135. /* 929XL Chip Fix. Set MMRBC to 0x08.
  1136. */
  1137. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1138. pcixcmd |= 0x08;
  1139. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1140. }
  1141. }
  1142. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919X) {
  1143. ioc->prod_name = "LSIFC919X";
  1144. ioc->bus_type = FC;
  1145. /* 919X Chip Fix. Set Split transactions level
  1146. * for PCIX. Set MOST bits to zero.
  1147. */
  1148. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1149. pcixcmd &= 0x8F;
  1150. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1151. }
  1152. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC939X) {
  1153. ioc->prod_name = "LSIFC939X";
  1154. ioc->bus_type = FC;
  1155. ioc->errata_flag_1064 = 1;
  1156. }
  1157. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949X) {
  1158. ioc->prod_name = "LSIFC949X";
  1159. ioc->bus_type = FC;
  1160. ioc->errata_flag_1064 = 1;
  1161. }
  1162. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949E) {
  1163. ioc->prod_name = "LSIFC949E";
  1164. ioc->bus_type = FC;
  1165. }
  1166. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_53C1030) {
  1167. ioc->prod_name = "LSI53C1030";
  1168. ioc->bus_type = SPI;
  1169. /* 1030 Chip Fix. Disable Split transactions
  1170. * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
  1171. */
  1172. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
  1173. if (revision < C0_1030) {
  1174. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1175. pcixcmd &= 0x8F;
  1176. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1177. }
  1178. }
  1179. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_1030_53C1035) {
  1180. ioc->prod_name = "LSI53C1035";
  1181. ioc->bus_type = SPI;
  1182. }
  1183. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064) {
  1184. ioc->prod_name = "LSISAS1064";
  1185. ioc->bus_type = SAS;
  1186. ioc->errata_flag_1064 = 1;
  1187. }
  1188. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068) {
  1189. ioc->prod_name = "LSISAS1068";
  1190. ioc->bus_type = SAS;
  1191. ioc->errata_flag_1064 = 1;
  1192. }
  1193. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064E) {
  1194. ioc->prod_name = "LSISAS1064E";
  1195. ioc->bus_type = SAS;
  1196. }
  1197. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068E) {
  1198. ioc->prod_name = "LSISAS1068E";
  1199. ioc->bus_type = SAS;
  1200. }
  1201. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
  1202. ioc->prod_name = "LSISAS1078";
  1203. ioc->bus_type = SAS;
  1204. }
  1205. if (ioc->errata_flag_1064)
  1206. pci_disable_io_access(pdev);
  1207. sprintf(ioc->name, "ioc%d", ioc->id);
  1208. spin_lock_init(&ioc->FreeQlock);
  1209. /* Disable all! */
  1210. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1211. ioc->active = 0;
  1212. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1213. /* Set lookup ptr. */
  1214. list_add_tail(&ioc->list, &ioc_list);
  1215. /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
  1216. */
  1217. mpt_detect_bound_ports(ioc, pdev);
  1218. if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
  1219. CAN_SLEEP)) != 0){
  1220. printk(KERN_WARNING MYNAM
  1221. ": WARNING - %s did not initialize properly! (%d)\n",
  1222. ioc->name, r);
  1223. list_del(&ioc->list);
  1224. if (ioc->alt_ioc)
  1225. ioc->alt_ioc->alt_ioc = NULL;
  1226. iounmap(mem);
  1227. kfree(ioc);
  1228. pci_set_drvdata(pdev, NULL);
  1229. return r;
  1230. }
  1231. /* call per device driver probe entry point */
  1232. for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
  1233. if(MptDeviceDriverHandlers[ii] &&
  1234. MptDeviceDriverHandlers[ii]->probe) {
  1235. MptDeviceDriverHandlers[ii]->probe(pdev,id);
  1236. }
  1237. }
  1238. #ifdef CONFIG_PROC_FS
  1239. /*
  1240. * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
  1241. */
  1242. dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
  1243. if (dent) {
  1244. ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
  1245. if (ent) {
  1246. ent->read_proc = procmpt_iocinfo_read;
  1247. ent->data = ioc;
  1248. }
  1249. ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
  1250. if (ent) {
  1251. ent->read_proc = procmpt_summary_read;
  1252. ent->data = ioc;
  1253. }
  1254. }
  1255. #endif
  1256. return 0;
  1257. }
  1258. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1259. /**
  1260. * mpt_detach - Remove a PCI intelligent MPT adapter.
  1261. * @pdev: Pointer to pci_dev structure
  1262. */
  1263. void
  1264. mpt_detach(struct pci_dev *pdev)
  1265. {
  1266. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1267. char pname[32];
  1268. int ii;
  1269. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
  1270. remove_proc_entry(pname, NULL);
  1271. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
  1272. remove_proc_entry(pname, NULL);
  1273. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
  1274. remove_proc_entry(pname, NULL);
  1275. /* call per device driver remove entry point */
  1276. for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
  1277. if(MptDeviceDriverHandlers[ii] &&
  1278. MptDeviceDriverHandlers[ii]->remove) {
  1279. MptDeviceDriverHandlers[ii]->remove(pdev);
  1280. }
  1281. }
  1282. /* Disable interrupts! */
  1283. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1284. ioc->active = 0;
  1285. synchronize_irq(pdev->irq);
  1286. /* Clear any lingering interrupt */
  1287. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1288. CHIPREG_READ32(&ioc->chip->IntStatus);
  1289. mpt_adapter_dispose(ioc);
  1290. pci_set_drvdata(pdev, NULL);
  1291. }
  1292. /**************************************************************************
  1293. * Power Management
  1294. */
  1295. #ifdef CONFIG_PM
  1296. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1297. /**
  1298. * mpt_suspend - Fusion MPT base driver suspend routine.
  1299. * @pdev: Pointer to pci_dev structure
  1300. * @state: new state to enter
  1301. */
  1302. int
  1303. mpt_suspend(struct pci_dev *pdev, pm_message_t state)
  1304. {
  1305. u32 device_state;
  1306. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1307. device_state=pci_choose_state(pdev, state);
  1308. printk(MYIOC_s_INFO_FMT
  1309. "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
  1310. ioc->name, pdev, pci_name(pdev), device_state);
  1311. pci_save_state(pdev);
  1312. /* put ioc into READY_STATE */
  1313. if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
  1314. printk(MYIOC_s_ERR_FMT
  1315. "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
  1316. }
  1317. /* disable interrupts */
  1318. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1319. ioc->active = 0;
  1320. /* Clear any lingering interrupt */
  1321. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1322. pci_disable_device(pdev);
  1323. pci_set_power_state(pdev, device_state);
  1324. return 0;
  1325. }
  1326. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1327. /**
  1328. * mpt_resume - Fusion MPT base driver resume routine.
  1329. * @pdev: Pointer to pci_dev structure
  1330. */
  1331. int
  1332. mpt_resume(struct pci_dev *pdev)
  1333. {
  1334. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1335. u32 device_state = pdev->current_state;
  1336. int recovery_state;
  1337. int err;
  1338. printk(MYIOC_s_INFO_FMT
  1339. "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
  1340. ioc->name, pdev, pci_name(pdev), device_state);
  1341. pci_set_power_state(pdev, 0);
  1342. pci_restore_state(pdev);
  1343. err = pci_enable_device(pdev);
  1344. if (err)
  1345. return err;
  1346. /* enable interrupts */
  1347. CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
  1348. ioc->active = 1;
  1349. printk(MYIOC_s_INFO_FMT
  1350. "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
  1351. ioc->name,
  1352. (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
  1353. CHIPREG_READ32(&ioc->chip->Doorbell));
  1354. /* bring ioc to operational state */
  1355. if ((recovery_state = mpt_do_ioc_recovery(ioc,
  1356. MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
  1357. printk(MYIOC_s_INFO_FMT
  1358. "pci-resume: Cannot recover, error:[%x]\n",
  1359. ioc->name, recovery_state);
  1360. } else {
  1361. printk(MYIOC_s_INFO_FMT
  1362. "pci-resume: success\n", ioc->name);
  1363. }
  1364. return 0;
  1365. }
  1366. #endif
  1367. static int
  1368. mpt_signal_reset(int index, MPT_ADAPTER *ioc, int reset_phase)
  1369. {
  1370. if ((MptDriverClass[index] == MPTSPI_DRIVER &&
  1371. ioc->bus_type != SPI) ||
  1372. (MptDriverClass[index] == MPTFC_DRIVER &&
  1373. ioc->bus_type != FC) ||
  1374. (MptDriverClass[index] == MPTSAS_DRIVER &&
  1375. ioc->bus_type != SAS))
  1376. /* make sure we only call the relevant reset handler
  1377. * for the bus */
  1378. return 0;
  1379. return (MptResetHandlers[index])(ioc, reset_phase);
  1380. }
  1381. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1382. /**
  1383. * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
  1384. * @ioc: Pointer to MPT adapter structure
  1385. * @reason: Event word / reason
  1386. * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
  1387. *
  1388. * This routine performs all the steps necessary to bring the IOC
  1389. * to a OPERATIONAL state.
  1390. *
  1391. * This routine also pre-fetches the LAN MAC address of a Fibre Channel
  1392. * MPT adapter.
  1393. *
  1394. * Returns:
  1395. * 0 for success
  1396. * -1 if failed to get board READY
  1397. * -2 if READY but IOCFacts Failed
  1398. * -3 if READY but PrimeIOCFifos Failed
  1399. * -4 if READY but IOCInit Failed
  1400. */
  1401. static int
  1402. mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
  1403. {
  1404. int hard_reset_done = 0;
  1405. int alt_ioc_ready = 0;
  1406. int hard;
  1407. int rc=0;
  1408. int ii;
  1409. int handlers;
  1410. int ret = 0;
  1411. int reset_alt_ioc_active = 0;
  1412. int irq_allocated = 0;
  1413. printk(KERN_INFO MYNAM ": Initiating %s %s\n",
  1414. ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
  1415. /* Disable reply interrupts (also blocks FreeQ) */
  1416. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1417. ioc->active = 0;
  1418. if (ioc->alt_ioc) {
  1419. if (ioc->alt_ioc->active)
  1420. reset_alt_ioc_active = 1;
  1421. /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
  1422. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
  1423. ioc->alt_ioc->active = 0;
  1424. }
  1425. hard = 1;
  1426. if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
  1427. hard = 0;
  1428. if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
  1429. if (hard_reset_done == -4) {
  1430. printk(KERN_WARNING MYNAM ": %s Owned by PEER..skipping!\n",
  1431. ioc->name);
  1432. if (reset_alt_ioc_active && ioc->alt_ioc) {
  1433. /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
  1434. dprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
  1435. ioc->alt_ioc->name));
  1436. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
  1437. ioc->alt_ioc->active = 1;
  1438. }
  1439. } else {
  1440. printk(KERN_WARNING MYNAM ": %s NOT READY WARNING!\n",
  1441. ioc->name);
  1442. }
  1443. return -1;
  1444. }
  1445. /* hard_reset_done = 0 if a soft reset was performed
  1446. * and 1 if a hard reset was performed.
  1447. */
  1448. if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
  1449. if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
  1450. alt_ioc_ready = 1;
  1451. else
  1452. printk(KERN_WARNING MYNAM
  1453. ": alt-%s: Not ready WARNING!\n",
  1454. ioc->alt_ioc->name);
  1455. }
  1456. for (ii=0; ii<5; ii++) {
  1457. /* Get IOC facts! Allow 5 retries */
  1458. if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
  1459. break;
  1460. }
  1461. if (ii == 5) {
  1462. dinitprintk((MYIOC_s_INFO_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc));
  1463. ret = -2;
  1464. } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  1465. MptDisplayIocCapabilities(ioc);
  1466. }
  1467. if (alt_ioc_ready) {
  1468. if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
  1469. dinitprintk((MYIOC_s_INFO_FMT "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
  1470. /* Retry - alt IOC was initialized once
  1471. */
  1472. rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
  1473. }
  1474. if (rc) {
  1475. dinitprintk((MYIOC_s_INFO_FMT "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
  1476. alt_ioc_ready = 0;
  1477. reset_alt_ioc_active = 0;
  1478. } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  1479. MptDisplayIocCapabilities(ioc->alt_ioc);
  1480. }
  1481. }
  1482. /*
  1483. * Device is reset now. It must have de-asserted the interrupt line
  1484. * (if it was asserted) and it should be safe to register for the
  1485. * interrupt now.
  1486. */
  1487. if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
  1488. ioc->pci_irq = -1;
  1489. if (ioc->pcidev->irq) {
  1490. if (mpt_msi_enable && !pci_enable_msi(ioc->pcidev))
  1491. printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
  1492. ioc->name);
  1493. rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
  1494. IRQF_SHARED, ioc->name, ioc);
  1495. if (rc < 0) {
  1496. printk(MYIOC_s_ERR_FMT "Unable to allocate "
  1497. "interrupt %d!\n", ioc->name,
  1498. ioc->pcidev->irq);
  1499. if (mpt_msi_enable)
  1500. pci_disable_msi(ioc->pcidev);
  1501. return -EBUSY;
  1502. }
  1503. irq_allocated = 1;
  1504. ioc->pci_irq = ioc->pcidev->irq;
  1505. pci_set_master(ioc->pcidev); /* ?? */
  1506. pci_set_drvdata(ioc->pcidev, ioc);
  1507. dprintk((KERN_INFO MYNAM ": %s installed at interrupt "
  1508. "%d\n", ioc->name, ioc->pcidev->irq));
  1509. }
  1510. }
  1511. /* Prime reply & request queues!
  1512. * (mucho alloc's) Must be done prior to
  1513. * init as upper addresses are needed for init.
  1514. * If fails, continue with alt-ioc processing
  1515. */
  1516. if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
  1517. ret = -3;
  1518. /* May need to check/upload firmware & data here!
  1519. * If fails, continue with alt-ioc processing
  1520. */
  1521. if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
  1522. ret = -4;
  1523. // NEW!
  1524. if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
  1525. printk(KERN_WARNING MYNAM ": alt-%s: (%d) FIFO mgmt alloc WARNING!\n",
  1526. ioc->alt_ioc->name, rc);
  1527. alt_ioc_ready = 0;
  1528. reset_alt_ioc_active = 0;
  1529. }
  1530. if (alt_ioc_ready) {
  1531. if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
  1532. alt_ioc_ready = 0;
  1533. reset_alt_ioc_active = 0;
  1534. printk(KERN_WARNING MYNAM
  1535. ": alt-%s: (%d) init failure WARNING!\n",
  1536. ioc->alt_ioc->name, rc);
  1537. }
  1538. }
  1539. if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
  1540. if (ioc->upload_fw) {
  1541. ddlprintk((MYIOC_s_INFO_FMT
  1542. "firmware upload required!\n", ioc->name));
  1543. /* Controller is not operational, cannot do upload
  1544. */
  1545. if (ret == 0) {
  1546. rc = mpt_do_upload(ioc, sleepFlag);
  1547. if (rc == 0) {
  1548. if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
  1549. /*
  1550. * Maintain only one pointer to FW memory
  1551. * so there will not be two attempt to
  1552. * downloadboot onboard dual function
  1553. * chips (mpt_adapter_disable,
  1554. * mpt_diag_reset)
  1555. */
  1556. ddlprintk((MYIOC_s_INFO_FMT ": mpt_upload: alt_%s has cached_fw=%p \n",
  1557. ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
  1558. ioc->alt_ioc->cached_fw = NULL;
  1559. }
  1560. } else {
  1561. printk(KERN_WARNING MYNAM ": firmware upload failure!\n");
  1562. ret = -5;
  1563. }
  1564. }
  1565. }
  1566. }
  1567. if (ret == 0) {
  1568. /* Enable! (reply interrupt) */
  1569. CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
  1570. ioc->active = 1;
  1571. }
  1572. if (reset_alt_ioc_active && ioc->alt_ioc) {
  1573. /* (re)Enable alt-IOC! (reply interrupt) */
  1574. dinitprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
  1575. ioc->alt_ioc->name));
  1576. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
  1577. ioc->alt_ioc->active = 1;
  1578. }
  1579. /* Enable MPT base driver management of EventNotification
  1580. * and EventAck handling.
  1581. */
  1582. if ((ret == 0) && (!ioc->facts.EventState))
  1583. (void) SendEventNotification(ioc, 1); /* 1=Enable EventNotification */
  1584. if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
  1585. (void) SendEventNotification(ioc->alt_ioc, 1); /* 1=Enable EventNotification */
  1586. /* Add additional "reason" check before call to GetLanConfigPages
  1587. * (combined with GetIoUnitPage2 call). This prevents a somewhat
  1588. * recursive scenario; GetLanConfigPages times out, timer expired
  1589. * routine calls HardResetHandler, which calls into here again,
  1590. * and we try GetLanConfigPages again...
  1591. */
  1592. if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
  1593. /*
  1594. * Initalize link list for inactive raid volumes.
  1595. */
  1596. init_MUTEX(&ioc->raid_data.inactive_list_mutex);
  1597. INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
  1598. if (ioc->bus_type == SAS) {
  1599. /* clear persistency table */
  1600. if(ioc->facts.IOCExceptions &
  1601. MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
  1602. ret = mptbase_sas_persist_operation(ioc,
  1603. MPI_SAS_OP_CLEAR_NOT_PRESENT);
  1604. if(ret != 0)
  1605. goto out;
  1606. }
  1607. /* Find IM volumes
  1608. */
  1609. mpt_findImVolumes(ioc);
  1610. } else if (ioc->bus_type == FC) {
  1611. if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
  1612. (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
  1613. /*
  1614. * Pre-fetch the ports LAN MAC address!
  1615. * (LANPage1_t stuff)
  1616. */
  1617. (void) GetLanConfigPages(ioc);
  1618. #ifdef MPT_DEBUG
  1619. {
  1620. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  1621. dprintk((MYIOC_s_INFO_FMT "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
  1622. ioc->name, a[5], a[4], a[3], a[2], a[1], a[0] ));
  1623. }
  1624. #endif
  1625. }
  1626. } else {
  1627. /* Get NVRAM and adapter maximums from SPP 0 and 2
  1628. */
  1629. mpt_GetScsiPortSettings(ioc, 0);
  1630. /* Get version and length of SDP 1
  1631. */
  1632. mpt_readScsiDevicePageHeaders(ioc, 0);
  1633. /* Find IM volumes
  1634. */
  1635. if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
  1636. mpt_findImVolumes(ioc);
  1637. /* Check, and possibly reset, the coalescing value
  1638. */
  1639. mpt_read_ioc_pg_1(ioc);
  1640. mpt_read_ioc_pg_4(ioc);
  1641. }
  1642. GetIoUnitPage2(ioc);
  1643. }
  1644. /*
  1645. * Call each currently registered protocol IOC reset handler
  1646. * with post-reset indication.
  1647. * NOTE: If we're doing _IOC_BRINGUP, there can be no
  1648. * MptResetHandlers[] registered yet.
  1649. */
  1650. if (hard_reset_done) {
  1651. rc = handlers = 0;
  1652. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  1653. if ((ret == 0) && MptResetHandlers[ii]) {
  1654. dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n",
  1655. ioc->name, ii));
  1656. rc += mpt_signal_reset(ii, ioc, MPT_IOC_POST_RESET);
  1657. handlers++;
  1658. }
  1659. if (alt_ioc_ready && MptResetHandlers[ii]) {
  1660. drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n",
  1661. ioc->name, ioc->alt_ioc->name, ii));
  1662. rc += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_POST_RESET);
  1663. handlers++;
  1664. }
  1665. }
  1666. /* FIXME? Examine results here? */
  1667. }
  1668. out:
  1669. if ((ret != 0) && irq_allocated) {
  1670. free_irq(ioc->pci_irq, ioc);
  1671. if (mpt_msi_enable)
  1672. pci_disable_msi(ioc->pcidev);
  1673. }
  1674. return ret;
  1675. }
  1676. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1677. /**
  1678. * mpt_detect_bound_ports - Search for matching PCI bus/dev_function
  1679. * @ioc: Pointer to MPT adapter structure
  1680. * @pdev: Pointer to (struct pci_dev) structure
  1681. *
  1682. * Search for PCI bus/dev_function which matches
  1683. * PCI bus/dev_function (+/-1) for newly discovered 929,
  1684. * 929X, 1030 or 1035.
  1685. *
  1686. * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
  1687. * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
  1688. */
  1689. static void
  1690. mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
  1691. {
  1692. struct pci_dev *peer=NULL;
  1693. unsigned int slot = PCI_SLOT(pdev->devfn);
  1694. unsigned int func = PCI_FUNC(pdev->devfn);
  1695. MPT_ADAPTER *ioc_srch;
  1696. dprintk((MYIOC_s_INFO_FMT "PCI device %s devfn=%x/%x,"
  1697. " searching for devfn match on %x or %x\n",
  1698. ioc->name, pci_name(pdev), pdev->bus->number,
  1699. pdev->devfn, func-1, func+1));
  1700. peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
  1701. if (!peer) {
  1702. peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
  1703. if (!peer)
  1704. return;
  1705. }
  1706. list_for_each_entry(ioc_srch, &ioc_list, list) {
  1707. struct pci_dev *_pcidev = ioc_srch->pcidev;
  1708. if (_pcidev == peer) {
  1709. /* Paranoia checks */
  1710. if (ioc->alt_ioc != NULL) {
  1711. printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
  1712. ioc->name, ioc->alt_ioc->name);
  1713. break;
  1714. } else if (ioc_srch->alt_ioc != NULL) {
  1715. printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
  1716. ioc_srch->name, ioc_srch->alt_ioc->name);
  1717. break;
  1718. }
  1719. dprintk((KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n",
  1720. ioc->name, ioc_srch->name));
  1721. ioc_srch->alt_ioc = ioc;
  1722. ioc->alt_ioc = ioc_srch;
  1723. }
  1724. }
  1725. pci_dev_put(peer);
  1726. }
  1727. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1728. /**
  1729. * mpt_adapter_disable - Disable misbehaving MPT adapter.
  1730. * @ioc: Pointer to MPT adapter structure
  1731. */
  1732. static void
  1733. mpt_adapter_disable(MPT_ADAPTER *ioc)
  1734. {
  1735. int sz;
  1736. int ret;
  1737. if (ioc->cached_fw != NULL) {
  1738. ddlprintk((KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n"));
  1739. if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) {
  1740. printk(KERN_WARNING MYNAM
  1741. ": firmware downloadboot failure (%d)!\n", ret);
  1742. }
  1743. }
  1744. /* Disable adapter interrupts! */
  1745. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1746. ioc->active = 0;
  1747. /* Clear any lingering interrupt */
  1748. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1749. if (ioc->alloc != NULL) {
  1750. sz = ioc->alloc_sz;
  1751. dexitprintk((KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n",
  1752. ioc->name, ioc->alloc, ioc->alloc_sz));
  1753. pci_free_consistent(ioc->pcidev, sz,
  1754. ioc->alloc, ioc->alloc_dma);
  1755. ioc->reply_frames = NULL;
  1756. ioc->req_frames = NULL;
  1757. ioc->alloc = NULL;
  1758. ioc->alloc_total -= sz;
  1759. }
  1760. if (ioc->sense_buf_pool != NULL) {
  1761. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  1762. pci_free_consistent(ioc->pcidev, sz,
  1763. ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
  1764. ioc->sense_buf_pool = NULL;
  1765. ioc->alloc_total -= sz;
  1766. }
  1767. if (ioc->events != NULL){
  1768. sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
  1769. kfree(ioc->events);
  1770. ioc->events = NULL;
  1771. ioc->alloc_total -= sz;
  1772. }
  1773. if (ioc->cached_fw != NULL) {
  1774. sz = ioc->facts.FWImageSize;
  1775. pci_free_consistent(ioc->pcidev, sz,
  1776. ioc->cached_fw, ioc->cached_fw_dma);
  1777. ioc->cached_fw = NULL;
  1778. ioc->alloc_total -= sz;
  1779. }
  1780. kfree(ioc->spi_data.nvram);
  1781. mpt_inactive_raid_list_free(ioc);
  1782. kfree(ioc->raid_data.pIocPg2);
  1783. kfree(ioc->raid_data.pIocPg3);
  1784. ioc->spi_data.nvram = NULL;
  1785. ioc->raid_data.pIocPg3 = NULL;
  1786. if (ioc->spi_data.pIocPg4 != NULL) {
  1787. sz = ioc->spi_data.IocPg4Sz;
  1788. pci_free_consistent(ioc->pcidev, sz,
  1789. ioc->spi_data.pIocPg4,
  1790. ioc->spi_data.IocPg4_dma);
  1791. ioc->spi_data.pIocPg4 = NULL;
  1792. ioc->alloc_total -= sz;
  1793. }
  1794. if (ioc->ReqToChain != NULL) {
  1795. kfree(ioc->ReqToChain);
  1796. kfree(ioc->RequestNB);
  1797. ioc->ReqToChain = NULL;
  1798. }
  1799. kfree(ioc->ChainToChain);
  1800. ioc->ChainToChain = NULL;
  1801. if (ioc->HostPageBuffer != NULL) {
  1802. if((ret = mpt_host_page_access_control(ioc,
  1803. MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
  1804. printk(KERN_ERR MYNAM
  1805. ": %s: host page buffers free failed (%d)!\n",
  1806. __FUNCTION__, ret);
  1807. }
  1808. dexitprintk((KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n",
  1809. ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
  1810. pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
  1811. ioc->HostPageBuffer,
  1812. ioc->HostPageBuffer_dma);
  1813. ioc->HostPageBuffer = NULL;
  1814. ioc->HostPageBuffer_sz = 0;
  1815. ioc->alloc_total -= ioc->HostPageBuffer_sz;
  1816. }
  1817. }
  1818. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1819. /**
  1820. * mpt_adapter_dispose - Free all resources associated with an MPT adapter
  1821. * @ioc: Pointer to MPT adapter structure
  1822. *
  1823. * This routine unregisters h/w resources and frees all alloc'd memory
  1824. * associated with a MPT adapter structure.
  1825. */
  1826. static void
  1827. mpt_adapter_dispose(MPT_ADAPTER *ioc)
  1828. {
  1829. int sz_first, sz_last;
  1830. if (ioc == NULL)
  1831. return;
  1832. sz_first = ioc->alloc_total;
  1833. mpt_adapter_disable(ioc);
  1834. if (ioc->pci_irq != -1) {
  1835. free_irq(ioc->pci_irq, ioc);
  1836. if (mpt_msi_enable)
  1837. pci_disable_msi(ioc->pcidev);
  1838. ioc->pci_irq = -1;
  1839. }
  1840. if (ioc->memmap != NULL) {
  1841. iounmap(ioc->memmap);
  1842. ioc->memmap = NULL;
  1843. }
  1844. #if defined(CONFIG_MTRR) && 0
  1845. if (ioc->mtrr_reg > 0) {
  1846. mtrr_del(ioc->mtrr_reg, 0, 0);
  1847. dprintk((KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name));
  1848. }
  1849. #endif
  1850. /* Zap the adapter lookup ptr! */
  1851. list_del(&ioc->list);
  1852. sz_last = ioc->alloc_total;
  1853. dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
  1854. ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
  1855. if (ioc->alt_ioc)
  1856. ioc->alt_ioc->alt_ioc = NULL;
  1857. kfree(ioc);
  1858. }
  1859. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1860. /**
  1861. * MptDisplayIocCapabilities - Disply IOC's capabilities.
  1862. * @ioc: Pointer to MPT adapter structure
  1863. */
  1864. static void
  1865. MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
  1866. {
  1867. int i = 0;
  1868. printk(KERN_INFO "%s: ", ioc->name);
  1869. if (ioc->prod_name && strlen(ioc->prod_name) > 3)
  1870. printk("%s: ", ioc->prod_name+3);
  1871. printk("Capabilities={");
  1872. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
  1873. printk("Initiator");
  1874. i++;
  1875. }
  1876. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
  1877. printk("%sTarget", i ? "," : "");
  1878. i++;
  1879. }
  1880. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
  1881. printk("%sLAN", i ? "," : "");
  1882. i++;
  1883. }
  1884. #if 0
  1885. /*
  1886. * This would probably evoke more questions than it's worth
  1887. */
  1888. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
  1889. printk("%sLogBusAddr", i ? "," : "");
  1890. i++;
  1891. }
  1892. #endif
  1893. printk("}\n");
  1894. }
  1895. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1896. /**
  1897. * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
  1898. * @ioc: Pointer to MPT_ADAPTER structure
  1899. * @force: Force hard KickStart of IOC
  1900. * @sleepFlag: Specifies whether the process can sleep
  1901. *
  1902. * Returns:
  1903. * 1 - DIAG reset and READY
  1904. * 0 - READY initially OR soft reset and READY
  1905. * -1 - Any failure on KickStart
  1906. * -2 - Msg Unit Reset Failed
  1907. * -3 - IO Unit Reset Failed
  1908. * -4 - IOC owned by a PEER
  1909. */
  1910. static int
  1911. MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
  1912. {
  1913. u32 ioc_state;
  1914. int statefault = 0;
  1915. int cntdn;
  1916. int hard_reset_done = 0;
  1917. int r;
  1918. int ii;
  1919. int whoinit;
  1920. /* Get current [raw] IOC state */
  1921. ioc_state = mpt_GetIocState(ioc, 0);
  1922. dhsprintk((KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state));
  1923. /*
  1924. * Check to see if IOC got left/stuck in doorbell handshake
  1925. * grip of death. If so, hard reset the IOC.
  1926. */
  1927. if (ioc_state & MPI_DOORBELL_ACTIVE) {
  1928. statefault = 1;
  1929. printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
  1930. ioc->name);
  1931. }
  1932. /* Is it already READY? */
  1933. if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
  1934. return 0;
  1935. /*
  1936. * Check to see if IOC is in FAULT state.
  1937. */
  1938. if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
  1939. statefault = 2;
  1940. printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
  1941. ioc->name);
  1942. printk(KERN_WARNING " FAULT code = %04xh\n",
  1943. ioc_state & MPI_DOORBELL_DATA_MASK);
  1944. }
  1945. /*
  1946. * Hmmm... Did it get left operational?
  1947. */
  1948. if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
  1949. dinitprintk((MYIOC_s_INFO_FMT "IOC operational unexpected\n",
  1950. ioc->name));
  1951. /* Check WhoInit.
  1952. * If PCI Peer, exit.
  1953. * Else, if no fault conditions are present, issue a MessageUnitReset
  1954. * Else, fall through to KickStart case
  1955. */
  1956. whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
  1957. dinitprintk((KERN_INFO MYNAM
  1958. ": whoinit 0x%x statefault %d force %d\n",
  1959. whoinit, statefault, force));
  1960. if (whoinit == MPI_WHOINIT_PCI_PEER)
  1961. return -4;
  1962. else {
  1963. if ((statefault == 0 ) && (force == 0)) {
  1964. if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
  1965. return 0;
  1966. }
  1967. statefault = 3;
  1968. }
  1969. }
  1970. hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
  1971. if (hard_reset_done < 0)
  1972. return -1;
  1973. /*
  1974. * Loop here waiting for IOC to come READY.
  1975. */
  1976. ii = 0;
  1977. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
  1978. while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
  1979. if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
  1980. /*
  1981. * BIOS or previous driver load left IOC in OP state.
  1982. * Reset messaging FIFOs.
  1983. */
  1984. if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
  1985. printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
  1986. return -2;
  1987. }
  1988. } else if (ioc_state == MPI_IOC_STATE_RESET) {
  1989. /*
  1990. * Something is wrong. Try to get IOC back
  1991. * to a known state.
  1992. */
  1993. if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
  1994. printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
  1995. return -3;
  1996. }
  1997. }
  1998. ii++; cntdn--;
  1999. if (!cntdn) {
  2000. printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
  2001. ioc->name, (int)((ii+5)/HZ));
  2002. return -ETIME;
  2003. }
  2004. if (sleepFlag == CAN_SLEEP) {
  2005. msleep(1);
  2006. } else {
  2007. mdelay (1); /* 1 msec delay */
  2008. }
  2009. }
  2010. if (statefault < 3) {
  2011. printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
  2012. ioc->name,
  2013. statefault==1 ? "stuck handshake" : "IOC FAULT");
  2014. }
  2015. return hard_reset_done;
  2016. }
  2017. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2018. /**
  2019. * mpt_GetIocState - Get the current state of a MPT adapter.
  2020. * @ioc: Pointer to MPT_ADAPTER structure
  2021. * @cooked: Request raw or cooked IOC state
  2022. *
  2023. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2024. * Doorbell bits in MPI_IOC_STATE_MASK.
  2025. */
  2026. u32
  2027. mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
  2028. {
  2029. u32 s, sc;
  2030. /* Get! */
  2031. s = CHIPREG_READ32(&ioc->chip->Doorbell);
  2032. // dprintk((MYIOC_s_INFO_FMT "raw state = %08x\n", ioc->name, s));
  2033. sc = s & MPI_IOC_STATE_MASK;
  2034. /* Save! */
  2035. ioc->last_state = sc;
  2036. return cooked ? sc : s;
  2037. }
  2038. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2039. /**
  2040. * GetIocFacts - Send IOCFacts request to MPT adapter.
  2041. * @ioc: Pointer to MPT_ADAPTER structure
  2042. * @sleepFlag: Specifies whether the process can sleep
  2043. * @reason: If recovery, only update facts.
  2044. *
  2045. * Returns 0 for success, non-zero for failure.
  2046. */
  2047. static int
  2048. GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
  2049. {
  2050. IOCFacts_t get_facts;
  2051. IOCFactsReply_t *facts;
  2052. int r;
  2053. int req_sz;
  2054. int reply_sz;
  2055. int sz;
  2056. u32 status, vv;
  2057. u8 shiftFactor=1;
  2058. /* IOC *must* NOT be in RESET state! */
  2059. if (ioc->last_state == MPI_IOC_STATE_RESET) {
  2060. printk(KERN_ERR MYNAM ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
  2061. ioc->name,
  2062. ioc->last_state );
  2063. return -44;
  2064. }
  2065. facts = &ioc->facts;
  2066. /* Destination (reply area)... */
  2067. reply_sz = sizeof(*facts);
  2068. memset(facts, 0, reply_sz);
  2069. /* Request area (get_facts on the stack right now!) */
  2070. req_sz = sizeof(get_facts);
  2071. memset(&get_facts, 0, req_sz);
  2072. get_facts.Function = MPI_FUNCTION_IOC_FACTS;
  2073. /* Assert: All other get_facts fields are zero! */
  2074. dinitprintk((MYIOC_s_INFO_FMT
  2075. "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
  2076. ioc->name, req_sz, reply_sz));
  2077. /* No non-zero fields in the get_facts request are greater than
  2078. * 1 byte in size, so we can just fire it off as is.
  2079. */
  2080. r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
  2081. reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
  2082. if (r != 0)
  2083. return r;
  2084. /*
  2085. * Now byte swap (GRRR) the necessary fields before any further
  2086. * inspection of reply contents.
  2087. *
  2088. * But need to do some sanity checks on MsgLength (byte) field
  2089. * to make sure we don't zero IOC's req_sz!
  2090. */
  2091. /* Did we get a valid reply? */
  2092. if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
  2093. if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  2094. /*
  2095. * If not been here, done that, save off first WhoInit value
  2096. */
  2097. if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
  2098. ioc->FirstWhoInit = facts->WhoInit;
  2099. }
  2100. facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
  2101. facts->MsgContext = le32_to_cpu(facts->MsgContext);
  2102. facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
  2103. facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
  2104. facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
  2105. status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
  2106. /* CHECKME! IOCStatus, IOCLogInfo */
  2107. facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
  2108. facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
  2109. /*
  2110. * FC f/w version changed between 1.1 and 1.2
  2111. * Old: u16{Major(4),Minor(4),SubMinor(8)}
  2112. * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
  2113. */
  2114. if (facts->MsgVersion < 0x0102) {
  2115. /*
  2116. * Handle old FC f/w style, convert to new...
  2117. */
  2118. u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
  2119. facts->FWVersion.Word =
  2120. ((oldv<<12) & 0xFF000000) |
  2121. ((oldv<<8) & 0x000FFF00);
  2122. } else
  2123. facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
  2124. facts->ProductID = le16_to_cpu(facts->ProductID);
  2125. if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
  2126. > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
  2127. ioc->ir_firmware = 1;
  2128. facts->CurrentHostMfaHighAddr =
  2129. le32_to_cpu(facts->CurrentHostMfaHighAddr);
  2130. facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
  2131. facts->CurrentSenseBufferHighAddr =
  2132. le32_to_cpu(facts->CurrentSenseBufferHighAddr);
  2133. facts->CurReplyFrameSize =
  2134. le16_to_cpu(facts->CurReplyFrameSize);
  2135. facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
  2136. /*
  2137. * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
  2138. * Older MPI-1.00.xx struct had 13 dwords, and enlarged
  2139. * to 14 in MPI-1.01.0x.
  2140. */
  2141. if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
  2142. facts->MsgVersion > 0x0100) {
  2143. facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
  2144. }
  2145. sz = facts->FWImageSize;
  2146. if ( sz & 0x01 )
  2147. sz += 1;
  2148. if ( sz & 0x02 )
  2149. sz += 2;
  2150. facts->FWImageSize = sz;
  2151. if (!facts->RequestFrameSize) {
  2152. /* Something is wrong! */
  2153. printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
  2154. ioc->name);
  2155. return -55;
  2156. }
  2157. r = sz = facts->BlockSize;
  2158. vv = ((63 / (sz * 4)) + 1) & 0x03;
  2159. ioc->NB_for_64_byte_frame = vv;
  2160. while ( sz )
  2161. {
  2162. shiftFactor++;
  2163. sz = sz >> 1;
  2164. }
  2165. ioc->NBShiftFactor = shiftFactor;
  2166. dinitprintk((MYIOC_s_INFO_FMT "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
  2167. ioc->name, vv, shiftFactor, r));
  2168. if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  2169. /*
  2170. * Set values for this IOC's request & reply frame sizes,
  2171. * and request & reply queue depths...
  2172. */
  2173. ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
  2174. ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
  2175. ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
  2176. ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
  2177. dinitprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n",
  2178. ioc->name, ioc->reply_sz, ioc->reply_depth));
  2179. dinitprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n",
  2180. ioc->name, ioc->req_sz, ioc->req_depth));
  2181. /* Get port facts! */
  2182. if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
  2183. return r;
  2184. }
  2185. } else {
  2186. printk(MYIOC_s_ERR_FMT
  2187. "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
  2188. ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
  2189. RequestFrameSize)/sizeof(u32)));
  2190. return -66;
  2191. }
  2192. return 0;
  2193. }
  2194. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2195. /**
  2196. * GetPortFacts - Send PortFacts request to MPT adapter.
  2197. * @ioc: Pointer to MPT_ADAPTER structure
  2198. * @portnum: Port number
  2199. * @sleepFlag: Specifies whether the process can sleep
  2200. *
  2201. * Returns 0 for success, non-zero for failure.
  2202. */
  2203. static int
  2204. GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
  2205. {
  2206. PortFacts_t get_pfacts;
  2207. PortFactsReply_t *pfacts;
  2208. int ii;
  2209. int req_sz;
  2210. int reply_sz;
  2211. int max_id;
  2212. /* IOC *must* NOT be in RESET state! */
  2213. if (ioc->last_state == MPI_IOC_STATE_RESET) {
  2214. printk(KERN_ERR MYNAM ": ERROR - Can't get PortFacts, %s NOT READY! (%08x)\n",
  2215. ioc->name,
  2216. ioc->last_state );
  2217. return -4;
  2218. }
  2219. pfacts = &ioc->pfacts[portnum];
  2220. /* Destination (reply area)... */
  2221. reply_sz = sizeof(*pfacts);
  2222. memset(pfacts, 0, reply_sz);
  2223. /* Request area (get_pfacts on the stack right now!) */
  2224. req_sz = sizeof(get_pfacts);
  2225. memset(&get_pfacts, 0, req_sz);
  2226. get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
  2227. get_pfacts.PortNumber = portnum;
  2228. /* Assert: All other get_pfacts fields are zero! */
  2229. dinitprintk((MYIOC_s_INFO_FMT "Sending get PortFacts(%d) request\n",
  2230. ioc->name, portnum));
  2231. /* No non-zero fields in the get_pfacts request are greater than
  2232. * 1 byte in size, so we can just fire it off as is.
  2233. */
  2234. ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
  2235. reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
  2236. if (ii != 0)
  2237. return ii;
  2238. /* Did we get a valid reply? */
  2239. /* Now byte swap the necessary fields in the response. */
  2240. pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
  2241. pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
  2242. pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
  2243. pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
  2244. pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
  2245. pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
  2246. pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
  2247. pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
  2248. pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
  2249. max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
  2250. pfacts->MaxDevices;
  2251. ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
  2252. ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
  2253. /*
  2254. * Place all the devices on channels
  2255. *
  2256. * (for debuging)
  2257. */
  2258. if (mpt_channel_mapping) {
  2259. ioc->devices_per_bus = 1;
  2260. ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
  2261. }
  2262. return 0;
  2263. }
  2264. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2265. /**
  2266. * SendIocInit - Send IOCInit request to MPT adapter.
  2267. * @ioc: Pointer to MPT_ADAPTER structure
  2268. * @sleepFlag: Specifies whether the process can sleep
  2269. *
  2270. * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
  2271. *
  2272. * Returns 0 for success, non-zero for failure.
  2273. */
  2274. static int
  2275. SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
  2276. {
  2277. IOCInit_t ioc_init;
  2278. MPIDefaultReply_t init_reply;
  2279. u32 state;
  2280. int r;
  2281. int count;
  2282. int cntdn;
  2283. memset(&ioc_init, 0, sizeof(ioc_init));
  2284. memset(&init_reply, 0, sizeof(init_reply));
  2285. ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
  2286. ioc_init.Function = MPI_FUNCTION_IOC_INIT;
  2287. /* If we are in a recovery mode and we uploaded the FW image,
  2288. * then this pointer is not NULL. Skip the upload a second time.
  2289. * Set this flag if cached_fw set for either IOC.
  2290. */
  2291. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
  2292. ioc->upload_fw = 1;
  2293. else
  2294. ioc->upload_fw = 0;
  2295. ddlprintk((MYIOC_s_INFO_FMT "upload_fw %d facts.Flags=%x\n",
  2296. ioc->name, ioc->upload_fw, ioc->facts.Flags));
  2297. ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
  2298. ioc_init.MaxBuses = (U8)ioc->number_of_buses;
  2299. dinitprintk((MYIOC_s_INFO_FMT "facts.MsgVersion=%x\n",
  2300. ioc->name, ioc->facts.MsgVersion));
  2301. if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
  2302. // set MsgVersion and HeaderVersion host driver was built with
  2303. ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
  2304. ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
  2305. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
  2306. ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
  2307. } else if(mpt_host_page_alloc(ioc, &ioc_init))
  2308. return -99;
  2309. }
  2310. ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
  2311. if (sizeof(dma_addr_t) == sizeof(u64)) {
  2312. /* Save the upper 32-bits of the request
  2313. * (reply) and sense buffers.
  2314. */
  2315. ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
  2316. ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
  2317. } else {
  2318. /* Force 32-bit addressing */
  2319. ioc_init.HostMfaHighAddr = cpu_to_le32(0);
  2320. ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
  2321. }
  2322. ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
  2323. ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
  2324. ioc->facts.MaxDevices = ioc_init.MaxDevices;
  2325. ioc->facts.MaxBuses = ioc_init.MaxBuses;
  2326. dhsprintk((MYIOC_s_INFO_FMT "Sending IOCInit (req @ %p)\n",
  2327. ioc->name, &ioc_init));
  2328. r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
  2329. sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
  2330. if (r != 0) {
  2331. printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
  2332. return r;
  2333. }
  2334. /* No need to byte swap the multibyte fields in the reply
  2335. * since we don't even look at its contents.
  2336. */
  2337. dhsprintk((MYIOC_s_INFO_FMT "Sending PortEnable (req @ %p)\n",
  2338. ioc->name, &ioc_init));
  2339. if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
  2340. printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
  2341. return r;
  2342. }
  2343. /* YIKES! SUPER IMPORTANT!!!
  2344. * Poll IocState until _OPERATIONAL while IOC is doing
  2345. * LoopInit and TargetDiscovery!
  2346. */
  2347. count = 0;
  2348. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
  2349. state = mpt_GetIocState(ioc, 1);
  2350. while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
  2351. if (sleepFlag == CAN_SLEEP) {
  2352. msleep(1);
  2353. } else {
  2354. mdelay(1);
  2355. }
  2356. if (!cntdn) {
  2357. printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
  2358. ioc->name, (int)((count+5)/HZ));
  2359. return -9;
  2360. }
  2361. state = mpt_GetIocState(ioc, 1);
  2362. count++;
  2363. }
  2364. dinitprintk((MYIOC_s_INFO_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n",
  2365. ioc->name, count));
  2366. ioc->aen_event_read_flag=0;
  2367. return r;
  2368. }
  2369. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2370. /**
  2371. * SendPortEnable - Send PortEnable request to MPT adapter port.
  2372. * @ioc: Pointer to MPT_ADAPTER structure
  2373. * @portnum: Port number to enable
  2374. * @sleepFlag: Specifies whether the process can sleep
  2375. *
  2376. * Send PortEnable to bring IOC to OPERATIONAL state.
  2377. *
  2378. * Returns 0 for success, non-zero for failure.
  2379. */
  2380. static int
  2381. SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
  2382. {
  2383. PortEnable_t port_enable;
  2384. MPIDefaultReply_t reply_buf;
  2385. int rc;
  2386. int req_sz;
  2387. int reply_sz;
  2388. /* Destination... */
  2389. reply_sz = sizeof(MPIDefaultReply_t);
  2390. memset(&reply_buf, 0, reply_sz);
  2391. req_sz = sizeof(PortEnable_t);
  2392. memset(&port_enable, 0, req_sz);
  2393. port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
  2394. port_enable.PortNumber = portnum;
  2395. /* port_enable.ChainOffset = 0; */
  2396. /* port_enable.MsgFlags = 0; */
  2397. /* port_enable.MsgContext = 0; */
  2398. dinitprintk((MYIOC_s_INFO_FMT "Sending Port(%d)Enable (req @ %p)\n",
  2399. ioc->name, portnum, &port_enable));
  2400. /* RAID FW may take a long time to enable
  2401. */
  2402. if (ioc->ir_firmware || ioc->bus_type == SAS) {
  2403. rc = mpt_handshake_req_reply_wait(ioc, req_sz,
  2404. (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
  2405. 300 /*seconds*/, sleepFlag);
  2406. } else {
  2407. rc = mpt_handshake_req_reply_wait(ioc, req_sz,
  2408. (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
  2409. 30 /*seconds*/, sleepFlag);
  2410. }
  2411. return rc;
  2412. }
  2413. /**
  2414. * mpt_alloc_fw_memory - allocate firmware memory
  2415. * @ioc: Pointer to MPT_ADAPTER structure
  2416. * @size: total FW bytes
  2417. *
  2418. * If memory has already been allocated, the same (cached) value
  2419. * is returned.
  2420. */
  2421. void
  2422. mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
  2423. {
  2424. if (ioc->cached_fw)
  2425. return; /* use already allocated memory */
  2426. if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
  2427. ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
  2428. ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
  2429. ioc->alloc_total += size;
  2430. ioc->alt_ioc->alloc_total -= size;
  2431. } else {
  2432. if ( (ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma) ) )
  2433. ioc->alloc_total += size;
  2434. }
  2435. }
  2436. /**
  2437. * mpt_free_fw_memory - free firmware memory
  2438. * @ioc: Pointer to MPT_ADAPTER structure
  2439. *
  2440. * If alt_img is NULL, delete from ioc structure.
  2441. * Else, delete a secondary image in same format.
  2442. */
  2443. void
  2444. mpt_free_fw_memory(MPT_ADAPTER *ioc)
  2445. {
  2446. int sz;
  2447. sz = ioc->facts.FWImageSize;
  2448. dinitprintk((KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
  2449. ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
  2450. pci_free_consistent(ioc->pcidev, sz,
  2451. ioc->cached_fw, ioc->cached_fw_dma);
  2452. ioc->cached_fw = NULL;
  2453. return;
  2454. }
  2455. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2456. /**
  2457. * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
  2458. * @ioc: Pointer to MPT_ADAPTER structure
  2459. * @sleepFlag: Specifies whether the process can sleep
  2460. *
  2461. * Returns 0 for success, >0 for handshake failure
  2462. * <0 for fw upload failure.
  2463. *
  2464. * Remark: If bound IOC and a successful FWUpload was performed
  2465. * on the bound IOC, the second image is discarded
  2466. * and memory is free'd. Both channels must upload to prevent
  2467. * IOC from running in degraded mode.
  2468. */
  2469. static int
  2470. mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
  2471. {
  2472. u8 request[ioc->req_sz];
  2473. u8 reply[sizeof(FWUploadReply_t)];
  2474. FWUpload_t *prequest;
  2475. FWUploadReply_t *preply;
  2476. FWUploadTCSGE_t *ptcsge;
  2477. int sgeoffset;
  2478. u32 flagsLength;
  2479. int ii, sz, reply_sz;
  2480. int cmdStatus;
  2481. /* If the image size is 0, we are done.
  2482. */
  2483. if ((sz = ioc->facts.FWImageSize) == 0)
  2484. return 0;
  2485. mpt_alloc_fw_memory(ioc, sz);
  2486. dinitprintk((KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
  2487. ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
  2488. if (ioc->cached_fw == NULL) {
  2489. /* Major Failure.
  2490. */
  2491. return -ENOMEM;
  2492. }
  2493. prequest = (FWUpload_t *)&request;
  2494. preply = (FWUploadReply_t *)&reply;
  2495. /* Destination... */
  2496. memset(prequest, 0, ioc->req_sz);
  2497. reply_sz = sizeof(reply);
  2498. memset(preply, 0, reply_sz);
  2499. prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
  2500. prequest->Function = MPI_FUNCTION_FW_UPLOAD;
  2501. ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
  2502. ptcsge->DetailsLength = 12;
  2503. ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
  2504. ptcsge->ImageSize = cpu_to_le32(sz);
  2505. sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
  2506. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
  2507. mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma);
  2508. sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
  2509. dinitprintk((KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
  2510. prequest, sgeoffset));
  2511. DBG_DUMP_FW_REQUEST_FRAME(prequest)
  2512. ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
  2513. reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
  2514. dinitprintk((KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii));
  2515. cmdStatus = -EFAULT;
  2516. if (ii == 0) {
  2517. /* Handshake transfer was complete and successful.
  2518. * Check the Reply Frame.
  2519. */
  2520. int status, transfer_sz;
  2521. status = le16_to_cpu(preply->IOCStatus);
  2522. if (status == MPI_IOCSTATUS_SUCCESS) {
  2523. transfer_sz = le32_to_cpu(preply->ActualImageSize);
  2524. if (transfer_sz == sz)
  2525. cmdStatus = 0;
  2526. }
  2527. }
  2528. dinitprintk((MYIOC_s_INFO_FMT ": do_upload cmdStatus=%d \n",
  2529. ioc->name, cmdStatus));
  2530. if (cmdStatus) {
  2531. ddlprintk((MYIOC_s_INFO_FMT ": fw upload failed, freeing image \n",
  2532. ioc->name));
  2533. mpt_free_fw_memory(ioc);
  2534. }
  2535. return cmdStatus;
  2536. }
  2537. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2538. /**
  2539. * mpt_downloadboot - DownloadBoot code
  2540. * @ioc: Pointer to MPT_ADAPTER structure
  2541. * @pFwHeader: Pointer to firmware header info
  2542. * @sleepFlag: Specifies whether the process can sleep
  2543. *
  2544. * FwDownloadBoot requires Programmed IO access.
  2545. *
  2546. * Returns 0 for success
  2547. * -1 FW Image size is 0
  2548. * -2 No valid cached_fw Pointer
  2549. * <0 for fw upload failure.
  2550. */
  2551. static int
  2552. mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
  2553. {
  2554. MpiExtImageHeader_t *pExtImage;
  2555. u32 fwSize;
  2556. u32 diag0val;
  2557. int count;
  2558. u32 *ptrFw;
  2559. u32 diagRwData;
  2560. u32 nextImage;
  2561. u32 load_addr;
  2562. u32 ioc_state=0;
  2563. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
  2564. ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
  2565. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2566. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2567. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2568. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2569. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2570. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2571. CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
  2572. /* wait 1 msec */
  2573. if (sleepFlag == CAN_SLEEP) {
  2574. msleep(1);
  2575. } else {
  2576. mdelay (1);
  2577. }
  2578. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2579. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
  2580. for (count = 0; count < 30; count ++) {
  2581. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2582. if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
  2583. ddlprintk((MYIOC_s_INFO_FMT "RESET_ADAPTER cleared, count=%d\n",
  2584. ioc->name, count));
  2585. break;
  2586. }
  2587. /* wait .1 sec */
  2588. if (sleepFlag == CAN_SLEEP) {
  2589. msleep (100);
  2590. } else {
  2591. mdelay (100);
  2592. }
  2593. }
  2594. if ( count == 30 ) {
  2595. ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! "
  2596. "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
  2597. ioc->name, diag0val));
  2598. return -3;
  2599. }
  2600. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2601. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2602. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2603. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2604. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2605. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2606. /* Set the DiagRwEn and Disable ARM bits */
  2607. CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
  2608. fwSize = (pFwHeader->ImageSize + 3)/4;
  2609. ptrFw = (u32 *) pFwHeader;
  2610. /* Write the LoadStartAddress to the DiagRw Address Register
  2611. * using Programmed IO
  2612. */
  2613. if (ioc->errata_flag_1064)
  2614. pci_enable_io_access(ioc->pcidev);
  2615. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
  2616. ddlprintk((MYIOC_s_INFO_FMT "LoadStart addr written 0x%x \n",
  2617. ioc->name, pFwHeader->LoadStartAddress));
  2618. ddlprintk((MYIOC_s_INFO_FMT "Write FW Image: 0x%x bytes @ %p\n",
  2619. ioc->name, fwSize*4, ptrFw));
  2620. while (fwSize--) {
  2621. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
  2622. }
  2623. nextImage = pFwHeader->NextImageHeaderOffset;
  2624. while (nextImage) {
  2625. pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
  2626. load_addr = pExtImage->LoadStartAddress;
  2627. fwSize = (pExtImage->ImageSize + 3) >> 2;
  2628. ptrFw = (u32 *)pExtImage;
  2629. ddlprintk((MYIOC_s_INFO_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
  2630. ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
  2631. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
  2632. while (fwSize--) {
  2633. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
  2634. }
  2635. nextImage = pExtImage->NextImageHeaderOffset;
  2636. }
  2637. /* Write the IopResetVectorRegAddr */
  2638. ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
  2639. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
  2640. /* Write the IopResetVectorValue */
  2641. ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
  2642. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
  2643. /* Clear the internal flash bad bit - autoincrementing register,
  2644. * so must do two writes.
  2645. */
  2646. if (ioc->bus_type == SPI) {
  2647. /*
  2648. * 1030 and 1035 H/W errata, workaround to access
  2649. * the ClearFlashBadSignatureBit
  2650. */
  2651. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
  2652. diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
  2653. diagRwData |= 0x40000000;
  2654. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
  2655. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
  2656. } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
  2657. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2658. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
  2659. MPI_DIAG_CLEAR_FLASH_BAD_SIG);
  2660. /* wait 1 msec */
  2661. if (sleepFlag == CAN_SLEEP) {
  2662. msleep (1);
  2663. } else {
  2664. mdelay (1);
  2665. }
  2666. }
  2667. if (ioc->errata_flag_1064)
  2668. pci_disable_io_access(ioc->pcidev);
  2669. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2670. ddlprintk((MYIOC_s_INFO_FMT "downloadboot diag0val=%x, "
  2671. "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
  2672. ioc->name, diag0val));
  2673. diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
  2674. ddlprintk((MYIOC_s_INFO_FMT "downloadboot now diag0val=%x\n",
  2675. ioc->name, diag0val));
  2676. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
  2677. /* Write 0xFF to reset the sequencer */
  2678. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2679. if (ioc->bus_type == SAS) {
  2680. ioc_state = mpt_GetIocState(ioc, 0);
  2681. if ( (GetIocFacts(ioc, sleepFlag,
  2682. MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
  2683. ddlprintk((MYIOC_s_INFO_FMT "GetIocFacts failed: IocState=%x\n",
  2684. ioc->name, ioc_state));
  2685. return -EFAULT;
  2686. }
  2687. }
  2688. for (count=0; count<HZ*20; count++) {
  2689. if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
  2690. ddlprintk((MYIOC_s_INFO_FMT "downloadboot successful! (count=%d) IocState=%x\n",
  2691. ioc->name, count, ioc_state));
  2692. if (ioc->bus_type == SAS) {
  2693. return 0;
  2694. }
  2695. if ((SendIocInit(ioc, sleepFlag)) != 0) {
  2696. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit failed\n",
  2697. ioc->name));
  2698. return -EFAULT;
  2699. }
  2700. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit successful\n",
  2701. ioc->name));
  2702. return 0;
  2703. }
  2704. if (sleepFlag == CAN_SLEEP) {
  2705. msleep (10);
  2706. } else {
  2707. mdelay (10);
  2708. }
  2709. }
  2710. ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! IocState=%x\n",
  2711. ioc->name, ioc_state));
  2712. return -EFAULT;
  2713. }
  2714. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2715. /**
  2716. * KickStart - Perform hard reset of MPT adapter.
  2717. * @ioc: Pointer to MPT_ADAPTER structure
  2718. * @force: Force hard reset
  2719. * @sleepFlag: Specifies whether the process can sleep
  2720. *
  2721. * This routine places MPT adapter in diagnostic mode via the
  2722. * WriteSequence register, and then performs a hard reset of adapter
  2723. * via the Diagnostic register.
  2724. *
  2725. * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
  2726. * or NO_SLEEP (interrupt thread, use mdelay)
  2727. * force - 1 if doorbell active, board fault state
  2728. * board operational, IOC_RECOVERY or
  2729. * IOC_BRINGUP and there is an alt_ioc.
  2730. * 0 else
  2731. *
  2732. * Returns:
  2733. * 1 - hard reset, READY
  2734. * 0 - no reset due to History bit, READY
  2735. * -1 - no reset due to History bit but not READY
  2736. * OR reset but failed to come READY
  2737. * -2 - no reset, could not enter DIAG mode
  2738. * -3 - reset but bad FW bit
  2739. */
  2740. static int
  2741. KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
  2742. {
  2743. int hard_reset_done = 0;
  2744. u32 ioc_state=0;
  2745. int cnt,cntdn;
  2746. dinitprintk((KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name));
  2747. if (ioc->bus_type == SPI) {
  2748. /* Always issue a Msg Unit Reset first. This will clear some
  2749. * SCSI bus hang conditions.
  2750. */
  2751. SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
  2752. if (sleepFlag == CAN_SLEEP) {
  2753. msleep (1000);
  2754. } else {
  2755. mdelay (1000);
  2756. }
  2757. }
  2758. hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
  2759. if (hard_reset_done < 0)
  2760. return hard_reset_done;
  2761. dinitprintk((MYIOC_s_INFO_FMT "Diagnostic reset successful!\n",
  2762. ioc->name));
  2763. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
  2764. for (cnt=0; cnt<cntdn; cnt++) {
  2765. ioc_state = mpt_GetIocState(ioc, 1);
  2766. if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
  2767. dinitprintk((MYIOC_s_INFO_FMT "KickStart successful! (cnt=%d)\n",
  2768. ioc->name, cnt));
  2769. return hard_reset_done;
  2770. }
  2771. if (sleepFlag == CAN_SLEEP) {
  2772. msleep (10);
  2773. } else {
  2774. mdelay (10);
  2775. }
  2776. }
  2777. printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
  2778. ioc->name, ioc_state);
  2779. return -1;
  2780. }
  2781. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2782. /**
  2783. * mpt_diag_reset - Perform hard reset of the adapter.
  2784. * @ioc: Pointer to MPT_ADAPTER structure
  2785. * @ignore: Set if to honor and clear to ignore
  2786. * the reset history bit
  2787. * @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
  2788. * else set to NO_SLEEP (use mdelay instead)
  2789. *
  2790. * This routine places the adapter in diagnostic mode via the
  2791. * WriteSequence register and then performs a hard reset of adapter
  2792. * via the Diagnostic register. Adapter should be in ready state
  2793. * upon successful completion.
  2794. *
  2795. * Returns: 1 hard reset successful
  2796. * 0 no reset performed because reset history bit set
  2797. * -2 enabling diagnostic mode failed
  2798. * -3 diagnostic reset failed
  2799. */
  2800. static int
  2801. mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
  2802. {
  2803. MPT_ADAPTER *iocp=NULL;
  2804. u32 diag0val;
  2805. u32 doorbell;
  2806. int hard_reset_done = 0;
  2807. int count = 0;
  2808. #ifdef MPT_DEBUG
  2809. u32 diag1val = 0;
  2810. #endif
  2811. /* Clear any existing interrupts */
  2812. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  2813. if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
  2814. drsprintk((MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
  2815. "address=%p\n", ioc->name, __FUNCTION__,
  2816. &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
  2817. CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
  2818. if (sleepFlag == CAN_SLEEP)
  2819. msleep(1);
  2820. else
  2821. mdelay(1);
  2822. for (count = 0; count < 60; count ++) {
  2823. doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
  2824. doorbell &= MPI_IOC_STATE_MASK;
  2825. drsprintk((MYIOC_s_INFO_FMT
  2826. "looking for READY STATE: doorbell=%x"
  2827. " count=%d\n",
  2828. ioc->name, doorbell, count));
  2829. if (doorbell == MPI_IOC_STATE_READY) {
  2830. return 1;
  2831. }
  2832. /* wait 1 sec */
  2833. if (sleepFlag == CAN_SLEEP)
  2834. msleep(1000);
  2835. else
  2836. mdelay(1000);
  2837. }
  2838. return -1;
  2839. }
  2840. /* Use "Diagnostic reset" method! (only thing available!) */
  2841. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2842. #ifdef MPT_DEBUG
  2843. if (ioc->alt_ioc)
  2844. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2845. dprintk((MYIOC_s_INFO_FMT "DbG1: diag0=%08x, diag1=%08x\n",
  2846. ioc->name, diag0val, diag1val));
  2847. #endif
  2848. /* Do the reset if we are told to ignore the reset history
  2849. * or if the reset history is 0
  2850. */
  2851. if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
  2852. while ((diag0val & MPI_DIAG_DRWE) == 0) {
  2853. /* Write magic sequence to WriteSequence register
  2854. * Loop until in diagnostic mode
  2855. */
  2856. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2857. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2858. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2859. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2860. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2861. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2862. /* wait 100 msec */
  2863. if (sleepFlag == CAN_SLEEP) {
  2864. msleep (100);
  2865. } else {
  2866. mdelay (100);
  2867. }
  2868. count++;
  2869. if (count > 20) {
  2870. printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
  2871. ioc->name, diag0val);
  2872. return -2;
  2873. }
  2874. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2875. dprintk((MYIOC_s_INFO_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
  2876. ioc->name, diag0val));
  2877. }
  2878. #ifdef MPT_DEBUG
  2879. if (ioc->alt_ioc)
  2880. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2881. dprintk((MYIOC_s_INFO_FMT "DbG2: diag0=%08x, diag1=%08x\n",
  2882. ioc->name, diag0val, diag1val));
  2883. #endif
  2884. /*
  2885. * Disable the ARM (Bug fix)
  2886. *
  2887. */
  2888. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
  2889. mdelay(1);
  2890. /*
  2891. * Now hit the reset bit in the Diagnostic register
  2892. * (THE BIG HAMMER!) (Clears DRWE bit).
  2893. */
  2894. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
  2895. hard_reset_done = 1;
  2896. dprintk((MYIOC_s_INFO_FMT "Diagnostic reset performed\n",
  2897. ioc->name));
  2898. /*
  2899. * Call each currently registered protocol IOC reset handler
  2900. * with pre-reset indication.
  2901. * NOTE: If we're doing _IOC_BRINGUP, there can be no
  2902. * MptResetHandlers[] registered yet.
  2903. */
  2904. {
  2905. int ii;
  2906. int r = 0;
  2907. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  2908. if (MptResetHandlers[ii]) {
  2909. dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n",
  2910. ioc->name, ii));
  2911. r += mpt_signal_reset(ii, ioc, MPT_IOC_PRE_RESET);
  2912. if (ioc->alt_ioc) {
  2913. dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n",
  2914. ioc->name, ioc->alt_ioc->name, ii));
  2915. r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_PRE_RESET);
  2916. }
  2917. }
  2918. }
  2919. /* FIXME? Examine results here? */
  2920. }
  2921. if (ioc->cached_fw)
  2922. iocp = ioc;
  2923. else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
  2924. iocp = ioc->alt_ioc;
  2925. if (iocp) {
  2926. /* If the DownloadBoot operation fails, the
  2927. * IOC will be left unusable. This is a fatal error
  2928. * case. _diag_reset will return < 0
  2929. */
  2930. for (count = 0; count < 30; count ++) {
  2931. diag0val = CHIPREG_READ32(&iocp->chip->Diagnostic);
  2932. if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
  2933. break;
  2934. }
  2935. dprintk((MYIOC_s_INFO_FMT "cached_fw: diag0val=%x count=%d\n",
  2936. iocp->name, diag0val, count));
  2937. /* wait 1 sec */
  2938. if (sleepFlag == CAN_SLEEP) {
  2939. msleep (1000);
  2940. } else {
  2941. mdelay (1000);
  2942. }
  2943. }
  2944. if ((count = mpt_downloadboot(ioc,
  2945. (MpiFwHeader_t *)iocp->cached_fw, sleepFlag)) < 0) {
  2946. printk(KERN_WARNING MYNAM
  2947. ": firmware downloadboot failure (%d)!\n", count);
  2948. }
  2949. } else {
  2950. /* Wait for FW to reload and for board
  2951. * to go to the READY state.
  2952. * Maximum wait is 60 seconds.
  2953. * If fail, no error will check again
  2954. * with calling program.
  2955. */
  2956. for (count = 0; count < 60; count ++) {
  2957. doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
  2958. doorbell &= MPI_IOC_STATE_MASK;
  2959. if (doorbell == MPI_IOC_STATE_READY) {
  2960. break;
  2961. }
  2962. /* wait 1 sec */
  2963. if (sleepFlag == CAN_SLEEP) {
  2964. msleep (1000);
  2965. } else {
  2966. mdelay (1000);
  2967. }
  2968. }
  2969. }
  2970. }
  2971. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2972. #ifdef MPT_DEBUG
  2973. if (ioc->alt_ioc)
  2974. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2975. dprintk((MYIOC_s_INFO_FMT "DbG3: diag0=%08x, diag1=%08x\n",
  2976. ioc->name, diag0val, diag1val));
  2977. #endif
  2978. /* Clear RESET_HISTORY bit! Place board in the
  2979. * diagnostic mode to update the diag register.
  2980. */
  2981. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2982. count = 0;
  2983. while ((diag0val & MPI_DIAG_DRWE) == 0) {
  2984. /* Write magic sequence to WriteSequence register
  2985. * Loop until in diagnostic mode
  2986. */
  2987. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2988. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2989. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2990. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2991. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2992. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2993. /* wait 100 msec */
  2994. if (sleepFlag == CAN_SLEEP) {
  2995. msleep (100);
  2996. } else {
  2997. mdelay (100);
  2998. }
  2999. count++;
  3000. if (count > 20) {
  3001. printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
  3002. ioc->name, diag0val);
  3003. break;
  3004. }
  3005. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  3006. }
  3007. diag0val &= ~MPI_DIAG_RESET_HISTORY;
  3008. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
  3009. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  3010. if (diag0val & MPI_DIAG_RESET_HISTORY) {
  3011. printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
  3012. ioc->name);
  3013. }
  3014. /* Disable Diagnostic Mode
  3015. */
  3016. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
  3017. /* Check FW reload status flags.
  3018. */
  3019. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  3020. if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
  3021. printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
  3022. ioc->name, diag0val);
  3023. return -3;
  3024. }
  3025. #ifdef MPT_DEBUG
  3026. if (ioc->alt_ioc)
  3027. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  3028. dprintk((MYIOC_s_INFO_FMT "DbG4: diag0=%08x, diag1=%08x\n",
  3029. ioc->name, diag0val, diag1val));
  3030. #endif
  3031. /*
  3032. * Reset flag that says we've enabled event notification
  3033. */
  3034. ioc->facts.EventState = 0;
  3035. if (ioc->alt_ioc)
  3036. ioc->alt_ioc->facts.EventState = 0;
  3037. return hard_reset_done;
  3038. }
  3039. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3040. /**
  3041. * SendIocReset - Send IOCReset request to MPT adapter.
  3042. * @ioc: Pointer to MPT_ADAPTER structure
  3043. * @reset_type: reset type, expected values are
  3044. * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
  3045. * @sleepFlag: Specifies whether the process can sleep
  3046. *
  3047. * Send IOCReset request to the MPT adapter.
  3048. *
  3049. * Returns 0 for success, non-zero for failure.
  3050. */
  3051. static int
  3052. SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
  3053. {
  3054. int r;
  3055. u32 state;
  3056. int cntdn, count;
  3057. drsprintk((KERN_INFO MYNAM ": %s: Sending IOC reset(0x%02x)!\n",
  3058. ioc->name, reset_type));
  3059. CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
  3060. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  3061. return r;
  3062. /* FW ACK'd request, wait for READY state
  3063. */
  3064. count = 0;
  3065. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
  3066. while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
  3067. cntdn--;
  3068. count++;
  3069. if (!cntdn) {
  3070. if (sleepFlag != CAN_SLEEP)
  3071. count *= 10;
  3072. printk(KERN_ERR MYNAM ": %s: ERROR - Wait IOC_READY state timeout(%d)!\n",
  3073. ioc->name, (int)((count+5)/HZ));
  3074. return -ETIME;
  3075. }
  3076. if (sleepFlag == CAN_SLEEP) {
  3077. msleep(1);
  3078. } else {
  3079. mdelay (1); /* 1 msec delay */
  3080. }
  3081. }
  3082. /* TODO!
  3083. * Cleanup all event stuff for this IOC; re-issue EventNotification
  3084. * request if needed.
  3085. */
  3086. if (ioc->facts.Function)
  3087. ioc->facts.EventState = 0;
  3088. return 0;
  3089. }
  3090. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3091. /**
  3092. * initChainBuffers - Allocate memory for and initialize chain buffers
  3093. * @ioc: Pointer to MPT_ADAPTER structure
  3094. *
  3095. * Allocates memory for and initializes chain buffers,
  3096. * chain buffer control arrays and spinlock.
  3097. */
  3098. static int
  3099. initChainBuffers(MPT_ADAPTER *ioc)
  3100. {
  3101. u8 *mem;
  3102. int sz, ii, num_chain;
  3103. int scale, num_sge, numSGE;
  3104. /* ReqToChain size must equal the req_depth
  3105. * index = req_idx
  3106. */
  3107. if (ioc->ReqToChain == NULL) {
  3108. sz = ioc->req_depth * sizeof(int);
  3109. mem = kmalloc(sz, GFP_ATOMIC);
  3110. if (mem == NULL)
  3111. return -1;
  3112. ioc->ReqToChain = (int *) mem;
  3113. dinitprintk((KERN_INFO MYNAM ": %s ReqToChain alloc @ %p, sz=%d bytes\n",
  3114. ioc->name, mem, sz));
  3115. mem = kmalloc(sz, GFP_ATOMIC);
  3116. if (mem == NULL)
  3117. return -1;
  3118. ioc->RequestNB = (int *) mem;
  3119. dinitprintk((KERN_INFO MYNAM ": %s RequestNB alloc @ %p, sz=%d bytes\n",
  3120. ioc->name, mem, sz));
  3121. }
  3122. for (ii = 0; ii < ioc->req_depth; ii++) {
  3123. ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
  3124. }
  3125. /* ChainToChain size must equal the total number
  3126. * of chain buffers to be allocated.
  3127. * index = chain_idx
  3128. *
  3129. * Calculate the number of chain buffers needed(plus 1) per I/O
  3130. * then multiply the maximum number of simultaneous cmds
  3131. *
  3132. * num_sge = num sge in request frame + last chain buffer
  3133. * scale = num sge per chain buffer if no chain element
  3134. */
  3135. scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
  3136. if (sizeof(dma_addr_t) == sizeof(u64))
  3137. num_sge = scale + (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
  3138. else
  3139. num_sge = 1+ scale + (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
  3140. if (sizeof(dma_addr_t) == sizeof(u64)) {
  3141. numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
  3142. (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
  3143. } else {
  3144. numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
  3145. (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
  3146. }
  3147. dinitprintk((KERN_INFO MYNAM ": %s num_sge=%d numSGE=%d\n",
  3148. ioc->name, num_sge, numSGE));
  3149. if ( numSGE > MPT_SCSI_SG_DEPTH )
  3150. numSGE = MPT_SCSI_SG_DEPTH;
  3151. num_chain = 1;
  3152. while (numSGE - num_sge > 0) {
  3153. num_chain++;
  3154. num_sge += (scale - 1);
  3155. }
  3156. num_chain++;
  3157. dinitprintk((KERN_INFO MYNAM ": %s Now numSGE=%d num_sge=%d num_chain=%d\n",
  3158. ioc->name, numSGE, num_sge, num_chain));
  3159. if (ioc->bus_type == SPI)
  3160. num_chain *= MPT_SCSI_CAN_QUEUE;
  3161. else
  3162. num_chain *= MPT_FC_CAN_QUEUE;
  3163. ioc->num_chain = num_chain;
  3164. sz = num_chain * sizeof(int);
  3165. if (ioc->ChainToChain == NULL) {
  3166. mem = kmalloc(sz, GFP_ATOMIC);
  3167. if (mem == NULL)
  3168. return -1;
  3169. ioc->ChainToChain = (int *) mem;
  3170. dinitprintk((KERN_INFO MYNAM ": %s ChainToChain alloc @ %p, sz=%d bytes\n",
  3171. ioc->name, mem, sz));
  3172. } else {
  3173. mem = (u8 *) ioc->ChainToChain;
  3174. }
  3175. memset(mem, 0xFF, sz);
  3176. return num_chain;
  3177. }
  3178. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3179. /**
  3180. * PrimeIocFifos - Initialize IOC request and reply FIFOs.
  3181. * @ioc: Pointer to MPT_ADAPTER structure
  3182. *
  3183. * This routine allocates memory for the MPT reply and request frame
  3184. * pools (if necessary), and primes the IOC reply FIFO with
  3185. * reply frames.
  3186. *
  3187. * Returns 0 for success, non-zero for failure.
  3188. */
  3189. static int
  3190. PrimeIocFifos(MPT_ADAPTER *ioc)
  3191. {
  3192. MPT_FRAME_HDR *mf;
  3193. unsigned long flags;
  3194. dma_addr_t alloc_dma;
  3195. u8 *mem;
  3196. int i, reply_sz, sz, total_size, num_chain;
  3197. /* Prime reply FIFO... */
  3198. if (ioc->reply_frames == NULL) {
  3199. if ( (num_chain = initChainBuffers(ioc)) < 0)
  3200. return -1;
  3201. total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
  3202. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
  3203. ioc->name, ioc->reply_sz, ioc->reply_depth));
  3204. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d[%x] bytes\n",
  3205. ioc->name, reply_sz, reply_sz));
  3206. sz = (ioc->req_sz * ioc->req_depth);
  3207. dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d bytes, RequestDepth=%d\n",
  3208. ioc->name, ioc->req_sz, ioc->req_depth));
  3209. dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d[%x] bytes\n",
  3210. ioc->name, sz, sz));
  3211. total_size += sz;
  3212. sz = num_chain * ioc->req_sz; /* chain buffer pool size */
  3213. dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d bytes, ChainDepth=%d\n",
  3214. ioc->name, ioc->req_sz, num_chain));
  3215. dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
  3216. ioc->name, sz, sz, num_chain));
  3217. total_size += sz;
  3218. mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
  3219. if (mem == NULL) {
  3220. printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
  3221. ioc->name);
  3222. goto out_fail;
  3223. }
  3224. dinitprintk((KERN_INFO MYNAM ": %s.Total alloc @ %p[%p], sz=%d[%x] bytes\n",
  3225. ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
  3226. memset(mem, 0, total_size);
  3227. ioc->alloc_total += total_size;
  3228. ioc->alloc = mem;
  3229. ioc->alloc_dma = alloc_dma;
  3230. ioc->alloc_sz = total_size;
  3231. ioc->reply_frames = (MPT_FRAME_HDR *) mem;
  3232. ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
  3233. dinitprintk((KERN_INFO MYNAM ": %s ReplyBuffers @ %p[%p]\n",
  3234. ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
  3235. alloc_dma += reply_sz;
  3236. mem += reply_sz;
  3237. /* Request FIFO - WE manage this! */
  3238. ioc->req_frames = (MPT_FRAME_HDR *) mem;
  3239. ioc->req_frames_dma = alloc_dma;
  3240. dinitprintk((KERN_INFO MYNAM ": %s RequestBuffers @ %p[%p]\n",
  3241. ioc->name, mem, (void *)(ulong)alloc_dma));
  3242. ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
  3243. #if defined(CONFIG_MTRR) && 0
  3244. /*
  3245. * Enable Write Combining MTRR for IOC's memory region.
  3246. * (at least as much as we can; "size and base must be
  3247. * multiples of 4 kiB"
  3248. */
  3249. ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
  3250. sz,
  3251. MTRR_TYPE_WRCOMB, 1);
  3252. dprintk((MYIOC_s_INFO_FMT "MTRR region registered (base:size=%08x:%x)\n",
  3253. ioc->name, ioc->req_frames_dma, sz));
  3254. #endif
  3255. for (i = 0; i < ioc->req_depth; i++) {
  3256. alloc_dma += ioc->req_sz;
  3257. mem += ioc->req_sz;
  3258. }
  3259. ioc->ChainBuffer = mem;
  3260. ioc->ChainBufferDMA = alloc_dma;
  3261. dinitprintk((KERN_INFO MYNAM " :%s ChainBuffers @ %p(%p)\n",
  3262. ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
  3263. /* Initialize the free chain Q.
  3264. */
  3265. INIT_LIST_HEAD(&ioc->FreeChainQ);
  3266. /* Post the chain buffers to the FreeChainQ.
  3267. */
  3268. mem = (u8 *)ioc->ChainBuffer;
  3269. for (i=0; i < num_chain; i++) {
  3270. mf = (MPT_FRAME_HDR *) mem;
  3271. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
  3272. mem += ioc->req_sz;
  3273. }
  3274. /* Initialize Request frames linked list
  3275. */
  3276. alloc_dma = ioc->req_frames_dma;
  3277. mem = (u8 *) ioc->req_frames;
  3278. spin_lock_irqsave(&ioc->FreeQlock, flags);
  3279. INIT_LIST_HEAD(&ioc->FreeQ);
  3280. for (i = 0; i < ioc->req_depth; i++) {
  3281. mf = (MPT_FRAME_HDR *) mem;
  3282. /* Queue REQUESTs *internally*! */
  3283. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
  3284. mem += ioc->req_sz;
  3285. }
  3286. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  3287. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  3288. ioc->sense_buf_pool =
  3289. pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
  3290. if (ioc->sense_buf_pool == NULL) {
  3291. printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
  3292. ioc->name);
  3293. goto out_fail;
  3294. }
  3295. ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
  3296. ioc->alloc_total += sz;
  3297. dinitprintk((KERN_INFO MYNAM ": %s.SenseBuffers @ %p[%p]\n",
  3298. ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
  3299. }
  3300. /* Post Reply frames to FIFO
  3301. */
  3302. alloc_dma = ioc->alloc_dma;
  3303. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffers @ %p[%p]\n",
  3304. ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
  3305. for (i = 0; i < ioc->reply_depth; i++) {
  3306. /* Write each address to the IOC! */
  3307. CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
  3308. alloc_dma += ioc->reply_sz;
  3309. }
  3310. return 0;
  3311. out_fail:
  3312. if (ioc->alloc != NULL) {
  3313. sz = ioc->alloc_sz;
  3314. pci_free_consistent(ioc->pcidev,
  3315. sz,
  3316. ioc->alloc, ioc->alloc_dma);
  3317. ioc->reply_frames = NULL;
  3318. ioc->req_frames = NULL;
  3319. ioc->alloc_total -= sz;
  3320. }
  3321. if (ioc->sense_buf_pool != NULL) {
  3322. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  3323. pci_free_consistent(ioc->pcidev,
  3324. sz,
  3325. ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
  3326. ioc->sense_buf_pool = NULL;
  3327. }
  3328. return -1;
  3329. }
  3330. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3331. /**
  3332. * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
  3333. * from IOC via doorbell handshake method.
  3334. * @ioc: Pointer to MPT_ADAPTER structure
  3335. * @reqBytes: Size of the request in bytes
  3336. * @req: Pointer to MPT request frame
  3337. * @replyBytes: Expected size of the reply in bytes
  3338. * @u16reply: Pointer to area where reply should be written
  3339. * @maxwait: Max wait time for a reply (in seconds)
  3340. * @sleepFlag: Specifies whether the process can sleep
  3341. *
  3342. * NOTES: It is the callers responsibility to byte-swap fields in the
  3343. * request which are greater than 1 byte in size. It is also the
  3344. * callers responsibility to byte-swap response fields which are
  3345. * greater than 1 byte in size.
  3346. *
  3347. * Returns 0 for success, non-zero for failure.
  3348. */
  3349. static int
  3350. mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
  3351. int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
  3352. {
  3353. MPIDefaultReply_t *mptReply;
  3354. int failcnt = 0;
  3355. int t;
  3356. /*
  3357. * Get ready to cache a handshake reply
  3358. */
  3359. ioc->hs_reply_idx = 0;
  3360. mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
  3361. mptReply->MsgLength = 0;
  3362. /*
  3363. * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
  3364. * then tell IOC that we want to handshake a request of N words.
  3365. * (WRITE u32val to Doorbell reg).
  3366. */
  3367. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3368. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  3369. ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
  3370. ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
  3371. /*
  3372. * Wait for IOC's doorbell handshake int
  3373. */
  3374. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3375. failcnt++;
  3376. dhsprintk((MYIOC_s_INFO_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
  3377. ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
  3378. /* Read doorbell and check for active bit */
  3379. if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
  3380. return -1;
  3381. /*
  3382. * Clear doorbell int (WRITE 0 to IntStatus reg),
  3383. * then wait for IOC to ACKnowledge that it's ready for
  3384. * our handshake request.
  3385. */
  3386. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3387. if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  3388. failcnt++;
  3389. if (!failcnt) {
  3390. int ii;
  3391. u8 *req_as_bytes = (u8 *) req;
  3392. /*
  3393. * Stuff request words via doorbell handshake,
  3394. * with ACK from IOC for each.
  3395. */
  3396. for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
  3397. u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
  3398. (req_as_bytes[(ii*4) + 1] << 8) |
  3399. (req_as_bytes[(ii*4) + 2] << 16) |
  3400. (req_as_bytes[(ii*4) + 3] << 24));
  3401. CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
  3402. if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  3403. failcnt++;
  3404. }
  3405. dhsprintk((KERN_INFO MYNAM ": Handshake request frame (@%p) header\n", req));
  3406. DBG_DUMP_REQUEST_FRAME_HDR(req)
  3407. dhsprintk((MYIOC_s_INFO_FMT "HandShake request post done, WaitCnt=%d%s\n",
  3408. ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
  3409. /*
  3410. * Wait for completion of doorbell handshake reply from the IOC
  3411. */
  3412. if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
  3413. failcnt++;
  3414. dhsprintk((MYIOC_s_INFO_FMT "HandShake reply count=%d%s\n",
  3415. ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
  3416. /*
  3417. * Copy out the cached reply...
  3418. */
  3419. for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
  3420. u16reply[ii] = ioc->hs_reply[ii];
  3421. } else {
  3422. return -99;
  3423. }
  3424. return -failcnt;
  3425. }
  3426. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3427. /**
  3428. * WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
  3429. * @ioc: Pointer to MPT_ADAPTER structure
  3430. * @howlong: How long to wait (in seconds)
  3431. * @sleepFlag: Specifies whether the process can sleep
  3432. *
  3433. * This routine waits (up to ~2 seconds max) for IOC doorbell
  3434. * handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
  3435. * bit in its IntStatus register being clear.
  3436. *
  3437. * Returns a negative value on failure, else wait loop count.
  3438. */
  3439. static int
  3440. WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3441. {
  3442. int cntdn;
  3443. int count = 0;
  3444. u32 intstat=0;
  3445. cntdn = 1000 * howlong;
  3446. if (sleepFlag == CAN_SLEEP) {
  3447. while (--cntdn) {
  3448. msleep (1);
  3449. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3450. if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
  3451. break;
  3452. count++;
  3453. }
  3454. } else {
  3455. while (--cntdn) {
  3456. udelay (1000);
  3457. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3458. if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
  3459. break;
  3460. count++;
  3461. }
  3462. }
  3463. if (cntdn) {
  3464. dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell ACK (count=%d)\n",
  3465. ioc->name, count));
  3466. return count;
  3467. }
  3468. printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
  3469. ioc->name, count, intstat);
  3470. return -1;
  3471. }
  3472. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3473. /**
  3474. * WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
  3475. * @ioc: Pointer to MPT_ADAPTER structure
  3476. * @howlong: How long to wait (in seconds)
  3477. * @sleepFlag: Specifies whether the process can sleep
  3478. *
  3479. * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
  3480. * (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
  3481. *
  3482. * Returns a negative value on failure, else wait loop count.
  3483. */
  3484. static int
  3485. WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3486. {
  3487. int cntdn;
  3488. int count = 0;
  3489. u32 intstat=0;
  3490. cntdn = 1000 * howlong;
  3491. if (sleepFlag == CAN_SLEEP) {
  3492. while (--cntdn) {
  3493. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3494. if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
  3495. break;
  3496. msleep(1);
  3497. count++;
  3498. }
  3499. } else {
  3500. while (--cntdn) {
  3501. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3502. if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
  3503. break;
  3504. udelay (1000);
  3505. count++;
  3506. }
  3507. }
  3508. if (cntdn) {
  3509. dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
  3510. ioc->name, count, howlong));
  3511. return count;
  3512. }
  3513. printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
  3514. ioc->name, count, intstat);
  3515. return -1;
  3516. }
  3517. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3518. /**
  3519. * WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
  3520. * @ioc: Pointer to MPT_ADAPTER structure
  3521. * @howlong: How long to wait (in seconds)
  3522. * @sleepFlag: Specifies whether the process can sleep
  3523. *
  3524. * This routine polls the IOC for a handshake reply, 16 bits at a time.
  3525. * Reply is cached to IOC private area large enough to hold a maximum
  3526. * of 128 bytes of reply data.
  3527. *
  3528. * Returns a negative value on failure, else size of reply in WORDS.
  3529. */
  3530. static int
  3531. WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3532. {
  3533. int u16cnt = 0;
  3534. int failcnt = 0;
  3535. int t;
  3536. u16 *hs_reply = ioc->hs_reply;
  3537. volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
  3538. u16 hword;
  3539. hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
  3540. /*
  3541. * Get first two u16's so we can look at IOC's intended reply MsgLength
  3542. */
  3543. u16cnt=0;
  3544. if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
  3545. failcnt++;
  3546. } else {
  3547. hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3548. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3549. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3550. failcnt++;
  3551. else {
  3552. hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3553. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3554. }
  3555. }
  3556. dhsprintk((MYIOC_s_INFO_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
  3557. ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
  3558. failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
  3559. /*
  3560. * If no error (and IOC said MsgLength is > 0), piece together
  3561. * reply 16 bits at a time.
  3562. */
  3563. for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
  3564. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3565. failcnt++;
  3566. hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3567. /* don't overflow our IOC hs_reply[] buffer! */
  3568. if (u16cnt < sizeof(ioc->hs_reply) / sizeof(ioc->hs_reply[0]))
  3569. hs_reply[u16cnt] = hword;
  3570. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3571. }
  3572. if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3573. failcnt++;
  3574. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3575. if (failcnt) {
  3576. printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
  3577. ioc->name);
  3578. return -failcnt;
  3579. }
  3580. #if 0
  3581. else if (u16cnt != (2 * mptReply->MsgLength)) {
  3582. return -101;
  3583. }
  3584. else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
  3585. return -102;
  3586. }
  3587. #endif
  3588. dhsprintk((MYIOC_s_INFO_FMT "Got Handshake reply:\n", ioc->name));
  3589. DBG_DUMP_REPLY_FRAME(mptReply)
  3590. dhsprintk((MYIOC_s_INFO_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
  3591. ioc->name, t, u16cnt/2));
  3592. return u16cnt/2;
  3593. }
  3594. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3595. /**
  3596. * GetLanConfigPages - Fetch LANConfig pages.
  3597. * @ioc: Pointer to MPT_ADAPTER structure
  3598. *
  3599. * Return: 0 for success
  3600. * -ENOMEM if no memory available
  3601. * -EPERM if not allowed due to ISR context
  3602. * -EAGAIN if no msg frames currently available
  3603. * -EFAULT for non-successful reply or no reply (timeout)
  3604. */
  3605. static int
  3606. GetLanConfigPages(MPT_ADAPTER *ioc)
  3607. {
  3608. ConfigPageHeader_t hdr;
  3609. CONFIGPARMS cfg;
  3610. LANPage0_t *ppage0_alloc;
  3611. dma_addr_t page0_dma;
  3612. LANPage1_t *ppage1_alloc;
  3613. dma_addr_t page1_dma;
  3614. int rc = 0;
  3615. int data_sz;
  3616. int copy_sz;
  3617. /* Get LAN Page 0 header */
  3618. hdr.PageVersion = 0;
  3619. hdr.PageLength = 0;
  3620. hdr.PageNumber = 0;
  3621. hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
  3622. cfg.cfghdr.hdr = &hdr;
  3623. cfg.physAddr = -1;
  3624. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3625. cfg.dir = 0;
  3626. cfg.pageAddr = 0;
  3627. cfg.timeout = 0;
  3628. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3629. return rc;
  3630. if (hdr.PageLength > 0) {
  3631. data_sz = hdr.PageLength * 4;
  3632. ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
  3633. rc = -ENOMEM;
  3634. if (ppage0_alloc) {
  3635. memset((u8 *)ppage0_alloc, 0, data_sz);
  3636. cfg.physAddr = page0_dma;
  3637. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3638. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3639. /* save the data */
  3640. copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
  3641. memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
  3642. }
  3643. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
  3644. /* FIXME!
  3645. * Normalize endianness of structure data,
  3646. * by byte-swapping all > 1 byte fields!
  3647. */
  3648. }
  3649. if (rc)
  3650. return rc;
  3651. }
  3652. /* Get LAN Page 1 header */
  3653. hdr.PageVersion = 0;
  3654. hdr.PageLength = 0;
  3655. hdr.PageNumber = 1;
  3656. hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
  3657. cfg.cfghdr.hdr = &hdr;
  3658. cfg.physAddr = -1;
  3659. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3660. cfg.dir = 0;
  3661. cfg.pageAddr = 0;
  3662. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3663. return rc;
  3664. if (hdr.PageLength == 0)
  3665. return 0;
  3666. data_sz = hdr.PageLength * 4;
  3667. rc = -ENOMEM;
  3668. ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
  3669. if (ppage1_alloc) {
  3670. memset((u8 *)ppage1_alloc, 0, data_sz);
  3671. cfg.physAddr = page1_dma;
  3672. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3673. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3674. /* save the data */
  3675. copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
  3676. memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
  3677. }
  3678. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
  3679. /* FIXME!
  3680. * Normalize endianness of structure data,
  3681. * by byte-swapping all > 1 byte fields!
  3682. */
  3683. }
  3684. return rc;
  3685. }
  3686. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3687. /**
  3688. * mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
  3689. * @ioc: Pointer to MPT_ADAPTER structure
  3690. * @persist_opcode: see below
  3691. *
  3692. * MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
  3693. * devices not currently present.
  3694. * MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
  3695. *
  3696. * NOTE: Don't use not this function during interrupt time.
  3697. *
  3698. * Returns 0 for success, non-zero error
  3699. */
  3700. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3701. int
  3702. mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
  3703. {
  3704. SasIoUnitControlRequest_t *sasIoUnitCntrReq;
  3705. SasIoUnitControlReply_t *sasIoUnitCntrReply;
  3706. MPT_FRAME_HDR *mf = NULL;
  3707. MPIHeader_t *mpi_hdr;
  3708. /* insure garbage is not sent to fw */
  3709. switch(persist_opcode) {
  3710. case MPI_SAS_OP_CLEAR_NOT_PRESENT:
  3711. case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
  3712. break;
  3713. default:
  3714. return -1;
  3715. break;
  3716. }
  3717. printk("%s: persist_opcode=%x\n",__FUNCTION__, persist_opcode);
  3718. /* Get a MF for this command.
  3719. */
  3720. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  3721. printk("%s: no msg frames!\n",__FUNCTION__);
  3722. return -1;
  3723. }
  3724. mpi_hdr = (MPIHeader_t *) mf;
  3725. sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
  3726. memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
  3727. sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
  3728. sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
  3729. sasIoUnitCntrReq->Operation = persist_opcode;
  3730. init_timer(&ioc->persist_timer);
  3731. ioc->persist_timer.data = (unsigned long) ioc;
  3732. ioc->persist_timer.function = mpt_timer_expired;
  3733. ioc->persist_timer.expires = jiffies + HZ*10 /* 10 sec */;
  3734. ioc->persist_wait_done=0;
  3735. add_timer(&ioc->persist_timer);
  3736. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  3737. wait_event(mpt_waitq, ioc->persist_wait_done);
  3738. sasIoUnitCntrReply =
  3739. (SasIoUnitControlReply_t *)ioc->persist_reply_frame;
  3740. if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
  3741. printk("%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
  3742. __FUNCTION__,
  3743. sasIoUnitCntrReply->IOCStatus,
  3744. sasIoUnitCntrReply->IOCLogInfo);
  3745. return -1;
  3746. }
  3747. printk("%s: success\n",__FUNCTION__);
  3748. return 0;
  3749. }
  3750. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3751. static void
  3752. mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
  3753. MpiEventDataRaid_t * pRaidEventData)
  3754. {
  3755. int volume;
  3756. int reason;
  3757. int disk;
  3758. int status;
  3759. int flags;
  3760. int state;
  3761. volume = pRaidEventData->VolumeID;
  3762. reason = pRaidEventData->ReasonCode;
  3763. disk = pRaidEventData->PhysDiskNum;
  3764. status = le32_to_cpu(pRaidEventData->SettingsStatus);
  3765. flags = (status >> 0) & 0xff;
  3766. state = (status >> 8) & 0xff;
  3767. if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
  3768. return;
  3769. }
  3770. if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
  3771. reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
  3772. (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
  3773. printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d id=%d\n",
  3774. ioc->name, disk, volume);
  3775. } else {
  3776. printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
  3777. ioc->name, volume);
  3778. }
  3779. switch(reason) {
  3780. case MPI_EVENT_RAID_RC_VOLUME_CREATED:
  3781. printk(MYIOC_s_INFO_FMT " volume has been created\n",
  3782. ioc->name);
  3783. break;
  3784. case MPI_EVENT_RAID_RC_VOLUME_DELETED:
  3785. printk(MYIOC_s_INFO_FMT " volume has been deleted\n",
  3786. ioc->name);
  3787. break;
  3788. case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
  3789. printk(MYIOC_s_INFO_FMT " volume settings have been changed\n",
  3790. ioc->name);
  3791. break;
  3792. case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
  3793. printk(MYIOC_s_INFO_FMT " volume is now %s%s%s%s\n",
  3794. ioc->name,
  3795. state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
  3796. ? "optimal"
  3797. : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
  3798. ? "degraded"
  3799. : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
  3800. ? "failed"
  3801. : "state unknown",
  3802. flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
  3803. ? ", enabled" : "",
  3804. flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
  3805. ? ", quiesced" : "",
  3806. flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
  3807. ? ", resync in progress" : "" );
  3808. break;
  3809. case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
  3810. printk(MYIOC_s_INFO_FMT " volume membership of PhysDisk %d has changed\n",
  3811. ioc->name, disk);
  3812. break;
  3813. case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
  3814. printk(MYIOC_s_INFO_FMT " PhysDisk has been created\n",
  3815. ioc->name);
  3816. break;
  3817. case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
  3818. printk(MYIOC_s_INFO_FMT " PhysDisk has been deleted\n",
  3819. ioc->name);
  3820. break;
  3821. case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
  3822. printk(MYIOC_s_INFO_FMT " PhysDisk settings have been changed\n",
  3823. ioc->name);
  3824. break;
  3825. case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
  3826. printk(MYIOC_s_INFO_FMT " PhysDisk is now %s%s%s\n",
  3827. ioc->name,
  3828. state == MPI_PHYSDISK0_STATUS_ONLINE
  3829. ? "online"
  3830. : state == MPI_PHYSDISK0_STATUS_MISSING
  3831. ? "missing"
  3832. : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
  3833. ? "not compatible"
  3834. : state == MPI_PHYSDISK0_STATUS_FAILED
  3835. ? "failed"
  3836. : state == MPI_PHYSDISK0_STATUS_INITIALIZING
  3837. ? "initializing"
  3838. : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
  3839. ? "offline requested"
  3840. : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
  3841. ? "failed requested"
  3842. : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
  3843. ? "offline"
  3844. : "state unknown",
  3845. flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
  3846. ? ", out of sync" : "",
  3847. flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
  3848. ? ", quiesced" : "" );
  3849. break;
  3850. case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
  3851. printk(MYIOC_s_INFO_FMT " Domain Validation needed for PhysDisk %d\n",
  3852. ioc->name, disk);
  3853. break;
  3854. case MPI_EVENT_RAID_RC_SMART_DATA:
  3855. printk(MYIOC_s_INFO_FMT " SMART data received, ASC/ASCQ = %02xh/%02xh\n",
  3856. ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
  3857. break;
  3858. case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
  3859. printk(MYIOC_s_INFO_FMT " replacement of PhysDisk %d has started\n",
  3860. ioc->name, disk);
  3861. break;
  3862. }
  3863. }
  3864. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3865. /**
  3866. * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
  3867. * @ioc: Pointer to MPT_ADAPTER structure
  3868. *
  3869. * Returns: 0 for success
  3870. * -ENOMEM if no memory available
  3871. * -EPERM if not allowed due to ISR context
  3872. * -EAGAIN if no msg frames currently available
  3873. * -EFAULT for non-successful reply or no reply (timeout)
  3874. */
  3875. static int
  3876. GetIoUnitPage2(MPT_ADAPTER *ioc)
  3877. {
  3878. ConfigPageHeader_t hdr;
  3879. CONFIGPARMS cfg;
  3880. IOUnitPage2_t *ppage_alloc;
  3881. dma_addr_t page_dma;
  3882. int data_sz;
  3883. int rc;
  3884. /* Get the page header */
  3885. hdr.PageVersion = 0;
  3886. hdr.PageLength = 0;
  3887. hdr.PageNumber = 2;
  3888. hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
  3889. cfg.cfghdr.hdr = &hdr;
  3890. cfg.physAddr = -1;
  3891. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3892. cfg.dir = 0;
  3893. cfg.pageAddr = 0;
  3894. cfg.timeout = 0;
  3895. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3896. return rc;
  3897. if (hdr.PageLength == 0)
  3898. return 0;
  3899. /* Read the config page */
  3900. data_sz = hdr.PageLength * 4;
  3901. rc = -ENOMEM;
  3902. ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
  3903. if (ppage_alloc) {
  3904. memset((u8 *)ppage_alloc, 0, data_sz);
  3905. cfg.physAddr = page_dma;
  3906. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3907. /* If Good, save data */
  3908. if ((rc = mpt_config(ioc, &cfg)) == 0)
  3909. ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
  3910. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
  3911. }
  3912. return rc;
  3913. }
  3914. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3915. /**
  3916. * mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
  3917. * @ioc: Pointer to a Adapter Strucutre
  3918. * @portnum: IOC port number
  3919. *
  3920. * Return: -EFAULT if read of config page header fails
  3921. * or if no nvram
  3922. * If read of SCSI Port Page 0 fails,
  3923. * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
  3924. * Adapter settings: async, narrow
  3925. * Return 1
  3926. * If read of SCSI Port Page 2 fails,
  3927. * Adapter settings valid
  3928. * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
  3929. * Return 1
  3930. * Else
  3931. * Both valid
  3932. * Return 0
  3933. * CHECK - what type of locking mechanisms should be used????
  3934. */
  3935. static int
  3936. mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
  3937. {
  3938. u8 *pbuf;
  3939. dma_addr_t buf_dma;
  3940. CONFIGPARMS cfg;
  3941. ConfigPageHeader_t header;
  3942. int ii;
  3943. int data, rc = 0;
  3944. /* Allocate memory
  3945. */
  3946. if (!ioc->spi_data.nvram) {
  3947. int sz;
  3948. u8 *mem;
  3949. sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
  3950. mem = kmalloc(sz, GFP_ATOMIC);
  3951. if (mem == NULL)
  3952. return -EFAULT;
  3953. ioc->spi_data.nvram = (int *) mem;
  3954. dprintk((MYIOC_s_INFO_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
  3955. ioc->name, ioc->spi_data.nvram, sz));
  3956. }
  3957. /* Invalidate NVRAM information
  3958. */
  3959. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  3960. ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
  3961. }
  3962. /* Read SPP0 header, allocate memory, then read page.
  3963. */
  3964. header.PageVersion = 0;
  3965. header.PageLength = 0;
  3966. header.PageNumber = 0;
  3967. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
  3968. cfg.cfghdr.hdr = &header;
  3969. cfg.physAddr = -1;
  3970. cfg.pageAddr = portnum;
  3971. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3972. cfg.dir = 0;
  3973. cfg.timeout = 0; /* use default */
  3974. if (mpt_config(ioc, &cfg) != 0)
  3975. return -EFAULT;
  3976. if (header.PageLength > 0) {
  3977. pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
  3978. if (pbuf) {
  3979. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3980. cfg.physAddr = buf_dma;
  3981. if (mpt_config(ioc, &cfg) != 0) {
  3982. ioc->spi_data.maxBusWidth = MPT_NARROW;
  3983. ioc->spi_data.maxSyncOffset = 0;
  3984. ioc->spi_data.minSyncFactor = MPT_ASYNC;
  3985. ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
  3986. rc = 1;
  3987. ddvprintk((MYIOC_s_INFO_FMT "Unable to read PortPage0 minSyncFactor=%x\n",
  3988. ioc->name, ioc->spi_data.minSyncFactor));
  3989. } else {
  3990. /* Save the Port Page 0 data
  3991. */
  3992. SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
  3993. pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
  3994. pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
  3995. if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
  3996. ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
  3997. ddvprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n",
  3998. ioc->name, pPP0->Capabilities));
  3999. }
  4000. ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
  4001. data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
  4002. if (data) {
  4003. ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
  4004. data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
  4005. ioc->spi_data.minSyncFactor = (u8) (data >> 8);
  4006. ddvprintk((MYIOC_s_INFO_FMT "PortPage0 minSyncFactor=%x\n",
  4007. ioc->name, ioc->spi_data.minSyncFactor));
  4008. } else {
  4009. ioc->spi_data.maxSyncOffset = 0;
  4010. ioc->spi_data.minSyncFactor = MPT_ASYNC;
  4011. }
  4012. ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
  4013. /* Update the minSyncFactor based on bus type.
  4014. */
  4015. if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
  4016. (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
  4017. if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
  4018. ioc->spi_data.minSyncFactor = MPT_ULTRA;
  4019. ddvprintk((MYIOC_s_INFO_FMT "HVD or SE detected, minSyncFactor=%x\n",
  4020. ioc->name, ioc->spi_data.minSyncFactor));
  4021. }
  4022. }
  4023. }
  4024. if (pbuf) {
  4025. pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
  4026. }
  4027. }
  4028. }
  4029. /* SCSI Port Page 2 - Read the header then the page.
  4030. */
  4031. header.PageVersion = 0;
  4032. header.PageLength = 0;
  4033. header.PageNumber = 2;
  4034. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
  4035. cfg.cfghdr.hdr = &header;
  4036. cfg.physAddr = -1;
  4037. cfg.pageAddr = portnum;
  4038. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4039. cfg.dir = 0;
  4040. if (mpt_config(ioc, &cfg) != 0)
  4041. return -EFAULT;
  4042. if (header.PageLength > 0) {
  4043. /* Allocate memory and read SCSI Port Page 2
  4044. */
  4045. pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
  4046. if (pbuf) {
  4047. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
  4048. cfg.physAddr = buf_dma;
  4049. if (mpt_config(ioc, &cfg) != 0) {
  4050. /* Nvram data is left with INVALID mark
  4051. */
  4052. rc = 1;
  4053. } else {
  4054. SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
  4055. MpiDeviceInfo_t *pdevice = NULL;
  4056. /*
  4057. * Save "Set to Avoid SCSI Bus Resets" flag
  4058. */
  4059. ioc->spi_data.bus_reset =
  4060. (le32_to_cpu(pPP2->PortFlags) &
  4061. MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
  4062. 0 : 1 ;
  4063. /* Save the Port Page 2 data
  4064. * (reformat into a 32bit quantity)
  4065. */
  4066. data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
  4067. ioc->spi_data.PortFlags = data;
  4068. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  4069. pdevice = &pPP2->DeviceSettings[ii];
  4070. data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
  4071. (pdevice->SyncFactor << 8) | pdevice->Timeout;
  4072. ioc->spi_data.nvram[ii] = data;
  4073. }
  4074. }
  4075. pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
  4076. }
  4077. }
  4078. /* Update Adapter limits with those from NVRAM
  4079. * Comment: Don't need to do this. Target performance
  4080. * parameters will never exceed the adapters limits.
  4081. */
  4082. return rc;
  4083. }
  4084. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4085. /**
  4086. * mpt_readScsiDevicePageHeaders - save version and length of SDP1
  4087. * @ioc: Pointer to a Adapter Strucutre
  4088. * @portnum: IOC port number
  4089. *
  4090. * Return: -EFAULT if read of config page header fails
  4091. * or 0 if success.
  4092. */
  4093. static int
  4094. mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
  4095. {
  4096. CONFIGPARMS cfg;
  4097. ConfigPageHeader_t header;
  4098. /* Read the SCSI Device Page 1 header
  4099. */
  4100. header.PageVersion = 0;
  4101. header.PageLength = 0;
  4102. header.PageNumber = 1;
  4103. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
  4104. cfg.cfghdr.hdr = &header;
  4105. cfg.physAddr = -1;
  4106. cfg.pageAddr = portnum;
  4107. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4108. cfg.dir = 0;
  4109. cfg.timeout = 0;
  4110. if (mpt_config(ioc, &cfg) != 0)
  4111. return -EFAULT;
  4112. ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
  4113. ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
  4114. header.PageVersion = 0;
  4115. header.PageLength = 0;
  4116. header.PageNumber = 0;
  4117. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
  4118. if (mpt_config(ioc, &cfg) != 0)
  4119. return -EFAULT;
  4120. ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
  4121. ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
  4122. dcprintk((MYIOC_s_INFO_FMT "Headers: 0: version %d length %d\n",
  4123. ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
  4124. dcprintk((MYIOC_s_INFO_FMT "Headers: 1: version %d length %d\n",
  4125. ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
  4126. return 0;
  4127. }
  4128. /**
  4129. * mpt_inactive_raid_list_free - This clears this link list.
  4130. * @ioc : pointer to per adapter structure
  4131. **/
  4132. static void
  4133. mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
  4134. {
  4135. struct inactive_raid_component_info *component_info, *pNext;
  4136. if (list_empty(&ioc->raid_data.inactive_list))
  4137. return;
  4138. down(&ioc->raid_data.inactive_list_mutex);
  4139. list_for_each_entry_safe(component_info, pNext,
  4140. &ioc->raid_data.inactive_list, list) {
  4141. list_del(&component_info->list);
  4142. kfree(component_info);
  4143. }
  4144. up(&ioc->raid_data.inactive_list_mutex);
  4145. }
  4146. /**
  4147. * mpt_inactive_raid_volumes - sets up link list of phy_disk_nums for devices belonging in an inactive volume
  4148. *
  4149. * @ioc : pointer to per adapter structure
  4150. * @channel : volume channel
  4151. * @id : volume target id
  4152. **/
  4153. static void
  4154. mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
  4155. {
  4156. CONFIGPARMS cfg;
  4157. ConfigPageHeader_t hdr;
  4158. dma_addr_t dma_handle;
  4159. pRaidVolumePage0_t buffer = NULL;
  4160. int i;
  4161. RaidPhysDiskPage0_t phys_disk;
  4162. struct inactive_raid_component_info *component_info;
  4163. int handle_inactive_volumes;
  4164. memset(&cfg, 0 , sizeof(CONFIGPARMS));
  4165. memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
  4166. hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_VOLUME;
  4167. cfg.pageAddr = (channel << 8) + id;
  4168. cfg.cfghdr.hdr = &hdr;
  4169. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4170. if (mpt_config(ioc, &cfg) != 0)
  4171. goto out;
  4172. if (!hdr.PageLength)
  4173. goto out;
  4174. buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
  4175. &dma_handle);
  4176. if (!buffer)
  4177. goto out;
  4178. cfg.physAddr = dma_handle;
  4179. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4180. if (mpt_config(ioc, &cfg) != 0)
  4181. goto out;
  4182. if (!buffer->NumPhysDisks)
  4183. goto out;
  4184. handle_inactive_volumes =
  4185. (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE ||
  4186. (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED) == 0 ||
  4187. buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_FAILED ||
  4188. buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_MISSING) ? 1 : 0;
  4189. if (!handle_inactive_volumes)
  4190. goto out;
  4191. down(&ioc->raid_data.inactive_list_mutex);
  4192. for (i = 0; i < buffer->NumPhysDisks; i++) {
  4193. if(mpt_raid_phys_disk_pg0(ioc,
  4194. buffer->PhysDisk[i].PhysDiskNum, &phys_disk) != 0)
  4195. continue;
  4196. if ((component_info = kmalloc(sizeof (*component_info),
  4197. GFP_KERNEL)) == NULL)
  4198. continue;
  4199. component_info->volumeID = id;
  4200. component_info->volumeBus = channel;
  4201. component_info->d.PhysDiskNum = phys_disk.PhysDiskNum;
  4202. component_info->d.PhysDiskBus = phys_disk.PhysDiskBus;
  4203. component_info->d.PhysDiskID = phys_disk.PhysDiskID;
  4204. component_info->d.PhysDiskIOC = phys_disk.PhysDiskIOC;
  4205. list_add_tail(&component_info->list,
  4206. &ioc->raid_data.inactive_list);
  4207. }
  4208. up(&ioc->raid_data.inactive_list_mutex);
  4209. out:
  4210. if (buffer)
  4211. pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
  4212. dma_handle);
  4213. }
  4214. /**
  4215. * mpt_raid_phys_disk_pg0 - returns phys disk page zero
  4216. * @ioc: Pointer to a Adapter Structure
  4217. * @phys_disk_num: io unit unique phys disk num generated by the ioc
  4218. * @phys_disk: requested payload data returned
  4219. *
  4220. * Return:
  4221. * 0 on success
  4222. * -EFAULT if read of config page header fails or data pointer not NULL
  4223. * -ENOMEM if pci_alloc failed
  4224. **/
  4225. int
  4226. mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num, pRaidPhysDiskPage0_t phys_disk)
  4227. {
  4228. CONFIGPARMS cfg;
  4229. ConfigPageHeader_t hdr;
  4230. dma_addr_t dma_handle;
  4231. pRaidPhysDiskPage0_t buffer = NULL;
  4232. int rc;
  4233. memset(&cfg, 0 , sizeof(CONFIGPARMS));
  4234. memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
  4235. hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
  4236. cfg.cfghdr.hdr = &hdr;
  4237. cfg.physAddr = -1;
  4238. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4239. if (mpt_config(ioc, &cfg) != 0) {
  4240. rc = -EFAULT;
  4241. goto out;
  4242. }
  4243. if (!hdr.PageLength) {
  4244. rc = -EFAULT;
  4245. goto out;
  4246. }
  4247. buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
  4248. &dma_handle);
  4249. if (!buffer) {
  4250. rc = -ENOMEM;
  4251. goto out;
  4252. }
  4253. cfg.physAddr = dma_handle;
  4254. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4255. cfg.pageAddr = phys_disk_num;
  4256. if (mpt_config(ioc, &cfg) != 0) {
  4257. rc = -EFAULT;
  4258. goto out;
  4259. }
  4260. rc = 0;
  4261. memcpy(phys_disk, buffer, sizeof(*buffer));
  4262. phys_disk->MaxLBA = le32_to_cpu(buffer->MaxLBA);
  4263. out:
  4264. if (buffer)
  4265. pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
  4266. dma_handle);
  4267. return rc;
  4268. }
  4269. /**
  4270. * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
  4271. * @ioc: Pointer to a Adapter Strucutre
  4272. * @portnum: IOC port number
  4273. *
  4274. * Return:
  4275. * 0 on success
  4276. * -EFAULT if read of config page header fails or data pointer not NULL
  4277. * -ENOMEM if pci_alloc failed
  4278. **/
  4279. int
  4280. mpt_findImVolumes(MPT_ADAPTER *ioc)
  4281. {
  4282. IOCPage2_t *pIoc2;
  4283. u8 *mem;
  4284. dma_addr_t ioc2_dma;
  4285. CONFIGPARMS cfg;
  4286. ConfigPageHeader_t header;
  4287. int rc = 0;
  4288. int iocpage2sz;
  4289. int i;
  4290. if (!ioc->ir_firmware)
  4291. return 0;
  4292. /* Free the old page
  4293. */
  4294. kfree(ioc->raid_data.pIocPg2);
  4295. ioc->raid_data.pIocPg2 = NULL;
  4296. mpt_inactive_raid_list_free(ioc);
  4297. /* Read IOCP2 header then the page.
  4298. */
  4299. header.PageVersion = 0;
  4300. header.PageLength = 0;
  4301. header.PageNumber = 2;
  4302. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4303. cfg.cfghdr.hdr = &header;
  4304. cfg.physAddr = -1;
  4305. cfg.pageAddr = 0;
  4306. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4307. cfg.dir = 0;
  4308. cfg.timeout = 0;
  4309. if (mpt_config(ioc, &cfg) != 0)
  4310. return -EFAULT;
  4311. if (header.PageLength == 0)
  4312. return -EFAULT;
  4313. iocpage2sz = header.PageLength * 4;
  4314. pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
  4315. if (!pIoc2)
  4316. return -ENOMEM;
  4317. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4318. cfg.physAddr = ioc2_dma;
  4319. if (mpt_config(ioc, &cfg) != 0)
  4320. goto out;
  4321. mem = kmalloc(iocpage2sz, GFP_KERNEL);
  4322. if (!mem)
  4323. goto out;
  4324. memcpy(mem, (u8 *)pIoc2, iocpage2sz);
  4325. ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
  4326. mpt_read_ioc_pg_3(ioc);
  4327. for (i = 0; i < pIoc2->NumActiveVolumes ; i++)
  4328. mpt_inactive_raid_volumes(ioc,
  4329. pIoc2->RaidVolume[i].VolumeBus,
  4330. pIoc2->RaidVolume[i].VolumeID);
  4331. out:
  4332. pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
  4333. return rc;
  4334. }
  4335. static int
  4336. mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
  4337. {
  4338. IOCPage3_t *pIoc3;
  4339. u8 *mem;
  4340. CONFIGPARMS cfg;
  4341. ConfigPageHeader_t header;
  4342. dma_addr_t ioc3_dma;
  4343. int iocpage3sz = 0;
  4344. /* Free the old page
  4345. */
  4346. kfree(ioc->raid_data.pIocPg3);
  4347. ioc->raid_data.pIocPg3 = NULL;
  4348. /* There is at least one physical disk.
  4349. * Read and save IOC Page 3
  4350. */
  4351. header.PageVersion = 0;
  4352. header.PageLength = 0;
  4353. header.PageNumber = 3;
  4354. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4355. cfg.cfghdr.hdr = &header;
  4356. cfg.physAddr = -1;
  4357. cfg.pageAddr = 0;
  4358. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4359. cfg.dir = 0;
  4360. cfg.timeout = 0;
  4361. if (mpt_config(ioc, &cfg) != 0)
  4362. return 0;
  4363. if (header.PageLength == 0)
  4364. return 0;
  4365. /* Read Header good, alloc memory
  4366. */
  4367. iocpage3sz = header.PageLength * 4;
  4368. pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
  4369. if (!pIoc3)
  4370. return 0;
  4371. /* Read the Page and save the data
  4372. * into malloc'd memory.
  4373. */
  4374. cfg.physAddr = ioc3_dma;
  4375. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4376. if (mpt_config(ioc, &cfg) == 0) {
  4377. mem = kmalloc(iocpage3sz, GFP_KERNEL);
  4378. if (mem) {
  4379. memcpy(mem, (u8 *)pIoc3, iocpage3sz);
  4380. ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
  4381. }
  4382. }
  4383. pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
  4384. return 0;
  4385. }
  4386. static void
  4387. mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
  4388. {
  4389. IOCPage4_t *pIoc4;
  4390. CONFIGPARMS cfg;
  4391. ConfigPageHeader_t header;
  4392. dma_addr_t ioc4_dma;
  4393. int iocpage4sz;
  4394. /* Read and save IOC Page 4
  4395. */
  4396. header.PageVersion = 0;
  4397. header.PageLength = 0;
  4398. header.PageNumber = 4;
  4399. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4400. cfg.cfghdr.hdr = &header;
  4401. cfg.physAddr = -1;
  4402. cfg.pageAddr = 0;
  4403. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4404. cfg.dir = 0;
  4405. cfg.timeout = 0;
  4406. if (mpt_config(ioc, &cfg) != 0)
  4407. return;
  4408. if (header.PageLength == 0)
  4409. return;
  4410. if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
  4411. iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
  4412. pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
  4413. if (!pIoc4)
  4414. return;
  4415. ioc->alloc_total += iocpage4sz;
  4416. } else {
  4417. ioc4_dma = ioc->spi_data.IocPg4_dma;
  4418. iocpage4sz = ioc->spi_data.IocPg4Sz;
  4419. }
  4420. /* Read the Page into dma memory.
  4421. */
  4422. cfg.physAddr = ioc4_dma;
  4423. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4424. if (mpt_config(ioc, &cfg) == 0) {
  4425. ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
  4426. ioc->spi_data.IocPg4_dma = ioc4_dma;
  4427. ioc->spi_data.IocPg4Sz = iocpage4sz;
  4428. } else {
  4429. pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
  4430. ioc->spi_data.pIocPg4 = NULL;
  4431. ioc->alloc_total -= iocpage4sz;
  4432. }
  4433. }
  4434. static void
  4435. mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
  4436. {
  4437. IOCPage1_t *pIoc1;
  4438. CONFIGPARMS cfg;
  4439. ConfigPageHeader_t header;
  4440. dma_addr_t ioc1_dma;
  4441. int iocpage1sz = 0;
  4442. u32 tmp;
  4443. /* Check the Coalescing Timeout in IOC Page 1
  4444. */
  4445. header.PageVersion = 0;
  4446. header.PageLength = 0;
  4447. header.PageNumber = 1;
  4448. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4449. cfg.cfghdr.hdr = &header;
  4450. cfg.physAddr = -1;
  4451. cfg.pageAddr = 0;
  4452. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4453. cfg.dir = 0;
  4454. cfg.timeout = 0;
  4455. if (mpt_config(ioc, &cfg) != 0)
  4456. return;
  4457. if (header.PageLength == 0)
  4458. return;
  4459. /* Read Header good, alloc memory
  4460. */
  4461. iocpage1sz = header.PageLength * 4;
  4462. pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
  4463. if (!pIoc1)
  4464. return;
  4465. /* Read the Page and check coalescing timeout
  4466. */
  4467. cfg.physAddr = ioc1_dma;
  4468. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4469. if (mpt_config(ioc, &cfg) == 0) {
  4470. tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
  4471. if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
  4472. tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
  4473. dprintk((MYIOC_s_INFO_FMT "Coalescing Enabled Timeout = %d\n",
  4474. ioc->name, tmp));
  4475. if (tmp > MPT_COALESCING_TIMEOUT) {
  4476. pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
  4477. /* Write NVRAM and current
  4478. */
  4479. cfg.dir = 1;
  4480. cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
  4481. if (mpt_config(ioc, &cfg) == 0) {
  4482. dprintk((MYIOC_s_INFO_FMT "Reset Current Coalescing Timeout to = %d\n",
  4483. ioc->name, MPT_COALESCING_TIMEOUT));
  4484. cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
  4485. if (mpt_config(ioc, &cfg) == 0) {
  4486. dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout to = %d\n",
  4487. ioc->name, MPT_COALESCING_TIMEOUT));
  4488. } else {
  4489. dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout Failed\n",
  4490. ioc->name));
  4491. }
  4492. } else {
  4493. dprintk((MYIOC_s_WARN_FMT "Reset of Current Coalescing Timeout Failed!\n",
  4494. ioc->name));
  4495. }
  4496. }
  4497. } else {
  4498. dprintk((MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
  4499. }
  4500. }
  4501. pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
  4502. return;
  4503. }
  4504. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4505. /**
  4506. * SendEventNotification - Send EventNotification (on or off) request to adapter
  4507. * @ioc: Pointer to MPT_ADAPTER structure
  4508. * @EvSwitch: Event switch flags
  4509. */
  4510. static int
  4511. SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch)
  4512. {
  4513. EventNotification_t *evnp;
  4514. evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc);
  4515. if (evnp == NULL) {
  4516. devtverboseprintk((MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n",
  4517. ioc->name));
  4518. return 0;
  4519. }
  4520. memset(evnp, 0, sizeof(*evnp));
  4521. devtverboseprintk((MYIOC_s_INFO_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp));
  4522. evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
  4523. evnp->ChainOffset = 0;
  4524. evnp->MsgFlags = 0;
  4525. evnp->Switch = EvSwitch;
  4526. mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)evnp);
  4527. return 0;
  4528. }
  4529. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4530. /**
  4531. * SendEventAck - Send EventAck request to MPT adapter.
  4532. * @ioc: Pointer to MPT_ADAPTER structure
  4533. * @evnp: Pointer to original EventNotification request
  4534. */
  4535. static int
  4536. SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
  4537. {
  4538. EventAck_t *pAck;
  4539. if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4540. dfailprintk((MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
  4541. ioc->name,__FUNCTION__));
  4542. return -1;
  4543. }
  4544. devtverboseprintk((MYIOC_s_INFO_FMT "Sending EventAck\n", ioc->name));
  4545. pAck->Function = MPI_FUNCTION_EVENT_ACK;
  4546. pAck->ChainOffset = 0;
  4547. pAck->Reserved[0] = pAck->Reserved[1] = 0;
  4548. pAck->MsgFlags = 0;
  4549. pAck->Reserved1[0] = pAck->Reserved1[1] = pAck->Reserved1[2] = 0;
  4550. pAck->Event = evnp->Event;
  4551. pAck->EventContext = evnp->EventContext;
  4552. mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
  4553. return 0;
  4554. }
  4555. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4556. /**
  4557. * mpt_config - Generic function to issue config message
  4558. * @ioc: Pointer to an adapter structure
  4559. * @pCfg: Pointer to a configuration structure. Struct contains
  4560. * action, page address, direction, physical address
  4561. * and pointer to a configuration page header
  4562. * Page header is updated.
  4563. *
  4564. * Returns 0 for success
  4565. * -EPERM if not allowed due to ISR context
  4566. * -EAGAIN if no msg frames currently available
  4567. * -EFAULT for non-successful reply or no reply (timeout)
  4568. */
  4569. int
  4570. mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
  4571. {
  4572. Config_t *pReq;
  4573. ConfigExtendedPageHeader_t *pExtHdr = NULL;
  4574. MPT_FRAME_HDR *mf;
  4575. unsigned long flags;
  4576. int ii, rc;
  4577. int flagsLength;
  4578. int in_isr;
  4579. /* Prevent calling wait_event() (below), if caller happens
  4580. * to be in ISR context, because that is fatal!
  4581. */
  4582. in_isr = in_interrupt();
  4583. if (in_isr) {
  4584. dcprintk((MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
  4585. ioc->name));
  4586. return -EPERM;
  4587. }
  4588. /* Get and Populate a free Frame
  4589. */
  4590. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4591. dcprintk((MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n",
  4592. ioc->name));
  4593. return -EAGAIN;
  4594. }
  4595. pReq = (Config_t *)mf;
  4596. pReq->Action = pCfg->action;
  4597. pReq->Reserved = 0;
  4598. pReq->ChainOffset = 0;
  4599. pReq->Function = MPI_FUNCTION_CONFIG;
  4600. /* Assume page type is not extended and clear "reserved" fields. */
  4601. pReq->ExtPageLength = 0;
  4602. pReq->ExtPageType = 0;
  4603. pReq->MsgFlags = 0;
  4604. for (ii=0; ii < 8; ii++)
  4605. pReq->Reserved2[ii] = 0;
  4606. pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
  4607. pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
  4608. pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
  4609. pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
  4610. if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
  4611. pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
  4612. pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
  4613. pReq->ExtPageType = pExtHdr->ExtPageType;
  4614. pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  4615. /* Page Length must be treated as a reserved field for the extended header. */
  4616. pReq->Header.PageLength = 0;
  4617. }
  4618. pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
  4619. /* Add a SGE to the config request.
  4620. */
  4621. if (pCfg->dir)
  4622. flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
  4623. else
  4624. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
  4625. if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
  4626. flagsLength |= pExtHdr->ExtPageLength * 4;
  4627. dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
  4628. ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action));
  4629. }
  4630. else {
  4631. flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
  4632. dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
  4633. ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action));
  4634. }
  4635. mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
  4636. /* Append pCfg pointer to end of mf
  4637. */
  4638. *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
  4639. /* Initalize the timer
  4640. */
  4641. init_timer(&pCfg->timer);
  4642. pCfg->timer.data = (unsigned long) ioc;
  4643. pCfg->timer.function = mpt_timer_expired;
  4644. pCfg->wait_done = 0;
  4645. /* Set the timer; ensure 10 second minimum */
  4646. if (pCfg->timeout < 10)
  4647. pCfg->timer.expires = jiffies + HZ*10;
  4648. else
  4649. pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
  4650. /* Add to end of Q, set timer and then issue this command */
  4651. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4652. list_add_tail(&pCfg->linkage, &ioc->configQ);
  4653. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4654. add_timer(&pCfg->timer);
  4655. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  4656. wait_event(mpt_waitq, pCfg->wait_done);
  4657. /* mf has been freed - do not access */
  4658. rc = pCfg->status;
  4659. return rc;
  4660. }
  4661. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4662. /**
  4663. * mpt_timer_expired - Callback for timer process.
  4664. * Used only internal config functionality.
  4665. * @data: Pointer to MPT_SCSI_HOST recast as an unsigned long
  4666. */
  4667. static void
  4668. mpt_timer_expired(unsigned long data)
  4669. {
  4670. MPT_ADAPTER *ioc = (MPT_ADAPTER *) data;
  4671. dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired! \n", ioc->name));
  4672. /* Perform a FW reload */
  4673. if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0)
  4674. printk(MYIOC_s_WARN_FMT "Firmware Reload FAILED!\n", ioc->name);
  4675. /* No more processing.
  4676. * Hard reset clean-up will wake up
  4677. * process and free all resources.
  4678. */
  4679. dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired complete!\n", ioc->name));
  4680. return;
  4681. }
  4682. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4683. /**
  4684. * mpt_ioc_reset - Base cleanup for hard reset
  4685. * @ioc: Pointer to the adapter structure
  4686. * @reset_phase: Indicates pre- or post-reset functionality
  4687. *
  4688. * Remark: Frees resources with internally generated commands.
  4689. */
  4690. static int
  4691. mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
  4692. {
  4693. CONFIGPARMS *pCfg;
  4694. unsigned long flags;
  4695. dprintk((KERN_WARNING MYNAM
  4696. ": IOC %s_reset routed to MPT base driver!\n",
  4697. reset_phase==MPT_IOC_SETUP_RESET ? "setup" : (
  4698. reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post")));
  4699. if (reset_phase == MPT_IOC_SETUP_RESET) {
  4700. ;
  4701. } else if (reset_phase == MPT_IOC_PRE_RESET) {
  4702. /* If the internal config Q is not empty -
  4703. * delete timer. MF resources will be freed when
  4704. * the FIFO's are primed.
  4705. */
  4706. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4707. list_for_each_entry(pCfg, &ioc->configQ, linkage)
  4708. del_timer(&pCfg->timer);
  4709. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4710. } else {
  4711. CONFIGPARMS *pNext;
  4712. /* Search the configQ for internal commands.
  4713. * Flush the Q, and wake up all suspended threads.
  4714. */
  4715. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4716. list_for_each_entry_safe(pCfg, pNext, &ioc->configQ, linkage) {
  4717. list_del(&pCfg->linkage);
  4718. pCfg->status = MPT_CONFIG_ERROR;
  4719. pCfg->wait_done = 1;
  4720. wake_up(&mpt_waitq);
  4721. }
  4722. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4723. }
  4724. return 1; /* currently means nothing really */
  4725. }
  4726. #ifdef CONFIG_PROC_FS /* { */
  4727. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4728. /*
  4729. * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
  4730. */
  4731. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4732. /**
  4733. * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
  4734. *
  4735. * Returns 0 for success, non-zero for failure.
  4736. */
  4737. static int
  4738. procmpt_create(void)
  4739. {
  4740. struct proc_dir_entry *ent;
  4741. mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
  4742. if (mpt_proc_root_dir == NULL)
  4743. return -ENOTDIR;
  4744. ent = create_proc_entry("summary", S_IFREG|S_IRUGO, mpt_proc_root_dir);
  4745. if (ent)
  4746. ent->read_proc = procmpt_summary_read;
  4747. ent = create_proc_entry("version", S_IFREG|S_IRUGO, mpt_proc_root_dir);
  4748. if (ent)
  4749. ent->read_proc = procmpt_version_read;
  4750. return 0;
  4751. }
  4752. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4753. /**
  4754. * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
  4755. *
  4756. * Returns 0 for success, non-zero for failure.
  4757. */
  4758. static void
  4759. procmpt_destroy(void)
  4760. {
  4761. remove_proc_entry("version", mpt_proc_root_dir);
  4762. remove_proc_entry("summary", mpt_proc_root_dir);
  4763. remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
  4764. }
  4765. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4766. /**
  4767. * procmpt_summary_read - Handle read request of a summary file
  4768. * @buf: Pointer to area to write information
  4769. * @start: Pointer to start pointer
  4770. * @offset: Offset to start writing
  4771. * @request: Amount of read data requested
  4772. * @eof: Pointer to EOF integer
  4773. * @data: Pointer
  4774. *
  4775. * Handles read request from /proc/mpt/summary or /proc/mpt/iocN/summary.
  4776. * Returns number of characters written to process performing the read.
  4777. */
  4778. static int
  4779. procmpt_summary_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4780. {
  4781. MPT_ADAPTER *ioc;
  4782. char *out = buf;
  4783. int len;
  4784. if (data) {
  4785. int more = 0;
  4786. ioc = data;
  4787. mpt_print_ioc_summary(ioc, out, &more, 0, 1);
  4788. out += more;
  4789. } else {
  4790. list_for_each_entry(ioc, &ioc_list, list) {
  4791. int more = 0;
  4792. mpt_print_ioc_summary(ioc, out, &more, 0, 1);
  4793. out += more;
  4794. if ((out-buf) >= request)
  4795. break;
  4796. }
  4797. }
  4798. len = out - buf;
  4799. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4800. }
  4801. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4802. /**
  4803. * procmpt_version_read - Handle read request from /proc/mpt/version.
  4804. * @buf: Pointer to area to write information
  4805. * @start: Pointer to start pointer
  4806. * @offset: Offset to start writing
  4807. * @request: Amount of read data requested
  4808. * @eof: Pointer to EOF integer
  4809. * @data: Pointer
  4810. *
  4811. * Returns number of characters written to process performing the read.
  4812. */
  4813. static int
  4814. procmpt_version_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4815. {
  4816. int ii;
  4817. int scsi, fc, sas, lan, ctl, targ, dmp;
  4818. char *drvname;
  4819. int len;
  4820. len = sprintf(buf, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
  4821. len += sprintf(buf+len, " Fusion MPT base driver\n");
  4822. scsi = fc = sas = lan = ctl = targ = dmp = 0;
  4823. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  4824. drvname = NULL;
  4825. if (MptCallbacks[ii]) {
  4826. switch (MptDriverClass[ii]) {
  4827. case MPTSPI_DRIVER:
  4828. if (!scsi++) drvname = "SPI host";
  4829. break;
  4830. case MPTFC_DRIVER:
  4831. if (!fc++) drvname = "FC host";
  4832. break;
  4833. case MPTSAS_DRIVER:
  4834. if (!sas++) drvname = "SAS host";
  4835. break;
  4836. case MPTLAN_DRIVER:
  4837. if (!lan++) drvname = "LAN";
  4838. break;
  4839. case MPTSTM_DRIVER:
  4840. if (!targ++) drvname = "SCSI target";
  4841. break;
  4842. case MPTCTL_DRIVER:
  4843. if (!ctl++) drvname = "ioctl";
  4844. break;
  4845. }
  4846. if (drvname)
  4847. len += sprintf(buf+len, " Fusion MPT %s driver\n", drvname);
  4848. }
  4849. }
  4850. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4851. }
  4852. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4853. /**
  4854. * procmpt_iocinfo_read - Handle read request from /proc/mpt/iocN/info.
  4855. * @buf: Pointer to area to write information
  4856. * @start: Pointer to start pointer
  4857. * @offset: Offset to start writing
  4858. * @request: Amount of read data requested
  4859. * @eof: Pointer to EOF integer
  4860. * @data: Pointer
  4861. *
  4862. * Returns number of characters written to process performing the read.
  4863. */
  4864. static int
  4865. procmpt_iocinfo_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4866. {
  4867. MPT_ADAPTER *ioc = data;
  4868. int len;
  4869. char expVer[32];
  4870. int sz;
  4871. int p;
  4872. mpt_get_fw_exp_ver(expVer, ioc);
  4873. len = sprintf(buf, "%s:", ioc->name);
  4874. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
  4875. len += sprintf(buf+len, " (f/w download boot flag set)");
  4876. // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
  4877. // len += sprintf(buf+len, " CONFIG_CHECKSUM_FAIL!");
  4878. len += sprintf(buf+len, "\n ProductID = 0x%04x (%s)\n",
  4879. ioc->facts.ProductID,
  4880. ioc->prod_name);
  4881. len += sprintf(buf+len, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
  4882. if (ioc->facts.FWImageSize)
  4883. len += sprintf(buf+len, " (fw_size=%d)", ioc->facts.FWImageSize);
  4884. len += sprintf(buf+len, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
  4885. len += sprintf(buf+len, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
  4886. len += sprintf(buf+len, " EventState = 0x%02x\n", ioc->facts.EventState);
  4887. len += sprintf(buf+len, " CurrentHostMfaHighAddr = 0x%08x\n",
  4888. ioc->facts.CurrentHostMfaHighAddr);
  4889. len += sprintf(buf+len, " CurrentSenseBufferHighAddr = 0x%08x\n",
  4890. ioc->facts.CurrentSenseBufferHighAddr);
  4891. len += sprintf(buf+len, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
  4892. len += sprintf(buf+len, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
  4893. len += sprintf(buf+len, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
  4894. (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
  4895. /*
  4896. * Rounding UP to nearest 4-kB boundary here...
  4897. */
  4898. sz = (ioc->req_sz * ioc->req_depth) + 128;
  4899. sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
  4900. len += sprintf(buf+len, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
  4901. ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
  4902. len += sprintf(buf+len, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
  4903. 4*ioc->facts.RequestFrameSize,
  4904. ioc->facts.GlobalCredits);
  4905. len += sprintf(buf+len, " Frames @ 0x%p (Dma @ 0x%p)\n",
  4906. (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
  4907. sz = (ioc->reply_sz * ioc->reply_depth) + 128;
  4908. len += sprintf(buf+len, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
  4909. ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
  4910. len += sprintf(buf+len, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
  4911. ioc->facts.CurReplyFrameSize,
  4912. ioc->facts.ReplyQueueDepth);
  4913. len += sprintf(buf+len, " MaxDevices = %d\n",
  4914. (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
  4915. len += sprintf(buf+len, " MaxBuses = %d\n", ioc->facts.MaxBuses);
  4916. /* per-port info */
  4917. for (p=0; p < ioc->facts.NumberOfPorts; p++) {
  4918. len += sprintf(buf+len, " PortNumber = %d (of %d)\n",
  4919. p+1,
  4920. ioc->facts.NumberOfPorts);
  4921. if (ioc->bus_type == FC) {
  4922. if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
  4923. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  4924. len += sprintf(buf+len, " LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
  4925. a[5], a[4], a[3], a[2], a[1], a[0]);
  4926. }
  4927. len += sprintf(buf+len, " WWN = %08X%08X:%08X%08X\n",
  4928. ioc->fc_port_page0[p].WWNN.High,
  4929. ioc->fc_port_page0[p].WWNN.Low,
  4930. ioc->fc_port_page0[p].WWPN.High,
  4931. ioc->fc_port_page0[p].WWPN.Low);
  4932. }
  4933. }
  4934. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4935. }
  4936. #endif /* CONFIG_PROC_FS } */
  4937. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4938. static void
  4939. mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
  4940. {
  4941. buf[0] ='\0';
  4942. if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
  4943. sprintf(buf, " (Exp %02d%02d)",
  4944. (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
  4945. (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
  4946. /* insider hack! */
  4947. if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
  4948. strcat(buf, " [MDBG]");
  4949. }
  4950. }
  4951. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4952. /**
  4953. * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
  4954. * @ioc: Pointer to MPT_ADAPTER structure
  4955. * @buffer: Pointer to buffer where IOC summary info should be written
  4956. * @size: Pointer to number of bytes we wrote (set by this routine)
  4957. * @len: Offset at which to start writing in buffer
  4958. * @showlan: Display LAN stuff?
  4959. *
  4960. * This routine writes (english readable) ASCII text, which represents
  4961. * a summary of IOC information, to a buffer.
  4962. */
  4963. void
  4964. mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
  4965. {
  4966. char expVer[32];
  4967. int y;
  4968. mpt_get_fw_exp_ver(expVer, ioc);
  4969. /*
  4970. * Shorter summary of attached ioc's...
  4971. */
  4972. y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
  4973. ioc->name,
  4974. ioc->prod_name,
  4975. MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
  4976. ioc->facts.FWVersion.Word,
  4977. expVer,
  4978. ioc->facts.NumberOfPorts,
  4979. ioc->req_depth);
  4980. if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
  4981. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  4982. y += sprintf(buffer+len+y, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
  4983. a[5], a[4], a[3], a[2], a[1], a[0]);
  4984. }
  4985. y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
  4986. if (!ioc->active)
  4987. y += sprintf(buffer+len+y, " (disabled)");
  4988. y += sprintf(buffer+len+y, "\n");
  4989. *size = y;
  4990. }
  4991. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4992. /*
  4993. * Reset Handling
  4994. */
  4995. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4996. /**
  4997. * mpt_HardResetHandler - Generic reset handler
  4998. * @ioc: Pointer to MPT_ADAPTER structure
  4999. * @sleepFlag: Indicates if sleep or schedule must be called.
  5000. *
  5001. * Issues SCSI Task Management call based on input arg values.
  5002. * If TaskMgmt fails, returns associated SCSI request.
  5003. *
  5004. * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
  5005. * or a non-interrupt thread. In the former, must not call schedule().
  5006. *
  5007. * Note: A return of -1 is a FATAL error case, as it means a
  5008. * FW reload/initialization failed.
  5009. *
  5010. * Returns 0 for SUCCESS or -1 if FAILED.
  5011. */
  5012. int
  5013. mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
  5014. {
  5015. int rc;
  5016. unsigned long flags;
  5017. dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name));
  5018. #ifdef MFCNT
  5019. printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
  5020. printk("MF count 0x%x !\n", ioc->mfcnt);
  5021. #endif
  5022. /* Reset the adapter. Prevent more than 1 call to
  5023. * mpt_do_ioc_recovery at any instant in time.
  5024. */
  5025. spin_lock_irqsave(&ioc->diagLock, flags);
  5026. if ((ioc->diagPending) || (ioc->alt_ioc && ioc->alt_ioc->diagPending)){
  5027. spin_unlock_irqrestore(&ioc->diagLock, flags);
  5028. return 0;
  5029. } else {
  5030. ioc->diagPending = 1;
  5031. }
  5032. spin_unlock_irqrestore(&ioc->diagLock, flags);
  5033. /* FIXME: If do_ioc_recovery fails, repeat....
  5034. */
  5035. /* The SCSI driver needs to adjust timeouts on all current
  5036. * commands prior to the diagnostic reset being issued.
  5037. * Prevents timeouts occurring during a diagnostic reset...very bad.
  5038. * For all other protocol drivers, this is a no-op.
  5039. */
  5040. {
  5041. int ii;
  5042. int r = 0;
  5043. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  5044. if (MptResetHandlers[ii]) {
  5045. dtmprintk((MYIOC_s_INFO_FMT "Calling IOC reset_setup handler #%d\n",
  5046. ioc->name, ii));
  5047. r += mpt_signal_reset(ii, ioc, MPT_IOC_SETUP_RESET);
  5048. if (ioc->alt_ioc) {
  5049. dtmprintk((MYIOC_s_INFO_FMT "Calling alt-%s setup reset handler #%d\n",
  5050. ioc->name, ioc->alt_ioc->name, ii));
  5051. r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_SETUP_RESET);
  5052. }
  5053. }
  5054. }
  5055. }
  5056. if ((rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag)) != 0) {
  5057. printk(KERN_WARNING MYNAM ": WARNING - (%d) Cannot recover %s\n",
  5058. rc, ioc->name);
  5059. }
  5060. ioc->reload_fw = 0;
  5061. if (ioc->alt_ioc)
  5062. ioc->alt_ioc->reload_fw = 0;
  5063. spin_lock_irqsave(&ioc->diagLock, flags);
  5064. ioc->diagPending = 0;
  5065. if (ioc->alt_ioc)
  5066. ioc->alt_ioc->diagPending = 0;
  5067. spin_unlock_irqrestore(&ioc->diagLock, flags);
  5068. dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler rc = %d!\n", ioc->name, rc));
  5069. return rc;
  5070. }
  5071. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5072. static void
  5073. EventDescriptionStr(u8 event, u32 evData0, char *evStr)
  5074. {
  5075. char *ds = NULL;
  5076. switch(event) {
  5077. case MPI_EVENT_NONE:
  5078. ds = "None";
  5079. break;
  5080. case MPI_EVENT_LOG_DATA:
  5081. ds = "Log Data";
  5082. break;
  5083. case MPI_EVENT_STATE_CHANGE:
  5084. ds = "State Change";
  5085. break;
  5086. case MPI_EVENT_UNIT_ATTENTION:
  5087. ds = "Unit Attention";
  5088. break;
  5089. case MPI_EVENT_IOC_BUS_RESET:
  5090. ds = "IOC Bus Reset";
  5091. break;
  5092. case MPI_EVENT_EXT_BUS_RESET:
  5093. ds = "External Bus Reset";
  5094. break;
  5095. case MPI_EVENT_RESCAN:
  5096. ds = "Bus Rescan Event";
  5097. break;
  5098. case MPI_EVENT_LINK_STATUS_CHANGE:
  5099. if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
  5100. ds = "Link Status(FAILURE) Change";
  5101. else
  5102. ds = "Link Status(ACTIVE) Change";
  5103. break;
  5104. case MPI_EVENT_LOOP_STATE_CHANGE:
  5105. if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
  5106. ds = "Loop State(LIP) Change";
  5107. else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
  5108. ds = "Loop State(LPE) Change"; /* ??? */
  5109. else
  5110. ds = "Loop State(LPB) Change"; /* ??? */
  5111. break;
  5112. case MPI_EVENT_LOGOUT:
  5113. ds = "Logout";
  5114. break;
  5115. case MPI_EVENT_EVENT_CHANGE:
  5116. if (evData0)
  5117. ds = "Events ON";
  5118. else
  5119. ds = "Events OFF";
  5120. break;
  5121. case MPI_EVENT_INTEGRATED_RAID:
  5122. {
  5123. u8 ReasonCode = (u8)(evData0 >> 16);
  5124. switch (ReasonCode) {
  5125. case MPI_EVENT_RAID_RC_VOLUME_CREATED :
  5126. ds = "Integrated Raid: Volume Created";
  5127. break;
  5128. case MPI_EVENT_RAID_RC_VOLUME_DELETED :
  5129. ds = "Integrated Raid: Volume Deleted";
  5130. break;
  5131. case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
  5132. ds = "Integrated Raid: Volume Settings Changed";
  5133. break;
  5134. case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
  5135. ds = "Integrated Raid: Volume Status Changed";
  5136. break;
  5137. case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
  5138. ds = "Integrated Raid: Volume Physdisk Changed";
  5139. break;
  5140. case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
  5141. ds = "Integrated Raid: Physdisk Created";
  5142. break;
  5143. case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
  5144. ds = "Integrated Raid: Physdisk Deleted";
  5145. break;
  5146. case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
  5147. ds = "Integrated Raid: Physdisk Settings Changed";
  5148. break;
  5149. case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
  5150. ds = "Integrated Raid: Physdisk Status Changed";
  5151. break;
  5152. case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
  5153. ds = "Integrated Raid: Domain Validation Needed";
  5154. break;
  5155. case MPI_EVENT_RAID_RC_SMART_DATA :
  5156. ds = "Integrated Raid; Smart Data";
  5157. break;
  5158. case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
  5159. ds = "Integrated Raid: Replace Action Started";
  5160. break;
  5161. default:
  5162. ds = "Integrated Raid";
  5163. break;
  5164. }
  5165. break;
  5166. }
  5167. case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
  5168. ds = "SCSI Device Status Change";
  5169. break;
  5170. case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
  5171. {
  5172. u8 id = (u8)(evData0);
  5173. u8 channel = (u8)(evData0 >> 8);
  5174. u8 ReasonCode = (u8)(evData0 >> 16);
  5175. switch (ReasonCode) {
  5176. case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
  5177. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5178. "SAS Device Status Change: Added: "
  5179. "id=%d channel=%d", id, channel);
  5180. break;
  5181. case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
  5182. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5183. "SAS Device Status Change: Deleted: "
  5184. "id=%d channel=%d", id, channel);
  5185. break;
  5186. case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
  5187. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5188. "SAS Device Status Change: SMART Data: "
  5189. "id=%d channel=%d", id, channel);
  5190. break;
  5191. case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
  5192. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5193. "SAS Device Status Change: No Persistancy: "
  5194. "id=%d channel=%d", id, channel);
  5195. break;
  5196. case MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED:
  5197. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5198. "SAS Device Status Change: Unsupported Device "
  5199. "Discovered : id=%d channel=%d", id, channel);
  5200. break;
  5201. case MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
  5202. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5203. "SAS Device Status Change: Internal Device "
  5204. "Reset : id=%d channel=%d", id, channel);
  5205. break;
  5206. case MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
  5207. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5208. "SAS Device Status Change: Internal Task "
  5209. "Abort : id=%d channel=%d", id, channel);
  5210. break;
  5211. case MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
  5212. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5213. "SAS Device Status Change: Internal Abort "
  5214. "Task Set : id=%d channel=%d", id, channel);
  5215. break;
  5216. case MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
  5217. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5218. "SAS Device Status Change: Internal Clear "
  5219. "Task Set : id=%d channel=%d", id, channel);
  5220. break;
  5221. case MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
  5222. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5223. "SAS Device Status Change: Internal Query "
  5224. "Task : id=%d channel=%d", id, channel);
  5225. break;
  5226. default:
  5227. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5228. "SAS Device Status Change: Unknown: "
  5229. "id=%d channel=%d", id, channel);
  5230. break;
  5231. }
  5232. break;
  5233. }
  5234. case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
  5235. ds = "Bus Timer Expired";
  5236. break;
  5237. case MPI_EVENT_QUEUE_FULL:
  5238. {
  5239. u16 curr_depth = (u16)(evData0 >> 16);
  5240. u8 channel = (u8)(evData0 >> 8);
  5241. u8 id = (u8)(evData0);
  5242. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5243. "Queue Full: channel=%d id=%d depth=%d",
  5244. channel, id, curr_depth);
  5245. break;
  5246. }
  5247. case MPI_EVENT_SAS_SES:
  5248. ds = "SAS SES Event";
  5249. break;
  5250. case MPI_EVENT_PERSISTENT_TABLE_FULL:
  5251. ds = "Persistent Table Full";
  5252. break;
  5253. case MPI_EVENT_SAS_PHY_LINK_STATUS:
  5254. {
  5255. u8 LinkRates = (u8)(evData0 >> 8);
  5256. u8 PhyNumber = (u8)(evData0);
  5257. LinkRates = (LinkRates & MPI_EVENT_SAS_PLS_LR_CURRENT_MASK) >>
  5258. MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT;
  5259. switch (LinkRates) {
  5260. case MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN:
  5261. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5262. "SAS PHY Link Status: Phy=%d:"
  5263. " Rate Unknown",PhyNumber);
  5264. break;
  5265. case MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED:
  5266. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5267. "SAS PHY Link Status: Phy=%d:"
  5268. " Phy Disabled",PhyNumber);
  5269. break;
  5270. case MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION:
  5271. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5272. "SAS PHY Link Status: Phy=%d:"
  5273. " Failed Speed Nego",PhyNumber);
  5274. break;
  5275. case MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE:
  5276. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5277. "SAS PHY Link Status: Phy=%d:"
  5278. " Sata OOB Completed",PhyNumber);
  5279. break;
  5280. case MPI_EVENT_SAS_PLS_LR_RATE_1_5:
  5281. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5282. "SAS PHY Link Status: Phy=%d:"
  5283. " Rate 1.5 Gbps",PhyNumber);
  5284. break;
  5285. case MPI_EVENT_SAS_PLS_LR_RATE_3_0:
  5286. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5287. "SAS PHY Link Status: Phy=%d:"
  5288. " Rate 3.0 Gpbs",PhyNumber);
  5289. break;
  5290. default:
  5291. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5292. "SAS PHY Link Status: Phy=%d", PhyNumber);
  5293. break;
  5294. }
  5295. break;
  5296. }
  5297. case MPI_EVENT_SAS_DISCOVERY_ERROR:
  5298. ds = "SAS Discovery Error";
  5299. break;
  5300. case MPI_EVENT_IR_RESYNC_UPDATE:
  5301. {
  5302. u8 resync_complete = (u8)(evData0 >> 16);
  5303. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5304. "IR Resync Update: Complete = %d:",resync_complete);
  5305. break;
  5306. }
  5307. case MPI_EVENT_IR2:
  5308. {
  5309. u8 ReasonCode = (u8)(evData0 >> 16);
  5310. switch (ReasonCode) {
  5311. case MPI_EVENT_IR2_RC_LD_STATE_CHANGED:
  5312. ds = "IR2: LD State Changed";
  5313. break;
  5314. case MPI_EVENT_IR2_RC_PD_STATE_CHANGED:
  5315. ds = "IR2: PD State Changed";
  5316. break;
  5317. case MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL:
  5318. ds = "IR2: Bad Block Table Full";
  5319. break;
  5320. case MPI_EVENT_IR2_RC_PD_INSERTED:
  5321. ds = "IR2: PD Inserted";
  5322. break;
  5323. case MPI_EVENT_IR2_RC_PD_REMOVED:
  5324. ds = "IR2: PD Removed";
  5325. break;
  5326. case MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED:
  5327. ds = "IR2: Foreign CFG Detected";
  5328. break;
  5329. case MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR:
  5330. ds = "IR2: Rebuild Medium Error";
  5331. break;
  5332. default:
  5333. ds = "IR2";
  5334. break;
  5335. }
  5336. break;
  5337. }
  5338. case MPI_EVENT_SAS_DISCOVERY:
  5339. {
  5340. if (evData0)
  5341. ds = "SAS Discovery: Start";
  5342. else
  5343. ds = "SAS Discovery: Stop";
  5344. break;
  5345. }
  5346. case MPI_EVENT_LOG_ENTRY_ADDED:
  5347. ds = "SAS Log Entry Added";
  5348. break;
  5349. case MPI_EVENT_SAS_BROADCAST_PRIMITIVE:
  5350. {
  5351. u8 phy_num = (u8)(evData0);
  5352. u8 port_num = (u8)(evData0 >> 8);
  5353. u8 port_width = (u8)(evData0 >> 16);
  5354. u8 primative = (u8)(evData0 >> 24);
  5355. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5356. "SAS Broadcase Primative: phy=%d port=%d "
  5357. "width=%d primative=0x%02x",
  5358. phy_num, port_num, port_width, primative);
  5359. break;
  5360. }
  5361. case MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  5362. {
  5363. u8 reason = (u8)(evData0);
  5364. u8 port_num = (u8)(evData0 >> 8);
  5365. u16 handle = le16_to_cpu(evData0 >> 16);
  5366. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5367. "SAS Initiator Device Status Change: reason=0x%02x "
  5368. "port=%d handle=0x%04x",
  5369. reason, port_num, handle);
  5370. break;
  5371. }
  5372. case MPI_EVENT_SAS_INIT_TABLE_OVERFLOW:
  5373. {
  5374. u8 max_init = (u8)(evData0);
  5375. u8 current_init = (u8)(evData0 >> 8);
  5376. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5377. "SAS Initiator Device Table Overflow: max initiators=%02d "
  5378. "current initators=%02d",
  5379. max_init, current_init);
  5380. break;
  5381. }
  5382. case MPI_EVENT_SAS_SMP_ERROR:
  5383. {
  5384. u8 status = (u8)(evData0);
  5385. u8 port_num = (u8)(evData0 >> 8);
  5386. u8 result = (u8)(evData0 >> 16);
  5387. if (status == MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID)
  5388. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5389. "SAS SMP Error: port=%d result=0x%02x",
  5390. port_num, result);
  5391. else if (status == MPI_EVENT_SAS_SMP_CRC_ERROR)
  5392. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5393. "SAS SMP Error: port=%d : CRC Error",
  5394. port_num);
  5395. else if (status == MPI_EVENT_SAS_SMP_TIMEOUT)
  5396. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5397. "SAS SMP Error: port=%d : Timeout",
  5398. port_num);
  5399. else if (status == MPI_EVENT_SAS_SMP_NO_DESTINATION)
  5400. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5401. "SAS SMP Error: port=%d : No Destination",
  5402. port_num);
  5403. else if (status == MPI_EVENT_SAS_SMP_BAD_DESTINATION)
  5404. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5405. "SAS SMP Error: port=%d : Bad Destination",
  5406. port_num);
  5407. else
  5408. snprintf(evStr, EVENT_DESCR_STR_SZ,
  5409. "SAS SMP Error: port=%d : status=0x%02x",
  5410. port_num, status);
  5411. break;
  5412. }
  5413. /*
  5414. * MPT base "custom" events may be added here...
  5415. */
  5416. default:
  5417. ds = "Unknown";
  5418. break;
  5419. }
  5420. if (ds)
  5421. strncpy(evStr, ds, EVENT_DESCR_STR_SZ);
  5422. }
  5423. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5424. /**
  5425. * ProcessEventNotification - Route EventNotificationReply to all event handlers
  5426. * @ioc: Pointer to MPT_ADAPTER structure
  5427. * @pEventReply: Pointer to EventNotification reply frame
  5428. * @evHandlers: Pointer to integer, number of event handlers
  5429. *
  5430. * Routes a received EventNotificationReply to all currently registered
  5431. * event handlers.
  5432. * Returns sum of event handlers return values.
  5433. */
  5434. static int
  5435. ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
  5436. {
  5437. u16 evDataLen;
  5438. u32 evData0 = 0;
  5439. // u32 evCtx;
  5440. int ii;
  5441. int r = 0;
  5442. int handlers = 0;
  5443. char evStr[EVENT_DESCR_STR_SZ];
  5444. u8 event;
  5445. /*
  5446. * Do platform normalization of values
  5447. */
  5448. event = le32_to_cpu(pEventReply->Event) & 0xFF;
  5449. // evCtx = le32_to_cpu(pEventReply->EventContext);
  5450. evDataLen = le16_to_cpu(pEventReply->EventDataLength);
  5451. if (evDataLen) {
  5452. evData0 = le32_to_cpu(pEventReply->Data[0]);
  5453. }
  5454. EventDescriptionStr(event, evData0, evStr);
  5455. devtprintk((MYIOC_s_INFO_FMT "MPT event:(%02Xh) : %s\n",
  5456. ioc->name,
  5457. event,
  5458. evStr));
  5459. #if defined(MPT_DEBUG) || defined(MPT_DEBUG_VERBOSE_EVENTS)
  5460. printk(KERN_INFO MYNAM ": Event data:\n" KERN_INFO);
  5461. for (ii = 0; ii < evDataLen; ii++)
  5462. printk(" %08x", le32_to_cpu(pEventReply->Data[ii]));
  5463. printk("\n");
  5464. #endif
  5465. /*
  5466. * Do general / base driver event processing
  5467. */
  5468. switch(event) {
  5469. case MPI_EVENT_EVENT_CHANGE: /* 0A */
  5470. if (evDataLen) {
  5471. u8 evState = evData0 & 0xFF;
  5472. /* CHECKME! What if evState unexpectedly says OFF (0)? */
  5473. /* Update EventState field in cached IocFacts */
  5474. if (ioc->facts.Function) {
  5475. ioc->facts.EventState = evState;
  5476. }
  5477. }
  5478. break;
  5479. case MPI_EVENT_INTEGRATED_RAID:
  5480. mptbase_raid_process_event_data(ioc,
  5481. (MpiEventDataRaid_t *)pEventReply->Data);
  5482. break;
  5483. default:
  5484. break;
  5485. }
  5486. /*
  5487. * Should this event be logged? Events are written sequentially.
  5488. * When buffer is full, start again at the top.
  5489. */
  5490. if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
  5491. int idx;
  5492. idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
  5493. ioc->events[idx].event = event;
  5494. ioc->events[idx].eventContext = ioc->eventContext;
  5495. for (ii = 0; ii < 2; ii++) {
  5496. if (ii < evDataLen)
  5497. ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
  5498. else
  5499. ioc->events[idx].data[ii] = 0;
  5500. }
  5501. ioc->eventContext++;
  5502. }
  5503. /*
  5504. * Call each currently registered protocol event handler.
  5505. */
  5506. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  5507. if (MptEvHandlers[ii]) {
  5508. devtverboseprintk((MYIOC_s_INFO_FMT "Routing Event to event handler #%d\n",
  5509. ioc->name, ii));
  5510. r += (*(MptEvHandlers[ii]))(ioc, pEventReply);
  5511. handlers++;
  5512. }
  5513. }
  5514. /* FIXME? Examine results here? */
  5515. /*
  5516. * If needed, send (a single) EventAck.
  5517. */
  5518. if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
  5519. devtverboseprintk((MYIOC_s_WARN_FMT
  5520. "EventAck required\n",ioc->name));
  5521. if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
  5522. devtverboseprintk((MYIOC_s_WARN_FMT "SendEventAck returned %d\n",
  5523. ioc->name, ii));
  5524. }
  5525. }
  5526. *evHandlers = handlers;
  5527. return r;
  5528. }
  5529. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5530. /**
  5531. * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
  5532. * @ioc: Pointer to MPT_ADAPTER structure
  5533. * @log_info: U32 LogInfo reply word from the IOC
  5534. *
  5535. * Refer to lsi/mpi_log_fc.h.
  5536. */
  5537. static void
  5538. mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5539. {
  5540. static char *subcl_str[8] = {
  5541. "FCP Initiator", "FCP Target", "LAN", "MPI Message Layer",
  5542. "FC Link", "Context Manager", "Invalid Field Offset", "State Change Info"
  5543. };
  5544. u8 subcl = (log_info >> 24) & 0x7;
  5545. printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubCl={%s}\n",
  5546. ioc->name, log_info, subcl_str[subcl]);
  5547. }
  5548. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5549. /**
  5550. * mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
  5551. * @ioc: Pointer to MPT_ADAPTER structure
  5552. * @mr: Pointer to MPT reply frame
  5553. * @log_info: U32 LogInfo word from the IOC
  5554. *
  5555. * Refer to lsi/sp_log.h.
  5556. */
  5557. static void
  5558. mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5559. {
  5560. u32 info = log_info & 0x00FF0000;
  5561. char *desc = "unknown";
  5562. switch (info) {
  5563. case 0x00010000:
  5564. desc = "bug! MID not found";
  5565. if (ioc->reload_fw == 0)
  5566. ioc->reload_fw++;
  5567. break;
  5568. case 0x00020000:
  5569. desc = "Parity Error";
  5570. break;
  5571. case 0x00030000:
  5572. desc = "ASYNC Outbound Overrun";
  5573. break;
  5574. case 0x00040000:
  5575. desc = "SYNC Offset Error";
  5576. break;
  5577. case 0x00050000:
  5578. desc = "BM Change";
  5579. break;
  5580. case 0x00060000:
  5581. desc = "Msg In Overflow";
  5582. break;
  5583. case 0x00070000:
  5584. desc = "DMA Error";
  5585. break;
  5586. case 0x00080000:
  5587. desc = "Outbound DMA Overrun";
  5588. break;
  5589. case 0x00090000:
  5590. desc = "Task Management";
  5591. break;
  5592. case 0x000A0000:
  5593. desc = "Device Problem";
  5594. break;
  5595. case 0x000B0000:
  5596. desc = "Invalid Phase Change";
  5597. break;
  5598. case 0x000C0000:
  5599. desc = "Untagged Table Size";
  5600. break;
  5601. }
  5602. printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
  5603. }
  5604. /* strings for sas loginfo */
  5605. static char *originator_str[] = {
  5606. "IOP", /* 00h */
  5607. "PL", /* 01h */
  5608. "IR" /* 02h */
  5609. };
  5610. static char *iop_code_str[] = {
  5611. NULL, /* 00h */
  5612. "Invalid SAS Address", /* 01h */
  5613. NULL, /* 02h */
  5614. "Invalid Page", /* 03h */
  5615. "Diag Message Error", /* 04h */
  5616. "Task Terminated", /* 05h */
  5617. "Enclosure Management", /* 06h */
  5618. "Target Mode" /* 07h */
  5619. };
  5620. static char *pl_code_str[] = {
  5621. NULL, /* 00h */
  5622. "Open Failure", /* 01h */
  5623. "Invalid Scatter Gather List", /* 02h */
  5624. "Wrong Relative Offset or Frame Length", /* 03h */
  5625. "Frame Transfer Error", /* 04h */
  5626. "Transmit Frame Connected Low", /* 05h */
  5627. "SATA Non-NCQ RW Error Bit Set", /* 06h */
  5628. "SATA Read Log Receive Data Error", /* 07h */
  5629. "SATA NCQ Fail All Commands After Error", /* 08h */
  5630. "SATA Error in Receive Set Device Bit FIS", /* 09h */
  5631. "Receive Frame Invalid Message", /* 0Ah */
  5632. "Receive Context Message Valid Error", /* 0Bh */
  5633. "Receive Frame Current Frame Error", /* 0Ch */
  5634. "SATA Link Down", /* 0Dh */
  5635. "Discovery SATA Init W IOS", /* 0Eh */
  5636. "Config Invalid Page", /* 0Fh */
  5637. "Discovery SATA Init Timeout", /* 10h */
  5638. "Reset", /* 11h */
  5639. "Abort", /* 12h */
  5640. "IO Not Yet Executed", /* 13h */
  5641. "IO Executed", /* 14h */
  5642. "Persistent Reservation Out Not Affiliation "
  5643. "Owner", /* 15h */
  5644. "Open Transmit DMA Abort", /* 16h */
  5645. "IO Device Missing Delay Retry", /* 17h */
  5646. "IO Cancelled Due to Recieve Error", /* 18h */
  5647. NULL, /* 19h */
  5648. NULL, /* 1Ah */
  5649. NULL, /* 1Bh */
  5650. NULL, /* 1Ch */
  5651. NULL, /* 1Dh */
  5652. NULL, /* 1Eh */
  5653. NULL, /* 1Fh */
  5654. "Enclosure Management" /* 20h */
  5655. };
  5656. static char *ir_code_str[] = {
  5657. "Raid Action Error", /* 00h */
  5658. NULL, /* 00h */
  5659. NULL, /* 01h */
  5660. NULL, /* 02h */
  5661. NULL, /* 03h */
  5662. NULL, /* 04h */
  5663. NULL, /* 05h */
  5664. NULL, /* 06h */
  5665. NULL /* 07h */
  5666. };
  5667. static char *raid_sub_code_str[] = {
  5668. NULL, /* 00h */
  5669. "Volume Creation Failed: Data Passed too "
  5670. "Large", /* 01h */
  5671. "Volume Creation Failed: Duplicate Volumes "
  5672. "Attempted", /* 02h */
  5673. "Volume Creation Failed: Max Number "
  5674. "Supported Volumes Exceeded", /* 03h */
  5675. "Volume Creation Failed: DMA Error", /* 04h */
  5676. "Volume Creation Failed: Invalid Volume Type", /* 05h */
  5677. "Volume Creation Failed: Error Reading "
  5678. "MFG Page 4", /* 06h */
  5679. "Volume Creation Failed: Creating Internal "
  5680. "Structures", /* 07h */
  5681. NULL, /* 08h */
  5682. NULL, /* 09h */
  5683. NULL, /* 0Ah */
  5684. NULL, /* 0Bh */
  5685. NULL, /* 0Ch */
  5686. NULL, /* 0Dh */
  5687. NULL, /* 0Eh */
  5688. NULL, /* 0Fh */
  5689. "Activation failed: Already Active Volume", /* 10h */
  5690. "Activation failed: Unsupported Volume Type", /* 11h */
  5691. "Activation failed: Too Many Active Volumes", /* 12h */
  5692. "Activation failed: Volume ID in Use", /* 13h */
  5693. "Activation failed: Reported Failure", /* 14h */
  5694. "Activation failed: Importing a Volume", /* 15h */
  5695. NULL, /* 16h */
  5696. NULL, /* 17h */
  5697. NULL, /* 18h */
  5698. NULL, /* 19h */
  5699. NULL, /* 1Ah */
  5700. NULL, /* 1Bh */
  5701. NULL, /* 1Ch */
  5702. NULL, /* 1Dh */
  5703. NULL, /* 1Eh */
  5704. NULL, /* 1Fh */
  5705. "Phys Disk failed: Too Many Phys Disks", /* 20h */
  5706. "Phys Disk failed: Data Passed too Large", /* 21h */
  5707. "Phys Disk failed: DMA Error", /* 22h */
  5708. "Phys Disk failed: Invalid <channel:id>", /* 23h */
  5709. "Phys Disk failed: Creating Phys Disk Config "
  5710. "Page", /* 24h */
  5711. NULL, /* 25h */
  5712. NULL, /* 26h */
  5713. NULL, /* 27h */
  5714. NULL, /* 28h */
  5715. NULL, /* 29h */
  5716. NULL, /* 2Ah */
  5717. NULL, /* 2Bh */
  5718. NULL, /* 2Ch */
  5719. NULL, /* 2Dh */
  5720. NULL, /* 2Eh */
  5721. NULL, /* 2Fh */
  5722. "Compatibility Error: IR Disabled", /* 30h */
  5723. "Compatibility Error: Inquiry Comand Failed", /* 31h */
  5724. "Compatibility Error: Device not Direct Access "
  5725. "Device ", /* 32h */
  5726. "Compatibility Error: Removable Device Found", /* 33h */
  5727. "Compatibility Error: Device SCSI Version not "
  5728. "2 or Higher", /* 34h */
  5729. "Compatibility Error: SATA Device, 48 BIT LBA "
  5730. "not Supported", /* 35h */
  5731. "Compatibility Error: Device doesn't have "
  5732. "512 Byte Block Sizes", /* 36h */
  5733. "Compatibility Error: Volume Type Check Failed", /* 37h */
  5734. "Compatibility Error: Volume Type is "
  5735. "Unsupported by FW", /* 38h */
  5736. "Compatibility Error: Disk Drive too Small for "
  5737. "use in Volume", /* 39h */
  5738. "Compatibility Error: Phys Disk for Create "
  5739. "Volume not Found", /* 3Ah */
  5740. "Compatibility Error: Too Many or too Few "
  5741. "Disks for Volume Type", /* 3Bh */
  5742. "Compatibility Error: Disk stripe Sizes "
  5743. "Must be 64KB", /* 3Ch */
  5744. "Compatibility Error: IME Size Limited to < 2TB", /* 3Dh */
  5745. };
  5746. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5747. /**
  5748. * mpt_sas_log_info - Log information returned from SAS IOC.
  5749. * @ioc: Pointer to MPT_ADAPTER structure
  5750. * @log_info: U32 LogInfo reply word from the IOC
  5751. *
  5752. * Refer to lsi/mpi_log_sas.h.
  5753. **/
  5754. static void
  5755. mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5756. {
  5757. union loginfo_type {
  5758. u32 loginfo;
  5759. struct {
  5760. u32 subcode:16;
  5761. u32 code:8;
  5762. u32 originator:4;
  5763. u32 bus_type:4;
  5764. }dw;
  5765. };
  5766. union loginfo_type sas_loginfo;
  5767. char *originator_desc = NULL;
  5768. char *code_desc = NULL;
  5769. char *sub_code_desc = NULL;
  5770. sas_loginfo.loginfo = log_info;
  5771. if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
  5772. (sas_loginfo.dw.originator < sizeof(originator_str)/sizeof(char*)))
  5773. return;
  5774. originator_desc = originator_str[sas_loginfo.dw.originator];
  5775. switch (sas_loginfo.dw.originator) {
  5776. case 0: /* IOP */
  5777. if (sas_loginfo.dw.code <
  5778. sizeof(iop_code_str)/sizeof(char*))
  5779. code_desc = iop_code_str[sas_loginfo.dw.code];
  5780. break;
  5781. case 1: /* PL */
  5782. if (sas_loginfo.dw.code <
  5783. sizeof(pl_code_str)/sizeof(char*))
  5784. code_desc = pl_code_str[sas_loginfo.dw.code];
  5785. break;
  5786. case 2: /* IR */
  5787. if (sas_loginfo.dw.code >=
  5788. sizeof(ir_code_str)/sizeof(char*))
  5789. break;
  5790. code_desc = ir_code_str[sas_loginfo.dw.code];
  5791. if (sas_loginfo.dw.subcode >=
  5792. sizeof(raid_sub_code_str)/sizeof(char*))
  5793. break;
  5794. if (sas_loginfo.dw.code == 0)
  5795. sub_code_desc =
  5796. raid_sub_code_str[sas_loginfo.dw.subcode];
  5797. break;
  5798. default:
  5799. return;
  5800. }
  5801. if (sub_code_desc != NULL)
  5802. printk(MYIOC_s_INFO_FMT
  5803. "LogInfo(0x%08x): Originator={%s}, Code={%s},"
  5804. " SubCode={%s}\n",
  5805. ioc->name, log_info, originator_desc, code_desc,
  5806. sub_code_desc);
  5807. else if (code_desc != NULL)
  5808. printk(MYIOC_s_INFO_FMT
  5809. "LogInfo(0x%08x): Originator={%s}, Code={%s},"
  5810. " SubCode(0x%04x)\n",
  5811. ioc->name, log_info, originator_desc, code_desc,
  5812. sas_loginfo.dw.subcode);
  5813. else
  5814. printk(MYIOC_s_INFO_FMT
  5815. "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
  5816. " SubCode(0x%04x)\n",
  5817. ioc->name, log_info, originator_desc,
  5818. sas_loginfo.dw.code, sas_loginfo.dw.subcode);
  5819. }
  5820. #ifdef MPT_DEBUG_REPLY
  5821. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5822. /**
  5823. * mpt_iocstatus_info_config - IOCSTATUS information for config pages
  5824. * @ioc: Pointer to MPT_ADAPTER structure
  5825. * @ioc_status: U32 IOCStatus word from IOC
  5826. * @mf: Pointer to MPT request frame
  5827. *
  5828. * Refer to lsi/mpi.h.
  5829. **/
  5830. static void
  5831. mpt_iocstatus_info_config(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
  5832. {
  5833. Config_t *pReq = (Config_t *)mf;
  5834. char extend_desc[EVENT_DESCR_STR_SZ];
  5835. char *desc = NULL;
  5836. u32 form;
  5837. u8 page_type;
  5838. if (pReq->Header.PageType == MPI_CONFIG_PAGETYPE_EXTENDED)
  5839. page_type = pReq->ExtPageType;
  5840. else
  5841. page_type = pReq->Header.PageType;
  5842. /*
  5843. * ignore invalid page messages for GET_NEXT_HANDLE
  5844. */
  5845. form = le32_to_cpu(pReq->PageAddress);
  5846. if (ioc_status == MPI_IOCSTATUS_CONFIG_INVALID_PAGE) {
  5847. if (page_type == MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE ||
  5848. page_type == MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER ||
  5849. page_type == MPI_CONFIG_EXTPAGETYPE_ENCLOSURE) {
  5850. if ((form >> MPI_SAS_DEVICE_PGAD_FORM_SHIFT) ==
  5851. MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE)
  5852. return;
  5853. }
  5854. if (page_type == MPI_CONFIG_PAGETYPE_FC_DEVICE)
  5855. if ((form & MPI_FC_DEVICE_PGAD_FORM_MASK) ==
  5856. MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
  5857. return;
  5858. }
  5859. snprintf(extend_desc, EVENT_DESCR_STR_SZ,
  5860. "type=%02Xh, page=%02Xh, action=%02Xh, form=%08Xh",
  5861. page_type, pReq->Header.PageNumber, pReq->Action, form);
  5862. switch (ioc_status) {
  5863. case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
  5864. desc = "Config Page Invalid Action";
  5865. break;
  5866. case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
  5867. desc = "Config Page Invalid Type";
  5868. break;
  5869. case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
  5870. desc = "Config Page Invalid Page";
  5871. break;
  5872. case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
  5873. desc = "Config Page Invalid Data";
  5874. break;
  5875. case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
  5876. desc = "Config Page No Defaults";
  5877. break;
  5878. case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
  5879. desc = "Config Page Can't Commit";
  5880. break;
  5881. }
  5882. if (!desc)
  5883. return;
  5884. printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04X): %s: %s\n",
  5885. ioc->name, ioc_status, desc, extend_desc);
  5886. }
  5887. /**
  5888. * mpt_iocstatus_info - IOCSTATUS information returned from IOC.
  5889. * @ioc: Pointer to MPT_ADAPTER structure
  5890. * @ioc_status: U32 IOCStatus word from IOC
  5891. * @mf: Pointer to MPT request frame
  5892. *
  5893. * Refer to lsi/mpi.h.
  5894. **/
  5895. static void
  5896. mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
  5897. {
  5898. u32 status = ioc_status & MPI_IOCSTATUS_MASK;
  5899. char *desc = NULL;
  5900. switch (status) {
  5901. /****************************************************************************/
  5902. /* Common IOCStatus values for all replies */
  5903. /****************************************************************************/
  5904. case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
  5905. desc = "Invalid Function";
  5906. break;
  5907. case MPI_IOCSTATUS_BUSY: /* 0x0002 */
  5908. desc = "Busy";
  5909. break;
  5910. case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
  5911. desc = "Invalid SGL";
  5912. break;
  5913. case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
  5914. desc = "Internal Error";
  5915. break;
  5916. case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
  5917. desc = "Reserved";
  5918. break;
  5919. case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
  5920. desc = "Insufficient Resources";
  5921. break;
  5922. case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
  5923. desc = "Invalid Field";
  5924. break;
  5925. case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
  5926. desc = "Invalid State";
  5927. break;
  5928. /****************************************************************************/
  5929. /* Config IOCStatus values */
  5930. /****************************************************************************/
  5931. case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
  5932. case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
  5933. case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
  5934. case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
  5935. case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
  5936. case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
  5937. mpt_iocstatus_info_config(ioc, status, mf);
  5938. break;
  5939. /****************************************************************************/
  5940. /* SCSIIO Reply (SPI, FCP, SAS) initiator values */
  5941. /* */
  5942. /* Look at mptscsih_iocstatus_info_scsiio in mptscsih.c */
  5943. /* */
  5944. /****************************************************************************/
  5945. case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
  5946. case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
  5947. case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
  5948. case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
  5949. case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
  5950. case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
  5951. case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
  5952. case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
  5953. case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
  5954. case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
  5955. case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
  5956. case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
  5957. case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
  5958. break;
  5959. /****************************************************************************/
  5960. /* SCSI Target values */
  5961. /****************************************************************************/
  5962. case MPI_IOCSTATUS_TARGET_PRIORITY_IO: /* 0x0060 */
  5963. desc = "Target: Priority IO";
  5964. break;
  5965. case MPI_IOCSTATUS_TARGET_INVALID_PORT: /* 0x0061 */
  5966. desc = "Target: Invalid Port";
  5967. break;
  5968. case MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX: /* 0x0062 */
  5969. desc = "Target Invalid IO Index:";
  5970. break;
  5971. case MPI_IOCSTATUS_TARGET_ABORTED: /* 0x0063 */
  5972. desc = "Target: Aborted";
  5973. break;
  5974. case MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: /* 0x0064 */
  5975. desc = "Target: No Conn Retryable";
  5976. break;
  5977. case MPI_IOCSTATUS_TARGET_NO_CONNECTION: /* 0x0065 */
  5978. desc = "Target: No Connection";
  5979. break;
  5980. case MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: /* 0x006A */
  5981. desc = "Target: Transfer Count Mismatch";
  5982. break;
  5983. case MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT: /* 0x006B */
  5984. desc = "Target: STS Data not Sent";
  5985. break;
  5986. case MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: /* 0x006D */
  5987. desc = "Target: Data Offset Error";
  5988. break;
  5989. case MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: /* 0x006E */
  5990. desc = "Target: Too Much Write Data";
  5991. break;
  5992. case MPI_IOCSTATUS_TARGET_IU_TOO_SHORT: /* 0x006F */
  5993. desc = "Target: IU Too Short";
  5994. break;
  5995. case MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: /* 0x0070 */
  5996. desc = "Target: ACK NAK Timeout";
  5997. break;
  5998. case MPI_IOCSTATUS_TARGET_NAK_RECEIVED: /* 0x0071 */
  5999. desc = "Target: Nak Received";
  6000. break;
  6001. /****************************************************************************/
  6002. /* Fibre Channel Direct Access values */
  6003. /****************************************************************************/
  6004. case MPI_IOCSTATUS_FC_ABORTED: /* 0x0066 */
  6005. desc = "FC: Aborted";
  6006. break;
  6007. case MPI_IOCSTATUS_FC_RX_ID_INVALID: /* 0x0067 */
  6008. desc = "FC: RX ID Invalid";
  6009. break;
  6010. case MPI_IOCSTATUS_FC_DID_INVALID: /* 0x0068 */
  6011. desc = "FC: DID Invalid";
  6012. break;
  6013. case MPI_IOCSTATUS_FC_NODE_LOGGED_OUT: /* 0x0069 */
  6014. desc = "FC: Node Logged Out";
  6015. break;
  6016. case MPI_IOCSTATUS_FC_EXCHANGE_CANCELED: /* 0x006C */
  6017. desc = "FC: Exchange Canceled";
  6018. break;
  6019. /****************************************************************************/
  6020. /* LAN values */
  6021. /****************************************************************************/
  6022. case MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND: /* 0x0080 */
  6023. desc = "LAN: Device not Found";
  6024. break;
  6025. case MPI_IOCSTATUS_LAN_DEVICE_FAILURE: /* 0x0081 */
  6026. desc = "LAN: Device Failure";
  6027. break;
  6028. case MPI_IOCSTATUS_LAN_TRANSMIT_ERROR: /* 0x0082 */
  6029. desc = "LAN: Transmit Error";
  6030. break;
  6031. case MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED: /* 0x0083 */
  6032. desc = "LAN: Transmit Aborted";
  6033. break;
  6034. case MPI_IOCSTATUS_LAN_RECEIVE_ERROR: /* 0x0084 */
  6035. desc = "LAN: Receive Error";
  6036. break;
  6037. case MPI_IOCSTATUS_LAN_RECEIVE_ABORTED: /* 0x0085 */
  6038. desc = "LAN: Receive Aborted";
  6039. break;
  6040. case MPI_IOCSTATUS_LAN_PARTIAL_PACKET: /* 0x0086 */
  6041. desc = "LAN: Partial Packet";
  6042. break;
  6043. case MPI_IOCSTATUS_LAN_CANCELED: /* 0x0087 */
  6044. desc = "LAN: Canceled";
  6045. break;
  6046. /****************************************************************************/
  6047. /* Serial Attached SCSI values */
  6048. /****************************************************************************/
  6049. case MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED: /* 0x0090 */
  6050. desc = "SAS: SMP Request Failed";
  6051. break;
  6052. case MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN: /* 0x0090 */
  6053. desc = "SAS: SMP Data Overrun";
  6054. break;
  6055. default:
  6056. desc = "Others";
  6057. break;
  6058. }
  6059. if (!desc)
  6060. return;
  6061. printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04X): %s\n", ioc->name, status, desc);
  6062. }
  6063. #endif
  6064. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  6065. EXPORT_SYMBOL(mpt_attach);
  6066. EXPORT_SYMBOL(mpt_detach);
  6067. #ifdef CONFIG_PM
  6068. EXPORT_SYMBOL(mpt_resume);
  6069. EXPORT_SYMBOL(mpt_suspend);
  6070. #endif
  6071. EXPORT_SYMBOL(ioc_list);
  6072. EXPORT_SYMBOL(mpt_proc_root_dir);
  6073. EXPORT_SYMBOL(mpt_register);
  6074. EXPORT_SYMBOL(mpt_deregister);
  6075. EXPORT_SYMBOL(mpt_event_register);
  6076. EXPORT_SYMBOL(mpt_event_deregister);
  6077. EXPORT_SYMBOL(mpt_reset_register);
  6078. EXPORT_SYMBOL(mpt_reset_deregister);
  6079. EXPORT_SYMBOL(mpt_device_driver_register);
  6080. EXPORT_SYMBOL(mpt_device_driver_deregister);
  6081. EXPORT_SYMBOL(mpt_get_msg_frame);
  6082. EXPORT_SYMBOL(mpt_put_msg_frame);
  6083. EXPORT_SYMBOL(mpt_free_msg_frame);
  6084. EXPORT_SYMBOL(mpt_add_sge);
  6085. EXPORT_SYMBOL(mpt_send_handshake_request);
  6086. EXPORT_SYMBOL(mpt_verify_adapter);
  6087. EXPORT_SYMBOL(mpt_GetIocState);
  6088. EXPORT_SYMBOL(mpt_print_ioc_summary);
  6089. EXPORT_SYMBOL(mpt_lan_index);
  6090. EXPORT_SYMBOL(mpt_stm_index);
  6091. EXPORT_SYMBOL(mpt_HardResetHandler);
  6092. EXPORT_SYMBOL(mpt_config);
  6093. EXPORT_SYMBOL(mpt_findImVolumes);
  6094. EXPORT_SYMBOL(mpt_alloc_fw_memory);
  6095. EXPORT_SYMBOL(mpt_free_fw_memory);
  6096. EXPORT_SYMBOL(mptbase_sas_persist_operation);
  6097. EXPORT_SYMBOL(mpt_raid_phys_disk_pg0);
  6098. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  6099. /**
  6100. * fusion_init - Fusion MPT base driver initialization routine.
  6101. *
  6102. * Returns 0 for success, non-zero for failure.
  6103. */
  6104. static int __init
  6105. fusion_init(void)
  6106. {
  6107. int i;
  6108. show_mptmod_ver(my_NAME, my_VERSION);
  6109. printk(KERN_INFO COPYRIGHT "\n");
  6110. for (i = 0; i < MPT_MAX_PROTOCOL_DRIVERS; i++) {
  6111. MptCallbacks[i] = NULL;
  6112. MptDriverClass[i] = MPTUNKNOWN_DRIVER;
  6113. MptEvHandlers[i] = NULL;
  6114. MptResetHandlers[i] = NULL;
  6115. }
  6116. /* Register ourselves (mptbase) in order to facilitate
  6117. * EventNotification handling.
  6118. */
  6119. mpt_base_index = mpt_register(mpt_base_reply, MPTBASE_DRIVER);
  6120. /* Register for hard reset handling callbacks.
  6121. */
  6122. if (mpt_reset_register(mpt_base_index, mpt_ioc_reset) == 0) {
  6123. dprintk((KERN_INFO MYNAM ": Register for IOC reset notification\n"));
  6124. } else {
  6125. /* FIXME! */
  6126. }
  6127. #ifdef CONFIG_PROC_FS
  6128. (void) procmpt_create();
  6129. #endif
  6130. return 0;
  6131. }
  6132. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  6133. /**
  6134. * fusion_exit - Perform driver unload cleanup.
  6135. *
  6136. * This routine frees all resources associated with each MPT adapter
  6137. * and removes all %MPT_PROCFS_MPTBASEDIR entries.
  6138. */
  6139. static void __exit
  6140. fusion_exit(void)
  6141. {
  6142. dexitprintk((KERN_INFO MYNAM ": fusion_exit() called!\n"));
  6143. mpt_reset_deregister(mpt_base_index);
  6144. #ifdef CONFIG_PROC_FS
  6145. procmpt_destroy();
  6146. #endif
  6147. }
  6148. module_init(fusion_init);
  6149. module_exit(fusion_exit);