mpc52xx_uart.c 33 KB

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  1. /*
  2. * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  3. *
  4. * FIXME According to the usermanual the status bits in the status register
  5. * are only updated when the peripherals access the FIFO and not when the
  6. * CPU access them. So since we use this bits to know when we stop writing
  7. * and reading, they may not be updated in-time and a race condition may
  8. * exists. But I haven't be able to prove this and I don't care. But if
  9. * any problem arises, it might worth checking. The TX/RX FIFO Stats
  10. * registers should be used in addition.
  11. * Update: Actually, they seem updated ... At least the bits we use.
  12. *
  13. *
  14. * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  15. *
  16. * Some of the code has been inspired/copied from the 2.4 code written
  17. * by Dale Farnsworth <dfarnsworth@mvista.com>.
  18. *
  19. * Copyright (C) 2006 Secret Lab Technologies Ltd.
  20. * Grant Likely <grant.likely@secretlab.ca>
  21. * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
  22. * Copyright (C) 2003 MontaVista, Software, Inc.
  23. *
  24. * This file is licensed under the terms of the GNU General Public License
  25. * version 2. This program is licensed "as is" without any warranty of any
  26. * kind, whether express or implied.
  27. */
  28. /* Platform device Usage :
  29. *
  30. * Since PSCs can have multiple function, the correct driver for each one
  31. * is selected by calling mpc52xx_match_psc_function(...). The function
  32. * handled by this driver is "uart".
  33. *
  34. * The driver init all necessary registers to place the PSC in uart mode without
  35. * DCD. However, the pin multiplexing aren't changed and should be set either
  36. * by the bootloader or in the platform init code.
  37. *
  38. * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
  39. * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  40. * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  41. * fpr the console code : without this 1:1 mapping, at early boot time, when we
  42. * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
  43. * will be mapped to.
  44. */
  45. /* OF Platform device Usage :
  46. *
  47. * This driver is only used for PSCs configured in uart mode. The device
  48. * tree will have a node for each PSC in uart mode w/ device_type = "serial"
  49. * and "mpc52xx-psc-uart" in the compatible string
  50. *
  51. * By default, PSC devices are enumerated in the order they are found. However
  52. * a particular PSC number can be forces by adding 'device_no = <port#>'
  53. * to the device node.
  54. *
  55. * The driver init all necessary registers to place the PSC in uart mode without
  56. * DCD. However, the pin multiplexing aren't changed and should be set either
  57. * by the bootloader or in the platform init code.
  58. */
  59. #undef DEBUG
  60. #include <linux/device.h>
  61. #include <linux/module.h>
  62. #include <linux/tty.h>
  63. #include <linux/serial.h>
  64. #include <linux/sysrq.h>
  65. #include <linux/console.h>
  66. #include <linux/delay.h>
  67. #include <linux/io.h>
  68. #if defined(CONFIG_PPC_MERGE)
  69. #include <linux/of.h>
  70. #include <linux/of_platform.h>
  71. #else
  72. #include <linux/platform_device.h>
  73. #endif
  74. #include <asm/mpc52xx.h>
  75. #include <asm/mpc52xx_psc.h>
  76. #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  77. #define SUPPORT_SYSRQ
  78. #endif
  79. #include <linux/serial_core.h>
  80. /* We've been assigned a range on the "Low-density serial ports" major */
  81. #define SERIAL_PSC_MAJOR 204
  82. #define SERIAL_PSC_MINOR 148
  83. #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
  84. static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  85. /* Rem: - We use the read_status_mask as a shadow of
  86. * psc->mpc52xx_psc_imr
  87. * - It's important that is array is all zero on start as we
  88. * use it to know if it's initialized or not ! If it's not sure
  89. * it's cleared, then a memset(...,0,...) should be added to
  90. * the console_init
  91. */
  92. #if defined(CONFIG_PPC_MERGE)
  93. /* lookup table for matching device nodes to index numbers */
  94. static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
  95. static void mpc52xx_uart_of_enumerate(void);
  96. #endif
  97. #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  98. /* Forward declaration of the interruption handling routine */
  99. static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
  100. /* Simple macro to test if a port is console or not. This one is taken
  101. * for serial_core.c and maybe should be moved to serial_core.h ? */
  102. #ifdef CONFIG_SERIAL_CORE_CONSOLE
  103. #define uart_console(port) \
  104. ((port)->cons && (port)->cons->index == (port)->line)
  105. #else
  106. #define uart_console(port) (0)
  107. #endif
  108. #if defined(CONFIG_PPC_MERGE)
  109. static struct of_device_id mpc52xx_uart_of_match[] = {
  110. { .type = "serial", .compatible = "fsl,mpc5200-psc-uart", },
  111. { .type = "serial", .compatible = "mpc5200-psc-uart", }, /* lite5200 */
  112. { .type = "serial", .compatible = "mpc5200-serial", }, /* efika */
  113. {},
  114. };
  115. #endif
  116. /* ======================================================================== */
  117. /* PSC fifo operations for isolating differences between 52xx and 512x */
  118. /* ======================================================================== */
  119. struct psc_ops {
  120. void (*fifo_init)(struct uart_port *port);
  121. int (*raw_rx_rdy)(struct uart_port *port);
  122. int (*raw_tx_rdy)(struct uart_port *port);
  123. int (*rx_rdy)(struct uart_port *port);
  124. int (*tx_rdy)(struct uart_port *port);
  125. int (*tx_empty)(struct uart_port *port);
  126. void (*stop_rx)(struct uart_port *port);
  127. void (*start_tx)(struct uart_port *port);
  128. void (*stop_tx)(struct uart_port *port);
  129. void (*rx_clr_irq)(struct uart_port *port);
  130. void (*tx_clr_irq)(struct uart_port *port);
  131. void (*write_char)(struct uart_port *port, unsigned char c);
  132. unsigned char (*read_char)(struct uart_port *port);
  133. void (*cw_disable_ints)(struct uart_port *port);
  134. void (*cw_restore_ints)(struct uart_port *port);
  135. unsigned long (*getuartclk)(void *p);
  136. };
  137. #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
  138. static void mpc52xx_psc_fifo_init(struct uart_port *port)
  139. {
  140. struct mpc52xx_psc __iomem *psc = PSC(port);
  141. struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
  142. /* /32 prescaler */
  143. out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
  144. out_8(&fifo->rfcntl, 0x00);
  145. out_be16(&fifo->rfalarm, 0x1ff);
  146. out_8(&fifo->tfcntl, 0x07);
  147. out_be16(&fifo->tfalarm, 0x80);
  148. port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
  149. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  150. }
  151. static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
  152. {
  153. return in_be16(&PSC(port)->mpc52xx_psc_status)
  154. & MPC52xx_PSC_SR_RXRDY;
  155. }
  156. static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
  157. {
  158. return in_be16(&PSC(port)->mpc52xx_psc_status)
  159. & MPC52xx_PSC_SR_TXRDY;
  160. }
  161. static int mpc52xx_psc_rx_rdy(struct uart_port *port)
  162. {
  163. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  164. & port->read_status_mask
  165. & MPC52xx_PSC_IMR_RXRDY;
  166. }
  167. static int mpc52xx_psc_tx_rdy(struct uart_port *port)
  168. {
  169. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  170. & port->read_status_mask
  171. & MPC52xx_PSC_IMR_TXRDY;
  172. }
  173. static int mpc52xx_psc_tx_empty(struct uart_port *port)
  174. {
  175. return in_be16(&PSC(port)->mpc52xx_psc_status)
  176. & MPC52xx_PSC_SR_TXEMP;
  177. }
  178. static void mpc52xx_psc_start_tx(struct uart_port *port)
  179. {
  180. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  181. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  182. }
  183. static void mpc52xx_psc_stop_tx(struct uart_port *port)
  184. {
  185. port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
  186. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  187. }
  188. static void mpc52xx_psc_stop_rx(struct uart_port *port)
  189. {
  190. port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
  191. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  192. }
  193. static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
  194. {
  195. }
  196. static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
  197. {
  198. }
  199. static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
  200. {
  201. out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
  202. }
  203. static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
  204. {
  205. return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
  206. }
  207. static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
  208. {
  209. out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
  210. }
  211. static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
  212. {
  213. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  214. }
  215. /* Search for bus-frequency property in this node or a parent */
  216. static unsigned long mpc52xx_getuartclk(void *p)
  217. {
  218. #if defined(CONFIG_PPC_MERGE)
  219. /*
  220. * 5200 UARTs have a / 32 prescaler
  221. * but the generic serial code assumes 16
  222. * so return ipb freq / 2
  223. */
  224. return mpc52xx_find_ipb_freq(p) / 2;
  225. #else
  226. pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
  227. return NULL;
  228. #endif
  229. }
  230. static struct psc_ops mpc52xx_psc_ops = {
  231. .fifo_init = mpc52xx_psc_fifo_init,
  232. .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
  233. .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
  234. .rx_rdy = mpc52xx_psc_rx_rdy,
  235. .tx_rdy = mpc52xx_psc_tx_rdy,
  236. .tx_empty = mpc52xx_psc_tx_empty,
  237. .stop_rx = mpc52xx_psc_stop_rx,
  238. .start_tx = mpc52xx_psc_start_tx,
  239. .stop_tx = mpc52xx_psc_stop_tx,
  240. .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
  241. .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
  242. .write_char = mpc52xx_psc_write_char,
  243. .read_char = mpc52xx_psc_read_char,
  244. .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
  245. .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
  246. .getuartclk = mpc52xx_getuartclk,
  247. };
  248. static struct psc_ops *psc_ops = &mpc52xx_psc_ops;
  249. /* ======================================================================== */
  250. /* UART operations */
  251. /* ======================================================================== */
  252. static unsigned int
  253. mpc52xx_uart_tx_empty(struct uart_port *port)
  254. {
  255. return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
  256. }
  257. static void
  258. mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  259. {
  260. /* Not implemented */
  261. }
  262. static unsigned int
  263. mpc52xx_uart_get_mctrl(struct uart_port *port)
  264. {
  265. /* Not implemented */
  266. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  267. }
  268. static void
  269. mpc52xx_uart_stop_tx(struct uart_port *port)
  270. {
  271. /* port->lock taken by caller */
  272. psc_ops->stop_tx(port);
  273. }
  274. static void
  275. mpc52xx_uart_start_tx(struct uart_port *port)
  276. {
  277. /* port->lock taken by caller */
  278. psc_ops->start_tx(port);
  279. }
  280. static void
  281. mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
  282. {
  283. unsigned long flags;
  284. spin_lock_irqsave(&port->lock, flags);
  285. port->x_char = ch;
  286. if (ch) {
  287. /* Make sure tx interrupts are on */
  288. /* Truly necessary ??? They should be anyway */
  289. psc_ops->start_tx(port);
  290. }
  291. spin_unlock_irqrestore(&port->lock, flags);
  292. }
  293. static void
  294. mpc52xx_uart_stop_rx(struct uart_port *port)
  295. {
  296. /* port->lock taken by caller */
  297. psc_ops->stop_rx(port);
  298. }
  299. static void
  300. mpc52xx_uart_enable_ms(struct uart_port *port)
  301. {
  302. /* Not implemented */
  303. }
  304. static void
  305. mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
  306. {
  307. unsigned long flags;
  308. spin_lock_irqsave(&port->lock, flags);
  309. if (ctl == -1)
  310. out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
  311. else
  312. out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
  313. spin_unlock_irqrestore(&port->lock, flags);
  314. }
  315. static int
  316. mpc52xx_uart_startup(struct uart_port *port)
  317. {
  318. struct mpc52xx_psc __iomem *psc = PSC(port);
  319. int ret;
  320. /* Request IRQ */
  321. ret = request_irq(port->irq, mpc52xx_uart_int,
  322. IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
  323. if (ret)
  324. return ret;
  325. /* Reset/activate the port, clear and enable interrupts */
  326. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  327. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  328. out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
  329. psc_ops->fifo_init(port);
  330. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  331. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  332. return 0;
  333. }
  334. static void
  335. mpc52xx_uart_shutdown(struct uart_port *port)
  336. {
  337. struct mpc52xx_psc __iomem *psc = PSC(port);
  338. /* Shut down the port. Leave TX active if on a console port */
  339. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  340. if (!uart_console(port))
  341. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  342. port->read_status_mask = 0;
  343. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  344. /* Release interrupt */
  345. free_irq(port->irq, port);
  346. }
  347. static void
  348. mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
  349. struct ktermios *old)
  350. {
  351. struct mpc52xx_psc __iomem *psc = PSC(port);
  352. unsigned long flags;
  353. unsigned char mr1, mr2;
  354. unsigned short ctr;
  355. unsigned int j, baud, quot;
  356. /* Prepare what we're gonna write */
  357. mr1 = 0;
  358. switch (new->c_cflag & CSIZE) {
  359. case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
  360. break;
  361. case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
  362. break;
  363. case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
  364. break;
  365. case CS8:
  366. default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
  367. }
  368. if (new->c_cflag & PARENB) {
  369. mr1 |= (new->c_cflag & PARODD) ?
  370. MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
  371. } else
  372. mr1 |= MPC52xx_PSC_MODE_PARNONE;
  373. mr2 = 0;
  374. if (new->c_cflag & CSTOPB)
  375. mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
  376. else
  377. mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
  378. MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
  379. MPC52xx_PSC_MODE_ONE_STOP;
  380. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  381. quot = uart_get_divisor(port, baud);
  382. ctr = quot & 0xffff;
  383. /* Get the lock */
  384. spin_lock_irqsave(&port->lock, flags);
  385. /* Update the per-port timeout */
  386. uart_update_timeout(port, new->c_cflag, baud);
  387. /* Do our best to flush TX & RX, so we don't loose anything */
  388. /* But we don't wait indefinitly ! */
  389. j = 5000000; /* Maximum wait */
  390. /* FIXME Can't receive chars since set_termios might be called at early
  391. * boot for the console, all stuff is not yet ready to receive at that
  392. * time and that just makes the kernel oops */
  393. /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
  394. while (!mpc52xx_uart_tx_empty(port) && --j)
  395. udelay(1);
  396. if (!j)
  397. printk(KERN_ERR "mpc52xx_uart.c: "
  398. "Unable to flush RX & TX fifos in-time in set_termios."
  399. "Some chars may have been lost.\n");
  400. /* Reset the TX & RX */
  401. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  402. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  403. /* Send new mode settings */
  404. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  405. out_8(&psc->mode, mr1);
  406. out_8(&psc->mode, mr2);
  407. out_8(&psc->ctur, ctr >> 8);
  408. out_8(&psc->ctlr, ctr & 0xff);
  409. /* Reenable TX & RX */
  410. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  411. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  412. /* We're all set, release the lock */
  413. spin_unlock_irqrestore(&port->lock, flags);
  414. }
  415. static const char *
  416. mpc52xx_uart_type(struct uart_port *port)
  417. {
  418. return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
  419. }
  420. static void
  421. mpc52xx_uart_release_port(struct uart_port *port)
  422. {
  423. /* remapped by us ? */
  424. if (port->flags & UPF_IOREMAP) {
  425. iounmap(port->membase);
  426. port->membase = NULL;
  427. }
  428. release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
  429. }
  430. static int
  431. mpc52xx_uart_request_port(struct uart_port *port)
  432. {
  433. int err;
  434. if (port->flags & UPF_IOREMAP) /* Need to remap ? */
  435. port->membase = ioremap(port->mapbase,
  436. sizeof(struct mpc52xx_psc));
  437. if (!port->membase)
  438. return -EINVAL;
  439. err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
  440. "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
  441. if (err && (port->flags & UPF_IOREMAP)) {
  442. iounmap(port->membase);
  443. port->membase = NULL;
  444. }
  445. return err;
  446. }
  447. static void
  448. mpc52xx_uart_config_port(struct uart_port *port, int flags)
  449. {
  450. if ((flags & UART_CONFIG_TYPE)
  451. && (mpc52xx_uart_request_port(port) == 0))
  452. port->type = PORT_MPC52xx;
  453. }
  454. static int
  455. mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  456. {
  457. if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
  458. return -EINVAL;
  459. if ((ser->irq != port->irq) ||
  460. (ser->io_type != SERIAL_IO_MEM) ||
  461. (ser->baud_base != port->uartclk) ||
  462. (ser->iomem_base != (void *)port->mapbase) ||
  463. (ser->hub6 != 0))
  464. return -EINVAL;
  465. return 0;
  466. }
  467. static struct uart_ops mpc52xx_uart_ops = {
  468. .tx_empty = mpc52xx_uart_tx_empty,
  469. .set_mctrl = mpc52xx_uart_set_mctrl,
  470. .get_mctrl = mpc52xx_uart_get_mctrl,
  471. .stop_tx = mpc52xx_uart_stop_tx,
  472. .start_tx = mpc52xx_uart_start_tx,
  473. .send_xchar = mpc52xx_uart_send_xchar,
  474. .stop_rx = mpc52xx_uart_stop_rx,
  475. .enable_ms = mpc52xx_uart_enable_ms,
  476. .break_ctl = mpc52xx_uart_break_ctl,
  477. .startup = mpc52xx_uart_startup,
  478. .shutdown = mpc52xx_uart_shutdown,
  479. .set_termios = mpc52xx_uart_set_termios,
  480. /* .pm = mpc52xx_uart_pm, Not supported yet */
  481. /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
  482. .type = mpc52xx_uart_type,
  483. .release_port = mpc52xx_uart_release_port,
  484. .request_port = mpc52xx_uart_request_port,
  485. .config_port = mpc52xx_uart_config_port,
  486. .verify_port = mpc52xx_uart_verify_port
  487. };
  488. /* ======================================================================== */
  489. /* Interrupt handling */
  490. /* ======================================================================== */
  491. static inline int
  492. mpc52xx_uart_int_rx_chars(struct uart_port *port)
  493. {
  494. struct tty_struct *tty = port->info->tty;
  495. unsigned char ch, flag;
  496. unsigned short status;
  497. /* While we can read, do so ! */
  498. while (psc_ops->raw_rx_rdy(port)) {
  499. /* Get the char */
  500. ch = psc_ops->read_char(port);
  501. /* Handle sysreq char */
  502. #ifdef SUPPORT_SYSRQ
  503. if (uart_handle_sysrq_char(port, ch)) {
  504. port->sysrq = 0;
  505. continue;
  506. }
  507. #endif
  508. /* Store it */
  509. flag = TTY_NORMAL;
  510. port->icount.rx++;
  511. status = in_be16(&PSC(port)->mpc52xx_psc_status);
  512. if (status & (MPC52xx_PSC_SR_PE |
  513. MPC52xx_PSC_SR_FE |
  514. MPC52xx_PSC_SR_RB)) {
  515. if (status & MPC52xx_PSC_SR_RB) {
  516. flag = TTY_BREAK;
  517. uart_handle_break(port);
  518. } else if (status & MPC52xx_PSC_SR_PE)
  519. flag = TTY_PARITY;
  520. else if (status & MPC52xx_PSC_SR_FE)
  521. flag = TTY_FRAME;
  522. /* Clear error condition */
  523. out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
  524. }
  525. tty_insert_flip_char(tty, ch, flag);
  526. if (status & MPC52xx_PSC_SR_OE) {
  527. /*
  528. * Overrun is special, since it's
  529. * reported immediately, and doesn't
  530. * affect the current character
  531. */
  532. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  533. }
  534. }
  535. tty_flip_buffer_push(tty);
  536. return psc_ops->raw_rx_rdy(port);
  537. }
  538. static inline int
  539. mpc52xx_uart_int_tx_chars(struct uart_port *port)
  540. {
  541. struct circ_buf *xmit = &port->info->xmit;
  542. /* Process out of band chars */
  543. if (port->x_char) {
  544. psc_ops->write_char(port, port->x_char);
  545. port->icount.tx++;
  546. port->x_char = 0;
  547. return 1;
  548. }
  549. /* Nothing to do ? */
  550. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  551. mpc52xx_uart_stop_tx(port);
  552. return 0;
  553. }
  554. /* Send chars */
  555. while (psc_ops->raw_tx_rdy(port)) {
  556. psc_ops->write_char(port, xmit->buf[xmit->tail]);
  557. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  558. port->icount.tx++;
  559. if (uart_circ_empty(xmit))
  560. break;
  561. }
  562. /* Wake up */
  563. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  564. uart_write_wakeup(port);
  565. /* Maybe we're done after all */
  566. if (uart_circ_empty(xmit)) {
  567. mpc52xx_uart_stop_tx(port);
  568. return 0;
  569. }
  570. return 1;
  571. }
  572. static irqreturn_t
  573. mpc52xx_uart_int(int irq, void *dev_id)
  574. {
  575. struct uart_port *port = dev_id;
  576. unsigned long pass = ISR_PASS_LIMIT;
  577. unsigned int keepgoing;
  578. spin_lock(&port->lock);
  579. /* While we have stuff to do, we continue */
  580. do {
  581. /* If we don't find anything to do, we stop */
  582. keepgoing = 0;
  583. psc_ops->rx_clr_irq(port);
  584. if (psc_ops->rx_rdy(port))
  585. keepgoing |= mpc52xx_uart_int_rx_chars(port);
  586. psc_ops->tx_clr_irq(port);
  587. if (psc_ops->tx_rdy(port))
  588. keepgoing |= mpc52xx_uart_int_tx_chars(port);
  589. /* Limit number of iteration */
  590. if (!(--pass))
  591. keepgoing = 0;
  592. } while (keepgoing);
  593. spin_unlock(&port->lock);
  594. return IRQ_HANDLED;
  595. }
  596. /* ======================================================================== */
  597. /* Console ( if applicable ) */
  598. /* ======================================================================== */
  599. #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
  600. static void __init
  601. mpc52xx_console_get_options(struct uart_port *port,
  602. int *baud, int *parity, int *bits, int *flow)
  603. {
  604. struct mpc52xx_psc __iomem *psc = PSC(port);
  605. unsigned char mr1;
  606. pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
  607. /* Read the mode registers */
  608. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  609. mr1 = in_8(&psc->mode);
  610. /* CT{U,L}R are write-only ! */
  611. *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  612. #if !defined(CONFIG_PPC_MERGE)
  613. if (__res.bi_baudrate)
  614. *baud = __res.bi_baudrate;
  615. #endif
  616. /* Parse them */
  617. switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
  618. case MPC52xx_PSC_MODE_5_BITS:
  619. *bits = 5;
  620. break;
  621. case MPC52xx_PSC_MODE_6_BITS:
  622. *bits = 6;
  623. break;
  624. case MPC52xx_PSC_MODE_7_BITS:
  625. *bits = 7;
  626. break;
  627. case MPC52xx_PSC_MODE_8_BITS:
  628. default:
  629. *bits = 8;
  630. }
  631. if (mr1 & MPC52xx_PSC_MODE_PARNONE)
  632. *parity = 'n';
  633. else
  634. *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
  635. }
  636. static void
  637. mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
  638. {
  639. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  640. unsigned int i, j;
  641. /* Disable interrupts */
  642. psc_ops->cw_disable_ints(port);
  643. /* Wait the TX buffer to be empty */
  644. j = 5000000; /* Maximum wait */
  645. while (!mpc52xx_uart_tx_empty(port) && --j)
  646. udelay(1);
  647. /* Write all the chars */
  648. for (i = 0; i < count; i++, s++) {
  649. /* Line return handling */
  650. if (*s == '\n')
  651. psc_ops->write_char(port, '\r');
  652. /* Send the char */
  653. psc_ops->write_char(port, *s);
  654. /* Wait the TX buffer to be empty */
  655. j = 20000; /* Maximum wait */
  656. while (!mpc52xx_uart_tx_empty(port) && --j)
  657. udelay(1);
  658. }
  659. /* Restore interrupt state */
  660. psc_ops->cw_restore_ints(port);
  661. }
  662. #if !defined(CONFIG_PPC_MERGE)
  663. static int __init
  664. mpc52xx_console_setup(struct console *co, char *options)
  665. {
  666. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  667. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  668. int bits = 8;
  669. int parity = 'n';
  670. int flow = 'n';
  671. if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
  672. return -EINVAL;
  673. /* Basic port init. Needed since we use some uart_??? func before
  674. * real init for early access */
  675. spin_lock_init(&port->lock);
  676. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  677. port->ops = &mpc52xx_uart_ops;
  678. port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
  679. /* We ioremap ourself */
  680. port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
  681. if (port->membase == NULL)
  682. return -EINVAL;
  683. /* Setup the port parameters accoding to options */
  684. if (options)
  685. uart_parse_options(options, &baud, &parity, &bits, &flow);
  686. else
  687. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  688. return uart_set_options(port, co, baud, parity, bits, flow);
  689. }
  690. #else
  691. static int __init
  692. mpc52xx_console_setup(struct console *co, char *options)
  693. {
  694. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  695. struct device_node *np = mpc52xx_uart_nodes[co->index];
  696. unsigned int uartclk;
  697. struct resource res;
  698. int ret;
  699. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  700. int bits = 8;
  701. int parity = 'n';
  702. int flow = 'n';
  703. pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
  704. co, co->index, options);
  705. if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
  706. pr_debug("PSC%x out of range\n", co->index);
  707. return -EINVAL;
  708. }
  709. if (!np) {
  710. pr_debug("PSC%x not found in device tree\n", co->index);
  711. return -EINVAL;
  712. }
  713. pr_debug("Console on ttyPSC%x is %s\n",
  714. co->index, mpc52xx_uart_nodes[co->index]->full_name);
  715. /* Fetch register locations */
  716. ret = of_address_to_resource(np, 0, &res);
  717. if (ret) {
  718. pr_debug("Could not get resources for PSC%x\n", co->index);
  719. return ret;
  720. }
  721. uartclk = psc_ops->getuartclk(np);
  722. if (uartclk == 0) {
  723. pr_debug("Could not find uart clock frequency!\n");
  724. return -EINVAL;
  725. }
  726. /* Basic port init. Needed since we use some uart_??? func before
  727. * real init for early access */
  728. spin_lock_init(&port->lock);
  729. port->uartclk = uartclk;
  730. port->ops = &mpc52xx_uart_ops;
  731. port->mapbase = res.start;
  732. port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
  733. port->irq = irq_of_parse_and_map(np, 0);
  734. if (port->membase == NULL)
  735. return -EINVAL;
  736. pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
  737. (void *)port->mapbase, port->membase,
  738. port->irq, port->uartclk);
  739. /* Setup the port parameters accoding to options */
  740. if (options)
  741. uart_parse_options(options, &baud, &parity, &bits, &flow);
  742. else
  743. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  744. pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
  745. baud, bits, parity, flow);
  746. return uart_set_options(port, co, baud, parity, bits, flow);
  747. }
  748. #endif /* defined(CONFIG_PPC_MERGE) */
  749. static struct uart_driver mpc52xx_uart_driver;
  750. static struct console mpc52xx_console = {
  751. .name = "ttyPSC",
  752. .write = mpc52xx_console_write,
  753. .device = uart_console_device,
  754. .setup = mpc52xx_console_setup,
  755. .flags = CON_PRINTBUFFER,
  756. .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
  757. .data = &mpc52xx_uart_driver,
  758. };
  759. static int __init
  760. mpc52xx_console_init(void)
  761. {
  762. #if defined(CONFIG_PPC_MERGE)
  763. mpc52xx_uart_of_enumerate();
  764. #endif
  765. register_console(&mpc52xx_console);
  766. return 0;
  767. }
  768. console_initcall(mpc52xx_console_init);
  769. #define MPC52xx_PSC_CONSOLE &mpc52xx_console
  770. #else
  771. #define MPC52xx_PSC_CONSOLE NULL
  772. #endif
  773. /* ======================================================================== */
  774. /* UART Driver */
  775. /* ======================================================================== */
  776. static struct uart_driver mpc52xx_uart_driver = {
  777. .driver_name = "mpc52xx_psc_uart",
  778. .dev_name = "ttyPSC",
  779. .major = SERIAL_PSC_MAJOR,
  780. .minor = SERIAL_PSC_MINOR,
  781. .nr = MPC52xx_PSC_MAXNUM,
  782. .cons = MPC52xx_PSC_CONSOLE,
  783. };
  784. #if !defined(CONFIG_PPC_MERGE)
  785. /* ======================================================================== */
  786. /* Platform Driver */
  787. /* ======================================================================== */
  788. static int __devinit
  789. mpc52xx_uart_probe(struct platform_device *dev)
  790. {
  791. struct resource *res = dev->resource;
  792. struct uart_port *port = NULL;
  793. int i, idx, ret;
  794. /* Check validity & presence */
  795. idx = dev->id;
  796. if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
  797. return -EINVAL;
  798. if (!mpc52xx_match_psc_function(idx, "uart"))
  799. return -ENODEV;
  800. /* Init the port structure */
  801. port = &mpc52xx_uart_ports[idx];
  802. spin_lock_init(&port->lock);
  803. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  804. port->fifosize = 512;
  805. port->iotype = UPIO_MEM;
  806. port->flags = UPF_BOOT_AUTOCONF |
  807. (uart_console(port) ? 0 : UPF_IOREMAP);
  808. port->line = idx;
  809. port->ops = &mpc52xx_uart_ops;
  810. port->dev = &dev->dev;
  811. /* Search for IRQ and mapbase */
  812. for (i = 0 ; i < dev->num_resources ; i++, res++) {
  813. if (res->flags & IORESOURCE_MEM)
  814. port->mapbase = res->start;
  815. else if (res->flags & IORESOURCE_IRQ)
  816. port->irq = res->start;
  817. }
  818. if (!port->irq || !port->mapbase)
  819. return -EINVAL;
  820. /* Add the port to the uart sub-system */
  821. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  822. if (!ret)
  823. platform_set_drvdata(dev, (void *)port);
  824. return ret;
  825. }
  826. static int
  827. mpc52xx_uart_remove(struct platform_device *dev)
  828. {
  829. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  830. platform_set_drvdata(dev, NULL);
  831. if (port)
  832. uart_remove_one_port(&mpc52xx_uart_driver, port);
  833. return 0;
  834. }
  835. #ifdef CONFIG_PM
  836. static int
  837. mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
  838. {
  839. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  840. if (port)
  841. uart_suspend_port(&mpc52xx_uart_driver, port);
  842. return 0;
  843. }
  844. static int
  845. mpc52xx_uart_resume(struct platform_device *dev)
  846. {
  847. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  848. if (port)
  849. uart_resume_port(&mpc52xx_uart_driver, port);
  850. return 0;
  851. }
  852. #endif
  853. static struct platform_driver mpc52xx_uart_platform_driver = {
  854. .probe = mpc52xx_uart_probe,
  855. .remove = mpc52xx_uart_remove,
  856. #ifdef CONFIG_PM
  857. .suspend = mpc52xx_uart_suspend,
  858. .resume = mpc52xx_uart_resume,
  859. #endif
  860. .driver = {
  861. .owner = THIS_MODULE,
  862. .name = "mpc52xx-psc",
  863. },
  864. };
  865. #endif /* !defined(CONFIG_PPC_MERGE) */
  866. #if defined(CONFIG_PPC_MERGE)
  867. /* ======================================================================== */
  868. /* OF Platform Driver */
  869. /* ======================================================================== */
  870. static int __devinit
  871. mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
  872. {
  873. int idx = -1;
  874. unsigned int uartclk;
  875. struct uart_port *port = NULL;
  876. struct resource res;
  877. int ret;
  878. dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
  879. /* Check validity & presence */
  880. for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
  881. if (mpc52xx_uart_nodes[idx] == op->node)
  882. break;
  883. if (idx >= MPC52xx_PSC_MAXNUM)
  884. return -EINVAL;
  885. pr_debug("Found %s assigned to ttyPSC%x\n",
  886. mpc52xx_uart_nodes[idx]->full_name, idx);
  887. uartclk = psc_ops->getuartclk(op->node);
  888. if (uartclk == 0) {
  889. dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
  890. return -EINVAL;
  891. }
  892. /* Init the port structure */
  893. port = &mpc52xx_uart_ports[idx];
  894. spin_lock_init(&port->lock);
  895. port->uartclk = uartclk;
  896. port->fifosize = 512;
  897. port->iotype = UPIO_MEM;
  898. port->flags = UPF_BOOT_AUTOCONF |
  899. (uart_console(port) ? 0 : UPF_IOREMAP);
  900. port->line = idx;
  901. port->ops = &mpc52xx_uart_ops;
  902. port->dev = &op->dev;
  903. /* Search for IRQ and mapbase */
  904. ret = of_address_to_resource(op->node, 0, &res);
  905. if (ret)
  906. return ret;
  907. port->mapbase = res.start;
  908. port->irq = irq_of_parse_and_map(op->node, 0);
  909. dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
  910. (void *)port->mapbase, port->irq, port->uartclk);
  911. if ((port->irq == NO_IRQ) || !port->mapbase) {
  912. printk(KERN_ERR "Could not allocate resources for PSC\n");
  913. return -EINVAL;
  914. }
  915. /* Add the port to the uart sub-system */
  916. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  917. if (!ret)
  918. dev_set_drvdata(&op->dev, (void *)port);
  919. return ret;
  920. }
  921. static int
  922. mpc52xx_uart_of_remove(struct of_device *op)
  923. {
  924. struct uart_port *port = dev_get_drvdata(&op->dev);
  925. dev_set_drvdata(&op->dev, NULL);
  926. if (port) {
  927. uart_remove_one_port(&mpc52xx_uart_driver, port);
  928. irq_dispose_mapping(port->irq);
  929. }
  930. return 0;
  931. }
  932. #ifdef CONFIG_PM
  933. static int
  934. mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
  935. {
  936. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  937. if (port)
  938. uart_suspend_port(&mpc52xx_uart_driver, port);
  939. return 0;
  940. }
  941. static int
  942. mpc52xx_uart_of_resume(struct of_device *op)
  943. {
  944. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  945. if (port)
  946. uart_resume_port(&mpc52xx_uart_driver, port);
  947. return 0;
  948. }
  949. #endif
  950. static void
  951. mpc52xx_uart_of_assign(struct device_node *np, int idx)
  952. {
  953. int free_idx = -1;
  954. int i;
  955. /* Find the first free node */
  956. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  957. if (mpc52xx_uart_nodes[i] == NULL) {
  958. free_idx = i;
  959. break;
  960. }
  961. }
  962. if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
  963. idx = free_idx;
  964. if (idx < 0)
  965. return; /* No free slot; abort */
  966. of_node_get(np);
  967. /* If the slot is already occupied, then swap slots */
  968. if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
  969. mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
  970. mpc52xx_uart_nodes[idx] = np;
  971. }
  972. static void
  973. mpc52xx_uart_of_enumerate(void)
  974. {
  975. static int enum_done;
  976. struct device_node *np;
  977. const unsigned int *devno;
  978. int i;
  979. if (enum_done)
  980. return;
  981. for_each_node_by_type(np, "serial") {
  982. if (!of_match_node(mpc52xx_uart_of_match, np))
  983. continue;
  984. /* Is a particular device number requested? */
  985. devno = of_get_property(np, "port-number", NULL);
  986. mpc52xx_uart_of_assign(np, devno ? *devno : -1);
  987. }
  988. enum_done = 1;
  989. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  990. if (mpc52xx_uart_nodes[i])
  991. pr_debug("%s assigned to ttyPSC%x\n",
  992. mpc52xx_uart_nodes[i]->full_name, i);
  993. }
  994. }
  995. MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
  996. static struct of_platform_driver mpc52xx_uart_of_driver = {
  997. .match_table = mpc52xx_uart_of_match,
  998. .probe = mpc52xx_uart_of_probe,
  999. .remove = mpc52xx_uart_of_remove,
  1000. #ifdef CONFIG_PM
  1001. .suspend = mpc52xx_uart_of_suspend,
  1002. .resume = mpc52xx_uart_of_resume,
  1003. #endif
  1004. .driver = {
  1005. .name = "mpc52xx-psc-uart",
  1006. },
  1007. };
  1008. #endif /* defined(CONFIG_PPC_MERGE) */
  1009. /* ======================================================================== */
  1010. /* Module */
  1011. /* ======================================================================== */
  1012. static int __init
  1013. mpc52xx_uart_init(void)
  1014. {
  1015. int ret;
  1016. printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
  1017. ret = uart_register_driver(&mpc52xx_uart_driver);
  1018. if (ret) {
  1019. printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
  1020. __FILE__, ret);
  1021. return ret;
  1022. }
  1023. #if defined(CONFIG_PPC_MERGE)
  1024. mpc52xx_uart_of_enumerate();
  1025. ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
  1026. if (ret) {
  1027. printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
  1028. __FILE__, ret);
  1029. uart_unregister_driver(&mpc52xx_uart_driver);
  1030. return ret;
  1031. }
  1032. #else
  1033. ret = platform_driver_register(&mpc52xx_uart_platform_driver);
  1034. if (ret) {
  1035. printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
  1036. __FILE__, ret);
  1037. uart_unregister_driver(&mpc52xx_uart_driver);
  1038. return ret;
  1039. }
  1040. #endif
  1041. return 0;
  1042. }
  1043. static void __exit
  1044. mpc52xx_uart_exit(void)
  1045. {
  1046. #if defined(CONFIG_PPC_MERGE)
  1047. of_unregister_platform_driver(&mpc52xx_uart_of_driver);
  1048. #else
  1049. platform_driver_unregister(&mpc52xx_uart_platform_driver);
  1050. #endif
  1051. uart_unregister_driver(&mpc52xx_uart_driver);
  1052. }
  1053. module_init(mpc52xx_uart_init);
  1054. module_exit(mpc52xx_uart_exit);
  1055. MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
  1056. MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
  1057. MODULE_LICENSE("GPL");