tsc.c 9.1 KB

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  1. /*
  2. * This code largely moved from arch/i386/kernel/timer/timer_tsc.c
  3. * which was originally moved from arch/i386/kernel/time.c.
  4. * See comments there for proper credits.
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/clocksource.h>
  8. #include <linux/workqueue.h>
  9. #include <linux/cpufreq.h>
  10. #include <linux/jiffies.h>
  11. #include <linux/init.h>
  12. #include <linux/dmi.h>
  13. #include <asm/delay.h>
  14. #include <asm/tsc.h>
  15. #include <asm/io.h>
  16. #include <asm/timer.h>
  17. #include "mach_timer.h"
  18. static int tsc_enabled;
  19. /*
  20. * On some systems the TSC frequency does not
  21. * change with the cpu frequency. So we need
  22. * an extra value to store the TSC freq
  23. */
  24. unsigned int tsc_khz;
  25. int tsc_disable;
  26. #ifdef CONFIG_X86_TSC
  27. static int __init tsc_setup(char *str)
  28. {
  29. printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
  30. "cannot disable TSC.\n");
  31. return 1;
  32. }
  33. #else
  34. /*
  35. * disable flag for tsc. Takes effect by clearing the TSC cpu flag
  36. * in cpu/common.c
  37. */
  38. static int __init tsc_setup(char *str)
  39. {
  40. tsc_disable = 1;
  41. return 1;
  42. }
  43. #endif
  44. __setup("notsc", tsc_setup);
  45. /*
  46. * code to mark and check if the TSC is unstable
  47. * due to cpufreq or due to unsynced TSCs
  48. */
  49. static int tsc_unstable;
  50. static inline int check_tsc_unstable(void)
  51. {
  52. return tsc_unstable;
  53. }
  54. /* Accellerators for sched_clock()
  55. * convert from cycles(64bits) => nanoseconds (64bits)
  56. * basic equation:
  57. * ns = cycles / (freq / ns_per_sec)
  58. * ns = cycles * (ns_per_sec / freq)
  59. * ns = cycles * (10^9 / (cpu_khz * 10^3))
  60. * ns = cycles * (10^6 / cpu_khz)
  61. *
  62. * Then we use scaling math (suggested by george@mvista.com) to get:
  63. * ns = cycles * (10^6 * SC / cpu_khz) / SC
  64. * ns = cycles * cyc2ns_scale / SC
  65. *
  66. * And since SC is a constant power of two, we can convert the div
  67. * into a shift.
  68. *
  69. * We can use khz divisor instead of mhz to keep a better percision, since
  70. * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
  71. * (mathieu.desnoyers@polymtl.ca)
  72. *
  73. * -johnstul@us.ibm.com "math is hard, lets go shopping!"
  74. */
  75. unsigned long cyc2ns_scale __read_mostly;
  76. #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
  77. static inline void set_cyc2ns_scale(unsigned long cpu_khz)
  78. {
  79. cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
  80. }
  81. /*
  82. * Scheduler clock - returns current time in nanosec units.
  83. */
  84. unsigned long long native_sched_clock(void)
  85. {
  86. unsigned long long this_offset;
  87. /*
  88. * Fall back to jiffies if there's no TSC available:
  89. * ( But note that we still use it if the TSC is marked
  90. * unstable. We do this because unlike Time Of Day,
  91. * the scheduler clock tolerates small errors and it's
  92. * very important for it to be as fast as the platform
  93. * can achive it. )
  94. */
  95. if (unlikely(!tsc_enabled && !tsc_unstable))
  96. /* No locking but a rare wrong value is not a big deal: */
  97. return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
  98. /* read the Time Stamp Counter: */
  99. rdtscll(this_offset);
  100. /* return the value in ns */
  101. return cycles_2_ns(this_offset);
  102. }
  103. /* We need to define a real function for sched_clock, to override the
  104. weak default version */
  105. #ifdef CONFIG_PARAVIRT
  106. unsigned long long sched_clock(void)
  107. {
  108. return paravirt_sched_clock();
  109. }
  110. #else
  111. unsigned long long sched_clock(void)
  112. __attribute__((alias("native_sched_clock")));
  113. #endif
  114. unsigned long native_calculate_cpu_khz(void)
  115. {
  116. unsigned long long start, end;
  117. unsigned long count;
  118. u64 delta64;
  119. int i;
  120. unsigned long flags;
  121. local_irq_save(flags);
  122. /* run 3 times to ensure the cache is warm */
  123. for (i = 0; i < 3; i++) {
  124. mach_prepare_counter();
  125. rdtscll(start);
  126. mach_countup(&count);
  127. rdtscll(end);
  128. }
  129. /*
  130. * Error: ECTCNEVERSET
  131. * The CTC wasn't reliable: we got a hit on the very first read,
  132. * or the CPU was so fast/slow that the quotient wouldn't fit in
  133. * 32 bits..
  134. */
  135. if (count <= 1)
  136. goto err;
  137. delta64 = end - start;
  138. /* cpu freq too fast: */
  139. if (delta64 > (1ULL<<32))
  140. goto err;
  141. /* cpu freq too slow: */
  142. if (delta64 <= CALIBRATE_TIME_MSEC)
  143. goto err;
  144. delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
  145. do_div(delta64,CALIBRATE_TIME_MSEC);
  146. local_irq_restore(flags);
  147. return (unsigned long)delta64;
  148. err:
  149. local_irq_restore(flags);
  150. return 0;
  151. }
  152. int recalibrate_cpu_khz(void)
  153. {
  154. #ifndef CONFIG_SMP
  155. unsigned long cpu_khz_old = cpu_khz;
  156. if (cpu_has_tsc) {
  157. cpu_khz = calculate_cpu_khz();
  158. tsc_khz = cpu_khz;
  159. cpu_data[0].loops_per_jiffy =
  160. cpufreq_scale(cpu_data[0].loops_per_jiffy,
  161. cpu_khz_old, cpu_khz);
  162. return 0;
  163. } else
  164. return -ENODEV;
  165. #else
  166. return -ENODEV;
  167. #endif
  168. }
  169. EXPORT_SYMBOL(recalibrate_cpu_khz);
  170. #ifdef CONFIG_CPU_FREQ
  171. /*
  172. * if the CPU frequency is scaled, TSC-based delays will need a different
  173. * loops_per_jiffy value to function properly.
  174. */
  175. static unsigned int ref_freq = 0;
  176. static unsigned long loops_per_jiffy_ref = 0;
  177. static unsigned long cpu_khz_ref = 0;
  178. static int
  179. time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
  180. {
  181. struct cpufreq_freqs *freq = data;
  182. if (!ref_freq) {
  183. if (!freq->old){
  184. ref_freq = freq->new;
  185. return 0;
  186. }
  187. ref_freq = freq->old;
  188. loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy;
  189. cpu_khz_ref = cpu_khz;
  190. }
  191. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  192. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
  193. (val == CPUFREQ_RESUMECHANGE)) {
  194. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  195. cpu_data[freq->cpu].loops_per_jiffy =
  196. cpufreq_scale(loops_per_jiffy_ref,
  197. ref_freq, freq->new);
  198. if (cpu_khz) {
  199. if (num_online_cpus() == 1)
  200. cpu_khz = cpufreq_scale(cpu_khz_ref,
  201. ref_freq, freq->new);
  202. if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
  203. tsc_khz = cpu_khz;
  204. set_cyc2ns_scale(cpu_khz);
  205. /*
  206. * TSC based sched_clock turns
  207. * to junk w/ cpufreq
  208. */
  209. mark_tsc_unstable("cpufreq changes");
  210. }
  211. }
  212. }
  213. return 0;
  214. }
  215. static struct notifier_block time_cpufreq_notifier_block = {
  216. .notifier_call = time_cpufreq_notifier
  217. };
  218. static int __init cpufreq_tsc(void)
  219. {
  220. return cpufreq_register_notifier(&time_cpufreq_notifier_block,
  221. CPUFREQ_TRANSITION_NOTIFIER);
  222. }
  223. core_initcall(cpufreq_tsc);
  224. #endif
  225. /* clock source code */
  226. static unsigned long current_tsc_khz = 0;
  227. static cycle_t read_tsc(void)
  228. {
  229. cycle_t ret;
  230. rdtscll(ret);
  231. return ret;
  232. }
  233. static struct clocksource clocksource_tsc = {
  234. .name = "tsc",
  235. .rating = 300,
  236. .read = read_tsc,
  237. .mask = CLOCKSOURCE_MASK(64),
  238. .mult = 0, /* to be set */
  239. .shift = 22,
  240. .flags = CLOCK_SOURCE_IS_CONTINUOUS |
  241. CLOCK_SOURCE_MUST_VERIFY,
  242. };
  243. void mark_tsc_unstable(char *reason)
  244. {
  245. sched_clock_unstable_event();
  246. if (!tsc_unstable) {
  247. tsc_unstable = 1;
  248. tsc_enabled = 0;
  249. printk("Marking TSC unstable due to: %s.\n", reason);
  250. /* Can be called before registration */
  251. if (clocksource_tsc.mult)
  252. clocksource_change_rating(&clocksource_tsc, 0);
  253. else
  254. clocksource_tsc.rating = 0;
  255. }
  256. }
  257. EXPORT_SYMBOL_GPL(mark_tsc_unstable);
  258. static int __init dmi_mark_tsc_unstable(struct dmi_system_id *d)
  259. {
  260. printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
  261. d->ident);
  262. tsc_unstable = 1;
  263. return 0;
  264. }
  265. /* List of systems that have known TSC problems */
  266. static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
  267. {
  268. .callback = dmi_mark_tsc_unstable,
  269. .ident = "IBM Thinkpad 380XD",
  270. .matches = {
  271. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  272. DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
  273. },
  274. },
  275. {}
  276. };
  277. /*
  278. * Make an educated guess if the TSC is trustworthy and synchronized
  279. * over all CPUs.
  280. */
  281. __cpuinit int unsynchronized_tsc(void)
  282. {
  283. if (!cpu_has_tsc || tsc_unstable)
  284. return 1;
  285. /*
  286. * Intel systems are normally all synchronized.
  287. * Exceptions must mark TSC as unstable:
  288. */
  289. if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
  290. /* assume multi socket systems are not synchronized: */
  291. if (num_possible_cpus() > 1)
  292. tsc_unstable = 1;
  293. }
  294. return tsc_unstable;
  295. }
  296. /*
  297. * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
  298. */
  299. #ifdef CONFIG_MGEODE_LX
  300. /* RTSC counts during suspend */
  301. #define RTSC_SUSP 0x100
  302. static void __init check_geode_tsc_reliable(void)
  303. {
  304. unsigned long val;
  305. rdmsrl(MSR_GEODE_BUSCONT_CONF0, val);
  306. if ((val & RTSC_SUSP))
  307. clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
  308. }
  309. #else
  310. static inline void check_geode_tsc_reliable(void) { }
  311. #endif
  312. void __init tsc_init(void)
  313. {
  314. if (!cpu_has_tsc || tsc_disable)
  315. goto out_no_tsc;
  316. cpu_khz = calculate_cpu_khz();
  317. tsc_khz = cpu_khz;
  318. if (!cpu_khz)
  319. goto out_no_tsc;
  320. printk("Detected %lu.%03lu MHz processor.\n",
  321. (unsigned long)cpu_khz / 1000,
  322. (unsigned long)cpu_khz % 1000);
  323. set_cyc2ns_scale(cpu_khz);
  324. use_tsc_delay();
  325. /* Check and install the TSC clocksource */
  326. dmi_check_system(bad_tsc_dmi_table);
  327. unsynchronized_tsc();
  328. check_geode_tsc_reliable();
  329. current_tsc_khz = tsc_khz;
  330. clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
  331. clocksource_tsc.shift);
  332. /* lower the rating if we already know its unstable: */
  333. if (check_tsc_unstable()) {
  334. clocksource_tsc.rating = 0;
  335. clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
  336. } else
  337. tsc_enabled = 1;
  338. clocksource_register(&clocksource_tsc);
  339. return;
  340. out_no_tsc:
  341. /*
  342. * Set the tsc_disable flag if there's no TSC support, this
  343. * makes it a fast flag for the kernel to see whether it
  344. * should be using the TSC.
  345. */
  346. tsc_disable = 1;
  347. }