quirks.c 1.4 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849
  1. /*
  2. * This file contains work-arounds for x86 and x86_64 platform bugs.
  3. */
  4. #include <linux/pci.h>
  5. #include <linux/irq.h>
  6. #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
  7. static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
  8. {
  9. u8 config, rev;
  10. u32 word;
  11. /* BIOS may enable hardware IRQ balancing for
  12. * E7520/E7320/E7525(revision ID 0x9 and below)
  13. * based platforms.
  14. * Disable SW irqbalance/affinity on those platforms.
  15. */
  16. pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
  17. if (rev > 0x9)
  18. return;
  19. /* enable access to config space*/
  20. pci_read_config_byte(dev, 0xf4, &config);
  21. pci_write_config_byte(dev, 0xf4, config|0x2);
  22. /* read xTPR register */
  23. raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
  24. if (!(word & (1 << 13))) {
  25. printk(KERN_INFO "Intel E7520/7320/7525 detected. "
  26. "Disabling irq balancing and affinity\n");
  27. #ifdef CONFIG_IRQBALANCE
  28. irqbalance_disable("");
  29. #endif
  30. noirqdebug_setup("");
  31. #ifdef CONFIG_PROC_FS
  32. no_irq_affinity = 1;
  33. #endif
  34. }
  35. /* put back the original value for config space*/
  36. if (!(config & 0x2))
  37. pci_write_config_byte(dev, 0xf4, config);
  38. }
  39. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_intel_irqbalance);
  40. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_intel_irqbalance);
  41. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_intel_irqbalance);
  42. #endif