mach-crag6410.c 17 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2. *
  3. * Copyright 2011 Wolfson Microelectronics plc
  4. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  5. *
  6. * Copyright 2011 Simtec Electronics
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/list.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/fb.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/delay.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/regulator/fixed.h>
  24. #include <linux/pwm_backlight.h>
  25. #include <linux/dm9000.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/basic_mmio_gpio.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/i2c/pca953x.h>
  30. #include <video/platform_lcd.h>
  31. #include <linux/mfd/wm831x/core.h>
  32. #include <linux/mfd/wm831x/pdata.h>
  33. #include <linux/mfd/wm831x/irq.h>
  34. #include <linux/mfd/wm831x/gpio.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach-types.h>
  37. #include <mach/hardware.h>
  38. #include <mach/map.h>
  39. #include <mach/s3c6410.h>
  40. #include <mach/regs-sys.h>
  41. #include <mach/regs-gpio.h>
  42. #include <mach/regs-modem.h>
  43. #include <mach/crag6410.h>
  44. #include <mach/regs-gpio-memport.h>
  45. #include <plat/regs-serial.h>
  46. #include <plat/regs-fb-v4.h>
  47. #include <plat/fb.h>
  48. #include <plat/sdhci.h>
  49. #include <plat/gpio-cfg.h>
  50. #include <plat/s3c64xx-spi.h>
  51. #include <plat/keypad.h>
  52. #include <plat/clock.h>
  53. #include <plat/devs.h>
  54. #include <plat/cpu.h>
  55. #include <plat/adc.h>
  56. #include <plat/iic.h>
  57. #include <plat/pm.h>
  58. /* serial port setup */
  59. #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  60. #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  61. #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  62. static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  63. [0] = {
  64. .hwport = 0,
  65. .flags = 0,
  66. .ucon = UCON,
  67. .ulcon = ULCON,
  68. .ufcon = UFCON,
  69. },
  70. [1] = {
  71. .hwport = 1,
  72. .flags = 0,
  73. .ucon = UCON,
  74. .ulcon = ULCON,
  75. .ufcon = UFCON,
  76. },
  77. [2] = {
  78. .hwport = 2,
  79. .flags = 0,
  80. .ucon = UCON,
  81. .ulcon = ULCON,
  82. .ufcon = UFCON,
  83. },
  84. [3] = {
  85. .hwport = 3,
  86. .flags = 0,
  87. .ucon = UCON,
  88. .ulcon = ULCON,
  89. .ufcon = UFCON,
  90. },
  91. };
  92. static struct platform_pwm_backlight_data crag6410_backlight_data = {
  93. .pwm_id = 0,
  94. .max_brightness = 1000,
  95. .dft_brightness = 600,
  96. .pwm_period_ns = 100000, /* about 1kHz */
  97. };
  98. static struct platform_device crag6410_backlight_device = {
  99. .name = "pwm-backlight",
  100. .id = -1,
  101. .dev = {
  102. .parent = &s3c_device_timer[0].dev,
  103. .platform_data = &crag6410_backlight_data,
  104. },
  105. };
  106. static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
  107. {
  108. pr_debug("%s: setting power %d\n", __func__, power);
  109. if (power) {
  110. gpio_set_value(S3C64XX_GPB(0), 1);
  111. msleep(1);
  112. s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
  113. } else {
  114. gpio_direction_output(S3C64XX_GPF(14), 0);
  115. gpio_set_value(S3C64XX_GPB(0), 0);
  116. }
  117. }
  118. static struct platform_device crag6410_lcd_powerdev = {
  119. .name = "platform-lcd",
  120. .id = -1,
  121. .dev.parent = &s3c_device_fb.dev,
  122. .dev.platform_data = &(struct plat_lcd_data) {
  123. .set_power = crag6410_lcd_power_set,
  124. },
  125. };
  126. /* 640x480 URT */
  127. static struct s3c_fb_pd_win crag6410_fb_win0 = {
  128. /* this is to ensure we use win0 */
  129. .win_mode = {
  130. .left_margin = 150,
  131. .right_margin = 80,
  132. .upper_margin = 40,
  133. .lower_margin = 5,
  134. .hsync_len = 40,
  135. .vsync_len = 5,
  136. .xres = 640,
  137. .yres = 480,
  138. },
  139. .max_bpp = 32,
  140. .default_bpp = 16,
  141. .virtual_y = 480 * 2,
  142. .virtual_x = 640,
  143. };
  144. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  145. static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
  146. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  147. .win[0] = &crag6410_fb_win0,
  148. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  149. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  150. };
  151. /* 2x6 keypad */
  152. static uint32_t crag6410_keymap[] __initdata = {
  153. /* KEY(row, col, keycode) */
  154. KEY(0, 0, KEY_VOLUMEUP),
  155. KEY(0, 1, KEY_HOME),
  156. KEY(0, 2, KEY_VOLUMEDOWN),
  157. KEY(0, 3, KEY_HELP),
  158. KEY(0, 4, KEY_MENU),
  159. KEY(0, 5, KEY_MEDIA),
  160. KEY(1, 0, 232),
  161. KEY(1, 1, KEY_DOWN),
  162. KEY(1, 2, KEY_LEFT),
  163. KEY(1, 3, KEY_UP),
  164. KEY(1, 4, KEY_RIGHT),
  165. KEY(1, 5, KEY_CAMERA),
  166. };
  167. static struct matrix_keymap_data crag6410_keymap_data __initdata = {
  168. .keymap = crag6410_keymap,
  169. .keymap_size = ARRAY_SIZE(crag6410_keymap),
  170. };
  171. static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
  172. .keymap_data = &crag6410_keymap_data,
  173. .rows = 2,
  174. .cols = 6,
  175. };
  176. static struct gpio_keys_button crag6410_gpio_keys[] = {
  177. [0] = {
  178. .code = KEY_SUSPEND,
  179. .gpio = S3C64XX_GPL(10), /* EINT 18 */
  180. .type = EV_KEY,
  181. .wakeup = 1,
  182. .active_low = 1,
  183. },
  184. [1] = {
  185. .code = SW_FRONT_PROXIMITY,
  186. .gpio = S3C64XX_GPN(11), /* EINT 11 */
  187. .type = EV_SW,
  188. },
  189. };
  190. static struct gpio_keys_platform_data crag6410_gpio_keydata = {
  191. .buttons = crag6410_gpio_keys,
  192. .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
  193. };
  194. static struct platform_device crag6410_gpio_keydev = {
  195. .name = "gpio-keys",
  196. .id = 0,
  197. .dev.platform_data = &crag6410_gpio_keydata,
  198. };
  199. static struct resource crag6410_dm9k_resource[] = {
  200. [0] = {
  201. .start = S3C64XX_PA_XM0CSN5,
  202. .end = S3C64XX_PA_XM0CSN5 + 1,
  203. .flags = IORESOURCE_MEM,
  204. },
  205. [1] = {
  206. .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
  207. .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
  208. .flags = IORESOURCE_MEM,
  209. },
  210. [2] = {
  211. .start = S3C_EINT(17),
  212. .end = S3C_EINT(17),
  213. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  214. },
  215. };
  216. static struct dm9000_plat_data mini6410_dm9k_pdata = {
  217. .flags = DM9000_PLATF_16BITONLY,
  218. };
  219. static struct platform_device crag6410_dm9k_device = {
  220. .name = "dm9000",
  221. .id = -1,
  222. .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
  223. .resource = crag6410_dm9k_resource,
  224. .dev.platform_data = &mini6410_dm9k_pdata,
  225. };
  226. static struct resource crag6410_mmgpio_resource[] = {
  227. [0] = {
  228. .start = S3C64XX_PA_XM0CSN4 + 1,
  229. .end = S3C64XX_PA_XM0CSN4 + 1,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. };
  233. static struct platform_device crag6410_mmgpio = {
  234. .name = "basic-mmio-gpio",
  235. .id = -1,
  236. .resource = crag6410_mmgpio_resource,
  237. .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
  238. .dev.platform_data = &(struct bgpio_pdata) {
  239. .base = -1,
  240. },
  241. };
  242. static struct platform_device speyside_device = {
  243. .name = "speyside",
  244. .id = -1,
  245. };
  246. static struct platform_device lowland_device = {
  247. .name = "lowland",
  248. .id = -1,
  249. };
  250. static struct platform_device speyside_wm8962_device = {
  251. .name = "speyside-wm8962",
  252. .id = -1,
  253. };
  254. static struct regulator_consumer_supply wallvdd_consumers[] = {
  255. REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
  256. REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
  257. REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
  258. REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
  259. };
  260. static struct regulator_init_data wallvdd_data = {
  261. .constraints = {
  262. .always_on = 1,
  263. },
  264. .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
  265. .consumer_supplies = wallvdd_consumers,
  266. };
  267. static struct fixed_voltage_config wallvdd_pdata = {
  268. .supply_name = "WALLVDD",
  269. .microvolts = 5000000,
  270. .init_data = &wallvdd_data,
  271. .gpio = -EINVAL,
  272. };
  273. static struct platform_device wallvdd_device = {
  274. .name = "reg-fixed-voltage",
  275. .id = -1,
  276. .dev = {
  277. .platform_data = &wallvdd_pdata,
  278. },
  279. };
  280. static struct platform_device *crag6410_devices[] __initdata = {
  281. &s3c_device_hsmmc0,
  282. &s3c_device_hsmmc1,
  283. &s3c_device_hsmmc2,
  284. &s3c_device_i2c0,
  285. &s3c_device_i2c1,
  286. &s3c_device_fb,
  287. &s3c_device_ohci,
  288. &s3c_device_usb_hsotg,
  289. &s3c_device_adc,
  290. &s3c_device_rtc,
  291. &s3c_device_ts,
  292. &s3c_device_timer[0],
  293. &s3c64xx_device_iis0,
  294. &s3c64xx_device_iis1,
  295. &samsung_asoc_dma,
  296. &samsung_device_keypad,
  297. &crag6410_gpio_keydev,
  298. &crag6410_dm9k_device,
  299. &s3c64xx_device_spi0,
  300. &crag6410_mmgpio,
  301. &crag6410_lcd_powerdev,
  302. &crag6410_backlight_device,
  303. &speyside_device,
  304. &speyside_wm8962_device,
  305. &lowland_device,
  306. &wallvdd_device,
  307. };
  308. static struct pca953x_platform_data crag6410_pca_data = {
  309. .gpio_base = PCA935X_GPIO_BASE,
  310. .irq_base = 0,
  311. };
  312. /* VDDARM is controlled by DVS1 connected to GPK(0) */
  313. static struct wm831x_buckv_pdata vddarm_pdata = {
  314. .dvs_control_src = 1,
  315. .dvs_gpio = S3C64XX_GPK(0),
  316. };
  317. static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
  318. REGULATOR_SUPPLY("vddarm", NULL),
  319. };
  320. static struct regulator_init_data vddarm __initdata = {
  321. .constraints = {
  322. .name = "VDDARM",
  323. .min_uV = 1000000,
  324. .max_uV = 1300000,
  325. .always_on = 1,
  326. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  327. },
  328. .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
  329. .consumer_supplies = vddarm_consumers,
  330. .supply_regulator = "WALLVDD",
  331. .driver_data = &vddarm_pdata,
  332. };
  333. static struct regulator_init_data vddint __initdata = {
  334. .constraints = {
  335. .name = "VDDINT",
  336. .min_uV = 1000000,
  337. .max_uV = 1200000,
  338. .always_on = 1,
  339. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  340. },
  341. };
  342. static struct regulator_init_data vddmem __initdata = {
  343. .constraints = {
  344. .name = "VDDMEM",
  345. .always_on = 1,
  346. },
  347. };
  348. static struct regulator_init_data vddsys __initdata = {
  349. .constraints = {
  350. .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
  351. .always_on = 1,
  352. },
  353. };
  354. static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
  355. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  356. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
  357. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
  358. };
  359. static struct regulator_init_data vddmmc __initdata = {
  360. .constraints = {
  361. .name = "VDDMMC,UH",
  362. .always_on = 1,
  363. },
  364. .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
  365. .consumer_supplies = vddmmc_consumers,
  366. .supply_regulator = "WALLVDD",
  367. };
  368. static struct regulator_init_data vddotgi __initdata = {
  369. .constraints = {
  370. .name = "VDDOTGi",
  371. .always_on = 1,
  372. },
  373. .supply_regulator = "WALLVDD",
  374. };
  375. static struct regulator_init_data vddotg __initdata = {
  376. .constraints = {
  377. .name = "VDDOTG",
  378. .always_on = 1,
  379. },
  380. .supply_regulator = "WALLVDD",
  381. };
  382. static struct regulator_init_data vddhi __initdata = {
  383. .constraints = {
  384. .name = "VDDHI",
  385. .always_on = 1,
  386. },
  387. .supply_regulator = "WALLVDD",
  388. };
  389. static struct regulator_init_data vddadc __initdata = {
  390. .constraints = {
  391. .name = "VDDADC,VDDDAC",
  392. .always_on = 1,
  393. },
  394. .supply_regulator = "WALLVDD",
  395. };
  396. static struct regulator_init_data vddmem0 __initdata = {
  397. .constraints = {
  398. .name = "VDDMEM0",
  399. .always_on = 1,
  400. },
  401. .supply_regulator = "WALLVDD",
  402. };
  403. static struct regulator_init_data vddpll __initdata = {
  404. .constraints = {
  405. .name = "VDDPLL",
  406. .always_on = 1,
  407. },
  408. .supply_regulator = "WALLVDD",
  409. };
  410. static struct regulator_init_data vddlcd __initdata = {
  411. .constraints = {
  412. .name = "VDDLCD",
  413. .always_on = 1,
  414. },
  415. .supply_regulator = "WALLVDD",
  416. };
  417. static struct regulator_init_data vddalive __initdata = {
  418. .constraints = {
  419. .name = "VDDALIVE",
  420. .always_on = 1,
  421. },
  422. .supply_regulator = "WALLVDD",
  423. };
  424. static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
  425. .charger_enable = 1,
  426. .vlim = 2500, /* mV */
  427. .ilim = 200, /* uA */
  428. };
  429. static struct wm831x_status_pdata banff_red_led __initdata = {
  430. .name = "banff:red:",
  431. .default_src = WM831X_STATUS_MANUAL,
  432. };
  433. static struct wm831x_status_pdata banff_green_led __initdata = {
  434. .name = "banff:green:",
  435. .default_src = WM831X_STATUS_MANUAL,
  436. };
  437. static struct wm831x_touch_pdata touch_pdata __initdata = {
  438. .data_irq = S3C_EINT(26),
  439. .pd_irq = S3C_EINT(27),
  440. };
  441. static struct wm831x_pdata crag_pmic_pdata __initdata = {
  442. .wm831x_num = 1,
  443. .irq_base = BANFF_PMIC_IRQ_BASE,
  444. .gpio_base = GPIO_BOARD_START + 8,
  445. .backup = &banff_backup_pdata,
  446. .gpio_defaults = {
  447. /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
  448. [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
  449. /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
  450. [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
  451. /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
  452. [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
  453. },
  454. .dcdc = {
  455. &vddarm, /* DCDC1 */
  456. &vddint, /* DCDC2 */
  457. &vddmem, /* DCDC3 */
  458. },
  459. .ldo = {
  460. &vddsys, /* LDO1 */
  461. &vddmmc, /* LDO2 */
  462. NULL, /* LDO3 */
  463. &vddotgi, /* LDO4 */
  464. &vddotg, /* LDO5 */
  465. &vddhi, /* LDO6 */
  466. &vddadc, /* LDO7 */
  467. &vddmem0, /* LDO8 */
  468. &vddpll, /* LDO9 */
  469. &vddlcd, /* LDO10 */
  470. &vddalive, /* LDO11 */
  471. },
  472. .status = {
  473. &banff_green_led,
  474. &banff_red_led,
  475. },
  476. .touch = &touch_pdata,
  477. };
  478. static struct i2c_board_info i2c_devs0[] __initdata = {
  479. { I2C_BOARD_INFO("24c08", 0x50), },
  480. { I2C_BOARD_INFO("tca6408", 0x20),
  481. .platform_data = &crag6410_pca_data,
  482. },
  483. { I2C_BOARD_INFO("wm8312", 0x34),
  484. .platform_data = &crag_pmic_pdata,
  485. .irq = S3C_EINT(23),
  486. },
  487. };
  488. static struct s3c2410_platform_i2c i2c0_pdata = {
  489. .frequency = 400000,
  490. };
  491. static struct regulator_init_data pvdd_1v2 __initdata = {
  492. .constraints = {
  493. .name = "PVDD_1V2",
  494. .always_on = 1,
  495. },
  496. };
  497. static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
  498. REGULATOR_SUPPLY("LDOVDD", "1-001a"),
  499. REGULATOR_SUPPLY("PLLVDD", "1-001a"),
  500. REGULATOR_SUPPLY("DBVDD", "1-001a"),
  501. REGULATOR_SUPPLY("DBVDD1", "1-001a"),
  502. REGULATOR_SUPPLY("DBVDD2", "1-001a"),
  503. REGULATOR_SUPPLY("DBVDD3", "1-001a"),
  504. REGULATOR_SUPPLY("CPVDD", "1-001a"),
  505. REGULATOR_SUPPLY("AVDD2", "1-001a"),
  506. REGULATOR_SUPPLY("DCVDD", "1-001a"),
  507. REGULATOR_SUPPLY("AVDD", "1-001a"),
  508. };
  509. static struct regulator_init_data pvdd_1v8 __initdata = {
  510. .constraints = {
  511. .name = "PVDD_1V8",
  512. .always_on = 1,
  513. },
  514. .consumer_supplies = pvdd_1v8_consumers,
  515. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
  516. };
  517. static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
  518. REGULATOR_SUPPLY("MICVDD", "1-001a"),
  519. REGULATOR_SUPPLY("AVDD1", "1-001a"),
  520. };
  521. static struct regulator_init_data pvdd_3v3 __initdata = {
  522. .constraints = {
  523. .name = "PVDD_3V3",
  524. .always_on = 1,
  525. },
  526. .consumer_supplies = pvdd_3v3_consumers,
  527. .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
  528. };
  529. static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
  530. .wm831x_num = 2,
  531. .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
  532. .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
  533. .gpio_defaults = {
  534. /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
  535. [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  536. [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  537. [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  538. },
  539. .dcdc = {
  540. &pvdd_1v2, /* DCDC1 */
  541. &pvdd_1v8, /* DCDC2 */
  542. &pvdd_3v3, /* DCDC3 */
  543. },
  544. .disable_touch = true,
  545. };
  546. static struct i2c_board_info i2c_devs1[] __initdata = {
  547. { I2C_BOARD_INFO("wm8311", 0x34),
  548. .irq = S3C_EINT(0),
  549. .platform_data = &glenfarclas_pmic_pdata },
  550. { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
  551. { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
  552. { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
  553. { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
  554. };
  555. static void __init crag6410_map_io(void)
  556. {
  557. s3c64xx_init_io(NULL, 0);
  558. s3c24xx_init_clocks(12000000);
  559. s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
  560. /* LCD type and Bypass set by bootloader */
  561. }
  562. static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
  563. .max_width = 4,
  564. .cd_type = S3C_SDHCI_CD_PERMANENT,
  565. };
  566. static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
  567. .max_width = 4,
  568. .cd_type = S3C_SDHCI_CD_GPIO,
  569. .ext_cd_gpio = S3C64XX_GPF(11),
  570. };
  571. static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
  572. {
  573. /* Set all the necessary GPG pins to special-function 2 */
  574. s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
  575. /* force card-detected for prototype 0 */
  576. s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
  577. }
  578. static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
  579. .max_width = 4,
  580. .cd_type = S3C_SDHCI_CD_INTERNAL,
  581. .cfg_gpio = crag6410_cfg_sdhci0,
  582. };
  583. static void __init crag6410_machine_init(void)
  584. {
  585. /* Open drain IRQs need pullups */
  586. s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
  587. s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
  588. gpio_request(S3C64XX_GPB(0), "LCD power");
  589. gpio_direction_output(S3C64XX_GPB(0), 0);
  590. gpio_request(S3C64XX_GPF(14), "LCD PWM");
  591. gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
  592. gpio_request(S3C64XX_GPB(1), "SD power");
  593. gpio_direction_output(S3C64XX_GPB(1), 0);
  594. gpio_request(S3C64XX_GPF(10), "nRESETSEL");
  595. gpio_direction_output(S3C64XX_GPF(10), 1);
  596. s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
  597. s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
  598. s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
  599. s3c_i2c0_set_platdata(&i2c0_pdata);
  600. s3c_i2c1_set_platdata(NULL);
  601. s3c_fb_set_platdata(&crag6410_lcd_pdata);
  602. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  603. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  604. samsung_keypad_set_platdata(&crag6410_keypad_data);
  605. platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
  606. regulator_has_full_constraints();
  607. s3c_pm_init();
  608. }
  609. MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
  610. /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
  611. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  612. .init_irq = s3c6410_init_irq,
  613. .map_io = crag6410_map_io,
  614. .init_machine = crag6410_machine_init,
  615. .timer = &s3c24xx_timer,
  616. MACHINE_END