mt9v011.c 16 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/slab.h>
  9. #include <linux/videodev2.h>
  10. #include <linux/delay.h>
  11. #include <asm/div64.h>
  12. #include <media/v4l2-device.h>
  13. #include <media/v4l2-chip-ident.h>
  14. #include <media/mt9v011.h>
  15. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  16. MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
  17. MODULE_LICENSE("GPL");
  18. static int debug;
  19. module_param(debug, int, 0);
  20. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  21. #define R00_MT9V011_CHIP_VERSION 0x00
  22. #define R01_MT9V011_ROWSTART 0x01
  23. #define R02_MT9V011_COLSTART 0x02
  24. #define R03_MT9V011_HEIGHT 0x03
  25. #define R04_MT9V011_WIDTH 0x04
  26. #define R05_MT9V011_HBLANK 0x05
  27. #define R06_MT9V011_VBLANK 0x06
  28. #define R07_MT9V011_OUT_CTRL 0x07
  29. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  30. #define R0A_MT9V011_CLK_SPEED 0x0a
  31. #define R0B_MT9V011_RESTART 0x0b
  32. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  33. #define R0D_MT9V011_RESET 0x0d
  34. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  35. #define R20_MT9V011_READ_MODE 0x20
  36. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  37. #define R2C_MT9V011_BLUE_GAIN 0x2c
  38. #define R2D_MT9V011_RED_GAIN 0x2d
  39. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  40. #define R35_MT9V011_GLOBAL_GAIN 0x35
  41. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  42. #define MT9V011_VERSION 0x8232
  43. #define MT9V011_REV_B_VERSION 0x8243
  44. /* supported controls */
  45. static struct v4l2_queryctrl mt9v011_qctrl[] = {
  46. {
  47. .id = V4L2_CID_GAIN,
  48. .type = V4L2_CTRL_TYPE_INTEGER,
  49. .name = "Gain",
  50. .minimum = 0,
  51. .maximum = (1 << 10) - 1,
  52. .step = 1,
  53. .default_value = 0x0020,
  54. .flags = 0,
  55. }, {
  56. .id = V4L2_CID_EXPOSURE,
  57. .type = V4L2_CTRL_TYPE_INTEGER,
  58. .name = "Exposure",
  59. .minimum = 0,
  60. .maximum = 2047,
  61. .step = 1,
  62. .default_value = 0x01fc,
  63. .flags = 0,
  64. }, {
  65. .id = V4L2_CID_RED_BALANCE,
  66. .type = V4L2_CTRL_TYPE_INTEGER,
  67. .name = "Red Balance",
  68. .minimum = -1 << 9,
  69. .maximum = (1 << 9) - 1,
  70. .step = 1,
  71. .default_value = 0,
  72. .flags = 0,
  73. }, {
  74. .id = V4L2_CID_BLUE_BALANCE,
  75. .type = V4L2_CTRL_TYPE_INTEGER,
  76. .name = "Blue Balance",
  77. .minimum = -1 << 9,
  78. .maximum = (1 << 9) - 1,
  79. .step = 1,
  80. .default_value = 0,
  81. .flags = 0,
  82. }, {
  83. .id = V4L2_CID_HFLIP,
  84. .type = V4L2_CTRL_TYPE_BOOLEAN,
  85. .name = "Mirror",
  86. .minimum = 0,
  87. .maximum = 1,
  88. .step = 1,
  89. .default_value = 0,
  90. .flags = 0,
  91. }, {
  92. .id = V4L2_CID_VFLIP,
  93. .type = V4L2_CTRL_TYPE_BOOLEAN,
  94. .name = "Vflip",
  95. .minimum = 0,
  96. .maximum = 1,
  97. .step = 1,
  98. .default_value = 0,
  99. .flags = 0,
  100. }, {
  101. }
  102. };
  103. struct mt9v011 {
  104. struct v4l2_subdev sd;
  105. unsigned width, height;
  106. unsigned xtal;
  107. unsigned hflip:1;
  108. unsigned vflip:1;
  109. u16 global_gain, exposure, red_bal, blue_bal;
  110. };
  111. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  112. {
  113. return container_of(sd, struct mt9v011, sd);
  114. }
  115. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  116. {
  117. struct i2c_client *c = v4l2_get_subdevdata(sd);
  118. __be16 buffer;
  119. int rc, val;
  120. rc = i2c_master_send(c, &addr, 1);
  121. if (rc != 1)
  122. v4l2_dbg(0, debug, sd,
  123. "i2c i/o error: rc == %d (should be 1)\n", rc);
  124. msleep(10);
  125. rc = i2c_master_recv(c, (char *)&buffer, 2);
  126. if (rc != 2)
  127. v4l2_dbg(0, debug, sd,
  128. "i2c i/o error: rc == %d (should be 2)\n", rc);
  129. val = be16_to_cpu(buffer);
  130. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  131. return val;
  132. }
  133. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  134. u16 value)
  135. {
  136. struct i2c_client *c = v4l2_get_subdevdata(sd);
  137. unsigned char buffer[3];
  138. int rc;
  139. buffer[0] = addr;
  140. buffer[1] = value >> 8;
  141. buffer[2] = value & 0xff;
  142. v4l2_dbg(2, debug, sd,
  143. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  144. rc = i2c_master_send(c, buffer, 3);
  145. if (rc != 3)
  146. v4l2_dbg(0, debug, sd,
  147. "i2c i/o error: rc == %d (should be 3)\n", rc);
  148. }
  149. struct i2c_reg_value {
  150. unsigned char reg;
  151. u16 value;
  152. };
  153. /*
  154. * Values used at the original driver
  155. * Some values are marked as Reserved at the datasheet
  156. */
  157. static const struct i2c_reg_value mt9v011_init_default[] = {
  158. { R0D_MT9V011_RESET, 0x0001 },
  159. { R0D_MT9V011_RESET, 0x0000 },
  160. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  161. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  162. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  163. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  164. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  165. };
  166. static void set_balance(struct v4l2_subdev *sd)
  167. {
  168. struct mt9v011 *core = to_mt9v011(sd);
  169. u16 green1_gain, green2_gain, blue_gain, red_gain;
  170. u16 exposure;
  171. exposure = core->exposure;
  172. green1_gain = core->global_gain;
  173. green2_gain = core->global_gain;
  174. blue_gain = core->global_gain +
  175. core->global_gain * core->blue_bal / (1 << 9);
  176. red_gain = core->global_gain +
  177. core->global_gain * core->blue_bal / (1 << 9);
  178. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
  179. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
  180. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  181. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  182. mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
  183. }
  184. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  185. {
  186. struct mt9v011 *core = to_mt9v011(sd);
  187. unsigned height, width, hblank, vblank, speed;
  188. unsigned row_time, t_time;
  189. u64 frames_per_ms;
  190. unsigned tmp;
  191. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  192. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  193. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  194. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  195. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  196. row_time = (width + 113 + hblank) * (speed + 2);
  197. t_time = row_time * (height + vblank + 1);
  198. frames_per_ms = core->xtal * 1000l;
  199. do_div(frames_per_ms, t_time);
  200. tmp = frames_per_ms;
  201. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  202. tmp / 1000, tmp % 1000, t_time);
  203. if (numerator && denominator) {
  204. *numerator = 1000;
  205. *denominator = (u32)frames_per_ms;
  206. }
  207. }
  208. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  209. {
  210. struct mt9v011 *core = to_mt9v011(sd);
  211. unsigned height, width, hblank, vblank;
  212. unsigned row_time, line_time;
  213. u64 t_time, speed;
  214. /* Avoid bogus calculus */
  215. if (!numerator || !denominator)
  216. return 0;
  217. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  218. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  219. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  220. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  221. row_time = width + 113 + hblank;
  222. line_time = height + vblank + 1;
  223. t_time = core->xtal * ((u64)numerator);
  224. /* round to the closest value */
  225. t_time += denominator / 2;
  226. do_div(t_time, denominator);
  227. speed = t_time;
  228. do_div(speed, row_time * line_time);
  229. /* Avoid having a negative value for speed */
  230. if (speed < 2)
  231. speed = 0;
  232. else
  233. speed -= 2;
  234. /* Avoid speed overflow */
  235. if (speed > 15)
  236. return 15;
  237. return (u16)speed;
  238. }
  239. static void set_res(struct v4l2_subdev *sd)
  240. {
  241. struct mt9v011 *core = to_mt9v011(sd);
  242. unsigned vstart, hstart;
  243. /*
  244. * The mt9v011 doesn't have scaling. So, in order to select the desired
  245. * resolution, we're cropping at the middle of the sensor.
  246. * hblank and vblank should be adjusted, in order to warrant that
  247. * we'll preserve the line timings for 30 fps, no matter what resolution
  248. * is selected.
  249. * NOTE: datasheet says that width (and height) should be filled with
  250. * width-1. However, this doesn't work, since one pixel per line will
  251. * be missing.
  252. */
  253. hstart = 20 + (640 - core->width) / 2;
  254. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  255. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  256. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  257. vstart = 8 + (480 - core->height) / 2;
  258. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  259. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  260. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  261. calc_fps(sd, NULL, NULL);
  262. };
  263. static void set_read_mode(struct v4l2_subdev *sd)
  264. {
  265. struct mt9v011 *core = to_mt9v011(sd);
  266. unsigned mode = 0x1000;
  267. if (core->hflip)
  268. mode |= 0x4000;
  269. if (core->vflip)
  270. mode |= 0x8000;
  271. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  272. }
  273. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  274. {
  275. int i;
  276. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  277. mt9v011_write(sd, mt9v011_init_default[i].reg,
  278. mt9v011_init_default[i].value);
  279. set_balance(sd);
  280. set_res(sd);
  281. set_read_mode(sd);
  282. return 0;
  283. };
  284. static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  285. {
  286. struct mt9v011 *core = to_mt9v011(sd);
  287. v4l2_dbg(1, debug, sd, "g_ctrl called\n");
  288. switch (ctrl->id) {
  289. case V4L2_CID_GAIN:
  290. ctrl->value = core->global_gain;
  291. return 0;
  292. case V4L2_CID_EXPOSURE:
  293. ctrl->value = core->exposure;
  294. return 0;
  295. case V4L2_CID_RED_BALANCE:
  296. ctrl->value = core->red_bal;
  297. return 0;
  298. case V4L2_CID_BLUE_BALANCE:
  299. ctrl->value = core->blue_bal;
  300. return 0;
  301. case V4L2_CID_HFLIP:
  302. ctrl->value = core->hflip ? 1 : 0;
  303. return 0;
  304. case V4L2_CID_VFLIP:
  305. ctrl->value = core->vflip ? 1 : 0;
  306. return 0;
  307. }
  308. return -EINVAL;
  309. }
  310. static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  311. {
  312. int i;
  313. v4l2_dbg(1, debug, sd, "queryctrl called\n");
  314. for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
  315. if (qc->id && qc->id == mt9v011_qctrl[i].id) {
  316. memcpy(qc, &(mt9v011_qctrl[i]),
  317. sizeof(*qc));
  318. return 0;
  319. }
  320. return -EINVAL;
  321. }
  322. static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  323. {
  324. struct mt9v011 *core = to_mt9v011(sd);
  325. u8 i, n;
  326. n = ARRAY_SIZE(mt9v011_qctrl);
  327. for (i = 0; i < n; i++) {
  328. if (ctrl->id != mt9v011_qctrl[i].id)
  329. continue;
  330. if (ctrl->value < mt9v011_qctrl[i].minimum ||
  331. ctrl->value > mt9v011_qctrl[i].maximum)
  332. return -ERANGE;
  333. v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
  334. ctrl->id, ctrl->value);
  335. break;
  336. }
  337. switch (ctrl->id) {
  338. case V4L2_CID_GAIN:
  339. core->global_gain = ctrl->value;
  340. break;
  341. case V4L2_CID_EXPOSURE:
  342. core->exposure = ctrl->value;
  343. break;
  344. case V4L2_CID_RED_BALANCE:
  345. core->red_bal = ctrl->value;
  346. break;
  347. case V4L2_CID_BLUE_BALANCE:
  348. core->blue_bal = ctrl->value;
  349. break;
  350. case V4L2_CID_HFLIP:
  351. core->hflip = ctrl->value;
  352. set_read_mode(sd);
  353. return 0;
  354. case V4L2_CID_VFLIP:
  355. core->vflip = ctrl->value;
  356. set_read_mode(sd);
  357. return 0;
  358. default:
  359. return -EINVAL;
  360. }
  361. set_balance(sd);
  362. return 0;
  363. }
  364. static int mt9v011_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
  365. enum v4l2_mbus_pixelcode *code)
  366. {
  367. if (index > 0)
  368. return -EINVAL;
  369. *code = V4L2_MBUS_FMT_SGRBG8_1X8;
  370. return 0;
  371. }
  372. static int mt9v011_try_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  373. {
  374. if (fmt->code != V4L2_MBUS_FMT_SGRBG8_1X8)
  375. return -EINVAL;
  376. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  377. &fmt->height, 32, 480, 1, 0);
  378. fmt->field = V4L2_FIELD_NONE;
  379. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  380. return 0;
  381. }
  382. static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  383. {
  384. struct v4l2_captureparm *cp = &parms->parm.capture;
  385. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  386. return -EINVAL;
  387. memset(cp, 0, sizeof(struct v4l2_captureparm));
  388. cp->capability = V4L2_CAP_TIMEPERFRAME;
  389. calc_fps(sd,
  390. &cp->timeperframe.numerator,
  391. &cp->timeperframe.denominator);
  392. return 0;
  393. }
  394. static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  395. {
  396. struct v4l2_captureparm *cp = &parms->parm.capture;
  397. struct v4l2_fract *tpf = &cp->timeperframe;
  398. u16 speed;
  399. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  400. return -EINVAL;
  401. if (cp->extendedmode != 0)
  402. return -EINVAL;
  403. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  404. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  405. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  406. /* Recalculate and update fps info */
  407. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  408. return 0;
  409. }
  410. static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  411. {
  412. struct mt9v011 *core = to_mt9v011(sd);
  413. int rc;
  414. rc = mt9v011_try_mbus_fmt(sd, fmt);
  415. if (rc < 0)
  416. return -EINVAL;
  417. core->width = fmt->width;
  418. core->height = fmt->height;
  419. set_res(sd);
  420. return 0;
  421. }
  422. #ifdef CONFIG_VIDEO_ADV_DEBUG
  423. static int mt9v011_g_register(struct v4l2_subdev *sd,
  424. struct v4l2_dbg_register *reg)
  425. {
  426. struct i2c_client *client = v4l2_get_subdevdata(sd);
  427. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  428. return -EINVAL;
  429. if (!capable(CAP_SYS_ADMIN))
  430. return -EPERM;
  431. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  432. reg->size = 2;
  433. return 0;
  434. }
  435. static int mt9v011_s_register(struct v4l2_subdev *sd,
  436. struct v4l2_dbg_register *reg)
  437. {
  438. struct i2c_client *client = v4l2_get_subdevdata(sd);
  439. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  440. return -EINVAL;
  441. if (!capable(CAP_SYS_ADMIN))
  442. return -EPERM;
  443. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  444. return 0;
  445. }
  446. #endif
  447. static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
  448. struct v4l2_dbg_chip_ident *chip)
  449. {
  450. u16 version;
  451. struct i2c_client *client = v4l2_get_subdevdata(sd);
  452. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  453. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
  454. version);
  455. }
  456. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  457. .queryctrl = mt9v011_queryctrl,
  458. .g_ctrl = mt9v011_g_ctrl,
  459. .s_ctrl = mt9v011_s_ctrl,
  460. .reset = mt9v011_reset,
  461. .g_chip_ident = mt9v011_g_chip_ident,
  462. #ifdef CONFIG_VIDEO_ADV_DEBUG
  463. .g_register = mt9v011_g_register,
  464. .s_register = mt9v011_s_register,
  465. #endif
  466. };
  467. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  468. .enum_mbus_fmt = mt9v011_enum_mbus_fmt,
  469. .try_mbus_fmt = mt9v011_try_mbus_fmt,
  470. .s_mbus_fmt = mt9v011_s_mbus_fmt,
  471. .g_parm = mt9v011_g_parm,
  472. .s_parm = mt9v011_s_parm,
  473. };
  474. static const struct v4l2_subdev_ops mt9v011_ops = {
  475. .core = &mt9v011_core_ops,
  476. .video = &mt9v011_video_ops,
  477. };
  478. /****************************************************************************
  479. I2C Client & Driver
  480. ****************************************************************************/
  481. static int mt9v011_probe(struct i2c_client *c,
  482. const struct i2c_device_id *id)
  483. {
  484. u16 version;
  485. struct mt9v011 *core;
  486. struct v4l2_subdev *sd;
  487. /* Check if the adapter supports the needed features */
  488. if (!i2c_check_functionality(c->adapter,
  489. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  490. return -EIO;
  491. core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
  492. if (!core)
  493. return -ENOMEM;
  494. sd = &core->sd;
  495. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  496. /* Check if the sensor is really a MT9V011 */
  497. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  498. if ((version != MT9V011_VERSION) &&
  499. (version != MT9V011_REV_B_VERSION)) {
  500. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  501. version);
  502. kfree(core);
  503. return -EINVAL;
  504. }
  505. core->global_gain = 0x0024;
  506. core->exposure = 0x01fc;
  507. core->width = 640;
  508. core->height = 480;
  509. core->xtal = 27000000; /* Hz */
  510. if (c->dev.platform_data) {
  511. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  512. core->xtal = pdata->xtal;
  513. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  514. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  515. }
  516. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  517. c->addr << 1, c->adapter->name, version);
  518. return 0;
  519. }
  520. static int mt9v011_remove(struct i2c_client *c)
  521. {
  522. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  523. v4l2_dbg(1, debug, sd,
  524. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  525. c->addr << 1);
  526. v4l2_device_unregister_subdev(sd);
  527. kfree(to_mt9v011(sd));
  528. return 0;
  529. }
  530. /* ----------------------------------------------------------------------- */
  531. static const struct i2c_device_id mt9v011_id[] = {
  532. { "mt9v011", 0 },
  533. { }
  534. };
  535. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  536. static struct i2c_driver mt9v011_driver = {
  537. .driver = {
  538. .owner = THIS_MODULE,
  539. .name = "mt9v011",
  540. },
  541. .probe = mt9v011_probe,
  542. .remove = mt9v011_remove,
  543. .id_table = mt9v011_id,
  544. };
  545. static __init int init_mt9v011(void)
  546. {
  547. return i2c_add_driver(&mt9v011_driver);
  548. }
  549. static __exit void exit_mt9v011(void)
  550. {
  551. i2c_del_driver(&mt9v011_driver);
  552. }
  553. module_init(init_mt9v011);
  554. module_exit(exit_mt9v011);