p54common.c 29 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. static struct ieee80211_rate p54_rates[] = {
  25. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  26. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 60, .hw_value = 4, },
  30. { .bitrate = 90, .hw_value = 5, },
  31. { .bitrate = 120, .hw_value = 6, },
  32. { .bitrate = 180, .hw_value = 7, },
  33. { .bitrate = 240, .hw_value = 8, },
  34. { .bitrate = 360, .hw_value = 9, },
  35. { .bitrate = 480, .hw_value = 10, },
  36. { .bitrate = 540, .hw_value = 11, },
  37. };
  38. static struct ieee80211_channel p54_channels[] = {
  39. { .center_freq = 2412, .hw_value = 1, },
  40. { .center_freq = 2417, .hw_value = 2, },
  41. { .center_freq = 2422, .hw_value = 3, },
  42. { .center_freq = 2427, .hw_value = 4, },
  43. { .center_freq = 2432, .hw_value = 5, },
  44. { .center_freq = 2437, .hw_value = 6, },
  45. { .center_freq = 2442, .hw_value = 7, },
  46. { .center_freq = 2447, .hw_value = 8, },
  47. { .center_freq = 2452, .hw_value = 9, },
  48. { .center_freq = 2457, .hw_value = 10, },
  49. { .center_freq = 2462, .hw_value = 11, },
  50. { .center_freq = 2467, .hw_value = 12, },
  51. { .center_freq = 2472, .hw_value = 13, },
  52. { .center_freq = 2484, .hw_value = 14, },
  53. };
  54. static struct ieee80211_supported_band band_2GHz = {
  55. .channels = p54_channels,
  56. .n_channels = ARRAY_SIZE(p54_channels),
  57. .bitrates = p54_rates,
  58. .n_bitrates = ARRAY_SIZE(p54_rates),
  59. };
  60. void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  61. {
  62. struct p54_common *priv = dev->priv;
  63. struct bootrec_exp_if *exp_if;
  64. struct bootrec *bootrec;
  65. u32 *data = (u32 *)fw->data;
  66. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  67. u8 *fw_version = NULL;
  68. size_t len;
  69. int i;
  70. if (priv->rx_start)
  71. return;
  72. while (data < end_data && *data)
  73. data++;
  74. while (data < end_data && !*data)
  75. data++;
  76. bootrec = (struct bootrec *) data;
  77. while (bootrec->data <= end_data &&
  78. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  79. u32 code = le32_to_cpu(bootrec->code);
  80. switch (code) {
  81. case BR_CODE_COMPONENT_ID:
  82. switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
  83. case FW_FMAC:
  84. printk(KERN_INFO "p54: FreeMAC firmware\n");
  85. break;
  86. case FW_LM20:
  87. printk(KERN_INFO "p54: LM20 firmware\n");
  88. break;
  89. case FW_LM86:
  90. printk(KERN_INFO "p54: LM86 firmware\n");
  91. break;
  92. case FW_LM87:
  93. printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
  94. break;
  95. default:
  96. printk(KERN_INFO "p54: unknown firmware\n");
  97. break;
  98. }
  99. break;
  100. case BR_CODE_COMPONENT_VERSION:
  101. /* 24 bytes should be enough for all firmwares */
  102. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  103. fw_version = (unsigned char*)bootrec->data;
  104. break;
  105. case BR_CODE_DESCR:
  106. priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
  107. /* FIXME add sanity checking */
  108. priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
  109. break;
  110. case BR_CODE_EXPOSED_IF:
  111. exp_if = (struct bootrec_exp_if *) bootrec->data;
  112. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  113. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  114. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  115. break;
  116. case BR_CODE_DEPENDENT_IF:
  117. break;
  118. case BR_CODE_END_OF_BRA:
  119. case LEGACY_BR_CODE_END_OF_BRA:
  120. end_data = NULL;
  121. break;
  122. default:
  123. break;
  124. }
  125. bootrec = (struct bootrec *)&bootrec->data[len];
  126. }
  127. if (fw_version)
  128. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  129. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  130. if (priv->fw_var >= 0x300) {
  131. /* Firmware supports QoS, use it! */
  132. priv->tx_stats.data[0].limit = 3;
  133. priv->tx_stats.data[1].limit = 4;
  134. priv->tx_stats.data[2].limit = 3;
  135. priv->tx_stats.data[3].limit = 1;
  136. dev->queues = 4;
  137. }
  138. }
  139. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  140. static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
  141. struct pda_pa_curve_data *curve_data)
  142. {
  143. struct p54_common *priv = dev->priv;
  144. struct pda_pa_curve_data_sample_rev1 *rev1;
  145. struct pda_pa_curve_data_sample_rev0 *rev0;
  146. size_t cd_len = sizeof(*curve_data) +
  147. (curve_data->points_per_channel*sizeof(*rev1) + 2) *
  148. curve_data->channels;
  149. unsigned int i, j;
  150. void *source, *target;
  151. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  152. if (!priv->curve_data)
  153. return -ENOMEM;
  154. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  155. source = curve_data->data;
  156. target = priv->curve_data->data;
  157. for (i = 0; i < curve_data->channels; i++) {
  158. __le16 *freq = source;
  159. source += sizeof(__le16);
  160. *((__le16 *)target) = *freq;
  161. target += sizeof(__le16);
  162. for (j = 0; j < curve_data->points_per_channel; j++) {
  163. rev1 = target;
  164. rev0 = source;
  165. rev1->rf_power = rev0->rf_power;
  166. rev1->pa_detector = rev0->pa_detector;
  167. rev1->data_64qam = rev0->pcv;
  168. /* "invent" the points for the other modulations */
  169. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  170. rev1->data_16qam = SUB(rev0->pcv, 12);
  171. rev1->data_qpsk = SUB(rev1->data_16qam, 12);
  172. rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
  173. rev1->data_barker= SUB(rev1->data_bpsk, 14);
  174. #undef SUB
  175. target += sizeof(*rev1);
  176. source += sizeof(*rev0);
  177. }
  178. }
  179. return 0;
  180. }
  181. int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  182. {
  183. struct p54_common *priv = dev->priv;
  184. struct eeprom_pda_wrap *wrap = NULL;
  185. struct pda_entry *entry;
  186. int i = 0;
  187. unsigned int data_len, entry_len;
  188. void *tmp;
  189. int err;
  190. wrap = (struct eeprom_pda_wrap *) eeprom;
  191. entry = (void *)wrap->data + wrap->len;
  192. i += 2;
  193. i += le16_to_cpu(entry->len)*2;
  194. while (i < len) {
  195. entry_len = le16_to_cpu(entry->len);
  196. data_len = ((entry_len - 1) << 1);
  197. switch (le16_to_cpu(entry->code)) {
  198. case PDR_MAC_ADDRESS:
  199. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  200. break;
  201. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  202. if (data_len < 2) {
  203. err = -EINVAL;
  204. goto err;
  205. }
  206. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  207. err = -EINVAL;
  208. goto err;
  209. }
  210. priv->output_limit = kmalloc(entry->data[1] *
  211. sizeof(*priv->output_limit), GFP_KERNEL);
  212. if (!priv->output_limit) {
  213. err = -ENOMEM;
  214. goto err;
  215. }
  216. memcpy(priv->output_limit, &entry->data[2],
  217. entry->data[1]*sizeof(*priv->output_limit));
  218. priv->output_limit_len = entry->data[1];
  219. break;
  220. case PDR_PRISM_PA_CAL_CURVE_DATA:
  221. if (data_len < sizeof(struct pda_pa_curve_data)) {
  222. err = -EINVAL;
  223. goto err;
  224. }
  225. if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
  226. priv->curve_data = kmalloc(data_len, GFP_KERNEL);
  227. if (!priv->curve_data) {
  228. err = -ENOMEM;
  229. goto err;
  230. }
  231. memcpy(priv->curve_data, entry->data, data_len);
  232. } else {
  233. err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
  234. if (err)
  235. goto err;
  236. }
  237. break;
  238. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  239. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  240. if (!priv->iq_autocal) {
  241. err = -ENOMEM;
  242. goto err;
  243. }
  244. memcpy(priv->iq_autocal, entry->data, data_len);
  245. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  246. break;
  247. case PDR_INTERFACE_LIST:
  248. tmp = entry->data;
  249. while ((u8 *)tmp < entry->data + data_len) {
  250. struct bootrec_exp_if *exp_if = tmp;
  251. if (le16_to_cpu(exp_if->if_id) == 0xF)
  252. priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
  253. tmp += sizeof(struct bootrec_exp_if);
  254. }
  255. break;
  256. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  257. priv->version = *(u8 *)(entry->data + 1);
  258. break;
  259. case PDR_END:
  260. i = len;
  261. break;
  262. default:
  263. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  264. le16_to_cpu(entry->code));
  265. break;
  266. }
  267. entry = (void *)entry + (entry_len + 1)*2;
  268. i += 2;
  269. i += entry_len*2;
  270. }
  271. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  272. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  273. err = -EINVAL;
  274. goto err;
  275. }
  276. return 0;
  277. err:
  278. if (priv->iq_autocal) {
  279. kfree(priv->iq_autocal);
  280. priv->iq_autocal = NULL;
  281. }
  282. if (priv->output_limit) {
  283. kfree(priv->output_limit);
  284. priv->output_limit = NULL;
  285. }
  286. if (priv->curve_data) {
  287. kfree(priv->curve_data);
  288. priv->curve_data = NULL;
  289. }
  290. printk(KERN_ERR "p54: eeprom parse failed!\n");
  291. return err;
  292. }
  293. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  294. void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
  295. {
  296. struct p54_eeprom_lm86 *eeprom_hdr;
  297. hdr->magic1 = cpu_to_le16(0x8000);
  298. hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
  299. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  300. hdr->retry1 = hdr->retry2 = 0;
  301. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  302. eeprom_hdr->offset = 0x0;
  303. eeprom_hdr->len = cpu_to_le16(0x2000);
  304. }
  305. EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
  306. static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  307. {
  308. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  309. struct ieee80211_rx_status rx_status = {0};
  310. u16 freq = le16_to_cpu(hdr->freq);
  311. rx_status.ssi = hdr->rssi;
  312. /* XX correct? */
  313. rx_status.rate_idx = hdr->rate & 0xf;
  314. rx_status.freq = freq;
  315. rx_status.band = IEEE80211_BAND_2GHZ;
  316. rx_status.antenna = hdr->antenna;
  317. rx_status.mactime = le64_to_cpu(hdr->timestamp);
  318. rx_status.flag |= RX_FLAG_TSFT;
  319. skb_pull(skb, sizeof(*hdr));
  320. skb_trim(skb, le16_to_cpu(hdr->len));
  321. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  322. }
  323. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  324. {
  325. struct p54_common *priv = dev->priv;
  326. int i;
  327. /* ieee80211_start_queues is great if all queues are really empty.
  328. * But, what if some are full? */
  329. for (i = 0; i < dev->queues; i++)
  330. if (priv->tx_stats.data[i].len < priv->tx_stats.data[i].limit)
  331. ieee80211_wake_queue(dev, i);
  332. }
  333. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  334. {
  335. struct p54_common *priv = dev->priv;
  336. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  337. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  338. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  339. u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
  340. struct memrecord *range = NULL;
  341. u32 freed = 0;
  342. u32 last_addr = priv->rx_start;
  343. while (entry != (struct sk_buff *)&priv->tx_queue) {
  344. range = (struct memrecord *)&entry->cb;
  345. if (range->start_addr == addr) {
  346. struct ieee80211_tx_status status;
  347. struct p54_control_hdr *entry_hdr;
  348. struct p54_tx_control_allocdata *entry_data;
  349. int pad = 0;
  350. if (entry->next != (struct sk_buff *)&priv->tx_queue)
  351. freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
  352. else
  353. freed = priv->rx_end - last_addr;
  354. last_addr = range->end_addr;
  355. __skb_unlink(entry, &priv->tx_queue);
  356. if (!range->control) {
  357. kfree_skb(entry);
  358. break;
  359. }
  360. memset(&status, 0, sizeof(status));
  361. memcpy(&status.control, range->control,
  362. sizeof(status.control));
  363. kfree(range->control);
  364. priv->tx_stats.data[status.control.queue].len--;
  365. entry_hdr = (struct p54_control_hdr *) entry->data;
  366. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  367. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  368. pad = entry_data->align[0];
  369. if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
  370. if (!(payload->status & 0x01))
  371. status.flags |= IEEE80211_TX_STATUS_ACK;
  372. else
  373. status.excessive_retries = 1;
  374. }
  375. status.retry_count = payload->retries - 1;
  376. status.ack_signal = le16_to_cpu(payload->ack_rssi);
  377. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  378. ieee80211_tx_status_irqsafe(dev, entry, &status);
  379. break;
  380. } else
  381. last_addr = range->end_addr;
  382. entry = entry->next;
  383. }
  384. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  385. sizeof(struct p54_control_hdr))
  386. p54_wake_free_queues(dev);
  387. }
  388. static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  389. {
  390. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  391. switch (le16_to_cpu(hdr->type)) {
  392. case P54_CONTROL_TYPE_TXDONE:
  393. p54_rx_frame_sent(dev, skb);
  394. break;
  395. case P54_CONTROL_TYPE_BBP:
  396. break;
  397. default:
  398. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  399. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  400. break;
  401. }
  402. }
  403. /* returns zero if skb can be reused */
  404. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  405. {
  406. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  407. switch (type) {
  408. case 0x00:
  409. case 0x01:
  410. p54_rx_data(dev, skb);
  411. return -1;
  412. case 0x4d:
  413. /* TODO: do something better... but then again, I've never seen this happen */
  414. printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
  415. wiphy_name(dev->wiphy));
  416. break;
  417. case 0x80:
  418. p54_rx_control(dev, skb);
  419. break;
  420. default:
  421. printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
  422. wiphy_name(dev->wiphy), type);
  423. break;
  424. }
  425. return 0;
  426. }
  427. EXPORT_SYMBOL_GPL(p54_rx);
  428. /*
  429. * So, the firmware is somewhat stupid and doesn't know what places in its
  430. * memory incoming data should go to. By poking around in the firmware, we
  431. * can find some unused memory to upload our packets to. However, data that we
  432. * want the card to TX needs to stay intact until the card has told us that
  433. * it is done with it. This function finds empty places we can upload to and
  434. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  435. * allocated areas.
  436. */
  437. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  438. struct p54_control_hdr *data, u32 len,
  439. struct ieee80211_tx_control *control)
  440. {
  441. struct p54_common *priv = dev->priv;
  442. struct sk_buff *entry = priv->tx_queue.next;
  443. struct sk_buff *target_skb = NULL;
  444. struct memrecord *range;
  445. u32 last_addr = priv->rx_start;
  446. u32 largest_hole = 0;
  447. u32 target_addr = priv->rx_start;
  448. unsigned long flags;
  449. unsigned int left;
  450. len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
  451. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  452. left = skb_queue_len(&priv->tx_queue);
  453. while (left--) {
  454. u32 hole_size;
  455. range = (struct memrecord *)&entry->cb;
  456. hole_size = range->start_addr - last_addr;
  457. if (!target_skb && hole_size >= len) {
  458. target_skb = entry->prev;
  459. hole_size -= len;
  460. target_addr = last_addr;
  461. }
  462. largest_hole = max(largest_hole, hole_size);
  463. last_addr = range->end_addr;
  464. entry = entry->next;
  465. }
  466. if (!target_skb && priv->rx_end - last_addr >= len) {
  467. target_skb = priv->tx_queue.prev;
  468. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  469. if (!skb_queue_empty(&priv->tx_queue)) {
  470. range = (struct memrecord *)&target_skb->cb;
  471. target_addr = range->end_addr;
  472. }
  473. } else
  474. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  475. if (skb) {
  476. range = (struct memrecord *)&skb->cb;
  477. range->start_addr = target_addr;
  478. range->end_addr = target_addr + len;
  479. range->control = control;
  480. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  481. if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  482. sizeof(struct p54_control_hdr))
  483. ieee80211_stop_queues(dev);
  484. }
  485. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  486. data->req_id = cpu_to_le32(target_addr + 0x70);
  487. }
  488. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
  489. struct ieee80211_tx_control *control)
  490. {
  491. struct ieee80211_tx_queue_stats_data *current_queue;
  492. struct p54_common *priv = dev->priv;
  493. struct p54_control_hdr *hdr;
  494. struct p54_tx_control_allocdata *txhdr;
  495. struct ieee80211_tx_control *control_copy;
  496. size_t padding, len;
  497. u8 rate;
  498. current_queue = &priv->tx_stats.data[control->queue];
  499. if (unlikely(current_queue->len > current_queue->limit))
  500. return NETDEV_TX_BUSY;
  501. current_queue->len++;
  502. current_queue->count++;
  503. if (current_queue->len == current_queue->limit)
  504. ieee80211_stop_queue(dev, control->queue);
  505. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  506. len = skb->len;
  507. control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
  508. if (control_copy)
  509. memcpy(control_copy, control, sizeof(*control));
  510. txhdr = (struct p54_tx_control_allocdata *)
  511. skb_push(skb, sizeof(*txhdr) + padding);
  512. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  513. if (padding)
  514. hdr->magic1 = cpu_to_le16(0x4010);
  515. else
  516. hdr->magic1 = cpu_to_le16(0x0010);
  517. hdr->len = cpu_to_le16(len);
  518. hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
  519. hdr->retry1 = hdr->retry2 = control->retry_limit;
  520. p54_assign_address(dev, skb, hdr, skb->len, control_copy);
  521. memset(txhdr->wep_key, 0x0, 16);
  522. txhdr->padding = 0;
  523. txhdr->padding2 = 0;
  524. /* TODO: add support for alternate retry TX rates */
  525. rate = control->tx_rate->hw_value;
  526. if (control->flags & IEEE80211_TXCTL_SHORT_PREAMBLE)
  527. rate |= 0x10;
  528. if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
  529. rate |= 0x40;
  530. else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
  531. rate |= 0x20;
  532. memset(txhdr->rateset, rate, 8);
  533. txhdr->wep_key_present = 0;
  534. txhdr->wep_key_len = 0;
  535. txhdr->frame_type = cpu_to_le32(control->queue + 4);
  536. txhdr->magic4 = 0;
  537. txhdr->antenna = (control->antenna_sel_tx == 0) ?
  538. 2 : control->antenna_sel_tx - 1;
  539. txhdr->output_power = 0x7f; // HW Maximum
  540. txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
  541. 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
  542. if (padding)
  543. txhdr->align[0] = padding;
  544. priv->tx(dev, hdr, skb->len, 0);
  545. return 0;
  546. }
  547. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  548. const u8 *dst, const u8 *src, u8 antenna,
  549. u32 magic3, u32 magic8, u32 magic9)
  550. {
  551. struct p54_common *priv = dev->priv;
  552. struct p54_control_hdr *hdr;
  553. struct p54_tx_control_filter *filter;
  554. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  555. priv->tx_hdr_len, GFP_ATOMIC);
  556. if (!hdr)
  557. return -ENOMEM;
  558. hdr = (void *)hdr + priv->tx_hdr_len;
  559. filter = (struct p54_tx_control_filter *) hdr->data;
  560. hdr->magic1 = cpu_to_le16(0x8001);
  561. hdr->len = cpu_to_le16(sizeof(*filter));
  562. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
  563. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  564. filter->filter_type = cpu_to_le16(filter_type);
  565. memcpy(filter->dst, dst, ETH_ALEN);
  566. if (!src)
  567. memset(filter->src, ~0, ETH_ALEN);
  568. else
  569. memcpy(filter->src, src, ETH_ALEN);
  570. filter->antenna = antenna;
  571. filter->magic3 = cpu_to_le32(magic3);
  572. filter->rx_addr = cpu_to_le32(priv->rx_end);
  573. filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
  574. filter->rxhw = priv->rxhw;
  575. filter->magic8 = cpu_to_le16(magic8);
  576. filter->magic9 = cpu_to_le16(magic9);
  577. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
  578. return 0;
  579. }
  580. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  581. {
  582. struct p54_common *priv = dev->priv;
  583. struct p54_control_hdr *hdr;
  584. struct p54_tx_control_channel *chan;
  585. unsigned int i;
  586. size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
  587. sizeof(*chan->curve_data) *
  588. priv->curve_data->points_per_channel;
  589. void *entry;
  590. hdr = kzalloc(sizeof(*hdr) + payload_len +
  591. priv->tx_hdr_len, GFP_KERNEL);
  592. if (!hdr)
  593. return -ENOMEM;
  594. hdr = (void *)hdr + priv->tx_hdr_len;
  595. chan = (struct p54_tx_control_channel *) hdr->data;
  596. hdr->magic1 = cpu_to_le16(0x8001);
  597. hdr->len = cpu_to_le16(sizeof(*chan));
  598. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  599. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
  600. chan->magic1 = cpu_to_le16(0x1);
  601. chan->magic2 = cpu_to_le16(0x0);
  602. for (i = 0; i < priv->iq_autocal_len; i++) {
  603. if (priv->iq_autocal[i].freq != freq)
  604. continue;
  605. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  606. sizeof(*priv->iq_autocal));
  607. break;
  608. }
  609. if (i == priv->iq_autocal_len)
  610. goto err;
  611. for (i = 0; i < priv->output_limit_len; i++) {
  612. if (priv->output_limit[i].freq != freq)
  613. continue;
  614. chan->val_barker = 0x38;
  615. chan->val_bpsk = priv->output_limit[i].val_bpsk;
  616. chan->val_qpsk = priv->output_limit[i].val_qpsk;
  617. chan->val_16qam = priv->output_limit[i].val_16qam;
  618. chan->val_64qam = priv->output_limit[i].val_64qam;
  619. break;
  620. }
  621. if (i == priv->output_limit_len)
  622. goto err;
  623. chan->pa_points_per_curve = priv->curve_data->points_per_channel;
  624. entry = priv->curve_data->data;
  625. for (i = 0; i < priv->curve_data->channels; i++) {
  626. if (*((__le16 *)entry) != freq) {
  627. entry += sizeof(__le16);
  628. entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
  629. chan->pa_points_per_curve;
  630. continue;
  631. }
  632. entry += sizeof(__le16);
  633. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  634. chan->pa_points_per_curve);
  635. break;
  636. }
  637. memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
  638. priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
  639. return 0;
  640. err:
  641. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  642. kfree(hdr);
  643. return -EINVAL;
  644. }
  645. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  646. {
  647. struct p54_common *priv = dev->priv;
  648. struct p54_control_hdr *hdr;
  649. struct p54_tx_control_led *led;
  650. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  651. priv->tx_hdr_len, GFP_KERNEL);
  652. if (!hdr)
  653. return -ENOMEM;
  654. hdr = (void *)hdr + priv->tx_hdr_len;
  655. hdr->magic1 = cpu_to_le16(0x8001);
  656. hdr->len = cpu_to_le16(sizeof(*led));
  657. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  658. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
  659. led = (struct p54_tx_control_led *) hdr->data;
  660. led->mode = cpu_to_le16(mode);
  661. led->led_permanent = cpu_to_le16(link);
  662. led->led_temporary = cpu_to_le16(act);
  663. led->duration = cpu_to_le16(1000);
  664. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  665. return 0;
  666. }
  667. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  668. do { \
  669. queue.aifs = cpu_to_le16(ai_fs); \
  670. queue.cwmin = cpu_to_le16(cw_min); \
  671. queue.cwmax = cpu_to_le16(cw_max); \
  672. queue.txop = cpu_to_le16(_txop); \
  673. } while(0)
  674. static void p54_init_vdcf(struct ieee80211_hw *dev)
  675. {
  676. struct p54_common *priv = dev->priv;
  677. struct p54_control_hdr *hdr;
  678. struct p54_tx_control_vdcf *vdcf;
  679. /* all USB V1 adapters need a extra headroom */
  680. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  681. hdr->magic1 = cpu_to_le16(0x8001);
  682. hdr->len = cpu_to_le16(sizeof(*vdcf));
  683. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  684. hdr->req_id = cpu_to_le32(priv->rx_start);
  685. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  686. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
  687. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
  688. P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
  689. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
  690. }
  691. static void p54_set_vdcf(struct ieee80211_hw *dev)
  692. {
  693. struct p54_common *priv = dev->priv;
  694. struct p54_control_hdr *hdr;
  695. struct p54_tx_control_vdcf *vdcf;
  696. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  697. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
  698. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  699. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  700. vdcf->slottime = 9;
  701. vdcf->magic1 = 0x00;
  702. vdcf->magic2 = 0x10;
  703. } else {
  704. vdcf->slottime = 20;
  705. vdcf->magic1 = 0x0a;
  706. vdcf->magic2 = 0x06;
  707. }
  708. /* (see prism54/isl_oid.h for further details) */
  709. vdcf->frameburst = cpu_to_le16(0);
  710. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  711. }
  712. static int p54_start(struct ieee80211_hw *dev)
  713. {
  714. struct p54_common *priv = dev->priv;
  715. int err;
  716. err = priv->open(dev);
  717. if (!err)
  718. priv->mode = IEEE80211_IF_TYPE_MNTR;
  719. return err;
  720. }
  721. static void p54_stop(struct ieee80211_hw *dev)
  722. {
  723. struct p54_common *priv = dev->priv;
  724. struct sk_buff *skb;
  725. while ((skb = skb_dequeue(&priv->tx_queue))) {
  726. struct memrecord *range = (struct memrecord *)&skb->cb;
  727. if (range->control)
  728. kfree(range->control);
  729. kfree_skb(skb);
  730. }
  731. priv->stop(dev);
  732. priv->mode = IEEE80211_IF_TYPE_INVALID;
  733. }
  734. static int p54_add_interface(struct ieee80211_hw *dev,
  735. struct ieee80211_if_init_conf *conf)
  736. {
  737. struct p54_common *priv = dev->priv;
  738. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  739. return -EOPNOTSUPP;
  740. switch (conf->type) {
  741. case IEEE80211_IF_TYPE_STA:
  742. priv->mode = conf->type;
  743. break;
  744. default:
  745. return -EOPNOTSUPP;
  746. }
  747. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  748. p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
  749. p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
  750. switch (conf->type) {
  751. case IEEE80211_IF_TYPE_STA:
  752. p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
  753. break;
  754. default:
  755. BUG(); /* impossible */
  756. break;
  757. }
  758. p54_set_leds(dev, 1, 0, 0);
  759. return 0;
  760. }
  761. static void p54_remove_interface(struct ieee80211_hw *dev,
  762. struct ieee80211_if_init_conf *conf)
  763. {
  764. struct p54_common *priv = dev->priv;
  765. priv->mode = IEEE80211_IF_TYPE_MNTR;
  766. memset(priv->mac_addr, 0, ETH_ALEN);
  767. p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
  768. }
  769. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  770. {
  771. int ret;
  772. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  773. p54_set_vdcf(dev);
  774. return ret;
  775. }
  776. static int p54_config_interface(struct ieee80211_hw *dev,
  777. struct ieee80211_vif *vif,
  778. struct ieee80211_if_conf *conf)
  779. {
  780. struct p54_common *priv = dev->priv;
  781. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
  782. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
  783. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  784. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  785. return 0;
  786. }
  787. static void p54_configure_filter(struct ieee80211_hw *dev,
  788. unsigned int changed_flags,
  789. unsigned int *total_flags,
  790. int mc_count, struct dev_mc_list *mclist)
  791. {
  792. struct p54_common *priv = dev->priv;
  793. *total_flags &= FIF_BCN_PRBRESP_PROMISC;
  794. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  795. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  796. p54_set_filter(dev, 0, priv->mac_addr,
  797. NULL, 2, 0, 0, 0);
  798. else
  799. p54_set_filter(dev, 0, priv->mac_addr,
  800. priv->bssid, 2, 0, 0, 0);
  801. }
  802. }
  803. static int p54_conf_tx(struct ieee80211_hw *dev, int queue,
  804. const struct ieee80211_tx_queue_params *params)
  805. {
  806. struct p54_common *priv = dev->priv;
  807. struct p54_tx_control_vdcf *vdcf;
  808. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  809. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  810. if ((params) && !((queue < 0) || (queue > 4))) {
  811. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  812. params->cw_min, params->cw_max, params->txop);
  813. } else
  814. return -EINVAL;
  815. p54_set_vdcf(dev);
  816. return 0;
  817. }
  818. static int p54_get_stats(struct ieee80211_hw *dev,
  819. struct ieee80211_low_level_stats *stats)
  820. {
  821. /* TODO */
  822. return 0;
  823. }
  824. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  825. struct ieee80211_tx_queue_stats *stats)
  826. {
  827. struct p54_common *priv = dev->priv;
  828. unsigned int i;
  829. for (i = 0; i < dev->queues; i++)
  830. memcpy(&stats->data[i], &priv->tx_stats.data[i],
  831. sizeof(stats->data[i]));
  832. return 0;
  833. }
  834. static const struct ieee80211_ops p54_ops = {
  835. .tx = p54_tx,
  836. .start = p54_start,
  837. .stop = p54_stop,
  838. .add_interface = p54_add_interface,
  839. .remove_interface = p54_remove_interface,
  840. .config = p54_config,
  841. .config_interface = p54_config_interface,
  842. .configure_filter = p54_configure_filter,
  843. .conf_tx = p54_conf_tx,
  844. .get_stats = p54_get_stats,
  845. .get_tx_stats = p54_get_tx_stats
  846. };
  847. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  848. {
  849. struct ieee80211_hw *dev;
  850. struct p54_common *priv;
  851. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  852. if (!dev)
  853. return NULL;
  854. priv = dev->priv;
  855. priv->mode = IEEE80211_IF_TYPE_INVALID;
  856. skb_queue_head_init(&priv->tx_queue);
  857. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  858. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  859. IEEE80211_HW_RX_INCLUDES_FCS;
  860. dev->channel_change_time = 1000; /* TODO: find actual value */
  861. dev->max_rssi = 127;
  862. priv->tx_stats.data[0].limit = 5;
  863. dev->queues = 1;
  864. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  865. sizeof(struct p54_tx_control_allocdata);
  866. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
  867. priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
  868. if (!priv->cached_vdcf) {
  869. ieee80211_free_hw(dev);
  870. return NULL;
  871. }
  872. p54_init_vdcf(dev);
  873. return dev;
  874. }
  875. EXPORT_SYMBOL_GPL(p54_init_common);
  876. void p54_free_common(struct ieee80211_hw *dev)
  877. {
  878. struct p54_common *priv = dev->priv;
  879. kfree(priv->iq_autocal);
  880. kfree(priv->output_limit);
  881. kfree(priv->curve_data);
  882. kfree(priv->cached_vdcf);
  883. }
  884. EXPORT_SYMBOL_GPL(p54_free_common);
  885. static int __init p54_init(void)
  886. {
  887. return 0;
  888. }
  889. static void __exit p54_exit(void)
  890. {
  891. }
  892. module_init(p54_init);
  893. module_exit(p54_exit);