Kconfig 52 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_IDE
  6. select HAVE_MEMBLOCK
  7. select RTC_LIB
  8. select SYS_SUPPORTS_APM_EMULATION
  9. select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
  10. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  11. select HAVE_ARCH_KGDB
  12. select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  13. select HAVE_KRETPROBES if (HAVE_KPROBES)
  14. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  15. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  16. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  17. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  18. select HAVE_GENERIC_DMA_COHERENT
  19. select HAVE_KERNEL_GZIP
  20. select HAVE_KERNEL_LZO
  21. select HAVE_KERNEL_LZMA
  22. select HAVE_IRQ_WORK
  23. select HAVE_PERF_EVENTS
  24. select PERF_USE_VMALLOC
  25. select HAVE_REGS_AND_STACK_ACCESS_API
  26. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
  27. select HAVE_C_RECORDMCOUNT
  28. help
  29. The ARM series is a line of low-power-consumption RISC chip designs
  30. licensed by ARM Ltd and targeted at embedded applications and
  31. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  32. manufactured, but legacy ARM-based PC hardware remains popular in
  33. Europe. There is an ARM Linux project with a web page at
  34. <http://www.arm.linux.org.uk/>.
  35. config HAVE_PWM
  36. bool
  37. config SYS_SUPPORTS_APM_EMULATION
  38. bool
  39. config HAVE_SCHED_CLOCK
  40. bool
  41. config GENERIC_GPIO
  42. bool
  43. config ARCH_USES_GETTIMEOFFSET
  44. bool
  45. default n
  46. config GENERIC_CLOCKEVENTS
  47. bool
  48. config GENERIC_CLOCKEVENTS_BROADCAST
  49. bool
  50. depends on GENERIC_CLOCKEVENTS
  51. default y if SMP
  52. config HAVE_TCM
  53. bool
  54. select GENERIC_ALLOCATOR
  55. config HAVE_PROC_CPU
  56. bool
  57. config NO_IOPORT
  58. bool
  59. config EISA
  60. bool
  61. ---help---
  62. The Extended Industry Standard Architecture (EISA) bus was
  63. developed as an open alternative to the IBM MicroChannel bus.
  64. The EISA bus provided some of the features of the IBM MicroChannel
  65. bus while maintaining backward compatibility with cards made for
  66. the older ISA bus. The EISA bus saw limited use between 1988 and
  67. 1995 when it was made obsolete by the PCI bus.
  68. Say Y here if you are building a kernel for an EISA-based machine.
  69. Otherwise, say N.
  70. config SBUS
  71. bool
  72. config MCA
  73. bool
  74. help
  75. MicroChannel Architecture is found in some IBM PS/2 machines and
  76. laptops. It is a bus system similar to PCI or ISA. See
  77. <file:Documentation/mca.txt> (and especially the web page given
  78. there) before attempting to build an MCA bus kernel.
  79. config GENERIC_HARDIRQS
  80. bool
  81. default y
  82. config STACKTRACE_SUPPORT
  83. bool
  84. default y
  85. config HAVE_LATENCYTOP_SUPPORT
  86. bool
  87. depends on !SMP
  88. default y
  89. config LOCKDEP_SUPPORT
  90. bool
  91. default y
  92. config TRACE_IRQFLAGS_SUPPORT
  93. bool
  94. default y
  95. config HARDIRQS_SW_RESEND
  96. bool
  97. default y
  98. config GENERIC_IRQ_PROBE
  99. bool
  100. default y
  101. config GENERIC_LOCKBREAK
  102. bool
  103. default y
  104. depends on SMP && PREEMPT
  105. config RWSEM_GENERIC_SPINLOCK
  106. bool
  107. default y
  108. config RWSEM_XCHGADD_ALGORITHM
  109. bool
  110. config ARCH_HAS_ILOG2_U32
  111. bool
  112. config ARCH_HAS_ILOG2_U64
  113. bool
  114. config ARCH_HAS_CPUFREQ
  115. bool
  116. help
  117. Internal node to signify that the ARCH has CPUFREQ support
  118. and that the relevant menu configurations are displayed for
  119. it.
  120. config ARCH_HAS_CPU_IDLE_WAIT
  121. def_bool y
  122. config GENERIC_HWEIGHT
  123. bool
  124. default y
  125. config GENERIC_CALIBRATE_DELAY
  126. bool
  127. default y
  128. config ARCH_MAY_HAVE_PC_FDC
  129. bool
  130. config ZONE_DMA
  131. bool
  132. config NEED_DMA_MAP_STATE
  133. def_bool y
  134. config GENERIC_ISA_DMA
  135. bool
  136. config FIQ
  137. bool
  138. config ARCH_MTD_XIP
  139. bool
  140. config GENERIC_HARDIRQS_NO__DO_IRQ
  141. def_bool y
  142. config ARM_L1_CACHE_SHIFT_6
  143. bool
  144. help
  145. Setting ARM L1 cache line size to 64 Bytes.
  146. config VECTORS_BASE
  147. hex
  148. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  149. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  150. default 0x00000000
  151. help
  152. The base address of exception vectors.
  153. source "init/Kconfig"
  154. source "kernel/Kconfig.freezer"
  155. menu "System Type"
  156. config MMU
  157. bool "MMU-based Paged Memory Management Support"
  158. default y
  159. help
  160. Select if you want MMU-based virtualised addressing space
  161. support by paged memory management. If unsure, say 'Y'.
  162. #
  163. # The "ARM system type" choice list is ordered alphabetically by option
  164. # text. Please add new entries in the option alphabetic order.
  165. #
  166. choice
  167. prompt "ARM system type"
  168. default ARCH_VERSATILE
  169. config ARCH_AAEC2000
  170. bool "Agilent AAEC-2000 based"
  171. select CPU_ARM920T
  172. select ARM_AMBA
  173. select HAVE_CLK
  174. select ARCH_USES_GETTIMEOFFSET
  175. help
  176. This enables support for systems based on the Agilent AAEC-2000
  177. config ARCH_INTEGRATOR
  178. bool "ARM Ltd. Integrator family"
  179. select ARM_AMBA
  180. select ARCH_HAS_CPUFREQ
  181. select COMMON_CLKDEV
  182. select ICST
  183. select GENERIC_CLOCKEVENTS
  184. select PLAT_VERSATILE
  185. help
  186. Support for ARM's Integrator platform.
  187. config ARCH_REALVIEW
  188. bool "ARM Ltd. RealView family"
  189. select ARM_AMBA
  190. select COMMON_CLKDEV
  191. select HAVE_SCHED_CLOCK
  192. select ICST
  193. select GENERIC_CLOCKEVENTS
  194. select ARCH_WANT_OPTIONAL_GPIOLIB
  195. select PLAT_VERSATILE
  196. select ARM_TIMER_SP804
  197. select GPIO_PL061 if GPIOLIB
  198. help
  199. This enables support for ARM Ltd RealView boards.
  200. config ARCH_VERSATILE
  201. bool "ARM Ltd. Versatile family"
  202. select ARM_AMBA
  203. select ARM_VIC
  204. select COMMON_CLKDEV
  205. select HAVE_SCHED_CLOCK
  206. select ICST
  207. select GENERIC_CLOCKEVENTS
  208. select ARCH_WANT_OPTIONAL_GPIOLIB
  209. select PLAT_VERSATILE
  210. select ARM_TIMER_SP804
  211. help
  212. This enables support for ARM Ltd Versatile board.
  213. config ARCH_VEXPRESS
  214. bool "ARM Ltd. Versatile Express family"
  215. select ARCH_WANT_OPTIONAL_GPIOLIB
  216. select ARM_AMBA
  217. select ARM_TIMER_SP804
  218. select COMMON_CLKDEV
  219. select GENERIC_CLOCKEVENTS
  220. select HAVE_CLK
  221. select HAVE_SCHED_CLOCK
  222. select ICST
  223. select PLAT_VERSATILE
  224. help
  225. This enables support for the ARM Ltd Versatile Express boards.
  226. config ARCH_AT91
  227. bool "Atmel AT91"
  228. select ARCH_REQUIRE_GPIOLIB
  229. select HAVE_CLK
  230. help
  231. This enables support for systems based on the Atmel AT91RM9200,
  232. AT91SAM9 and AT91CAP9 processors.
  233. config ARCH_BCMRING
  234. bool "Broadcom BCMRING"
  235. depends on MMU
  236. select CPU_V6
  237. select ARM_AMBA
  238. select COMMON_CLKDEV
  239. select GENERIC_CLOCKEVENTS
  240. select ARCH_WANT_OPTIONAL_GPIOLIB
  241. help
  242. Support for Broadcom's BCMRing platform.
  243. config ARCH_CLPS711X
  244. bool "Cirrus Logic CLPS711x/EP721x-based"
  245. select CPU_ARM720T
  246. select ARCH_USES_GETTIMEOFFSET
  247. help
  248. Support for Cirrus Logic 711x/721x based boards.
  249. config ARCH_CNS3XXX
  250. bool "Cavium Networks CNS3XXX family"
  251. select CPU_V6
  252. select GENERIC_CLOCKEVENTS
  253. select ARM_GIC
  254. select PCI_DOMAINS if PCI
  255. help
  256. Support for Cavium Networks CNS3XXX platform.
  257. config ARCH_GEMINI
  258. bool "Cortina Systems Gemini"
  259. select CPU_FA526
  260. select ARCH_REQUIRE_GPIOLIB
  261. select ARCH_USES_GETTIMEOFFSET
  262. help
  263. Support for the Cortina Systems Gemini family SoCs
  264. config ARCH_EBSA110
  265. bool "EBSA-110"
  266. select CPU_SA110
  267. select ISA
  268. select NO_IOPORT
  269. select ARCH_USES_GETTIMEOFFSET
  270. help
  271. This is an evaluation board for the StrongARM processor available
  272. from Digital. It has limited hardware on-board, including an
  273. Ethernet interface, two PCMCIA sockets, two serial ports and a
  274. parallel port.
  275. config ARCH_EP93XX
  276. bool "EP93xx-based"
  277. select CPU_ARM920T
  278. select ARM_AMBA
  279. select ARM_VIC
  280. select COMMON_CLKDEV
  281. select ARCH_REQUIRE_GPIOLIB
  282. select ARCH_HAS_HOLES_MEMORYMODEL
  283. select ARCH_USES_GETTIMEOFFSET
  284. help
  285. This enables support for the Cirrus EP93xx series of CPUs.
  286. config ARCH_FOOTBRIDGE
  287. bool "FootBridge"
  288. select CPU_SA110
  289. select FOOTBRIDGE
  290. select ARCH_USES_GETTIMEOFFSET
  291. help
  292. Support for systems based on the DC21285 companion chip
  293. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  294. config ARCH_MXC
  295. bool "Freescale MXC/iMX-based"
  296. select GENERIC_CLOCKEVENTS
  297. select ARCH_REQUIRE_GPIOLIB
  298. select COMMON_CLKDEV
  299. help
  300. Support for Freescale MXC/iMX-based family of processors
  301. config ARCH_STMP3XXX
  302. bool "Freescale STMP3xxx"
  303. select CPU_ARM926T
  304. select COMMON_CLKDEV
  305. select ARCH_REQUIRE_GPIOLIB
  306. select GENERIC_CLOCKEVENTS
  307. select USB_ARCH_HAS_EHCI
  308. help
  309. Support for systems based on the Freescale 3xxx CPUs.
  310. config ARCH_NETX
  311. bool "Hilscher NetX based"
  312. select CPU_ARM926T
  313. select ARM_VIC
  314. select GENERIC_CLOCKEVENTS
  315. help
  316. This enables support for systems based on the Hilscher NetX Soc
  317. config ARCH_H720X
  318. bool "Hynix HMS720x-based"
  319. select CPU_ARM720T
  320. select ISA_DMA_API
  321. select ARCH_USES_GETTIMEOFFSET
  322. help
  323. This enables support for systems based on the Hynix HMS720x
  324. config ARCH_IOP13XX
  325. bool "IOP13xx-based"
  326. depends on MMU
  327. select CPU_XSC3
  328. select PLAT_IOP
  329. select PCI
  330. select ARCH_SUPPORTS_MSI
  331. select VMSPLIT_1G
  332. help
  333. Support for Intel's IOP13XX (XScale) family of processors.
  334. config ARCH_IOP32X
  335. bool "IOP32x-based"
  336. depends on MMU
  337. select CPU_XSCALE
  338. select PLAT_IOP
  339. select PCI
  340. select ARCH_REQUIRE_GPIOLIB
  341. help
  342. Support for Intel's 80219 and IOP32X (XScale) family of
  343. processors.
  344. config ARCH_IOP33X
  345. bool "IOP33x-based"
  346. depends on MMU
  347. select CPU_XSCALE
  348. select PLAT_IOP
  349. select PCI
  350. select ARCH_REQUIRE_GPIOLIB
  351. help
  352. Support for Intel's IOP33X (XScale) family of processors.
  353. config ARCH_IXP23XX
  354. bool "IXP23XX-based"
  355. depends on MMU
  356. select CPU_XSC3
  357. select PCI
  358. select ARCH_USES_GETTIMEOFFSET
  359. help
  360. Support for Intel's IXP23xx (XScale) family of processors.
  361. config ARCH_IXP2000
  362. bool "IXP2400/2800-based"
  363. depends on MMU
  364. select CPU_XSCALE
  365. select PCI
  366. select ARCH_USES_GETTIMEOFFSET
  367. help
  368. Support for Intel's IXP2400/2800 (XScale) family of processors.
  369. config ARCH_IXP4XX
  370. bool "IXP4xx-based"
  371. depends on MMU
  372. select CPU_XSCALE
  373. select GENERIC_GPIO
  374. select GENERIC_CLOCKEVENTS
  375. select HAVE_SCHED_CLOCK
  376. select DMABOUNCE if PCI
  377. help
  378. Support for Intel's IXP4XX (XScale) family of processors.
  379. config ARCH_DOVE
  380. bool "Marvell Dove"
  381. select PCI
  382. select ARCH_REQUIRE_GPIOLIB
  383. select GENERIC_CLOCKEVENTS
  384. select PLAT_ORION
  385. help
  386. Support for the Marvell Dove SoC 88AP510
  387. config ARCH_KIRKWOOD
  388. bool "Marvell Kirkwood"
  389. select CPU_FEROCEON
  390. select PCI
  391. select ARCH_REQUIRE_GPIOLIB
  392. select GENERIC_CLOCKEVENTS
  393. select PLAT_ORION
  394. help
  395. Support for the following Marvell Kirkwood series SoCs:
  396. 88F6180, 88F6192 and 88F6281.
  397. config ARCH_LOKI
  398. bool "Marvell Loki (88RC8480)"
  399. select CPU_FEROCEON
  400. select GENERIC_CLOCKEVENTS
  401. select PLAT_ORION
  402. help
  403. Support for the Marvell Loki (88RC8480) SoC.
  404. config ARCH_LPC32XX
  405. bool "NXP LPC32XX"
  406. select CPU_ARM926T
  407. select ARCH_REQUIRE_GPIOLIB
  408. select HAVE_IDE
  409. select ARM_AMBA
  410. select USB_ARCH_HAS_OHCI
  411. select COMMON_CLKDEV
  412. select GENERIC_TIME
  413. select GENERIC_CLOCKEVENTS
  414. help
  415. Support for the NXP LPC32XX family of processors
  416. config ARCH_MV78XX0
  417. bool "Marvell MV78xx0"
  418. select CPU_FEROCEON
  419. select PCI
  420. select ARCH_REQUIRE_GPIOLIB
  421. select GENERIC_CLOCKEVENTS
  422. select PLAT_ORION
  423. help
  424. Support for the following Marvell MV78xx0 series SoCs:
  425. MV781x0, MV782x0.
  426. config ARCH_ORION5X
  427. bool "Marvell Orion"
  428. depends on MMU
  429. select CPU_FEROCEON
  430. select PCI
  431. select ARCH_REQUIRE_GPIOLIB
  432. select GENERIC_CLOCKEVENTS
  433. select PLAT_ORION
  434. help
  435. Support for the following Marvell Orion 5x series SoCs:
  436. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  437. Orion-2 (5281), Orion-1-90 (6183).
  438. config ARCH_MMP
  439. bool "Marvell PXA168/910/MMP2"
  440. depends on MMU
  441. select ARCH_REQUIRE_GPIOLIB
  442. select COMMON_CLKDEV
  443. select GENERIC_CLOCKEVENTS
  444. select HAVE_SCHED_CLOCK
  445. select TICK_ONESHOT
  446. select PLAT_PXA
  447. select SPARSE_IRQ
  448. help
  449. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  450. config ARCH_KS8695
  451. bool "Micrel/Kendin KS8695"
  452. select CPU_ARM922T
  453. select ARCH_REQUIRE_GPIOLIB
  454. select ARCH_USES_GETTIMEOFFSET
  455. help
  456. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  457. System-on-Chip devices.
  458. config ARCH_NS9XXX
  459. bool "NetSilicon NS9xxx"
  460. select CPU_ARM926T
  461. select GENERIC_GPIO
  462. select GENERIC_CLOCKEVENTS
  463. select HAVE_CLK
  464. help
  465. Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
  466. System.
  467. <http://www.digi.com/products/microprocessors/index.jsp>
  468. config ARCH_W90X900
  469. bool "Nuvoton W90X900 CPU"
  470. select CPU_ARM926T
  471. select ARCH_REQUIRE_GPIOLIB
  472. select COMMON_CLKDEV
  473. select GENERIC_CLOCKEVENTS
  474. help
  475. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  476. At present, the w90x900 has been renamed nuc900, regarding
  477. the ARM series product line, you can login the following
  478. link address to know more.
  479. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  480. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  481. config ARCH_NUC93X
  482. bool "Nuvoton NUC93X CPU"
  483. select CPU_ARM926T
  484. select COMMON_CLKDEV
  485. help
  486. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  487. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  488. config ARCH_TEGRA
  489. bool "NVIDIA Tegra"
  490. select GENERIC_TIME
  491. select GENERIC_CLOCKEVENTS
  492. select GENERIC_GPIO
  493. select HAVE_CLK
  494. select HAVE_SCHED_CLOCK
  495. select COMMON_CLKDEV
  496. select ARCH_HAS_BARRIERS if CACHE_L2X0
  497. select ARCH_HAS_CPUFREQ
  498. help
  499. This enables support for NVIDIA Tegra based systems (Tegra APX,
  500. Tegra 6xx and Tegra 2 series).
  501. config ARCH_PNX4008
  502. bool "Philips Nexperia PNX4008 Mobile"
  503. select CPU_ARM926T
  504. select COMMON_CLKDEV
  505. select ARCH_USES_GETTIMEOFFSET
  506. help
  507. This enables support for Philips PNX4008 mobile platform.
  508. config ARCH_PXA
  509. bool "PXA2xx/PXA3xx-based"
  510. depends on MMU
  511. select ARCH_MTD_XIP
  512. select ARCH_HAS_CPUFREQ
  513. select COMMON_CLKDEV
  514. select ARCH_REQUIRE_GPIOLIB
  515. select GENERIC_CLOCKEVENTS
  516. select HAVE_SCHED_CLOCK
  517. select TICK_ONESHOT
  518. select PLAT_PXA
  519. select SPARSE_IRQ
  520. help
  521. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  522. config ARCH_MSM
  523. bool "Qualcomm MSM"
  524. select HAVE_CLK
  525. select GENERIC_CLOCKEVENTS
  526. select ARCH_REQUIRE_GPIOLIB
  527. help
  528. Support for Qualcomm MSM/QSD based systems. This runs on the
  529. apps processor of the MSM/QSD and depends on a shared memory
  530. interface to the modem processor which runs the baseband
  531. stack and controls some vital subsystems
  532. (clock and power control, etc).
  533. config ARCH_SHMOBILE
  534. bool "Renesas SH-Mobile"
  535. help
  536. Support for Renesas's SH-Mobile ARM platforms
  537. config ARCH_RPC
  538. bool "RiscPC"
  539. select ARCH_ACORN
  540. select FIQ
  541. select TIMER_ACORN
  542. select ARCH_MAY_HAVE_PC_FDC
  543. select HAVE_PATA_PLATFORM
  544. select ISA_DMA_API
  545. select NO_IOPORT
  546. select ARCH_SPARSEMEM_ENABLE
  547. select ARCH_USES_GETTIMEOFFSET
  548. help
  549. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  550. CD-ROM interface, serial and parallel port, and the floppy drive.
  551. config ARCH_SA1100
  552. bool "SA1100-based"
  553. select CPU_SA1100
  554. select ISA
  555. select ARCH_SPARSEMEM_ENABLE
  556. select ARCH_MTD_XIP
  557. select ARCH_HAS_CPUFREQ
  558. select CPU_FREQ
  559. select GENERIC_CLOCKEVENTS
  560. select HAVE_CLK
  561. select HAVE_SCHED_CLOCK
  562. select TICK_ONESHOT
  563. select ARCH_REQUIRE_GPIOLIB
  564. help
  565. Support for StrongARM 11x0 based boards.
  566. config ARCH_S3C2410
  567. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  568. select GENERIC_GPIO
  569. select ARCH_HAS_CPUFREQ
  570. select HAVE_CLK
  571. select ARCH_USES_GETTIMEOFFSET
  572. select HAVE_S3C2410_I2C if I2C
  573. help
  574. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  575. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  576. the Samsung SMDK2410 development board (and derivatives).
  577. Note, the S3C2416 and the S3C2450 are so close that they even share
  578. the same SoC ID code. This means that there is no seperate machine
  579. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  580. config ARCH_S3C64XX
  581. bool "Samsung S3C64XX"
  582. select PLAT_SAMSUNG
  583. select CPU_V6
  584. select ARM_VIC
  585. select HAVE_CLK
  586. select NO_IOPORT
  587. select ARCH_USES_GETTIMEOFFSET
  588. select ARCH_HAS_CPUFREQ
  589. select ARCH_REQUIRE_GPIOLIB
  590. select SAMSUNG_CLKSRC
  591. select SAMSUNG_IRQ_VIC_TIMER
  592. select SAMSUNG_IRQ_UART
  593. select S3C_GPIO_TRACK
  594. select S3C_GPIO_PULL_UPDOWN
  595. select S3C_GPIO_CFG_S3C24XX
  596. select S3C_GPIO_CFG_S3C64XX
  597. select S3C_DEV_NAND
  598. select USB_ARCH_HAS_OHCI
  599. select SAMSUNG_GPIOLIB_4BIT
  600. select HAVE_S3C2410_I2C if I2C
  601. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  602. help
  603. Samsung S3C64XX series based systems
  604. config ARCH_S5P64X0
  605. bool "Samsung S5P6440 S5P6450"
  606. select CPU_V6
  607. select GENERIC_GPIO
  608. select HAVE_CLK
  609. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  610. select ARCH_USES_GETTIMEOFFSET
  611. select HAVE_S3C2410_I2C if I2C
  612. select HAVE_S3C_RTC if RTC_CLASS
  613. help
  614. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  615. SMDK6450.
  616. config ARCH_S5P6442
  617. bool "Samsung S5P6442"
  618. select CPU_V6
  619. select GENERIC_GPIO
  620. select HAVE_CLK
  621. select ARCH_USES_GETTIMEOFFSET
  622. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  623. help
  624. Samsung S5P6442 CPU based systems
  625. config ARCH_S5PC100
  626. bool "Samsung S5PC100"
  627. select GENERIC_GPIO
  628. select HAVE_CLK
  629. select CPU_V7
  630. select ARM_L1_CACHE_SHIFT_6
  631. select ARCH_USES_GETTIMEOFFSET
  632. select HAVE_S3C2410_I2C if I2C
  633. select HAVE_S3C_RTC if RTC_CLASS
  634. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  635. help
  636. Samsung S5PC100 series based systems
  637. config ARCH_S5PV210
  638. bool "Samsung S5PV210/S5PC110"
  639. select CPU_V7
  640. select ARCH_SPARSEMEM_ENABLE
  641. select GENERIC_GPIO
  642. select HAVE_CLK
  643. select ARM_L1_CACHE_SHIFT_6
  644. select ARCH_HAS_CPUFREQ
  645. select ARCH_USES_GETTIMEOFFSET
  646. select HAVE_S3C2410_I2C if I2C
  647. select HAVE_S3C_RTC if RTC_CLASS
  648. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  649. help
  650. Samsung S5PV210/S5PC110 series based systems
  651. config ARCH_S5PV310
  652. bool "Samsung S5PV310/S5PC210"
  653. select CPU_V7
  654. select ARCH_SPARSEMEM_ENABLE
  655. select GENERIC_GPIO
  656. select HAVE_CLK
  657. select GENERIC_CLOCKEVENTS
  658. select HAVE_S3C_RTC if RTC_CLASS
  659. select HAVE_S3C2410_I2C if I2C
  660. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  661. help
  662. Samsung S5PV310 series based systems
  663. config ARCH_SHARK
  664. bool "Shark"
  665. select CPU_SA110
  666. select ISA
  667. select ISA_DMA
  668. select ZONE_DMA
  669. select PCI
  670. select ARCH_USES_GETTIMEOFFSET
  671. help
  672. Support for the StrongARM based Digital DNARD machine, also known
  673. as "Shark" (<http://www.shark-linux.de/shark.html>).
  674. config ARCH_TCC_926
  675. bool "Telechips TCC ARM926-based systems"
  676. select CPU_ARM926T
  677. select HAVE_CLK
  678. select COMMON_CLKDEV
  679. select GENERIC_CLOCKEVENTS
  680. help
  681. Support for Telechips TCC ARM926-based systems.
  682. config ARCH_LH7A40X
  683. bool "Sharp LH7A40X"
  684. select CPU_ARM922T
  685. select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
  686. select ARCH_USES_GETTIMEOFFSET
  687. help
  688. Say Y here for systems based on one of the Sharp LH7A40X
  689. System on a Chip processors. These CPUs include an ARM922T
  690. core with a wide array of integrated devices for
  691. hand-held and low-power applications.
  692. config ARCH_U300
  693. bool "ST-Ericsson U300 Series"
  694. depends on MMU
  695. select CPU_ARM926T
  696. select HAVE_SCHED_CLOCK
  697. select HAVE_TCM
  698. select ARM_AMBA
  699. select ARM_VIC
  700. select GENERIC_CLOCKEVENTS
  701. select COMMON_CLKDEV
  702. select GENERIC_GPIO
  703. help
  704. Support for ST-Ericsson U300 series mobile platforms.
  705. config ARCH_U8500
  706. bool "ST-Ericsson U8500 Series"
  707. select CPU_V7
  708. select ARM_AMBA
  709. select GENERIC_CLOCKEVENTS
  710. select COMMON_CLKDEV
  711. select ARCH_REQUIRE_GPIOLIB
  712. help
  713. Support for ST-Ericsson's Ux500 architecture
  714. config ARCH_NOMADIK
  715. bool "STMicroelectronics Nomadik"
  716. select ARM_AMBA
  717. select ARM_VIC
  718. select CPU_ARM926T
  719. select COMMON_CLKDEV
  720. select GENERIC_CLOCKEVENTS
  721. select ARCH_REQUIRE_GPIOLIB
  722. help
  723. Support for the Nomadik platform by ST-Ericsson
  724. config ARCH_DAVINCI
  725. bool "TI DaVinci"
  726. select GENERIC_CLOCKEVENTS
  727. select ARCH_REQUIRE_GPIOLIB
  728. select ZONE_DMA
  729. select HAVE_IDE
  730. select COMMON_CLKDEV
  731. select GENERIC_ALLOCATOR
  732. select ARCH_HAS_HOLES_MEMORYMODEL
  733. help
  734. Support for TI's DaVinci platform.
  735. config ARCH_OMAP
  736. bool "TI OMAP"
  737. select HAVE_CLK
  738. select ARCH_REQUIRE_GPIOLIB
  739. select ARCH_HAS_CPUFREQ
  740. select GENERIC_CLOCKEVENTS
  741. select HAVE_SCHED_CLOCK
  742. select ARCH_HAS_HOLES_MEMORYMODEL
  743. help
  744. Support for TI's OMAP platform (OMAP1/2/3/4).
  745. config PLAT_SPEAR
  746. bool "ST SPEAr"
  747. select ARM_AMBA
  748. select ARCH_REQUIRE_GPIOLIB
  749. select COMMON_CLKDEV
  750. select GENERIC_CLOCKEVENTS
  751. select HAVE_CLK
  752. help
  753. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  754. endchoice
  755. #
  756. # This is sorted alphabetically by mach-* pathname. However, plat-*
  757. # Kconfigs may be included either alphabetically (according to the
  758. # plat- suffix) or along side the corresponding mach-* source.
  759. #
  760. source "arch/arm/mach-aaec2000/Kconfig"
  761. source "arch/arm/mach-at91/Kconfig"
  762. source "arch/arm/mach-bcmring/Kconfig"
  763. source "arch/arm/mach-clps711x/Kconfig"
  764. source "arch/arm/mach-cns3xxx/Kconfig"
  765. source "arch/arm/mach-davinci/Kconfig"
  766. source "arch/arm/mach-dove/Kconfig"
  767. source "arch/arm/mach-ep93xx/Kconfig"
  768. source "arch/arm/mach-footbridge/Kconfig"
  769. source "arch/arm/mach-gemini/Kconfig"
  770. source "arch/arm/mach-h720x/Kconfig"
  771. source "arch/arm/mach-integrator/Kconfig"
  772. source "arch/arm/mach-iop32x/Kconfig"
  773. source "arch/arm/mach-iop33x/Kconfig"
  774. source "arch/arm/mach-iop13xx/Kconfig"
  775. source "arch/arm/mach-ixp4xx/Kconfig"
  776. source "arch/arm/mach-ixp2000/Kconfig"
  777. source "arch/arm/mach-ixp23xx/Kconfig"
  778. source "arch/arm/mach-kirkwood/Kconfig"
  779. source "arch/arm/mach-ks8695/Kconfig"
  780. source "arch/arm/mach-lh7a40x/Kconfig"
  781. source "arch/arm/mach-loki/Kconfig"
  782. source "arch/arm/mach-lpc32xx/Kconfig"
  783. source "arch/arm/mach-msm/Kconfig"
  784. source "arch/arm/mach-mv78xx0/Kconfig"
  785. source "arch/arm/plat-mxc/Kconfig"
  786. source "arch/arm/mach-netx/Kconfig"
  787. source "arch/arm/mach-nomadik/Kconfig"
  788. source "arch/arm/plat-nomadik/Kconfig"
  789. source "arch/arm/mach-ns9xxx/Kconfig"
  790. source "arch/arm/mach-nuc93x/Kconfig"
  791. source "arch/arm/plat-omap/Kconfig"
  792. source "arch/arm/mach-omap1/Kconfig"
  793. source "arch/arm/mach-omap2/Kconfig"
  794. source "arch/arm/mach-orion5x/Kconfig"
  795. source "arch/arm/mach-pxa/Kconfig"
  796. source "arch/arm/plat-pxa/Kconfig"
  797. source "arch/arm/mach-mmp/Kconfig"
  798. source "arch/arm/mach-realview/Kconfig"
  799. source "arch/arm/mach-sa1100/Kconfig"
  800. source "arch/arm/plat-samsung/Kconfig"
  801. source "arch/arm/plat-s3c24xx/Kconfig"
  802. source "arch/arm/plat-s5p/Kconfig"
  803. source "arch/arm/plat-spear/Kconfig"
  804. source "arch/arm/plat-tcc/Kconfig"
  805. if ARCH_S3C2410
  806. source "arch/arm/mach-s3c2400/Kconfig"
  807. source "arch/arm/mach-s3c2410/Kconfig"
  808. source "arch/arm/mach-s3c2412/Kconfig"
  809. source "arch/arm/mach-s3c2416/Kconfig"
  810. source "arch/arm/mach-s3c2440/Kconfig"
  811. source "arch/arm/mach-s3c2443/Kconfig"
  812. endif
  813. if ARCH_S3C64XX
  814. source "arch/arm/mach-s3c64xx/Kconfig"
  815. endif
  816. source "arch/arm/mach-s5p64x0/Kconfig"
  817. source "arch/arm/mach-s5p6442/Kconfig"
  818. source "arch/arm/mach-s5pc100/Kconfig"
  819. source "arch/arm/mach-s5pv210/Kconfig"
  820. source "arch/arm/mach-s5pv310/Kconfig"
  821. source "arch/arm/mach-shmobile/Kconfig"
  822. source "arch/arm/plat-stmp3xxx/Kconfig"
  823. source "arch/arm/mach-tegra/Kconfig"
  824. source "arch/arm/mach-u300/Kconfig"
  825. source "arch/arm/mach-ux500/Kconfig"
  826. source "arch/arm/mach-versatile/Kconfig"
  827. source "arch/arm/mach-vexpress/Kconfig"
  828. source "arch/arm/mach-w90x900/Kconfig"
  829. # Definitions to make life easier
  830. config ARCH_ACORN
  831. bool
  832. config PLAT_IOP
  833. bool
  834. select GENERIC_CLOCKEVENTS
  835. select HAVE_SCHED_CLOCK
  836. config PLAT_ORION
  837. bool
  838. select HAVE_SCHED_CLOCK
  839. config PLAT_PXA
  840. bool
  841. config PLAT_VERSATILE
  842. bool
  843. config ARM_TIMER_SP804
  844. bool
  845. source arch/arm/mm/Kconfig
  846. config IWMMXT
  847. bool "Enable iWMMXt support"
  848. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
  849. default y if PXA27x || PXA3xx || ARCH_MMP
  850. help
  851. Enable support for iWMMXt context switching at run time if
  852. running on a CPU that supports it.
  853. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  854. config XSCALE_PMU
  855. bool
  856. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  857. default y
  858. config CPU_HAS_PMU
  859. depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
  860. (!ARCH_OMAP3 || OMAP3_EMU)
  861. default y
  862. bool
  863. if !MMU
  864. source "arch/arm/Kconfig-nommu"
  865. endif
  866. config ARM_ERRATA_411920
  867. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  868. depends on CPU_V6
  869. help
  870. Invalidation of the Instruction Cache operation can
  871. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  872. It does not affect the MPCore. This option enables the ARM Ltd.
  873. recommended workaround.
  874. config ARM_ERRATA_430973
  875. bool "ARM errata: Stale prediction on replaced interworking branch"
  876. depends on CPU_V7
  877. help
  878. This option enables the workaround for the 430973 Cortex-A8
  879. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  880. interworking branch is replaced with another code sequence at the
  881. same virtual address, whether due to self-modifying code or virtual
  882. to physical address re-mapping, Cortex-A8 does not recover from the
  883. stale interworking branch prediction. This results in Cortex-A8
  884. executing the new code sequence in the incorrect ARM or Thumb state.
  885. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  886. and also flushes the branch target cache at every context switch.
  887. Note that setting specific bits in the ACTLR register may not be
  888. available in non-secure mode.
  889. config ARM_ERRATA_458693
  890. bool "ARM errata: Processor deadlock when a false hazard is created"
  891. depends on CPU_V7
  892. help
  893. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  894. erratum. For very specific sequences of memory operations, it is
  895. possible for a hazard condition intended for a cache line to instead
  896. be incorrectly associated with a different cache line. This false
  897. hazard might then cause a processor deadlock. The workaround enables
  898. the L1 caching of the NEON accesses and disables the PLD instruction
  899. in the ACTLR register. Note that setting specific bits in the ACTLR
  900. register may not be available in non-secure mode.
  901. config ARM_ERRATA_460075
  902. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  903. depends on CPU_V7
  904. help
  905. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  906. erratum. Any asynchronous access to the L2 cache may encounter a
  907. situation in which recent store transactions to the L2 cache are lost
  908. and overwritten with stale memory contents from external memory. The
  909. workaround disables the write-allocate mode for the L2 cache via the
  910. ACTLR register. Note that setting specific bits in the ACTLR register
  911. may not be available in non-secure mode.
  912. config ARM_ERRATA_742230
  913. bool "ARM errata: DMB operation may be faulty"
  914. depends on CPU_V7 && SMP
  915. help
  916. This option enables the workaround for the 742230 Cortex-A9
  917. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  918. between two write operations may not ensure the correct visibility
  919. ordering of the two writes. This workaround sets a specific bit in
  920. the diagnostic register of the Cortex-A9 which causes the DMB
  921. instruction to behave as a DSB, ensuring the correct behaviour of
  922. the two writes.
  923. config ARM_ERRATA_742231
  924. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  925. depends on CPU_V7 && SMP
  926. help
  927. This option enables the workaround for the 742231 Cortex-A9
  928. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  929. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  930. accessing some data located in the same cache line, may get corrupted
  931. data due to bad handling of the address hazard when the line gets
  932. replaced from one of the CPUs at the same time as another CPU is
  933. accessing it. This workaround sets specific bits in the diagnostic
  934. register of the Cortex-A9 which reduces the linefill issuing
  935. capabilities of the processor.
  936. config PL310_ERRATA_588369
  937. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  938. depends on CACHE_L2X0 && ARCH_OMAP4
  939. help
  940. The PL310 L2 cache controller implements three types of Clean &
  941. Invalidate maintenance operations: by Physical Address
  942. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  943. They are architecturally defined to behave as the execution of a
  944. clean operation followed immediately by an invalidate operation,
  945. both performing to the same memory location. This functionality
  946. is not correctly implemented in PL310 as clean lines are not
  947. invalidated as a result of these operations. Note that this errata
  948. uses Texas Instrument's secure monitor api.
  949. config ARM_ERRATA_720789
  950. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  951. depends on CPU_V7 && SMP
  952. help
  953. This option enables the workaround for the 720789 Cortex-A9 (prior to
  954. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  955. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  956. As a consequence of this erratum, some TLB entries which should be
  957. invalidated are not, resulting in an incoherency in the system page
  958. tables. The workaround changes the TLB flushing routines to invalidate
  959. entries regardless of the ASID.
  960. config ARM_ERRATA_743622
  961. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  962. depends on CPU_V7
  963. help
  964. This option enables the workaround for the 743622 Cortex-A9
  965. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  966. optimisation in the Cortex-A9 Store Buffer may lead to data
  967. corruption. This workaround sets a specific bit in the diagnostic
  968. register of the Cortex-A9 which disables the Store Buffer
  969. optimisation, preventing the defect from occurring. This has no
  970. visible impact on the overall performance or power consumption of the
  971. processor.
  972. endmenu
  973. source "arch/arm/common/Kconfig"
  974. menu "Bus support"
  975. config ARM_AMBA
  976. bool
  977. config ISA
  978. bool
  979. help
  980. Find out whether you have ISA slots on your motherboard. ISA is the
  981. name of a bus system, i.e. the way the CPU talks to the other stuff
  982. inside your box. Other bus systems are PCI, EISA, MicroChannel
  983. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  984. newer boards don't support it. If you have ISA, say Y, otherwise N.
  985. # Select ISA DMA controller support
  986. config ISA_DMA
  987. bool
  988. select ISA_DMA_API
  989. # Select ISA DMA interface
  990. config ISA_DMA_API
  991. bool
  992. config PCI
  993. bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX || SA1100_NANOENGINE
  994. help
  995. Find out whether you have a PCI motherboard. PCI is the name of a
  996. bus system, i.e. the way the CPU talks to the other stuff inside
  997. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  998. VESA. If you have PCI, say Y, otherwise N.
  999. config PCI_DOMAINS
  1000. bool
  1001. depends on PCI
  1002. config PCI_NANOENGINE
  1003. bool "BSE nanoEngine PCI support"
  1004. depends on SA1100_NANOENGINE
  1005. help
  1006. Enable PCI on the BSE nanoEngine board.
  1007. config PCI_SYSCALL
  1008. def_bool PCI
  1009. # Select the host bridge type
  1010. config PCI_HOST_VIA82C505
  1011. bool
  1012. depends on PCI && ARCH_SHARK
  1013. default y
  1014. config PCI_HOST_ITE8152
  1015. bool
  1016. depends on PCI && MACH_ARMCORE
  1017. default y
  1018. select DMABOUNCE
  1019. source "drivers/pci/Kconfig"
  1020. source "drivers/pcmcia/Kconfig"
  1021. endmenu
  1022. menu "Kernel Features"
  1023. source "kernel/time/Kconfig"
  1024. config SMP
  1025. bool "Symmetric Multi-Processing (EXPERIMENTAL)"
  1026. depends on EXPERIMENTAL
  1027. depends on GENERIC_CLOCKEVENTS
  1028. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1029. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1030. ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1031. ARCH_MSM_SCORPIONMP
  1032. select USE_GENERIC_SMP_HELPERS
  1033. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1034. help
  1035. This enables support for systems with more than one CPU. If you have
  1036. a system with only one CPU, like most personal computers, say N. If
  1037. you have a system with more than one CPU, say Y.
  1038. If you say N here, the kernel will run on single and multiprocessor
  1039. machines, but will use only one CPU of a multiprocessor machine. If
  1040. you say Y here, the kernel will run on many, but not all, single
  1041. processor machines. On a single processor machine, the kernel will
  1042. run faster if you say N here.
  1043. See also <file:Documentation/i386/IO-APIC.txt>,
  1044. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1045. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1046. If you don't know what to do here, say N.
  1047. config SMP_ON_UP
  1048. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1049. depends on EXPERIMENTAL
  1050. depends on SMP && !XIP && !THUMB2_KERNEL
  1051. default y
  1052. help
  1053. SMP kernels contain instructions which fail on non-SMP processors.
  1054. Enabling this option allows the kernel to modify itself to make
  1055. these instructions safe. Disabling it allows about 1K of space
  1056. savings.
  1057. If you don't know what to do here, say Y.
  1058. config HAVE_ARM_SCU
  1059. bool
  1060. depends on SMP
  1061. help
  1062. This option enables support for the ARM system coherency unit
  1063. config HAVE_ARM_TWD
  1064. bool
  1065. depends on SMP
  1066. help
  1067. This options enables support for the ARM timer and watchdog unit
  1068. choice
  1069. prompt "Memory split"
  1070. default VMSPLIT_3G
  1071. help
  1072. Select the desired split between kernel and user memory.
  1073. If you are not absolutely sure what you are doing, leave this
  1074. option alone!
  1075. config VMSPLIT_3G
  1076. bool "3G/1G user/kernel split"
  1077. config VMSPLIT_2G
  1078. bool "2G/2G user/kernel split"
  1079. config VMSPLIT_1G
  1080. bool "1G/3G user/kernel split"
  1081. endchoice
  1082. config PAGE_OFFSET
  1083. hex
  1084. default 0x40000000 if VMSPLIT_1G
  1085. default 0x80000000 if VMSPLIT_2G
  1086. default 0xC0000000
  1087. config NR_CPUS
  1088. int "Maximum number of CPUs (2-32)"
  1089. range 2 32
  1090. depends on SMP
  1091. default "4"
  1092. config HOTPLUG_CPU
  1093. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1094. depends on SMP && HOTPLUG && EXPERIMENTAL
  1095. depends on !ARCH_MSM
  1096. help
  1097. Say Y here to experiment with turning CPUs off and on. CPUs
  1098. can be controlled through /sys/devices/system/cpu.
  1099. config LOCAL_TIMERS
  1100. bool "Use local timer interrupts"
  1101. depends on SMP
  1102. default y
  1103. select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
  1104. help
  1105. Enable support for local timers on SMP platforms, rather then the
  1106. legacy IPI broadcast method. Local timers allows the system
  1107. accounting to be spread across the timer interval, preventing a
  1108. "thundering herd" at every timer tick.
  1109. source kernel/Kconfig.preempt
  1110. config HZ
  1111. int
  1112. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1113. ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
  1114. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1115. default AT91_TIMER_HZ if ARCH_AT91
  1116. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1117. default 100
  1118. config THUMB2_KERNEL
  1119. bool "Compile the kernel in Thumb-2 mode"
  1120. depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
  1121. select AEABI
  1122. select ARM_ASM_UNIFIED
  1123. help
  1124. By enabling this option, the kernel will be compiled in
  1125. Thumb-2 mode. A compiler/assembler that understand the unified
  1126. ARM-Thumb syntax is needed.
  1127. If unsure, say N.
  1128. config ARM_ASM_UNIFIED
  1129. bool
  1130. config AEABI
  1131. bool "Use the ARM EABI to compile the kernel"
  1132. help
  1133. This option allows for the kernel to be compiled using the latest
  1134. ARM ABI (aka EABI). This is only useful if you are using a user
  1135. space environment that is also compiled with EABI.
  1136. Since there are major incompatibilities between the legacy ABI and
  1137. EABI, especially with regard to structure member alignment, this
  1138. option also changes the kernel syscall calling convention to
  1139. disambiguate both ABIs and allow for backward compatibility support
  1140. (selected with CONFIG_OABI_COMPAT).
  1141. To use this you need GCC version 4.0.0 or later.
  1142. config OABI_COMPAT
  1143. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1144. depends on AEABI && EXPERIMENTAL
  1145. default y
  1146. help
  1147. This option preserves the old syscall interface along with the
  1148. new (ARM EABI) one. It also provides a compatibility layer to
  1149. intercept syscalls that have structure arguments which layout
  1150. in memory differs between the legacy ABI and the new ARM EABI
  1151. (only for non "thumb" binaries). This option adds a tiny
  1152. overhead to all syscalls and produces a slightly larger kernel.
  1153. If you know you'll be using only pure EABI user space then you
  1154. can say N here. If this option is not selected and you attempt
  1155. to execute a legacy ABI binary then the result will be
  1156. UNPREDICTABLE (in fact it can be predicted that it won't work
  1157. at all). If in doubt say Y.
  1158. config ARCH_HAS_HOLES_MEMORYMODEL
  1159. bool
  1160. config ARCH_SPARSEMEM_ENABLE
  1161. bool
  1162. config ARCH_SPARSEMEM_DEFAULT
  1163. def_bool ARCH_SPARSEMEM_ENABLE
  1164. config ARCH_SELECT_MEMORY_MODEL
  1165. def_bool ARCH_SPARSEMEM_ENABLE
  1166. config HIGHMEM
  1167. bool "High Memory Support (EXPERIMENTAL)"
  1168. depends on MMU && EXPERIMENTAL
  1169. help
  1170. The address space of ARM processors is only 4 Gigabytes large
  1171. and it has to accommodate user address space, kernel address
  1172. space as well as some memory mapped IO. That means that, if you
  1173. have a large amount of physical memory and/or IO, not all of the
  1174. memory can be "permanently mapped" by the kernel. The physical
  1175. memory that is not permanently mapped is called "high memory".
  1176. Depending on the selected kernel/user memory split, minimum
  1177. vmalloc space and actual amount of RAM, you may not need this
  1178. option which should result in a slightly faster kernel.
  1179. If unsure, say n.
  1180. config HIGHPTE
  1181. bool "Allocate 2nd-level pagetables from highmem"
  1182. depends on HIGHMEM
  1183. depends on !OUTER_CACHE
  1184. config HW_PERF_EVENTS
  1185. bool "Enable hardware performance counter support for perf events"
  1186. depends on PERF_EVENTS && CPU_HAS_PMU
  1187. default y
  1188. help
  1189. Enable hardware performance counter support for perf events. If
  1190. disabled, perf events will use software events only.
  1191. config SPARSE_IRQ
  1192. def_bool n
  1193. help
  1194. This enables support for sparse irqs. This is useful in general
  1195. as most CPUs have a fairly sparse array of IRQ vectors, which
  1196. the irq_desc then maps directly on to. Systems with a high
  1197. number of off-chip IRQs will want to treat this as
  1198. experimental until they have been independently verified.
  1199. source "mm/Kconfig"
  1200. config FORCE_MAX_ZONEORDER
  1201. int "Maximum zone order" if ARCH_SHMOBILE
  1202. range 11 64 if ARCH_SHMOBILE
  1203. default "9" if SA1111
  1204. default "11"
  1205. help
  1206. The kernel memory allocator divides physically contiguous memory
  1207. blocks into "zones", where each zone is a power of two number of
  1208. pages. This option selects the largest power of two that the kernel
  1209. keeps in the memory allocator. If you need to allocate very large
  1210. blocks of physically contiguous memory, then you may need to
  1211. increase this value.
  1212. This config option is actually maximum order plus one. For example,
  1213. a value of 11 means that the largest free memory block is 2^10 pages.
  1214. config LEDS
  1215. bool "Timer and CPU usage LEDs"
  1216. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1217. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1218. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1219. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1220. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1221. ARCH_AT91 || ARCH_DAVINCI || \
  1222. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1223. help
  1224. If you say Y here, the LEDs on your machine will be used
  1225. to provide useful information about your current system status.
  1226. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1227. be able to select which LEDs are active using the options below. If
  1228. you are compiling a kernel for the EBSA-110 or the LART however, the
  1229. red LED will simply flash regularly to indicate that the system is
  1230. still functional. It is safe to say Y here if you have a CATS
  1231. system, but the driver will do nothing.
  1232. config LEDS_TIMER
  1233. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1234. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1235. || MACH_OMAP_PERSEUS2
  1236. depends on LEDS
  1237. depends on !GENERIC_CLOCKEVENTS
  1238. default y if ARCH_EBSA110
  1239. help
  1240. If you say Y here, one of the system LEDs (the green one on the
  1241. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1242. will flash regularly to indicate that the system is still
  1243. operational. This is mainly useful to kernel hackers who are
  1244. debugging unstable kernels.
  1245. The LART uses the same LED for both Timer LED and CPU usage LED
  1246. functions. You may choose to use both, but the Timer LED function
  1247. will overrule the CPU usage LED.
  1248. config LEDS_CPU
  1249. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1250. !ARCH_OMAP) \
  1251. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1252. || MACH_OMAP_PERSEUS2
  1253. depends on LEDS
  1254. help
  1255. If you say Y here, the red LED will be used to give a good real
  1256. time indication of CPU usage, by lighting whenever the idle task
  1257. is not currently executing.
  1258. The LART uses the same LED for both Timer LED and CPU usage LED
  1259. functions. You may choose to use both, but the Timer LED function
  1260. will overrule the CPU usage LED.
  1261. config ALIGNMENT_TRAP
  1262. bool
  1263. depends on CPU_CP15_MMU
  1264. default y if !ARCH_EBSA110
  1265. select HAVE_PROC_CPU if PROC_FS
  1266. help
  1267. ARM processors cannot fetch/store information which is not
  1268. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1269. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1270. fetch/store instructions will be emulated in software if you say
  1271. here, which has a severe performance impact. This is necessary for
  1272. correct operation of some network protocols. With an IP-only
  1273. configuration it is safe to say N, otherwise say Y.
  1274. config UACCESS_WITH_MEMCPY
  1275. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1276. depends on MMU && EXPERIMENTAL
  1277. default y if CPU_FEROCEON
  1278. help
  1279. Implement faster copy_to_user and clear_user methods for CPU
  1280. cores where a 8-word STM instruction give significantly higher
  1281. memory write throughput than a sequence of individual 32bit stores.
  1282. A possible side effect is a slight increase in scheduling latency
  1283. between threads sharing the same address space if they invoke
  1284. such copy operations with large buffers.
  1285. However, if the CPU data cache is using a write-allocate mode,
  1286. this option is unlikely to provide any performance gain.
  1287. config SECCOMP
  1288. bool
  1289. prompt "Enable seccomp to safely compute untrusted bytecode"
  1290. ---help---
  1291. This kernel feature is useful for number crunching applications
  1292. that may need to compute untrusted bytecode during their
  1293. execution. By using pipes or other transports made available to
  1294. the process as file descriptors supporting the read/write
  1295. syscalls, it's possible to isolate those applications in
  1296. their own address space using seccomp. Once seccomp is
  1297. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1298. and the task is only allowed to execute a few safe syscalls
  1299. defined by each seccomp mode.
  1300. config CC_STACKPROTECTOR
  1301. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1302. help
  1303. This option turns on the -fstack-protector GCC feature. This
  1304. feature puts, at the beginning of functions, a canary value on
  1305. the stack just before the return address, and validates
  1306. the value just before actually returning. Stack based buffer
  1307. overflows (that need to overwrite this return address) now also
  1308. overwrite the canary, which gets detected and the attack is then
  1309. neutralized via a kernel panic.
  1310. This feature requires gcc version 4.2 or above.
  1311. config DEPRECATED_PARAM_STRUCT
  1312. bool "Provide old way to pass kernel parameters"
  1313. help
  1314. This was deprecated in 2001 and announced to live on for 5 years.
  1315. Some old boot loaders still use this way.
  1316. endmenu
  1317. menu "Boot options"
  1318. # Compressed boot loader in ROM. Yes, we really want to ask about
  1319. # TEXT and BSS so we preserve their values in the config files.
  1320. config ZBOOT_ROM_TEXT
  1321. hex "Compressed ROM boot loader base address"
  1322. default "0"
  1323. help
  1324. The physical address at which the ROM-able zImage is to be
  1325. placed in the target. Platforms which normally make use of
  1326. ROM-able zImage formats normally set this to a suitable
  1327. value in their defconfig file.
  1328. If ZBOOT_ROM is not enabled, this has no effect.
  1329. config ZBOOT_ROM_BSS
  1330. hex "Compressed ROM boot loader BSS address"
  1331. default "0"
  1332. help
  1333. The base address of an area of read/write memory in the target
  1334. for the ROM-able zImage which must be available while the
  1335. decompressor is running. It must be large enough to hold the
  1336. entire decompressed kernel plus an additional 128 KiB.
  1337. Platforms which normally make use of ROM-able zImage formats
  1338. normally set this to a suitable value in their defconfig file.
  1339. If ZBOOT_ROM is not enabled, this has no effect.
  1340. config ZBOOT_ROM
  1341. bool "Compressed boot loader in ROM/flash"
  1342. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1343. help
  1344. Say Y here if you intend to execute your compressed kernel image
  1345. (zImage) directly from ROM or flash. If unsure, say N.
  1346. config CMDLINE
  1347. string "Default kernel command string"
  1348. default ""
  1349. help
  1350. On some architectures (EBSA110 and CATS), there is currently no way
  1351. for the boot loader to pass arguments to the kernel. For these
  1352. architectures, you should supply some command-line options at build
  1353. time by entering them here. As a minimum, you should specify the
  1354. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1355. config CMDLINE_FORCE
  1356. bool "Always use the default kernel command string"
  1357. depends on CMDLINE != ""
  1358. help
  1359. Always use the default kernel command string, even if the boot
  1360. loader passes other arguments to the kernel.
  1361. This is useful if you cannot or don't want to change the
  1362. command-line options your boot loader passes to the kernel.
  1363. If unsure, say N.
  1364. config XIP_KERNEL
  1365. bool "Kernel Execute-In-Place from ROM"
  1366. depends on !ZBOOT_ROM
  1367. help
  1368. Execute-In-Place allows the kernel to run from non-volatile storage
  1369. directly addressable by the CPU, such as NOR flash. This saves RAM
  1370. space since the text section of the kernel is not loaded from flash
  1371. to RAM. Read-write sections, such as the data section and stack,
  1372. are still copied to RAM. The XIP kernel is not compressed since
  1373. it has to run directly from flash, so it will take more space to
  1374. store it. The flash address used to link the kernel object files,
  1375. and for storing it, is configuration dependent. Therefore, if you
  1376. say Y here, you must know the proper physical address where to
  1377. store the kernel image depending on your own flash memory usage.
  1378. Also note that the make target becomes "make xipImage" rather than
  1379. "make zImage" or "make Image". The final kernel binary to put in
  1380. ROM memory will be arch/arm/boot/xipImage.
  1381. If unsure, say N.
  1382. config XIP_PHYS_ADDR
  1383. hex "XIP Kernel Physical Location"
  1384. depends on XIP_KERNEL
  1385. default "0x00080000"
  1386. help
  1387. This is the physical address in your flash memory the kernel will
  1388. be linked for and stored to. This address is dependent on your
  1389. own flash usage.
  1390. config KEXEC
  1391. bool "Kexec system call (EXPERIMENTAL)"
  1392. depends on EXPERIMENTAL
  1393. help
  1394. kexec is a system call that implements the ability to shutdown your
  1395. current kernel, and to start another kernel. It is like a reboot
  1396. but it is independent of the system firmware. And like a reboot
  1397. you can start any kernel with it, not just Linux.
  1398. It is an ongoing process to be certain the hardware in a machine
  1399. is properly shutdown, so do not be surprised if this code does not
  1400. initially work for you. It may help to enable device hotplugging
  1401. support.
  1402. config ATAGS_PROC
  1403. bool "Export atags in procfs"
  1404. depends on KEXEC
  1405. default y
  1406. help
  1407. Should the atags used to boot the kernel be exported in an "atags"
  1408. file in procfs. Useful with kexec.
  1409. config CRASH_DUMP
  1410. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1411. depends on EXPERIMENTAL
  1412. help
  1413. Generate crash dump after being started by kexec. This should
  1414. be normally only set in special crash dump kernels which are
  1415. loaded in the main kernel with kexec-tools into a specially
  1416. reserved region and then later executed after a crash by
  1417. kdump/kexec. The crash dump kernel must be compiled to a
  1418. memory address not used by the main kernel
  1419. For more details see Documentation/kdump/kdump.txt
  1420. config AUTO_ZRELADDR
  1421. bool "Auto calculation of the decompressed kernel image address"
  1422. depends on !ZBOOT_ROM && !ARCH_U300
  1423. help
  1424. ZRELADDR is the physical address where the decompressed kernel
  1425. image will be placed. If AUTO_ZRELADDR is selected, the address
  1426. will be determined at run-time by masking the current IP with
  1427. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1428. from start of memory.
  1429. endmenu
  1430. menu "CPU Power Management"
  1431. if ARCH_HAS_CPUFREQ
  1432. source "drivers/cpufreq/Kconfig"
  1433. config CPU_FREQ_IMX
  1434. tristate "CPUfreq driver for i.MX CPUs"
  1435. depends on ARCH_MXC && CPU_FREQ
  1436. help
  1437. This enables the CPUfreq driver for i.MX CPUs.
  1438. config CPU_FREQ_SA1100
  1439. bool
  1440. config CPU_FREQ_SA1110
  1441. bool
  1442. config CPU_FREQ_INTEGRATOR
  1443. tristate "CPUfreq driver for ARM Integrator CPUs"
  1444. depends on ARCH_INTEGRATOR && CPU_FREQ
  1445. default y
  1446. help
  1447. This enables the CPUfreq driver for ARM Integrator CPUs.
  1448. For details, take a look at <file:Documentation/cpu-freq>.
  1449. If in doubt, say Y.
  1450. config CPU_FREQ_PXA
  1451. bool
  1452. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1453. default y
  1454. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1455. config CPU_FREQ_S3C64XX
  1456. bool "CPUfreq support for Samsung S3C64XX CPUs"
  1457. depends on CPU_FREQ && CPU_S3C6410
  1458. config CPU_FREQ_S3C
  1459. bool
  1460. help
  1461. Internal configuration node for common cpufreq on Samsung SoC
  1462. config CPU_FREQ_S3C24XX
  1463. bool "CPUfreq driver for Samsung S3C24XX series CPUs"
  1464. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1465. select CPU_FREQ_S3C
  1466. help
  1467. This enables the CPUfreq driver for the Samsung S3C24XX family
  1468. of CPUs.
  1469. For details, take a look at <file:Documentation/cpu-freq>.
  1470. If in doubt, say N.
  1471. config CPU_FREQ_S3C24XX_PLL
  1472. bool "Support CPUfreq changing of PLL frequency"
  1473. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1474. help
  1475. Compile in support for changing the PLL frequency from the
  1476. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1477. after a frequency change, so by default it is not enabled.
  1478. This also means that the PLL tables for the selected CPU(s) will
  1479. be built which may increase the size of the kernel image.
  1480. config CPU_FREQ_S3C24XX_DEBUG
  1481. bool "Debug CPUfreq Samsung driver core"
  1482. depends on CPU_FREQ_S3C24XX
  1483. help
  1484. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1485. config CPU_FREQ_S3C24XX_IODEBUG
  1486. bool "Debug CPUfreq Samsung driver IO timing"
  1487. depends on CPU_FREQ_S3C24XX
  1488. help
  1489. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1490. config CPU_FREQ_S3C24XX_DEBUGFS
  1491. bool "Export debugfs for CPUFreq"
  1492. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1493. help
  1494. Export status information via debugfs.
  1495. endif
  1496. source "drivers/cpuidle/Kconfig"
  1497. endmenu
  1498. menu "Floating point emulation"
  1499. comment "At least one emulation must be selected"
  1500. config FPE_NWFPE
  1501. bool "NWFPE math emulation"
  1502. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1503. ---help---
  1504. Say Y to include the NWFPE floating point emulator in the kernel.
  1505. This is necessary to run most binaries. Linux does not currently
  1506. support floating point hardware so you need to say Y here even if
  1507. your machine has an FPA or floating point co-processor podule.
  1508. You may say N here if you are going to load the Acorn FPEmulator
  1509. early in the bootup.
  1510. config FPE_NWFPE_XP
  1511. bool "Support extended precision"
  1512. depends on FPE_NWFPE
  1513. help
  1514. Say Y to include 80-bit support in the kernel floating-point
  1515. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1516. Note that gcc does not generate 80-bit operations by default,
  1517. so in most cases this option only enlarges the size of the
  1518. floating point emulator without any good reason.
  1519. You almost surely want to say N here.
  1520. config FPE_FASTFPE
  1521. bool "FastFPE math emulation (EXPERIMENTAL)"
  1522. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1523. ---help---
  1524. Say Y here to include the FAST floating point emulator in the kernel.
  1525. This is an experimental much faster emulator which now also has full
  1526. precision for the mantissa. It does not support any exceptions.
  1527. It is very simple, and approximately 3-6 times faster than NWFPE.
  1528. It should be sufficient for most programs. It may be not suitable
  1529. for scientific calculations, but you have to check this for yourself.
  1530. If you do not feel you need a faster FP emulation you should better
  1531. choose NWFPE.
  1532. config VFP
  1533. bool "VFP-format floating point maths"
  1534. depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1535. help
  1536. Say Y to include VFP support code in the kernel. This is needed
  1537. if your hardware includes a VFP unit.
  1538. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1539. release notes and additional status information.
  1540. Say N if your target does not have VFP hardware.
  1541. config VFPv3
  1542. bool
  1543. depends on VFP
  1544. default y if CPU_V7
  1545. config NEON
  1546. bool "Advanced SIMD (NEON) Extension support"
  1547. depends on VFPv3 && CPU_V7
  1548. help
  1549. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1550. Extension.
  1551. endmenu
  1552. menu "Userspace binary formats"
  1553. source "fs/Kconfig.binfmt"
  1554. config ARTHUR
  1555. tristate "RISC OS personality"
  1556. depends on !AEABI
  1557. help
  1558. Say Y here to include the kernel code necessary if you want to run
  1559. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1560. experimental; if this sounds frightening, say N and sleep in peace.
  1561. You can also say M here to compile this support as a module (which
  1562. will be called arthur).
  1563. endmenu
  1564. menu "Power management options"
  1565. source "kernel/power/Kconfig"
  1566. config ARCH_SUSPEND_POSSIBLE
  1567. def_bool y
  1568. endmenu
  1569. source "net/Kconfig"
  1570. source "drivers/Kconfig"
  1571. source "fs/Kconfig"
  1572. source "arch/arm/Kconfig.debug"
  1573. source "security/Kconfig"
  1574. source "crypto/Kconfig"
  1575. source "lib/Kconfig"