sequoia.dts 8.4 KB

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  1. /*
  2. * Device Tree Source for AMCC Sequoia
  3. *
  4. * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
  5. * Copyright (c) 2006, 2007 IBM Corp.
  6. *
  7. * FIXME: Draft only!
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without
  11. * any warranty of any kind, whether express or implied.
  12. *
  13. */
  14. / {
  15. #address-cells = <2>;
  16. #size-cells = <1>;
  17. model = "amcc,sequoia";
  18. compatible = "amcc,sequoia";
  19. dcr-parent = <&/cpus/PowerPC,440EPx@0>;
  20. cpus {
  21. #address-cells = <1>;
  22. #size-cells = <0>;
  23. PowerPC,440EPx@0 {
  24. device_type = "cpu";
  25. reg = <0>;
  26. clock-frequency = <0>; /* Filled in by zImage */
  27. timebase-frequency = <0>; /* Filled in by zImage */
  28. i-cache-line-size = <20>;
  29. d-cache-line-size = <20>;
  30. i-cache-size = <8000>;
  31. d-cache-size = <8000>;
  32. dcr-controller;
  33. dcr-access-method = "native";
  34. };
  35. };
  36. memory {
  37. device_type = "memory";
  38. reg = <0 0 0>; /* Filled in by zImage */
  39. };
  40. UIC0: interrupt-controller0 {
  41. compatible = "ibm,uic-440epx","ibm,uic";
  42. interrupt-controller;
  43. cell-index = <0>;
  44. dcr-reg = <0c0 009>;
  45. #address-cells = <0>;
  46. #size-cells = <0>;
  47. #interrupt-cells = <2>;
  48. };
  49. UIC1: interrupt-controller1 {
  50. compatible = "ibm,uic-440epx","ibm,uic";
  51. interrupt-controller;
  52. cell-index = <1>;
  53. dcr-reg = <0d0 009>;
  54. #address-cells = <0>;
  55. #size-cells = <0>;
  56. #interrupt-cells = <2>;
  57. interrupts = <1e 4 1f 4>; /* cascade */
  58. interrupt-parent = <&UIC0>;
  59. };
  60. UIC2: interrupt-controller2 {
  61. compatible = "ibm,uic-440epx","ibm,uic";
  62. interrupt-controller;
  63. cell-index = <2>;
  64. dcr-reg = <0e0 009>;
  65. #address-cells = <0>;
  66. #size-cells = <0>;
  67. #interrupt-cells = <2>;
  68. interrupts = <1c 4 1d 4>; /* cascade */
  69. interrupt-parent = <&UIC0>;
  70. };
  71. SDR0: sdr {
  72. compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
  73. dcr-reg = <00e 002>;
  74. };
  75. CPR0: cpr {
  76. compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
  77. dcr-reg = <00c 002>;
  78. };
  79. plb {
  80. compatible = "ibm,plb-440epx", "ibm,plb4";
  81. #address-cells = <2>;
  82. #size-cells = <1>;
  83. ranges;
  84. clock-frequency = <0>; /* Filled in by zImage */
  85. SDRAM0: sdram {
  86. compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
  87. dcr-reg = <010 2>;
  88. };
  89. DMA0: dma {
  90. compatible = "ibm,dma-440epx", "ibm,dma-4xx";
  91. dcr-reg = <100 027>;
  92. };
  93. MAL0: mcmal {
  94. compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
  95. dcr-reg = <180 62>;
  96. num-tx-chans = <2>;
  97. num-rx-chans = <2>;
  98. interrupt-parent = <&MAL0>;
  99. interrupts = <0 1 2 3 4>;
  100. #interrupt-cells = <1>;
  101. #address-cells = <0>;
  102. #size-cells = <0>;
  103. interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
  104. /*RXEOB*/ 1 &UIC0 b 4
  105. /*SERR*/ 2 &UIC1 0 4
  106. /*TXDE*/ 3 &UIC1 1 4
  107. /*RXDE*/ 4 &UIC1 2 4>;
  108. interrupt-map-mask = <ffffffff>;
  109. };
  110. USB1: usb@e0000400 {
  111. compatible = "ohci-be";
  112. reg = <0 e0000400 60>;
  113. interrupt-parent = <&UIC0>;
  114. interrupts = <15 8>;
  115. };
  116. POB0: opb {
  117. compatible = "ibm,opb-440epx", "ibm,opb";
  118. #address-cells = <1>;
  119. #size-cells = <1>;
  120. ranges = <00000000 1 00000000 80000000
  121. 80000000 1 80000000 80000000>;
  122. interrupt-parent = <&UIC1>;
  123. interrupts = <7 4>;
  124. clock-frequency = <0>; /* Filled in by zImage */
  125. EBC0: ebc {
  126. compatible = "ibm,ebc-440epx", "ibm,ebc";
  127. dcr-reg = <012 2>;
  128. #address-cells = <2>;
  129. #size-cells = <1>;
  130. clock-frequency = <0>; /* Filled in by zImage */
  131. interrupts = <5 1>;
  132. interrupt-parent = <&UIC1>;
  133. nor_flash@0,0 {
  134. compatible = "amd,s29gl256n", "cfi-flash";
  135. bank-width = <2>;
  136. reg = <0 000000 4000000>;
  137. #address-cells = <1>;
  138. #size-cells = <1>;
  139. partition@0 {
  140. label = "Kernel";
  141. reg = <0 180000>;
  142. };
  143. partition@180000 {
  144. label = "ramdisk";
  145. reg = <180000 200000>;
  146. };
  147. partition@380000 {
  148. label = "file system";
  149. reg = <380000 3aa0000>;
  150. };
  151. partition@3e20000 {
  152. label = "kozio";
  153. reg = <3e20000 140000>;
  154. };
  155. partition@3f60000 {
  156. label = "env";
  157. reg = <3f60000 40000>;
  158. };
  159. partition@3fa0000 {
  160. label = "u-boot";
  161. reg = <3fa0000 60000>;
  162. };
  163. };
  164. };
  165. UART0: serial@ef600300 {
  166. device_type = "serial";
  167. compatible = "ns16550";
  168. reg = <ef600300 8>;
  169. virtual-reg = <ef600300>;
  170. clock-frequency = <0>; /* Filled in by zImage */
  171. current-speed = <1c200>;
  172. interrupt-parent = <&UIC0>;
  173. interrupts = <0 4>;
  174. };
  175. UART1: serial@ef600400 {
  176. device_type = "serial";
  177. compatible = "ns16550";
  178. reg = <ef600400 8>;
  179. virtual-reg = <ef600400>;
  180. clock-frequency = <0>;
  181. current-speed = <0>;
  182. interrupt-parent = <&UIC0>;
  183. interrupts = <1 4>;
  184. };
  185. UART2: serial@ef600500 {
  186. device_type = "serial";
  187. compatible = "ns16550";
  188. reg = <ef600500 8>;
  189. virtual-reg = <ef600500>;
  190. clock-frequency = <0>;
  191. current-speed = <0>;
  192. interrupt-parent = <&UIC1>;
  193. interrupts = <3 4>;
  194. };
  195. UART3: serial@ef600600 {
  196. device_type = "serial";
  197. compatible = "ns16550";
  198. reg = <ef600600 8>;
  199. virtual-reg = <ef600600>;
  200. clock-frequency = <0>;
  201. current-speed = <0>;
  202. interrupt-parent = <&UIC1>;
  203. interrupts = <4 4>;
  204. };
  205. IIC0: i2c@ef600700 {
  206. device_type = "i2c";
  207. compatible = "ibm,iic-440epx", "ibm,iic";
  208. reg = <ef600700 14>;
  209. interrupt-parent = <&UIC0>;
  210. interrupts = <2 4>;
  211. };
  212. IIC1: i2c@ef600800 {
  213. device_type = "i2c";
  214. compatible = "ibm,iic-440epx", "ibm,iic";
  215. reg = <ef600800 14>;
  216. interrupt-parent = <&UIC0>;
  217. interrupts = <7 4>;
  218. };
  219. ZMII0: emac-zmii@ef600d00 {
  220. device_type = "zmii-interface";
  221. compatible = "ibm,zmii-440epx", "ibm,zmii";
  222. reg = <ef600d00 c>;
  223. };
  224. RGMII0: emac-rgmii@ef601000 {
  225. device_type = "rgmii-interface";
  226. compatible = "ibm,rgmii-440epx", "ibm,rgmii";
  227. reg = <ef601000 8>;
  228. has-mdio;
  229. };
  230. EMAC0: ethernet@ef600e00 {
  231. linux,network-index = <0>;
  232. device_type = "network";
  233. compatible = "ibm,emac-440epx", "ibm,emac4";
  234. interrupt-parent = <&EMAC0>;
  235. interrupts = <0 1>;
  236. #interrupt-cells = <1>;
  237. #address-cells = <0>;
  238. #size-cells = <0>;
  239. interrupt-map = </*Status*/ 0 &UIC0 18 4
  240. /*Wake*/ 1 &UIC1 1d 4>;
  241. reg = <ef600e00 70>;
  242. local-mac-address = [000000000000];
  243. mal-device = <&MAL0>;
  244. mal-tx-channel = <0>;
  245. mal-rx-channel = <0>;
  246. cell-index = <0>;
  247. max-frame-size = <5dc>;
  248. rx-fifo-size = <1000>;
  249. tx-fifo-size = <800>;
  250. phy-mode = "rgmii";
  251. phy-map = <00000000>;
  252. zmii-device = <&ZMII0>;
  253. zmii-channel = <0>;
  254. rgmii-device = <&RGMII0>;
  255. rgmii-channel = <0>;
  256. has-inverted-stacr-oc;
  257. has-new-stacr-staopc;
  258. };
  259. EMAC1: ethernet@ef600f00 {
  260. linux,network-index = <1>;
  261. device_type = "network";
  262. compatible = "ibm,emac-440epx", "ibm,emac4";
  263. interrupt-parent = <&EMAC1>;
  264. interrupts = <0 1>;
  265. #interrupt-cells = <1>;
  266. #address-cells = <0>;
  267. #size-cells = <0>;
  268. interrupt-map = </*Status*/ 0 &UIC0 19 4
  269. /*Wake*/ 1 &UIC1 1f 4>;
  270. reg = <ef600f00 70>;
  271. local-mac-address = [000000000000];
  272. mal-device = <&MAL0>;
  273. mal-tx-channel = <1>;
  274. mal-rx-channel = <1>;
  275. cell-index = <1>;
  276. max-frame-size = <5dc>;
  277. rx-fifo-size = <1000>;
  278. tx-fifo-size = <800>;
  279. phy-mode = "rgmii";
  280. phy-map = <00000000>;
  281. zmii-device = <&ZMII0>;
  282. zmii-channel = <1>;
  283. rgmii-device = <&RGMII0>;
  284. rgmii-channel = <1>;
  285. has-inverted-stacr-oc;
  286. has-new-stacr-staopc;
  287. };
  288. };
  289. PCI0: pci@1ec000000 {
  290. device_type = "pci";
  291. #interrupt-cells = <1>;
  292. #size-cells = <2>;
  293. #address-cells = <3>;
  294. compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
  295. primary;
  296. reg = <1 eec00000 8 /* Config space access */
  297. 1 eed00000 4 /* IACK */
  298. 1 eed00000 4 /* Special cycle */
  299. 1 ef400000 40>; /* Internal registers */
  300. /* Outbound ranges, one memory and one IO,
  301. * later cannot be changed. Chip supports a second
  302. * IO range but we don't use it for now
  303. */
  304. ranges = <02000000 0 80000000 1 80000000 0 10000000
  305. 01000000 0 00000000 1 e8000000 0 00100000>;
  306. /* Inbound 2GB range starting at 0 */
  307. dma-ranges = <42000000 0 0 0 0 0 80000000>;
  308. /* All PCI interrupts are routed to IRQ 67 */
  309. interrupt-map-mask = <0000 0 0 0>;
  310. interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
  311. };
  312. };
  313. chosen {
  314. linux,stdout-path = "/plb/opb/serial@ef600300";
  315. bootargs = "console=ttyS0,115200";
  316. };
  317. };