spu_base.c 18 KB

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  1. /*
  2. * Low-level SPU handling
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #undef DEBUG
  23. #include <linux/interrupt.h>
  24. #include <linux/list.h>
  25. #include <linux/module.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/slab.h>
  28. #include <linux/wait.h>
  29. #include <linux/mm.h>
  30. #include <linux/io.h>
  31. #include <linux/mutex.h>
  32. #include <linux/linux_logo.h>
  33. #include <asm/spu.h>
  34. #include <asm/spu_priv1.h>
  35. #include <asm/spu_csa.h>
  36. #include <asm/xmon.h>
  37. #include <asm/prom.h>
  38. const struct spu_management_ops *spu_management_ops;
  39. EXPORT_SYMBOL_GPL(spu_management_ops);
  40. const struct spu_priv1_ops *spu_priv1_ops;
  41. EXPORT_SYMBOL_GPL(spu_priv1_ops);
  42. struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
  43. EXPORT_SYMBOL_GPL(cbe_spu_info);
  44. /*
  45. * The spufs fault-handling code needs to call force_sig_info to raise signals
  46. * on DMA errors. Export it here to avoid general kernel-wide access to this
  47. * function
  48. */
  49. EXPORT_SYMBOL_GPL(force_sig_info);
  50. /*
  51. * Protects cbe_spu_info and spu->number.
  52. */
  53. static DEFINE_SPINLOCK(spu_lock);
  54. /*
  55. * List of all spus in the system.
  56. *
  57. * This list is iterated by callers from irq context and callers that
  58. * want to sleep. Thus modifications need to be done with both
  59. * spu_full_list_lock and spu_full_list_mutex held, while iterating
  60. * through it requires either of these locks.
  61. *
  62. * In addition spu_full_list_lock protects all assignmens to
  63. * spu->mm.
  64. */
  65. static LIST_HEAD(spu_full_list);
  66. static DEFINE_SPINLOCK(spu_full_list_lock);
  67. static DEFINE_MUTEX(spu_full_list_mutex);
  68. struct spu_slb {
  69. u64 esid, vsid;
  70. };
  71. void spu_invalidate_slbs(struct spu *spu)
  72. {
  73. struct spu_priv2 __iomem *priv2 = spu->priv2;
  74. if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
  75. out_be64(&priv2->slb_invalidate_all_W, 0UL);
  76. }
  77. EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
  78. /* This is called by the MM core when a segment size is changed, to
  79. * request a flush of all the SPEs using a given mm
  80. */
  81. void spu_flush_all_slbs(struct mm_struct *mm)
  82. {
  83. struct spu *spu;
  84. unsigned long flags;
  85. spin_lock_irqsave(&spu_full_list_lock, flags);
  86. list_for_each_entry(spu, &spu_full_list, full_list) {
  87. if (spu->mm == mm)
  88. spu_invalidate_slbs(spu);
  89. }
  90. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  91. }
  92. /* The hack below stinks... try to do something better one of
  93. * these days... Does it even work properly with NR_CPUS == 1 ?
  94. */
  95. static inline void mm_needs_global_tlbie(struct mm_struct *mm)
  96. {
  97. int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
  98. /* Global TLBIE broadcast required with SPEs. */
  99. __cpus_setall(&mm->cpu_vm_mask, nr);
  100. }
  101. void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
  102. {
  103. unsigned long flags;
  104. spin_lock_irqsave(&spu_full_list_lock, flags);
  105. spu->mm = mm;
  106. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  107. if (mm)
  108. mm_needs_global_tlbie(mm);
  109. }
  110. EXPORT_SYMBOL_GPL(spu_associate_mm);
  111. static int __spu_trap_invalid_dma(struct spu *spu)
  112. {
  113. pr_debug("%s\n", __FUNCTION__);
  114. spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
  115. return 0;
  116. }
  117. static int __spu_trap_dma_align(struct spu *spu)
  118. {
  119. pr_debug("%s\n", __FUNCTION__);
  120. spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
  121. return 0;
  122. }
  123. static int __spu_trap_error(struct spu *spu)
  124. {
  125. pr_debug("%s\n", __FUNCTION__);
  126. spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
  127. return 0;
  128. }
  129. static void spu_restart_dma(struct spu *spu)
  130. {
  131. struct spu_priv2 __iomem *priv2 = spu->priv2;
  132. if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
  133. out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
  134. }
  135. static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
  136. {
  137. struct spu_priv2 __iomem *priv2 = spu->priv2;
  138. pr_debug("%s: adding SLB[%d] 0x%016lx 0x%016lx\n",
  139. __func__, slbe, slb->vsid, slb->esid);
  140. out_be64(&priv2->slb_index_W, slbe);
  141. out_be64(&priv2->slb_vsid_RW, slb->vsid);
  142. out_be64(&priv2->slb_esid_RW, slb->esid);
  143. }
  144. static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
  145. {
  146. struct spu_priv2 __iomem *priv2 = spu->priv2;
  147. struct mm_struct *mm = spu->mm;
  148. u64 esid, vsid, llp;
  149. int psize;
  150. pr_debug("%s\n", __FUNCTION__);
  151. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  152. /* SLBs are pre-loaded for context switch, so
  153. * we should never get here!
  154. */
  155. printk("%s: invalid access during switch!\n", __func__);
  156. return 1;
  157. }
  158. esid = (ea & ESID_MASK) | SLB_ESID_V;
  159. switch(REGION_ID(ea)) {
  160. case USER_REGION_ID:
  161. #ifdef CONFIG_PPC_MM_SLICES
  162. psize = get_slice_psize(mm, ea);
  163. #else
  164. psize = mm->context.user_psize;
  165. #endif
  166. vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  167. SLB_VSID_USER;
  168. break;
  169. case VMALLOC_REGION_ID:
  170. if (ea < VMALLOC_END)
  171. psize = mmu_vmalloc_psize;
  172. else
  173. psize = mmu_io_psize;
  174. vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  175. SLB_VSID_KERNEL;
  176. break;
  177. case KERNEL_REGION_ID:
  178. psize = mmu_linear_psize;
  179. vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  180. SLB_VSID_KERNEL;
  181. break;
  182. default:
  183. /* Future: support kernel segments so that drivers
  184. * can use SPUs.
  185. */
  186. pr_debug("invalid region access at %016lx\n", ea);
  187. return 1;
  188. }
  189. llp = mmu_psize_defs[psize].sllp;
  190. out_be64(&priv2->slb_index_W, spu->slb_replace);
  191. out_be64(&priv2->slb_vsid_RW, vsid | llp);
  192. out_be64(&priv2->slb_esid_RW, esid);
  193. spu->slb_replace++;
  194. if (spu->slb_replace >= 8)
  195. spu->slb_replace = 0;
  196. spu_restart_dma(spu);
  197. spu->stats.slb_flt++;
  198. return 0;
  199. }
  200. extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
  201. static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
  202. {
  203. pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
  204. /* Handle kernel space hash faults immediately.
  205. User hash faults need to be deferred to process context. */
  206. if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
  207. && REGION_ID(ea) != USER_REGION_ID
  208. && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
  209. spu_restart_dma(spu);
  210. return 0;
  211. }
  212. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  213. printk("%s: invalid access during switch!\n", __func__);
  214. return 1;
  215. }
  216. spu->dar = ea;
  217. spu->dsisr = dsisr;
  218. mb();
  219. spu->stop_callback(spu);
  220. return 0;
  221. }
  222. static void __spu_kernel_slb(void *addr, struct spu_slb *slb)
  223. {
  224. unsigned long ea = (unsigned long)addr;
  225. u64 llp;
  226. if (REGION_ID(ea) == KERNEL_REGION_ID)
  227. llp = mmu_psize_defs[mmu_linear_psize].sllp;
  228. else
  229. llp = mmu_psize_defs[mmu_virtual_psize].sllp;
  230. slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  231. SLB_VSID_KERNEL | llp;
  232. slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
  233. }
  234. /**
  235. * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
  236. * need to map both the context save area, and the save/restore code.
  237. */
  238. void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, void *code)
  239. {
  240. struct spu_slb code_slb, lscsa_slb;
  241. __spu_kernel_slb(lscsa, &lscsa_slb);
  242. __spu_kernel_slb(code, &code_slb);
  243. spu_load_slb(spu, 0, &lscsa_slb);
  244. if (lscsa_slb.esid != code_slb.esid)
  245. spu_load_slb(spu, 1, &code_slb);
  246. }
  247. EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
  248. static irqreturn_t
  249. spu_irq_class_0(int irq, void *data)
  250. {
  251. struct spu *spu;
  252. unsigned long stat, mask;
  253. spu = data;
  254. mask = spu_int_mask_get(spu, 0);
  255. stat = spu_int_stat_get(spu, 0);
  256. stat &= mask;
  257. spin_lock(&spu->register_lock);
  258. spu->class_0_pending |= stat;
  259. spin_unlock(&spu->register_lock);
  260. spu->stop_callback(spu);
  261. spu_int_stat_clear(spu, 0, stat);
  262. return IRQ_HANDLED;
  263. }
  264. int
  265. spu_irq_class_0_bottom(struct spu *spu)
  266. {
  267. unsigned long flags;
  268. unsigned long stat;
  269. spin_lock_irqsave(&spu->register_lock, flags);
  270. stat = spu->class_0_pending;
  271. spu->class_0_pending = 0;
  272. if (stat & 1) /* invalid DMA alignment */
  273. __spu_trap_dma_align(spu);
  274. if (stat & 2) /* invalid MFC DMA */
  275. __spu_trap_invalid_dma(spu);
  276. if (stat & 4) /* error on SPU */
  277. __spu_trap_error(spu);
  278. spin_unlock_irqrestore(&spu->register_lock, flags);
  279. return (stat & 0x7) ? -EIO : 0;
  280. }
  281. EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
  282. static irqreturn_t
  283. spu_irq_class_1(int irq, void *data)
  284. {
  285. struct spu *spu;
  286. unsigned long stat, mask, dar, dsisr;
  287. spu = data;
  288. /* atomically read & clear class1 status. */
  289. spin_lock(&spu->register_lock);
  290. mask = spu_int_mask_get(spu, 1);
  291. stat = spu_int_stat_get(spu, 1) & mask;
  292. dar = spu_mfc_dar_get(spu);
  293. dsisr = spu_mfc_dsisr_get(spu);
  294. if (stat & 2) /* mapping fault */
  295. spu_mfc_dsisr_set(spu, 0ul);
  296. spu_int_stat_clear(spu, 1, stat);
  297. spin_unlock(&spu->register_lock);
  298. pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
  299. dar, dsisr);
  300. if (stat & 1) /* segment fault */
  301. __spu_trap_data_seg(spu, dar);
  302. if (stat & 2) { /* mapping fault */
  303. __spu_trap_data_map(spu, dar, dsisr);
  304. }
  305. if (stat & 4) /* ls compare & suspend on get */
  306. ;
  307. if (stat & 8) /* ls compare & suspend on put */
  308. ;
  309. return stat ? IRQ_HANDLED : IRQ_NONE;
  310. }
  311. static irqreturn_t
  312. spu_irq_class_2(int irq, void *data)
  313. {
  314. struct spu *spu;
  315. unsigned long stat;
  316. unsigned long mask;
  317. spu = data;
  318. spin_lock(&spu->register_lock);
  319. stat = spu_int_stat_get(spu, 2);
  320. mask = spu_int_mask_get(spu, 2);
  321. /* ignore interrupts we're not waiting for */
  322. stat &= mask;
  323. /*
  324. * mailbox interrupts (0x1 and 0x10) are level triggered.
  325. * mask them now before acknowledging.
  326. */
  327. if (stat & 0x11)
  328. spu_int_mask_and(spu, 2, ~(stat & 0x11));
  329. /* acknowledge all interrupts before the callbacks */
  330. spu_int_stat_clear(spu, 2, stat);
  331. spin_unlock(&spu->register_lock);
  332. pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
  333. if (stat & 1) /* PPC core mailbox */
  334. spu->ibox_callback(spu);
  335. if (stat & 2) /* SPU stop-and-signal */
  336. spu->stop_callback(spu);
  337. if (stat & 4) /* SPU halted */
  338. spu->stop_callback(spu);
  339. if (stat & 8) /* DMA tag group complete */
  340. spu->mfc_callback(spu);
  341. if (stat & 0x10) /* SPU mailbox threshold */
  342. spu->wbox_callback(spu);
  343. spu->stats.class2_intr++;
  344. return stat ? IRQ_HANDLED : IRQ_NONE;
  345. }
  346. static int spu_request_irqs(struct spu *spu)
  347. {
  348. int ret = 0;
  349. if (spu->irqs[0] != NO_IRQ) {
  350. snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
  351. spu->number);
  352. ret = request_irq(spu->irqs[0], spu_irq_class_0,
  353. IRQF_DISABLED,
  354. spu->irq_c0, spu);
  355. if (ret)
  356. goto bail0;
  357. }
  358. if (spu->irqs[1] != NO_IRQ) {
  359. snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
  360. spu->number);
  361. ret = request_irq(spu->irqs[1], spu_irq_class_1,
  362. IRQF_DISABLED,
  363. spu->irq_c1, spu);
  364. if (ret)
  365. goto bail1;
  366. }
  367. if (spu->irqs[2] != NO_IRQ) {
  368. snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
  369. spu->number);
  370. ret = request_irq(spu->irqs[2], spu_irq_class_2,
  371. IRQF_DISABLED,
  372. spu->irq_c2, spu);
  373. if (ret)
  374. goto bail2;
  375. }
  376. return 0;
  377. bail2:
  378. if (spu->irqs[1] != NO_IRQ)
  379. free_irq(spu->irqs[1], spu);
  380. bail1:
  381. if (spu->irqs[0] != NO_IRQ)
  382. free_irq(spu->irqs[0], spu);
  383. bail0:
  384. return ret;
  385. }
  386. static void spu_free_irqs(struct spu *spu)
  387. {
  388. if (spu->irqs[0] != NO_IRQ)
  389. free_irq(spu->irqs[0], spu);
  390. if (spu->irqs[1] != NO_IRQ)
  391. free_irq(spu->irqs[1], spu);
  392. if (spu->irqs[2] != NO_IRQ)
  393. free_irq(spu->irqs[2], spu);
  394. }
  395. void spu_init_channels(struct spu *spu)
  396. {
  397. static const struct {
  398. unsigned channel;
  399. unsigned count;
  400. } zero_list[] = {
  401. { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
  402. { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
  403. }, count_list[] = {
  404. { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
  405. { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
  406. { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
  407. };
  408. struct spu_priv2 __iomem *priv2;
  409. int i;
  410. priv2 = spu->priv2;
  411. /* initialize all channel data to zero */
  412. for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
  413. int count;
  414. out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
  415. for (count = 0; count < zero_list[i].count; count++)
  416. out_be64(&priv2->spu_chnldata_RW, 0);
  417. }
  418. /* initialize channel counts to meaningful values */
  419. for (i = 0; i < ARRAY_SIZE(count_list); i++) {
  420. out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
  421. out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
  422. }
  423. }
  424. EXPORT_SYMBOL_GPL(spu_init_channels);
  425. static int spu_shutdown(struct sys_device *sysdev)
  426. {
  427. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  428. spu_free_irqs(spu);
  429. spu_destroy_spu(spu);
  430. return 0;
  431. }
  432. static struct sysdev_class spu_sysdev_class = {
  433. set_kset_name("spu"),
  434. .shutdown = spu_shutdown,
  435. };
  436. int spu_add_sysdev_attr(struct sysdev_attribute *attr)
  437. {
  438. struct spu *spu;
  439. mutex_lock(&spu_full_list_mutex);
  440. list_for_each_entry(spu, &spu_full_list, full_list)
  441. sysdev_create_file(&spu->sysdev, attr);
  442. mutex_unlock(&spu_full_list_mutex);
  443. return 0;
  444. }
  445. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
  446. int spu_add_sysdev_attr_group(struct attribute_group *attrs)
  447. {
  448. struct spu *spu;
  449. mutex_lock(&spu_full_list_mutex);
  450. list_for_each_entry(spu, &spu_full_list, full_list)
  451. sysfs_create_group(&spu->sysdev.kobj, attrs);
  452. mutex_unlock(&spu_full_list_mutex);
  453. return 0;
  454. }
  455. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
  456. void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
  457. {
  458. struct spu *spu;
  459. mutex_lock(&spu_full_list_mutex);
  460. list_for_each_entry(spu, &spu_full_list, full_list)
  461. sysdev_remove_file(&spu->sysdev, attr);
  462. mutex_unlock(&spu_full_list_mutex);
  463. }
  464. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
  465. void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
  466. {
  467. struct spu *spu;
  468. mutex_lock(&spu_full_list_mutex);
  469. list_for_each_entry(spu, &spu_full_list, full_list)
  470. sysfs_remove_group(&spu->sysdev.kobj, attrs);
  471. mutex_unlock(&spu_full_list_mutex);
  472. }
  473. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
  474. static int spu_create_sysdev(struct spu *spu)
  475. {
  476. int ret;
  477. spu->sysdev.id = spu->number;
  478. spu->sysdev.cls = &spu_sysdev_class;
  479. ret = sysdev_register(&spu->sysdev);
  480. if (ret) {
  481. printk(KERN_ERR "Can't register SPU %d with sysfs\n",
  482. spu->number);
  483. return ret;
  484. }
  485. sysfs_add_device_to_node(&spu->sysdev, spu->node);
  486. return 0;
  487. }
  488. static int __init create_spu(void *data)
  489. {
  490. struct spu *spu;
  491. int ret;
  492. static int number;
  493. unsigned long flags;
  494. struct timespec ts;
  495. ret = -ENOMEM;
  496. spu = kzalloc(sizeof (*spu), GFP_KERNEL);
  497. if (!spu)
  498. goto out;
  499. spu->alloc_state = SPU_FREE;
  500. spin_lock_init(&spu->register_lock);
  501. spin_lock(&spu_lock);
  502. spu->number = number++;
  503. spin_unlock(&spu_lock);
  504. ret = spu_create_spu(spu, data);
  505. if (ret)
  506. goto out_free;
  507. spu_mfc_sdr_setup(spu);
  508. spu_mfc_sr1_set(spu, 0x33);
  509. ret = spu_request_irqs(spu);
  510. if (ret)
  511. goto out_destroy;
  512. ret = spu_create_sysdev(spu);
  513. if (ret)
  514. goto out_free_irqs;
  515. mutex_lock(&cbe_spu_info[spu->node].list_mutex);
  516. list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
  517. cbe_spu_info[spu->node].n_spus++;
  518. mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
  519. mutex_lock(&spu_full_list_mutex);
  520. spin_lock_irqsave(&spu_full_list_lock, flags);
  521. list_add(&spu->full_list, &spu_full_list);
  522. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  523. mutex_unlock(&spu_full_list_mutex);
  524. spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
  525. ktime_get_ts(&ts);
  526. spu->stats.tstamp = timespec_to_ns(&ts);
  527. INIT_LIST_HEAD(&spu->aff_list);
  528. goto out;
  529. out_free_irqs:
  530. spu_free_irqs(spu);
  531. out_destroy:
  532. spu_destroy_spu(spu);
  533. out_free:
  534. kfree(spu);
  535. out:
  536. return ret;
  537. }
  538. static const char *spu_state_names[] = {
  539. "user", "system", "iowait", "idle"
  540. };
  541. static unsigned long long spu_acct_time(struct spu *spu,
  542. enum spu_utilization_state state)
  543. {
  544. struct timespec ts;
  545. unsigned long long time = spu->stats.times[state];
  546. /*
  547. * If the spu is idle or the context is stopped, utilization
  548. * statistics are not updated. Apply the time delta from the
  549. * last recorded state of the spu.
  550. */
  551. if (spu->stats.util_state == state) {
  552. ktime_get_ts(&ts);
  553. time += timespec_to_ns(&ts) - spu->stats.tstamp;
  554. }
  555. return time / NSEC_PER_MSEC;
  556. }
  557. static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
  558. {
  559. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  560. return sprintf(buf, "%s %llu %llu %llu %llu "
  561. "%llu %llu %llu %llu %llu %llu %llu %llu\n",
  562. spu_state_names[spu->stats.util_state],
  563. spu_acct_time(spu, SPU_UTIL_USER),
  564. spu_acct_time(spu, SPU_UTIL_SYSTEM),
  565. spu_acct_time(spu, SPU_UTIL_IOWAIT),
  566. spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
  567. spu->stats.vol_ctx_switch,
  568. spu->stats.invol_ctx_switch,
  569. spu->stats.slb_flt,
  570. spu->stats.hash_flt,
  571. spu->stats.min_flt,
  572. spu->stats.maj_flt,
  573. spu->stats.class2_intr,
  574. spu->stats.libassist);
  575. }
  576. static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
  577. static int __init init_spu_base(void)
  578. {
  579. int i, ret = 0;
  580. for (i = 0; i < MAX_NUMNODES; i++) {
  581. mutex_init(&cbe_spu_info[i].list_mutex);
  582. INIT_LIST_HEAD(&cbe_spu_info[i].spus);
  583. }
  584. if (!spu_management_ops)
  585. goto out;
  586. /* create sysdev class for spus */
  587. ret = sysdev_class_register(&spu_sysdev_class);
  588. if (ret)
  589. goto out;
  590. ret = spu_enumerate_spus(create_spu);
  591. if (ret < 0) {
  592. printk(KERN_WARNING "%s: Error initializing spus\n",
  593. __FUNCTION__);
  594. goto out_unregister_sysdev_class;
  595. }
  596. if (ret > 0) {
  597. /*
  598. * We cannot put the forward declaration in
  599. * <linux/linux_logo.h> because of conflicting session type
  600. * conflicts for const and __initdata with different compiler
  601. * versions
  602. */
  603. extern const struct linux_logo logo_spe_clut224;
  604. fb_append_extra_logo(&logo_spe_clut224, ret);
  605. }
  606. mutex_lock(&spu_full_list_mutex);
  607. xmon_register_spus(&spu_full_list);
  608. crash_register_spus(&spu_full_list);
  609. mutex_unlock(&spu_full_list_mutex);
  610. spu_add_sysdev_attr(&attr_stat);
  611. spu_init_affinity();
  612. return 0;
  613. out_unregister_sysdev_class:
  614. sysdev_class_unregister(&spu_sysdev_class);
  615. out:
  616. return ret;
  617. }
  618. module_init(init_spu_base);
  619. MODULE_LICENSE("GPL");
  620. MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");