qla_isr.c 69 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2011 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/slab.h>
  10. #include <scsi/scsi_tcq.h>
  11. #include <scsi/scsi_bsg_fc.h>
  12. #include <scsi/scsi_eh.h>
  13. static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
  14. static void qla2x00_process_completed_request(struct scsi_qla_host *,
  15. struct req_que *, uint32_t);
  16. static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
  17. static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
  18. static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
  19. sts_entry_t *);
  20. /**
  21. * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
  22. * @irq:
  23. * @dev_id: SCSI driver HA context
  24. *
  25. * Called by system whenever the host adapter generates an interrupt.
  26. *
  27. * Returns handled flag.
  28. */
  29. irqreturn_t
  30. qla2100_intr_handler(int irq, void *dev_id)
  31. {
  32. scsi_qla_host_t *vha;
  33. struct qla_hw_data *ha;
  34. struct device_reg_2xxx __iomem *reg;
  35. int status;
  36. unsigned long iter;
  37. uint16_t hccr;
  38. uint16_t mb[4];
  39. struct rsp_que *rsp;
  40. unsigned long flags;
  41. rsp = (struct rsp_que *) dev_id;
  42. if (!rsp) {
  43. printk(KERN_INFO
  44. "%s(): NULL response queue pointer.\n", __func__);
  45. return (IRQ_NONE);
  46. }
  47. ha = rsp->hw;
  48. reg = &ha->iobase->isp;
  49. status = 0;
  50. spin_lock_irqsave(&ha->hardware_lock, flags);
  51. vha = pci_get_drvdata(ha->pdev);
  52. for (iter = 50; iter--; ) {
  53. hccr = RD_REG_WORD(&reg->hccr);
  54. if (hccr & HCCR_RISC_PAUSE) {
  55. if (pci_channel_offline(ha->pdev))
  56. break;
  57. /*
  58. * Issue a "HARD" reset in order for the RISC interrupt
  59. * bit to be cleared. Schedule a big hammer to get
  60. * out of the RISC PAUSED state.
  61. */
  62. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  63. RD_REG_WORD(&reg->hccr);
  64. ha->isp_ops->fw_dump(vha, 1);
  65. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  66. break;
  67. } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
  68. break;
  69. if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
  70. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  71. RD_REG_WORD(&reg->hccr);
  72. /* Get mailbox data. */
  73. mb[0] = RD_MAILBOX_REG(ha, reg, 0);
  74. if (mb[0] > 0x3fff && mb[0] < 0x8000) {
  75. qla2x00_mbx_completion(vha, mb[0]);
  76. status |= MBX_INTERRUPT;
  77. } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
  78. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  79. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  80. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  81. qla2x00_async_event(vha, rsp, mb);
  82. } else {
  83. /*EMPTY*/
  84. ql_dbg(ql_dbg_async, vha, 0x5025,
  85. "Unrecognized interrupt type (%d).\n",
  86. mb[0]);
  87. }
  88. /* Release mailbox registers. */
  89. WRT_REG_WORD(&reg->semaphore, 0);
  90. RD_REG_WORD(&reg->semaphore);
  91. } else {
  92. qla2x00_process_response_queue(rsp);
  93. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  94. RD_REG_WORD(&reg->hccr);
  95. }
  96. }
  97. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  98. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  99. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  100. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  101. complete(&ha->mbx_intr_comp);
  102. }
  103. return (IRQ_HANDLED);
  104. }
  105. /**
  106. * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
  107. * @irq:
  108. * @dev_id: SCSI driver HA context
  109. *
  110. * Called by system whenever the host adapter generates an interrupt.
  111. *
  112. * Returns handled flag.
  113. */
  114. irqreturn_t
  115. qla2300_intr_handler(int irq, void *dev_id)
  116. {
  117. scsi_qla_host_t *vha;
  118. struct device_reg_2xxx __iomem *reg;
  119. int status;
  120. unsigned long iter;
  121. uint32_t stat;
  122. uint16_t hccr;
  123. uint16_t mb[4];
  124. struct rsp_que *rsp;
  125. struct qla_hw_data *ha;
  126. unsigned long flags;
  127. rsp = (struct rsp_que *) dev_id;
  128. if (!rsp) {
  129. printk(KERN_INFO
  130. "%s(): NULL response queue pointer.\n", __func__);
  131. return (IRQ_NONE);
  132. }
  133. ha = rsp->hw;
  134. reg = &ha->iobase->isp;
  135. status = 0;
  136. spin_lock_irqsave(&ha->hardware_lock, flags);
  137. vha = pci_get_drvdata(ha->pdev);
  138. for (iter = 50; iter--; ) {
  139. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  140. if (stat & HSR_RISC_PAUSED) {
  141. if (unlikely(pci_channel_offline(ha->pdev)))
  142. break;
  143. hccr = RD_REG_WORD(&reg->hccr);
  144. if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
  145. ql_log(ql_log_warn, vha, 0x5026,
  146. "Parity error -- HCCR=%x, Dumping "
  147. "firmware.\n", hccr);
  148. else
  149. ql_log(ql_log_warn, vha, 0x5027,
  150. "RISC paused -- HCCR=%x, Dumping "
  151. "firmware.\n", hccr);
  152. /*
  153. * Issue a "HARD" reset in order for the RISC
  154. * interrupt bit to be cleared. Schedule a big
  155. * hammer to get out of the RISC PAUSED state.
  156. */
  157. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  158. RD_REG_WORD(&reg->hccr);
  159. ha->isp_ops->fw_dump(vha, 1);
  160. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  161. break;
  162. } else if ((stat & HSR_RISC_INT) == 0)
  163. break;
  164. switch (stat & 0xff) {
  165. case 0x1:
  166. case 0x2:
  167. case 0x10:
  168. case 0x11:
  169. qla2x00_mbx_completion(vha, MSW(stat));
  170. status |= MBX_INTERRUPT;
  171. /* Release mailbox registers. */
  172. WRT_REG_WORD(&reg->semaphore, 0);
  173. break;
  174. case 0x12:
  175. mb[0] = MSW(stat);
  176. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  177. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  178. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  179. qla2x00_async_event(vha, rsp, mb);
  180. break;
  181. case 0x13:
  182. qla2x00_process_response_queue(rsp);
  183. break;
  184. case 0x15:
  185. mb[0] = MBA_CMPLT_1_16BIT;
  186. mb[1] = MSW(stat);
  187. qla2x00_async_event(vha, rsp, mb);
  188. break;
  189. case 0x16:
  190. mb[0] = MBA_SCSI_COMPLETION;
  191. mb[1] = MSW(stat);
  192. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  193. qla2x00_async_event(vha, rsp, mb);
  194. break;
  195. default:
  196. ql_dbg(ql_dbg_async, vha, 0x5028,
  197. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  198. break;
  199. }
  200. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  201. RD_REG_WORD_RELAXED(&reg->hccr);
  202. }
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  205. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  206. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  207. complete(&ha->mbx_intr_comp);
  208. }
  209. return (IRQ_HANDLED);
  210. }
  211. /**
  212. * qla2x00_mbx_completion() - Process mailbox command completions.
  213. * @ha: SCSI driver HA context
  214. * @mb0: Mailbox0 register
  215. */
  216. static void
  217. qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  218. {
  219. uint16_t cnt;
  220. uint16_t __iomem *wptr;
  221. struct qla_hw_data *ha = vha->hw;
  222. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  223. /* Load return mailbox registers. */
  224. ha->flags.mbox_int = 1;
  225. ha->mailbox_out[0] = mb0;
  226. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
  227. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  228. if (IS_QLA2200(ha) && cnt == 8)
  229. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
  230. if (cnt == 4 || cnt == 5)
  231. ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
  232. else
  233. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  234. wptr++;
  235. }
  236. if (ha->mcp) {
  237. ql_dbg(ql_dbg_async, vha, 0x5000,
  238. "Got mbx completion. cmd=%x.\n", ha->mcp->mb[0]);
  239. } else {
  240. ql_dbg(ql_dbg_async, vha, 0x5001,
  241. "MBX pointer ERROR.\n");
  242. }
  243. }
  244. static void
  245. qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
  246. {
  247. static char *event[] =
  248. { "Complete", "Request Notification", "Time Extension" };
  249. int rval;
  250. struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
  251. uint16_t __iomem *wptr;
  252. uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
  253. /* Seed data -- mailbox1 -> mailbox7. */
  254. wptr = (uint16_t __iomem *)&reg24->mailbox1;
  255. for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
  256. mb[cnt] = RD_REG_WORD(wptr);
  257. ql_dbg(ql_dbg_async, vha, 0x5021,
  258. "Inter-Driver Commucation %s -- "
  259. "%04x %04x %04x %04x %04x %04x %04x.\n",
  260. event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
  261. mb[4], mb[5], mb[6]);
  262. /* Acknowledgement needed? [Notify && non-zero timeout]. */
  263. timeout = (descr >> 8) & 0xf;
  264. if (aen != MBA_IDC_NOTIFY || !timeout)
  265. return;
  266. ql_dbg(ql_dbg_async, vha, 0x5022,
  267. "Inter-Driver Commucation %s -- ACK timeout=%d.\n",
  268. vha->host_no, event[aen & 0xff], timeout);
  269. rval = qla2x00_post_idc_ack_work(vha, mb);
  270. if (rval != QLA_SUCCESS)
  271. ql_log(ql_log_warn, vha, 0x5023,
  272. "IDC failed to post ACK.\n");
  273. }
  274. /**
  275. * qla2x00_async_event() - Process aynchronous events.
  276. * @ha: SCSI driver HA context
  277. * @mb: Mailbox registers (0 - 3)
  278. */
  279. void
  280. qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
  281. {
  282. #define LS_UNKNOWN 2
  283. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  284. char *link_speed;
  285. uint16_t handle_cnt;
  286. uint16_t cnt, mbx;
  287. uint32_t handles[5];
  288. struct qla_hw_data *ha = vha->hw;
  289. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  290. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  291. struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
  292. uint32_t rscn_entry, host_pid;
  293. uint8_t rscn_queue_index;
  294. unsigned long flags;
  295. /* Setup to process RIO completion. */
  296. handle_cnt = 0;
  297. if (IS_QLA8XXX_TYPE(ha))
  298. goto skip_rio;
  299. switch (mb[0]) {
  300. case MBA_SCSI_COMPLETION:
  301. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  302. handle_cnt = 1;
  303. break;
  304. case MBA_CMPLT_1_16BIT:
  305. handles[0] = mb[1];
  306. handle_cnt = 1;
  307. mb[0] = MBA_SCSI_COMPLETION;
  308. break;
  309. case MBA_CMPLT_2_16BIT:
  310. handles[0] = mb[1];
  311. handles[1] = mb[2];
  312. handle_cnt = 2;
  313. mb[0] = MBA_SCSI_COMPLETION;
  314. break;
  315. case MBA_CMPLT_3_16BIT:
  316. handles[0] = mb[1];
  317. handles[1] = mb[2];
  318. handles[2] = mb[3];
  319. handle_cnt = 3;
  320. mb[0] = MBA_SCSI_COMPLETION;
  321. break;
  322. case MBA_CMPLT_4_16BIT:
  323. handles[0] = mb[1];
  324. handles[1] = mb[2];
  325. handles[2] = mb[3];
  326. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  327. handle_cnt = 4;
  328. mb[0] = MBA_SCSI_COMPLETION;
  329. break;
  330. case MBA_CMPLT_5_16BIT:
  331. handles[0] = mb[1];
  332. handles[1] = mb[2];
  333. handles[2] = mb[3];
  334. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  335. handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
  336. handle_cnt = 5;
  337. mb[0] = MBA_SCSI_COMPLETION;
  338. break;
  339. case MBA_CMPLT_2_32BIT:
  340. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  341. handles[1] = le32_to_cpu(
  342. ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
  343. RD_MAILBOX_REG(ha, reg, 6));
  344. handle_cnt = 2;
  345. mb[0] = MBA_SCSI_COMPLETION;
  346. break;
  347. default:
  348. break;
  349. }
  350. skip_rio:
  351. switch (mb[0]) {
  352. case MBA_SCSI_COMPLETION: /* Fast Post */
  353. if (!vha->flags.online)
  354. break;
  355. for (cnt = 0; cnt < handle_cnt; cnt++)
  356. qla2x00_process_completed_request(vha, rsp->req,
  357. handles[cnt]);
  358. break;
  359. case MBA_RESET: /* Reset */
  360. ql_dbg(ql_dbg_async, vha, 0x5002,
  361. "Asynchronous RESET.\n");
  362. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  363. break;
  364. case MBA_SYSTEM_ERR: /* System Error */
  365. mbx = IS_QLA81XX(ha) ? RD_REG_WORD(&reg24->mailbox7) : 0;
  366. ql_log(ql_log_warn, vha, 0x5003,
  367. "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
  368. "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
  369. ha->isp_ops->fw_dump(vha, 1);
  370. if (IS_FWI2_CAPABLE(ha)) {
  371. if (mb[1] == 0 && mb[2] == 0) {
  372. ql_log(ql_log_fatal, vha, 0x5004,
  373. "Unrecoverable Hardware Error: adapter "
  374. "marked OFFLINE!\n");
  375. vha->flags.online = 0;
  376. } else {
  377. /* Check to see if MPI timeout occurred */
  378. if ((mbx & MBX_3) && (ha->flags.port0))
  379. set_bit(MPI_RESET_NEEDED,
  380. &vha->dpc_flags);
  381. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  382. }
  383. } else if (mb[1] == 0) {
  384. ql_log(ql_log_fatal, vha, 0x5005,
  385. "Unrecoverable Hardware Error: adapter marked "
  386. "OFFLINE!\n");
  387. vha->flags.online = 0;
  388. } else
  389. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  390. break;
  391. case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
  392. ql_log(ql_log_warn, vha, 0x5006,
  393. "ISP Request Transfer Error (%x).\n", mb[1]);
  394. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  395. break;
  396. case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
  397. ql_log(ql_log_warn, vha, 0x5007,
  398. "ISP Response Transfer Error.\n");
  399. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  400. break;
  401. case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
  402. ql_dbg(ql_dbg_async, vha, 0x5008,
  403. "Asynchronous WAKEUP_THRES.\n");
  404. break;
  405. case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
  406. ql_log(ql_log_info, vha, 0x5009,
  407. "LIP occurred (%x).\n", mb[1]);
  408. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  409. atomic_set(&vha->loop_state, LOOP_DOWN);
  410. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  411. qla2x00_mark_all_devices_lost(vha, 1);
  412. }
  413. if (vha->vp_idx) {
  414. atomic_set(&vha->vp_state, VP_FAILED);
  415. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  416. }
  417. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  418. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  419. vha->flags.management_server_logged_in = 0;
  420. qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
  421. break;
  422. case MBA_LOOP_UP: /* Loop Up Event */
  423. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  424. link_speed = link_speeds[0];
  425. ha->link_data_rate = PORT_SPEED_1GB;
  426. } else {
  427. link_speed = link_speeds[LS_UNKNOWN];
  428. if (mb[1] < 5)
  429. link_speed = link_speeds[mb[1]];
  430. else if (mb[1] == 0x13)
  431. link_speed = link_speeds[5];
  432. ha->link_data_rate = mb[1];
  433. }
  434. ql_log(ql_log_info, vha, 0x500a,
  435. "LOOP UP detected (%s Gbps).\n", link_speed);
  436. vha->flags.management_server_logged_in = 0;
  437. qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
  438. break;
  439. case MBA_LOOP_DOWN: /* Loop Down Event */
  440. mbx = IS_QLA81XX(ha) ? RD_REG_WORD(&reg24->mailbox4) : 0;
  441. mbx = IS_QLA82XX(ha) ? RD_REG_WORD(&reg82->mailbox_out[4]) : mbx;
  442. ql_log(ql_log_info, vha, 0x500b,
  443. "LOOP DOWN detected (%x %x %x %x).\n",
  444. mb[1], mb[2], mb[3], mbx);
  445. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  446. atomic_set(&vha->loop_state, LOOP_DOWN);
  447. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  448. vha->device_flags |= DFLG_NO_CABLE;
  449. qla2x00_mark_all_devices_lost(vha, 1);
  450. }
  451. if (vha->vp_idx) {
  452. atomic_set(&vha->vp_state, VP_FAILED);
  453. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  454. }
  455. vha->flags.management_server_logged_in = 0;
  456. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  457. qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
  458. break;
  459. case MBA_LIP_RESET: /* LIP reset occurred */
  460. ql_log(ql_log_info, vha, 0x500c,
  461. "LIP reset occurred (%x).\n", mb[1]);
  462. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  463. atomic_set(&vha->loop_state, LOOP_DOWN);
  464. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  465. qla2x00_mark_all_devices_lost(vha, 1);
  466. }
  467. if (vha->vp_idx) {
  468. atomic_set(&vha->vp_state, VP_FAILED);
  469. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  470. }
  471. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  472. ha->operating_mode = LOOP;
  473. vha->flags.management_server_logged_in = 0;
  474. qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
  475. break;
  476. /* case MBA_DCBX_COMPLETE: */
  477. case MBA_POINT_TO_POINT: /* Point-to-Point */
  478. if (IS_QLA2100(ha))
  479. break;
  480. if (IS_QLA8XXX_TYPE(ha)) {
  481. ql_dbg(ql_dbg_async, vha, 0x500d,
  482. "DCBX Completed -- %04x %04x %04x.\n",
  483. mb[1], mb[2], mb[3]);
  484. if (ha->notify_dcbx_comp)
  485. complete(&ha->dcbx_comp);
  486. } else
  487. ql_dbg(ql_dbg_async, vha, 0x500e,
  488. "Asynchronous P2P MODE received.\n");
  489. /*
  490. * Until there's a transition from loop down to loop up, treat
  491. * this as loop down only.
  492. */
  493. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  494. atomic_set(&vha->loop_state, LOOP_DOWN);
  495. if (!atomic_read(&vha->loop_down_timer))
  496. atomic_set(&vha->loop_down_timer,
  497. LOOP_DOWN_TIME);
  498. qla2x00_mark_all_devices_lost(vha, 1);
  499. }
  500. if (vha->vp_idx) {
  501. atomic_set(&vha->vp_state, VP_FAILED);
  502. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  503. }
  504. if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
  505. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  506. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  507. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  508. ha->flags.gpsc_supported = 1;
  509. vha->flags.management_server_logged_in = 0;
  510. break;
  511. case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
  512. if (IS_QLA2100(ha))
  513. break;
  514. ql_log(ql_log_info, vha, 0x500f,
  515. "Configuration change detected: value=%x.\n", mb[1]);
  516. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  517. atomic_set(&vha->loop_state, LOOP_DOWN);
  518. if (!atomic_read(&vha->loop_down_timer))
  519. atomic_set(&vha->loop_down_timer,
  520. LOOP_DOWN_TIME);
  521. qla2x00_mark_all_devices_lost(vha, 1);
  522. }
  523. if (vha->vp_idx) {
  524. atomic_set(&vha->vp_state, VP_FAILED);
  525. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  526. }
  527. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  528. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  529. break;
  530. case MBA_PORT_UPDATE: /* Port database update */
  531. /*
  532. * Handle only global and vn-port update events
  533. *
  534. * Relevant inputs:
  535. * mb[1] = N_Port handle of changed port
  536. * OR 0xffff for global event
  537. * mb[2] = New login state
  538. * 7 = Port logged out
  539. * mb[3] = LSB is vp_idx, 0xff = all vps
  540. *
  541. * Skip processing if:
  542. * Event is global, vp_idx is NOT all vps,
  543. * vp_idx does not match
  544. * Event is not global, vp_idx does not match
  545. */
  546. if (IS_QLA2XXX_MIDTYPE(ha) &&
  547. ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
  548. (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
  549. break;
  550. /* Global event -- port logout or port unavailable. */
  551. if (mb[1] == 0xffff && mb[2] == 0x7) {
  552. ql_dbg(ql_dbg_async, vha, 0x5010,
  553. "Port unavailable %04x %04x %04x.\n",
  554. mb[1], mb[2], mb[3]);
  555. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  556. atomic_set(&vha->loop_state, LOOP_DOWN);
  557. atomic_set(&vha->loop_down_timer,
  558. LOOP_DOWN_TIME);
  559. vha->device_flags |= DFLG_NO_CABLE;
  560. qla2x00_mark_all_devices_lost(vha, 1);
  561. }
  562. if (vha->vp_idx) {
  563. atomic_set(&vha->vp_state, VP_FAILED);
  564. fc_vport_set_state(vha->fc_vport,
  565. FC_VPORT_FAILED);
  566. qla2x00_mark_all_devices_lost(vha, 1);
  567. }
  568. vha->flags.management_server_logged_in = 0;
  569. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  570. break;
  571. }
  572. /*
  573. * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
  574. * event etc. earlier indicating loop is down) then process
  575. * it. Otherwise ignore it and Wait for RSCN to come in.
  576. */
  577. atomic_set(&vha->loop_down_timer, 0);
  578. if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
  579. atomic_read(&vha->loop_state) != LOOP_DEAD) {
  580. ql_dbg(ql_dbg_async, vha, 0x5011,
  581. "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
  582. mb[1], mb[2], mb[3]);
  583. break;
  584. }
  585. ql_dbg(ql_dbg_async, vha, 0x5012,
  586. "Port database changed %04x %04x %04x.\n",
  587. mb[1], mb[2], mb[3]);
  588. /*
  589. * Mark all devices as missing so we will login again.
  590. */
  591. atomic_set(&vha->loop_state, LOOP_UP);
  592. qla2x00_mark_all_devices_lost(vha, 1);
  593. vha->flags.rscn_queue_overflow = 1;
  594. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  595. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  596. break;
  597. case MBA_RSCN_UPDATE: /* State Change Registration */
  598. /* Check if the Vport has issued a SCR */
  599. if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
  600. break;
  601. /* Only handle SCNs for our Vport index. */
  602. if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
  603. break;
  604. ql_dbg(ql_dbg_async, vha, 0x5013,
  605. "RSCN database changed -- %04x %04x %04x.\n",
  606. mb[1], mb[2], mb[3]);
  607. rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
  608. host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
  609. | vha->d_id.b.al_pa;
  610. if (rscn_entry == host_pid) {
  611. ql_dbg(ql_dbg_async, vha, 0x5014,
  612. "Ignoring RSCN update to local host "
  613. "port ID (%06x).\n", host_pid);
  614. break;
  615. }
  616. /* Ignore reserved bits from RSCN-payload. */
  617. rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
  618. rscn_queue_index = vha->rscn_in_ptr + 1;
  619. if (rscn_queue_index == MAX_RSCN_COUNT)
  620. rscn_queue_index = 0;
  621. if (rscn_queue_index != vha->rscn_out_ptr) {
  622. vha->rscn_queue[vha->rscn_in_ptr] = rscn_entry;
  623. vha->rscn_in_ptr = rscn_queue_index;
  624. } else {
  625. vha->flags.rscn_queue_overflow = 1;
  626. }
  627. atomic_set(&vha->loop_down_timer, 0);
  628. vha->flags.management_server_logged_in = 0;
  629. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  630. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  631. qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
  632. break;
  633. /* case MBA_RIO_RESPONSE: */
  634. case MBA_ZIO_RESPONSE:
  635. ql_dbg(ql_dbg_async, vha, 0x5015,
  636. "[R|Z]IO update completion.\n");
  637. if (IS_FWI2_CAPABLE(ha))
  638. qla24xx_process_response_queue(vha, rsp);
  639. else
  640. qla2x00_process_response_queue(rsp);
  641. break;
  642. case MBA_DISCARD_RND_FRAME:
  643. ql_dbg(ql_dbg_async, vha, 0x5016,
  644. "Discard RND Frame -- %04x %04x %04x.\n",
  645. mb[1], mb[2], mb[3]);
  646. break;
  647. case MBA_TRACE_NOTIFICATION:
  648. ql_dbg(ql_dbg_async, vha, 0x5017,
  649. "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
  650. break;
  651. case MBA_ISP84XX_ALERT:
  652. ql_dbg(ql_dbg_async, vha, 0x5018,
  653. "ISP84XX Alert Notification -- %04x %04x %04x.\n",
  654. mb[1], mb[2], mb[3]);
  655. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  656. switch (mb[1]) {
  657. case A84_PANIC_RECOVERY:
  658. ql_log(ql_log_info, vha, 0x5019,
  659. "Alert 84XX: panic recovery %04x %04x.\n",
  660. mb[2], mb[3]);
  661. break;
  662. case A84_OP_LOGIN_COMPLETE:
  663. ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
  664. ql_log(ql_log_info, vha, 0x501a,
  665. "Alert 84XX: firmware version %x.\n",
  666. ha->cs84xx->op_fw_version);
  667. break;
  668. case A84_DIAG_LOGIN_COMPLETE:
  669. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  670. ql_log(ql_log_info, vha, 0x501b,
  671. "Alert 84XX: diagnostic firmware version %x.\n",
  672. ha->cs84xx->diag_fw_version);
  673. break;
  674. case A84_GOLD_LOGIN_COMPLETE:
  675. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  676. ha->cs84xx->fw_update = 1;
  677. ql_log(ql_log_info, vha, 0x501c,
  678. "Alert 84XX: gold firmware version %x.\n",
  679. ha->cs84xx->gold_fw_version);
  680. break;
  681. default:
  682. ql_log(ql_log_warn, vha, 0x501d,
  683. "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
  684. mb[1], mb[2], mb[3]);
  685. }
  686. spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
  687. break;
  688. case MBA_DCBX_START:
  689. ql_dbg(ql_dbg_async, vha, 0x501e,
  690. "DCBX Started -- %04x %04x %04x.\n",
  691. mb[1], mb[2], mb[3]);
  692. break;
  693. case MBA_DCBX_PARAM_UPDATE:
  694. ql_dbg(ql_dbg_async, vha, 0x501f,
  695. "DCBX Parameters Updated -- %04x %04x %04x.\n",
  696. mb[1], mb[2], mb[3]);
  697. break;
  698. case MBA_FCF_CONF_ERR:
  699. ql_dbg(ql_dbg_async, vha, 0x5020,
  700. "FCF Configuration Error -- %04x %04x %04x.\n",
  701. mb[1], mb[2], mb[3]);
  702. break;
  703. case MBA_IDC_COMPLETE:
  704. case MBA_IDC_NOTIFY:
  705. case MBA_IDC_TIME_EXT:
  706. qla81xx_idc_event(vha, mb[0], mb[1]);
  707. break;
  708. }
  709. if (!vha->vp_idx && ha->num_vhosts)
  710. qla2x00_alert_all_vps(rsp, mb);
  711. }
  712. /**
  713. * qla2x00_process_completed_request() - Process a Fast Post response.
  714. * @ha: SCSI driver HA context
  715. * @index: SRB index
  716. */
  717. static void
  718. qla2x00_process_completed_request(struct scsi_qla_host *vha,
  719. struct req_que *req, uint32_t index)
  720. {
  721. srb_t *sp;
  722. struct qla_hw_data *ha = vha->hw;
  723. /* Validate handle. */
  724. if (index >= MAX_OUTSTANDING_COMMANDS) {
  725. ql_log(ql_log_warn, vha, 0x3014,
  726. "Invalid SCSI command index (%x).\n", index);
  727. if (IS_QLA82XX(ha))
  728. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  729. else
  730. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  731. return;
  732. }
  733. sp = req->outstanding_cmds[index];
  734. if (sp) {
  735. /* Free outstanding command slot. */
  736. req->outstanding_cmds[index] = NULL;
  737. /* Save ISP completion status */
  738. sp->cmd->result = DID_OK << 16;
  739. qla2x00_sp_compl(ha, sp);
  740. } else {
  741. ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
  742. if (IS_QLA82XX(ha))
  743. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  744. else
  745. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  746. }
  747. }
  748. static srb_t *
  749. qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
  750. struct req_que *req, void *iocb)
  751. {
  752. struct qla_hw_data *ha = vha->hw;
  753. sts_entry_t *pkt = iocb;
  754. srb_t *sp = NULL;
  755. uint16_t index;
  756. index = LSW(pkt->handle);
  757. if (index >= MAX_OUTSTANDING_COMMANDS) {
  758. ql_log(ql_log_warn, vha, 0x5031,
  759. "Invalid command index (%x).\n", index);
  760. if (IS_QLA82XX(ha))
  761. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  762. else
  763. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  764. goto done;
  765. }
  766. sp = req->outstanding_cmds[index];
  767. if (!sp) {
  768. ql_log(ql_log_warn, vha, 0x5032,
  769. "Invalid completion handle (%x) -- timed-out.\n", index);
  770. return sp;
  771. }
  772. if (sp->handle != index) {
  773. ql_log(ql_log_warn, vha, 0x5033,
  774. "SRB handle (%x) mismatch %x.\n", sp->handle, index);
  775. return NULL;
  776. }
  777. req->outstanding_cmds[index] = NULL;
  778. done:
  779. return sp;
  780. }
  781. static void
  782. qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  783. struct mbx_entry *mbx)
  784. {
  785. const char func[] = "MBX-IOCB";
  786. const char *type;
  787. fc_port_t *fcport;
  788. srb_t *sp;
  789. struct srb_iocb *lio;
  790. struct srb_ctx *ctx;
  791. uint16_t *data;
  792. uint16_t status;
  793. sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
  794. if (!sp)
  795. return;
  796. ctx = sp->ctx;
  797. lio = ctx->u.iocb_cmd;
  798. type = ctx->name;
  799. fcport = sp->fcport;
  800. data = lio->u.logio.data;
  801. data[0] = MBS_COMMAND_ERROR;
  802. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  803. QLA_LOGIO_LOGIN_RETRIED : 0;
  804. if (mbx->entry_status) {
  805. ql_dbg(ql_dbg_async, vha, 0x5043,
  806. "Async-%s error entry - portid=%02x%02x%02x "
  807. "entry-status=%x status=%x state-flag=%x "
  808. "status-flags=%x.\n",
  809. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  810. fcport->d_id.b.al_pa, mbx->entry_status,
  811. le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
  812. le16_to_cpu(mbx->status_flags));
  813. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5057,
  814. (uint8_t *)mbx, sizeof(*mbx));
  815. goto logio_done;
  816. }
  817. status = le16_to_cpu(mbx->status);
  818. if (status == 0x30 && ctx->type == SRB_LOGIN_CMD &&
  819. le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
  820. status = 0;
  821. if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
  822. ql_dbg(ql_dbg_async, vha, 0x5045,
  823. "Async-%s complete - portid=%02x%02x%02x mbx1=%x.\n",
  824. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  825. fcport->d_id.b.al_pa, le16_to_cpu(mbx->mb1));
  826. data[0] = MBS_COMMAND_COMPLETE;
  827. if (ctx->type == SRB_LOGIN_CMD) {
  828. fcport->port_type = FCT_TARGET;
  829. if (le16_to_cpu(mbx->mb1) & BIT_0)
  830. fcport->port_type = FCT_INITIATOR;
  831. else if (le16_to_cpu(mbx->mb1) & BIT_1)
  832. fcport->flags |= FCF_FCP2_DEVICE;
  833. }
  834. goto logio_done;
  835. }
  836. data[0] = le16_to_cpu(mbx->mb0);
  837. switch (data[0]) {
  838. case MBS_PORT_ID_USED:
  839. data[1] = le16_to_cpu(mbx->mb1);
  840. break;
  841. case MBS_LOOP_ID_USED:
  842. break;
  843. default:
  844. data[0] = MBS_COMMAND_ERROR;
  845. break;
  846. }
  847. ql_log(ql_log_warn, vha, 0x5046,
  848. "Async-%s failed - portid=%02x%02x%02x status=%x "
  849. "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n",
  850. type, fcport->d_id.b.domain,
  851. fcport->d_id.b.area, fcport->d_id.b.al_pa, status,
  852. le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
  853. le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
  854. le16_to_cpu(mbx->mb7));
  855. logio_done:
  856. lio->done(sp);
  857. }
  858. static void
  859. qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  860. sts_entry_t *pkt, int iocb_type)
  861. {
  862. const char func[] = "CT_IOCB";
  863. const char *type;
  864. struct qla_hw_data *ha = vha->hw;
  865. srb_t *sp;
  866. struct srb_ctx *sp_bsg;
  867. struct fc_bsg_job *bsg_job;
  868. uint16_t comp_status;
  869. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  870. if (!sp)
  871. return;
  872. sp_bsg = sp->ctx;
  873. bsg_job = sp_bsg->u.bsg_job;
  874. type = NULL;
  875. switch (sp_bsg->type) {
  876. case SRB_CT_CMD:
  877. type = "ct pass-through";
  878. break;
  879. default:
  880. ql_log(ql_log_warn, vha, 0x5047,
  881. "Unrecognized SRB: (%p) type=%d.\n", sp, sp_bsg->type);
  882. return;
  883. }
  884. comp_status = le16_to_cpu(pkt->comp_status);
  885. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  886. * fc payload to the caller
  887. */
  888. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  889. bsg_job->reply_len = sizeof(struct fc_bsg_reply);
  890. if (comp_status != CS_COMPLETE) {
  891. if (comp_status == CS_DATA_UNDERRUN) {
  892. bsg_job->reply->result = DID_OK << 16;
  893. bsg_job->reply->reply_payload_rcv_len =
  894. le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
  895. ql_log(ql_log_warn, vha, 0x5048,
  896. "CT pass-through-%s error "
  897. "comp_status-status=0x%x total_byte = 0x%x.\n",
  898. type, comp_status,
  899. bsg_job->reply->reply_payload_rcv_len);
  900. } else {
  901. ql_log(ql_log_warn, vha, 0x5049,
  902. "CT pass-through-%s error "
  903. "comp_status-status=0x%x.\n", type, comp_status);
  904. bsg_job->reply->result = DID_ERROR << 16;
  905. bsg_job->reply->reply_payload_rcv_len = 0;
  906. }
  907. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5058,
  908. (uint8_t *)pkt, sizeof(*pkt));
  909. } else {
  910. bsg_job->reply->result = DID_OK << 16;
  911. bsg_job->reply->reply_payload_rcv_len =
  912. bsg_job->reply_payload.payload_len;
  913. bsg_job->reply_len = 0;
  914. }
  915. dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list,
  916. bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
  917. dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list,
  918. bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
  919. if (sp_bsg->type == SRB_ELS_CMD_HST || sp_bsg->type == SRB_CT_CMD)
  920. kfree(sp->fcport);
  921. kfree(sp->ctx);
  922. mempool_free(sp, ha->srb_mempool);
  923. bsg_job->job_done(bsg_job);
  924. }
  925. static void
  926. qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  927. struct sts_entry_24xx *pkt, int iocb_type)
  928. {
  929. const char func[] = "ELS_CT_IOCB";
  930. const char *type;
  931. struct qla_hw_data *ha = vha->hw;
  932. srb_t *sp;
  933. struct srb_ctx *sp_bsg;
  934. struct fc_bsg_job *bsg_job;
  935. uint16_t comp_status;
  936. uint32_t fw_status[3];
  937. uint8_t* fw_sts_ptr;
  938. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  939. if (!sp)
  940. return;
  941. sp_bsg = sp->ctx;
  942. bsg_job = sp_bsg->u.bsg_job;
  943. type = NULL;
  944. switch (sp_bsg->type) {
  945. case SRB_ELS_CMD_RPT:
  946. case SRB_ELS_CMD_HST:
  947. type = "els";
  948. break;
  949. case SRB_CT_CMD:
  950. type = "ct pass-through";
  951. break;
  952. default:
  953. ql_log(ql_log_warn, vha, 0x503e,
  954. "Unrecognized SRB: (%p) type=%d.\n", sp, sp_bsg->type);
  955. return;
  956. }
  957. comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
  958. fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
  959. fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
  960. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  961. * fc payload to the caller
  962. */
  963. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  964. bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
  965. if (comp_status != CS_COMPLETE) {
  966. if (comp_status == CS_DATA_UNDERRUN) {
  967. bsg_job->reply->result = DID_OK << 16;
  968. bsg_job->reply->reply_payload_rcv_len =
  969. le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->total_byte_count);
  970. ql_log(ql_log_info, vha, 0x503f,
  971. "ELS-CT pass-through-%s error comp_status-status=0x%x "
  972. "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
  973. type, comp_status, fw_status[1], fw_status[2],
  974. le16_to_cpu(((struct els_sts_entry_24xx *)
  975. pkt)->total_byte_count));
  976. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  977. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  978. }
  979. else {
  980. ql_log(ql_log_info, vha, 0x5040,
  981. "ELS-CT pass-through-%s error comp_status-status=0x%x "
  982. "error subcode 1=0x%x error subcode 2=0x%x.\n",
  983. type, comp_status,
  984. le16_to_cpu(((struct els_sts_entry_24xx *)
  985. pkt)->error_subcode_1),
  986. le16_to_cpu(((struct els_sts_entry_24xx *)
  987. pkt)->error_subcode_2));
  988. bsg_job->reply->result = DID_ERROR << 16;
  989. bsg_job->reply->reply_payload_rcv_len = 0;
  990. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  991. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  992. }
  993. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5056,
  994. (uint8_t *)pkt, sizeof(*pkt));
  995. }
  996. else {
  997. bsg_job->reply->result = DID_OK << 16;
  998. bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
  999. bsg_job->reply_len = 0;
  1000. }
  1001. dma_unmap_sg(&ha->pdev->dev,
  1002. bsg_job->request_payload.sg_list,
  1003. bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
  1004. dma_unmap_sg(&ha->pdev->dev,
  1005. bsg_job->reply_payload.sg_list,
  1006. bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
  1007. if ((sp_bsg->type == SRB_ELS_CMD_HST) ||
  1008. (sp_bsg->type == SRB_CT_CMD))
  1009. kfree(sp->fcport);
  1010. kfree(sp->ctx);
  1011. mempool_free(sp, ha->srb_mempool);
  1012. bsg_job->job_done(bsg_job);
  1013. }
  1014. static void
  1015. qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
  1016. struct logio_entry_24xx *logio)
  1017. {
  1018. const char func[] = "LOGIO-IOCB";
  1019. const char *type;
  1020. fc_port_t *fcport;
  1021. srb_t *sp;
  1022. struct srb_iocb *lio;
  1023. struct srb_ctx *ctx;
  1024. uint16_t *data;
  1025. uint32_t iop[2];
  1026. sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
  1027. if (!sp)
  1028. return;
  1029. ctx = sp->ctx;
  1030. lio = ctx->u.iocb_cmd;
  1031. type = ctx->name;
  1032. fcport = sp->fcport;
  1033. data = lio->u.logio.data;
  1034. data[0] = MBS_COMMAND_ERROR;
  1035. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  1036. QLA_LOGIO_LOGIN_RETRIED : 0;
  1037. if (logio->entry_status) {
  1038. ql_log(ql_log_warn, vha, 0x5034,
  1039. "Async-%s error entry - "
  1040. "portid=%02x%02x%02x entry-status=%x.\n",
  1041. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  1042. fcport->d_id.b.al_pa, logio->entry_status);
  1043. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5059,
  1044. (uint8_t *)logio, sizeof(*logio));
  1045. goto logio_done;
  1046. }
  1047. if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
  1048. ql_dbg(ql_dbg_async, vha, 0x5036,
  1049. "Async-%s complete - portid=%02x%02x%02x "
  1050. "iop0=%x.\n",
  1051. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  1052. fcport->d_id.b.al_pa,
  1053. le32_to_cpu(logio->io_parameter[0]));
  1054. data[0] = MBS_COMMAND_COMPLETE;
  1055. if (ctx->type != SRB_LOGIN_CMD)
  1056. goto logio_done;
  1057. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1058. if (iop[0] & BIT_4) {
  1059. fcport->port_type = FCT_TARGET;
  1060. if (iop[0] & BIT_8)
  1061. fcport->flags |= FCF_FCP2_DEVICE;
  1062. } else if (iop[0] & BIT_5)
  1063. fcport->port_type = FCT_INITIATOR;
  1064. if (logio->io_parameter[7] || logio->io_parameter[8])
  1065. fcport->supported_classes |= FC_COS_CLASS2;
  1066. if (logio->io_parameter[9] || logio->io_parameter[10])
  1067. fcport->supported_classes |= FC_COS_CLASS3;
  1068. goto logio_done;
  1069. }
  1070. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1071. iop[1] = le32_to_cpu(logio->io_parameter[1]);
  1072. switch (iop[0]) {
  1073. case LSC_SCODE_PORTID_USED:
  1074. data[0] = MBS_PORT_ID_USED;
  1075. data[1] = LSW(iop[1]);
  1076. break;
  1077. case LSC_SCODE_NPORT_USED:
  1078. data[0] = MBS_LOOP_ID_USED;
  1079. break;
  1080. default:
  1081. data[0] = MBS_COMMAND_ERROR;
  1082. break;
  1083. }
  1084. ql_dbg(ql_dbg_async, vha, 0x5037,
  1085. "Async-%s failed - portid=%02x%02x%02x comp=%x "
  1086. "iop0=%x iop1=%x.\n",
  1087. type, fcport->d_id.b.domain,
  1088. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1089. le16_to_cpu(logio->comp_status),
  1090. le32_to_cpu(logio->io_parameter[0]),
  1091. le32_to_cpu(logio->io_parameter[1]));
  1092. logio_done:
  1093. lio->done(sp);
  1094. }
  1095. static void
  1096. qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  1097. struct tsk_mgmt_entry *tsk)
  1098. {
  1099. const char func[] = "TMF-IOCB";
  1100. const char *type;
  1101. fc_port_t *fcport;
  1102. srb_t *sp;
  1103. struct srb_iocb *iocb;
  1104. struct srb_ctx *ctx;
  1105. struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
  1106. int error = 1;
  1107. sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
  1108. if (!sp)
  1109. return;
  1110. ctx = sp->ctx;
  1111. iocb = ctx->u.iocb_cmd;
  1112. type = ctx->name;
  1113. fcport = sp->fcport;
  1114. if (sts->entry_status) {
  1115. ql_log(ql_log_warn, vha, 0x5038,
  1116. "Async-%s error - entry-status(%x).\n",
  1117. type, sts->entry_status);
  1118. } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1119. ql_log(ql_log_warn, vha, 0x5039,
  1120. "Async-%s error - completion status(%x).\n",
  1121. type, sts->comp_status);
  1122. } else if (!(le16_to_cpu(sts->scsi_status) &
  1123. SS_RESPONSE_INFO_LEN_VALID)) {
  1124. ql_log(ql_log_warn, vha, 0x503a,
  1125. "Async-%s error - no response info(%x).\n",
  1126. type, sts->scsi_status);
  1127. } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
  1128. ql_log(ql_log_warn, vha, 0x503b,
  1129. "Async-%s error - not enough response(%d).\n",
  1130. type, sts->rsp_data_len);
  1131. } else if (sts->data[3]) {
  1132. ql_log(ql_log_warn, vha, 0x503c,
  1133. "Async-%s error - response(%x).\n",
  1134. type, sts->data[3]);
  1135. } else {
  1136. error = 0;
  1137. }
  1138. if (error) {
  1139. iocb->u.tmf.data = error;
  1140. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
  1141. (uint8_t *)sts, sizeof(*sts));
  1142. }
  1143. iocb->done(sp);
  1144. }
  1145. /**
  1146. * qla2x00_process_response_queue() - Process response queue entries.
  1147. * @ha: SCSI driver HA context
  1148. */
  1149. void
  1150. qla2x00_process_response_queue(struct rsp_que *rsp)
  1151. {
  1152. struct scsi_qla_host *vha;
  1153. struct qla_hw_data *ha = rsp->hw;
  1154. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1155. sts_entry_t *pkt;
  1156. uint16_t handle_cnt;
  1157. uint16_t cnt;
  1158. vha = pci_get_drvdata(ha->pdev);
  1159. if (!vha->flags.online)
  1160. return;
  1161. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1162. pkt = (sts_entry_t *)rsp->ring_ptr;
  1163. rsp->ring_index++;
  1164. if (rsp->ring_index == rsp->length) {
  1165. rsp->ring_index = 0;
  1166. rsp->ring_ptr = rsp->ring;
  1167. } else {
  1168. rsp->ring_ptr++;
  1169. }
  1170. if (pkt->entry_status != 0) {
  1171. ql_log(ql_log_warn, vha, 0x5035,
  1172. "Process error entry.\n");
  1173. qla2x00_error_entry(vha, rsp, pkt);
  1174. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1175. wmb();
  1176. continue;
  1177. }
  1178. switch (pkt->entry_type) {
  1179. case STATUS_TYPE:
  1180. qla2x00_status_entry(vha, rsp, pkt);
  1181. break;
  1182. case STATUS_TYPE_21:
  1183. handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
  1184. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1185. qla2x00_process_completed_request(vha, rsp->req,
  1186. ((sts21_entry_t *)pkt)->handle[cnt]);
  1187. }
  1188. break;
  1189. case STATUS_TYPE_22:
  1190. handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
  1191. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1192. qla2x00_process_completed_request(vha, rsp->req,
  1193. ((sts22_entry_t *)pkt)->handle[cnt]);
  1194. }
  1195. break;
  1196. case STATUS_CONT_TYPE:
  1197. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1198. break;
  1199. case MBX_IOCB_TYPE:
  1200. qla2x00_mbx_iocb_entry(vha, rsp->req,
  1201. (struct mbx_entry *)pkt);
  1202. break;
  1203. case CT_IOCB_TYPE:
  1204. qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1205. break;
  1206. default:
  1207. /* Type Not Supported. */
  1208. ql_log(ql_log_warn, vha, 0x504a,
  1209. "Received unknown response pkt type %x "
  1210. "entry status=%x.\n",
  1211. pkt->entry_type, pkt->entry_status);
  1212. break;
  1213. }
  1214. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1215. wmb();
  1216. }
  1217. /* Adjust ring index */
  1218. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
  1219. }
  1220. static inline void
  1221. qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
  1222. uint32_t sense_len, struct rsp_que *rsp)
  1223. {
  1224. struct scsi_qla_host *vha = sp->fcport->vha;
  1225. struct scsi_cmnd *cp = sp->cmd;
  1226. if (sense_len >= SCSI_SENSE_BUFFERSIZE)
  1227. sense_len = SCSI_SENSE_BUFFERSIZE;
  1228. sp->request_sense_length = sense_len;
  1229. sp->request_sense_ptr = cp->sense_buffer;
  1230. if (sp->request_sense_length > par_sense_len)
  1231. sense_len = par_sense_len;
  1232. memcpy(cp->sense_buffer, sense_data, sense_len);
  1233. sp->request_sense_ptr += sense_len;
  1234. sp->request_sense_length -= sense_len;
  1235. if (sp->request_sense_length != 0)
  1236. rsp->status_srb = sp;
  1237. ql_dbg(ql_dbg_io, vha, 0x301c,
  1238. "Check condition Sense data, scsi(%ld:%d:%d:%d) cmd=%p.\n",
  1239. sp->fcport->vha->host_no, cp->device->channel, cp->device->id,
  1240. cp->device->lun, cp);
  1241. if (sense_len)
  1242. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
  1243. cp->sense_buffer, sense_len);
  1244. }
  1245. struct scsi_dif_tuple {
  1246. __be16 guard; /* Checksum */
  1247. __be16 app_tag; /* APPL identifer */
  1248. __be32 ref_tag; /* Target LBA or indirect LBA */
  1249. };
  1250. /*
  1251. * Checks the guard or meta-data for the type of error
  1252. * detected by the HBA. In case of errors, we set the
  1253. * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
  1254. * to indicate to the kernel that the HBA detected error.
  1255. */
  1256. static inline int
  1257. qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
  1258. {
  1259. struct scsi_qla_host *vha = sp->fcport->vha;
  1260. struct scsi_cmnd *cmd = sp->cmd;
  1261. uint8_t *ap = &sts24->data[12];
  1262. uint8_t *ep = &sts24->data[20];
  1263. uint32_t e_ref_tag, a_ref_tag;
  1264. uint16_t e_app_tag, a_app_tag;
  1265. uint16_t e_guard, a_guard;
  1266. /*
  1267. * swab32 of the "data" field in the beginning of qla2x00_status_entry()
  1268. * would make guard field appear at offset 2
  1269. */
  1270. a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
  1271. a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
  1272. a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
  1273. e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
  1274. e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
  1275. e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
  1276. ql_dbg(ql_dbg_io, vha, 0x3023,
  1277. "iocb(s) %p Returned STATUS.\n", sts24);
  1278. ql_dbg(ql_dbg_io, vha, 0x3024,
  1279. "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
  1280. " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
  1281. " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
  1282. cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
  1283. a_app_tag, e_app_tag, a_guard, e_guard);
  1284. /*
  1285. * Ignore sector if:
  1286. * For type 3: ref & app tag is all 'f's
  1287. * For type 0,1,2: app tag is all 'f's
  1288. */
  1289. if ((a_app_tag == 0xffff) &&
  1290. ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
  1291. (a_ref_tag == 0xffffffff))) {
  1292. uint32_t blocks_done, resid;
  1293. sector_t lba_s = scsi_get_lba(cmd);
  1294. /* 2TB boundary case covered automatically with this */
  1295. blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
  1296. resid = scsi_bufflen(cmd) - (blocks_done *
  1297. cmd->device->sector_size);
  1298. scsi_set_resid(cmd, resid);
  1299. cmd->result = DID_OK << 16;
  1300. /* Update protection tag */
  1301. if (scsi_prot_sg_count(cmd)) {
  1302. uint32_t i, j = 0, k = 0, num_ent;
  1303. struct scatterlist *sg;
  1304. struct sd_dif_tuple *spt;
  1305. /* Patch the corresponding protection tags */
  1306. scsi_for_each_prot_sg(cmd, sg,
  1307. scsi_prot_sg_count(cmd), i) {
  1308. num_ent = sg_dma_len(sg) / 8;
  1309. if (k + num_ent < blocks_done) {
  1310. k += num_ent;
  1311. continue;
  1312. }
  1313. j = blocks_done - k - 1;
  1314. k = blocks_done;
  1315. break;
  1316. }
  1317. if (k != blocks_done) {
  1318. qla_printk(KERN_WARNING, sp->fcport->vha->hw,
  1319. "unexpected tag values tag:lba=%x:%lx)\n",
  1320. e_ref_tag, lba_s);
  1321. return 1;
  1322. }
  1323. spt = page_address(sg_page(sg)) + sg->offset;
  1324. spt += j;
  1325. spt->app_tag = 0xffff;
  1326. if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
  1327. spt->ref_tag = 0xffffffff;
  1328. }
  1329. return 0;
  1330. }
  1331. /* check guard */
  1332. if (e_guard != a_guard) {
  1333. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1334. 0x10, 0x1);
  1335. set_driver_byte(cmd, DRIVER_SENSE);
  1336. set_host_byte(cmd, DID_ABORT);
  1337. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1338. return 1;
  1339. }
  1340. /* check ref tag */
  1341. if (e_ref_tag != a_ref_tag) {
  1342. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1343. 0x10, 0x3);
  1344. set_driver_byte(cmd, DRIVER_SENSE);
  1345. set_host_byte(cmd, DID_ABORT);
  1346. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1347. return 1;
  1348. }
  1349. /* check appl tag */
  1350. if (e_app_tag != a_app_tag) {
  1351. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1352. 0x10, 0x2);
  1353. set_driver_byte(cmd, DRIVER_SENSE);
  1354. set_host_byte(cmd, DID_ABORT);
  1355. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1356. return 1;
  1357. }
  1358. return 1;
  1359. }
  1360. /**
  1361. * qla2x00_status_entry() - Process a Status IOCB entry.
  1362. * @ha: SCSI driver HA context
  1363. * @pkt: Entry pointer
  1364. */
  1365. static void
  1366. qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
  1367. {
  1368. srb_t *sp;
  1369. fc_port_t *fcport;
  1370. struct scsi_cmnd *cp;
  1371. sts_entry_t *sts;
  1372. struct sts_entry_24xx *sts24;
  1373. uint16_t comp_status;
  1374. uint16_t scsi_status;
  1375. uint16_t ox_id;
  1376. uint8_t lscsi_status;
  1377. int32_t resid;
  1378. uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
  1379. fw_resid_len;
  1380. uint8_t *rsp_info, *sense_data;
  1381. struct qla_hw_data *ha = vha->hw;
  1382. uint32_t handle;
  1383. uint16_t que;
  1384. struct req_que *req;
  1385. int logit = 1;
  1386. sts = (sts_entry_t *) pkt;
  1387. sts24 = (struct sts_entry_24xx *) pkt;
  1388. if (IS_FWI2_CAPABLE(ha)) {
  1389. comp_status = le16_to_cpu(sts24->comp_status);
  1390. scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
  1391. } else {
  1392. comp_status = le16_to_cpu(sts->comp_status);
  1393. scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
  1394. }
  1395. handle = (uint32_t) LSW(sts->handle);
  1396. que = MSW(sts->handle);
  1397. req = ha->req_q_map[que];
  1398. /* Fast path completion. */
  1399. if (comp_status == CS_COMPLETE && scsi_status == 0) {
  1400. qla2x00_process_completed_request(vha, req, handle);
  1401. return;
  1402. }
  1403. /* Validate handle. */
  1404. if (handle < MAX_OUTSTANDING_COMMANDS) {
  1405. sp = req->outstanding_cmds[handle];
  1406. req->outstanding_cmds[handle] = NULL;
  1407. } else
  1408. sp = NULL;
  1409. if (sp == NULL) {
  1410. ql_log(ql_log_warn, vha, 0x3017,
  1411. "Invalid status handle (0x%x).\n", sts->handle);
  1412. if (IS_QLA82XX(ha))
  1413. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1414. else
  1415. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1416. qla2xxx_wake_dpc(vha);
  1417. return;
  1418. }
  1419. cp = sp->cmd;
  1420. if (cp == NULL) {
  1421. ql_log(ql_log_warn, vha, 0x3018,
  1422. "Command already returned (0x%x/%p).\n",
  1423. sts->handle, sp);
  1424. return;
  1425. }
  1426. lscsi_status = scsi_status & STATUS_MASK;
  1427. fcport = sp->fcport;
  1428. ox_id = 0;
  1429. sense_len = par_sense_len = rsp_info_len = resid_len =
  1430. fw_resid_len = 0;
  1431. if (IS_FWI2_CAPABLE(ha)) {
  1432. if (scsi_status & SS_SENSE_LEN_VALID)
  1433. sense_len = le32_to_cpu(sts24->sense_len);
  1434. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1435. rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
  1436. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
  1437. resid_len = le32_to_cpu(sts24->rsp_residual_count);
  1438. if (comp_status == CS_DATA_UNDERRUN)
  1439. fw_resid_len = le32_to_cpu(sts24->residual_len);
  1440. rsp_info = sts24->data;
  1441. sense_data = sts24->data;
  1442. host_to_fcp_swap(sts24->data, sizeof(sts24->data));
  1443. ox_id = le16_to_cpu(sts24->ox_id);
  1444. par_sense_len = sizeof(sts24->data);
  1445. } else {
  1446. if (scsi_status & SS_SENSE_LEN_VALID)
  1447. sense_len = le16_to_cpu(sts->req_sense_length);
  1448. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1449. rsp_info_len = le16_to_cpu(sts->rsp_info_len);
  1450. resid_len = le32_to_cpu(sts->residual_length);
  1451. rsp_info = sts->rsp_info;
  1452. sense_data = sts->req_sense_data;
  1453. par_sense_len = sizeof(sts->req_sense_data);
  1454. }
  1455. /* Check for any FCP transport errors. */
  1456. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
  1457. /* Sense data lies beyond any FCP RESPONSE data. */
  1458. if (IS_FWI2_CAPABLE(ha)) {
  1459. sense_data += rsp_info_len;
  1460. par_sense_len -= rsp_info_len;
  1461. }
  1462. if (rsp_info_len > 3 && rsp_info[3]) {
  1463. ql_log(ql_log_warn, vha, 0x3019,
  1464. "FCP I/O protocol failure (0x%x/0x%x).\n",
  1465. rsp_info_len, rsp_info[3]);
  1466. cp->result = DID_BUS_BUSY << 16;
  1467. goto out;
  1468. }
  1469. }
  1470. /* Check for overrun. */
  1471. if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
  1472. scsi_status & SS_RESIDUAL_OVER)
  1473. comp_status = CS_DATA_OVERRUN;
  1474. /*
  1475. * Based on Host and scsi status generate status code for Linux
  1476. */
  1477. switch (comp_status) {
  1478. case CS_COMPLETE:
  1479. case CS_QUEUE_FULL:
  1480. if (scsi_status == 0) {
  1481. cp->result = DID_OK << 16;
  1482. break;
  1483. }
  1484. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
  1485. resid = resid_len;
  1486. scsi_set_resid(cp, resid);
  1487. if (!lscsi_status &&
  1488. ((unsigned)(scsi_bufflen(cp) - resid) <
  1489. cp->underflow)) {
  1490. ql_log(ql_log_warn, vha, 0x301a,
  1491. "Mid-layer underflow "
  1492. "detected (0x%x of 0x%x bytes).\n",
  1493. resid, scsi_bufflen(cp));
  1494. cp->result = DID_ERROR << 16;
  1495. break;
  1496. }
  1497. }
  1498. cp->result = DID_OK << 16 | lscsi_status;
  1499. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1500. ql_log(ql_log_warn, vha, 0x301b,
  1501. "QUEUE FULL detected.\n");
  1502. break;
  1503. }
  1504. logit = 0;
  1505. if (lscsi_status != SS_CHECK_CONDITION)
  1506. break;
  1507. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1508. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1509. break;
  1510. qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
  1511. rsp);
  1512. break;
  1513. case CS_DATA_UNDERRUN:
  1514. /* Use F/W calculated residual length. */
  1515. resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
  1516. scsi_set_resid(cp, resid);
  1517. if (scsi_status & SS_RESIDUAL_UNDER) {
  1518. if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
  1519. ql_log(ql_log_warn, vha, 0x301d,
  1520. "Dropped frame(s) detected "
  1521. "(0x%x of 0x%x bytes).\n",
  1522. resid, scsi_bufflen(cp));
  1523. cp->result = DID_ERROR << 16 | lscsi_status;
  1524. break;
  1525. }
  1526. if (!lscsi_status &&
  1527. ((unsigned)(scsi_bufflen(cp) - resid) <
  1528. cp->underflow)) {
  1529. ql_log(ql_log_warn, vha, 0x301e,
  1530. "Mid-layer underflow "
  1531. "detected (0x%x of 0x%x bytes).\n",
  1532. resid, scsi_bufflen(cp));
  1533. cp->result = DID_ERROR << 16;
  1534. break;
  1535. }
  1536. } else {
  1537. ql_log(ql_log_warn, vha, 0x301f,
  1538. "Dropped frame(s) detected (0x%x "
  1539. "of 0x%x bytes).\n", resid, scsi_bufflen(cp));
  1540. cp->result = DID_ERROR << 16 | lscsi_status;
  1541. goto check_scsi_status;
  1542. }
  1543. cp->result = DID_OK << 16 | lscsi_status;
  1544. logit = 0;
  1545. check_scsi_status:
  1546. /*
  1547. * Check to see if SCSI Status is non zero. If so report SCSI
  1548. * Status.
  1549. */
  1550. if (lscsi_status != 0) {
  1551. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1552. ql_log(ql_log_warn, vha, 0x3020,
  1553. "QUEUE FULL detected.\n");
  1554. logit = 1;
  1555. break;
  1556. }
  1557. if (lscsi_status != SS_CHECK_CONDITION)
  1558. break;
  1559. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1560. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1561. break;
  1562. qla2x00_handle_sense(sp, sense_data, par_sense_len,
  1563. sense_len, rsp);
  1564. }
  1565. break;
  1566. case CS_PORT_LOGGED_OUT:
  1567. case CS_PORT_CONFIG_CHG:
  1568. case CS_PORT_BUSY:
  1569. case CS_INCOMPLETE:
  1570. case CS_PORT_UNAVAILABLE:
  1571. case CS_TIMEOUT:
  1572. case CS_RESET:
  1573. /*
  1574. * We are going to have the fc class block the rport
  1575. * while we try to recover so instruct the mid layer
  1576. * to requeue until the class decides how to handle this.
  1577. */
  1578. cp->result = DID_TRANSPORT_DISRUPTED << 16;
  1579. if (comp_status == CS_TIMEOUT) {
  1580. if (IS_FWI2_CAPABLE(ha))
  1581. break;
  1582. else if ((le16_to_cpu(sts->status_flags) &
  1583. SF_LOGOUT_SENT) == 0)
  1584. break;
  1585. }
  1586. ql_dbg(ql_dbg_io, vha, 0x3021,
  1587. "Port down status: port-state=0x%x.\n",
  1588. atomic_read(&fcport->state));
  1589. if (atomic_read(&fcport->state) == FCS_ONLINE)
  1590. qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
  1591. break;
  1592. case CS_ABORTED:
  1593. cp->result = DID_RESET << 16;
  1594. break;
  1595. case CS_DIF_ERROR:
  1596. logit = qla2x00_handle_dif_error(sp, sts24);
  1597. break;
  1598. default:
  1599. cp->result = DID_ERROR << 16;
  1600. break;
  1601. }
  1602. out:
  1603. if (logit)
  1604. ql_dbg(ql_dbg_io, vha, 0x3022,
  1605. "FCP command status: 0x%x-0x%x (0x%x) "
  1606. "oxid=0x%x cdb=%02x%02x%02x len=0x%x "
  1607. "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n",
  1608. comp_status, scsi_status, cp->result, ox_id, cp->cmnd[0],
  1609. cp->cmnd[1], cp->cmnd[2], scsi_bufflen(cp), rsp_info_len,
  1610. resid_len, fw_resid_len);
  1611. if (rsp->status_srb == NULL)
  1612. qla2x00_sp_compl(ha, sp);
  1613. }
  1614. /**
  1615. * qla2x00_status_cont_entry() - Process a Status Continuations entry.
  1616. * @ha: SCSI driver HA context
  1617. * @pkt: Entry pointer
  1618. *
  1619. * Extended sense data.
  1620. */
  1621. static void
  1622. qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
  1623. {
  1624. uint8_t sense_sz = 0;
  1625. struct qla_hw_data *ha = rsp->hw;
  1626. struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
  1627. srb_t *sp = rsp->status_srb;
  1628. struct scsi_cmnd *cp;
  1629. if (sp != NULL && sp->request_sense_length != 0) {
  1630. cp = sp->cmd;
  1631. if (cp == NULL) {
  1632. ql_log(ql_log_warn, vha, 0x3025,
  1633. "cmd is NULL: already returned to OS (sp=%p).\n",
  1634. sp);
  1635. rsp->status_srb = NULL;
  1636. return;
  1637. }
  1638. if (sp->request_sense_length > sizeof(pkt->data)) {
  1639. sense_sz = sizeof(pkt->data);
  1640. } else {
  1641. sense_sz = sp->request_sense_length;
  1642. }
  1643. /* Move sense data. */
  1644. if (IS_FWI2_CAPABLE(ha))
  1645. host_to_fcp_swap(pkt->data, sizeof(pkt->data));
  1646. memcpy(sp->request_sense_ptr, pkt->data, sense_sz);
  1647. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
  1648. sp->request_sense_ptr, sense_sz);
  1649. sp->request_sense_ptr += sense_sz;
  1650. sp->request_sense_length -= sense_sz;
  1651. /* Place command on done queue. */
  1652. if (sp->request_sense_length == 0) {
  1653. rsp->status_srb = NULL;
  1654. qla2x00_sp_compl(ha, sp);
  1655. }
  1656. }
  1657. }
  1658. /**
  1659. * qla2x00_error_entry() - Process an error entry.
  1660. * @ha: SCSI driver HA context
  1661. * @pkt: Entry pointer
  1662. */
  1663. static void
  1664. qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
  1665. {
  1666. srb_t *sp;
  1667. struct qla_hw_data *ha = vha->hw;
  1668. uint32_t handle = LSW(pkt->handle);
  1669. uint16_t que = MSW(pkt->handle);
  1670. struct req_que *req = ha->req_q_map[que];
  1671. if (pkt->entry_status & RF_INV_E_ORDER)
  1672. ql_dbg(ql_dbg_async, vha, 0x502a,
  1673. "Invalid Entry Order.\n");
  1674. else if (pkt->entry_status & RF_INV_E_COUNT)
  1675. ql_dbg(ql_dbg_async, vha, 0x502b,
  1676. "Invalid Entry Count.\n");
  1677. else if (pkt->entry_status & RF_INV_E_PARAM)
  1678. ql_dbg(ql_dbg_async, vha, 0x502c,
  1679. "Invalid Entry Parameter.\n");
  1680. else if (pkt->entry_status & RF_INV_E_TYPE)
  1681. ql_dbg(ql_dbg_async, vha, 0x502d,
  1682. "Invalid Entry Type.\n");
  1683. else if (pkt->entry_status & RF_BUSY)
  1684. ql_dbg(ql_dbg_async, vha, 0x502e,
  1685. "Busy.\n");
  1686. else
  1687. ql_dbg(ql_dbg_async, vha, 0x502f,
  1688. "UNKNOWN flag error.\n");
  1689. /* Validate handle. */
  1690. if (handle < MAX_OUTSTANDING_COMMANDS)
  1691. sp = req->outstanding_cmds[handle];
  1692. else
  1693. sp = NULL;
  1694. if (sp) {
  1695. /* Free outstanding command slot. */
  1696. req->outstanding_cmds[handle] = NULL;
  1697. /* Bad payload or header */
  1698. if (pkt->entry_status &
  1699. (RF_INV_E_ORDER | RF_INV_E_COUNT |
  1700. RF_INV_E_PARAM | RF_INV_E_TYPE)) {
  1701. sp->cmd->result = DID_ERROR << 16;
  1702. } else if (pkt->entry_status & RF_BUSY) {
  1703. sp->cmd->result = DID_BUS_BUSY << 16;
  1704. } else {
  1705. sp->cmd->result = DID_ERROR << 16;
  1706. }
  1707. qla2x00_sp_compl(ha, sp);
  1708. } else if (pkt->entry_type == COMMAND_A64_TYPE || pkt->entry_type ==
  1709. COMMAND_TYPE || pkt->entry_type == COMMAND_TYPE_7
  1710. || pkt->entry_type == COMMAND_TYPE_6) {
  1711. ql_log(ql_log_warn, vha, 0x5030,
  1712. "Error entry - invalid handle.\n");
  1713. if (IS_QLA82XX(ha))
  1714. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1715. else
  1716. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1717. qla2xxx_wake_dpc(vha);
  1718. }
  1719. }
  1720. /**
  1721. * qla24xx_mbx_completion() - Process mailbox command completions.
  1722. * @ha: SCSI driver HA context
  1723. * @mb0: Mailbox0 register
  1724. */
  1725. static void
  1726. qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  1727. {
  1728. uint16_t cnt;
  1729. uint16_t __iomem *wptr;
  1730. struct qla_hw_data *ha = vha->hw;
  1731. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1732. /* Load return mailbox registers. */
  1733. ha->flags.mbox_int = 1;
  1734. ha->mailbox_out[0] = mb0;
  1735. wptr = (uint16_t __iomem *)&reg->mailbox1;
  1736. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  1737. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  1738. wptr++;
  1739. }
  1740. if (ha->mcp) {
  1741. ql_dbg(ql_dbg_async, vha, 0x504d,
  1742. "Got mailbox completion. cmd=%x.\n", ha->mcp->mb[0]);
  1743. } else {
  1744. ql_dbg(ql_dbg_async, vha, 0x504e,
  1745. "MBX pointer ERROR.\n");
  1746. }
  1747. }
  1748. /**
  1749. * qla24xx_process_response_queue() - Process response queue entries.
  1750. * @ha: SCSI driver HA context
  1751. */
  1752. void qla24xx_process_response_queue(struct scsi_qla_host *vha,
  1753. struct rsp_que *rsp)
  1754. {
  1755. struct sts_entry_24xx *pkt;
  1756. struct qla_hw_data *ha = vha->hw;
  1757. if (!vha->flags.online)
  1758. return;
  1759. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1760. pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
  1761. rsp->ring_index++;
  1762. if (rsp->ring_index == rsp->length) {
  1763. rsp->ring_index = 0;
  1764. rsp->ring_ptr = rsp->ring;
  1765. } else {
  1766. rsp->ring_ptr++;
  1767. }
  1768. if (pkt->entry_status != 0) {
  1769. ql_dbg(ql_dbg_async, vha, 0x5029,
  1770. "Process error entry.\n");
  1771. qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
  1772. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1773. wmb();
  1774. continue;
  1775. }
  1776. switch (pkt->entry_type) {
  1777. case STATUS_TYPE:
  1778. qla2x00_status_entry(vha, rsp, pkt);
  1779. break;
  1780. case STATUS_CONT_TYPE:
  1781. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1782. break;
  1783. case VP_RPT_ID_IOCB_TYPE:
  1784. qla24xx_report_id_acquisition(vha,
  1785. (struct vp_rpt_id_entry_24xx *)pkt);
  1786. break;
  1787. case LOGINOUT_PORT_IOCB_TYPE:
  1788. qla24xx_logio_entry(vha, rsp->req,
  1789. (struct logio_entry_24xx *)pkt);
  1790. break;
  1791. case TSK_MGMT_IOCB_TYPE:
  1792. qla24xx_tm_iocb_entry(vha, rsp->req,
  1793. (struct tsk_mgmt_entry *)pkt);
  1794. break;
  1795. case CT_IOCB_TYPE:
  1796. qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1797. clear_bit(MBX_INTERRUPT, &vha->hw->mbx_cmd_flags);
  1798. break;
  1799. case ELS_IOCB_TYPE:
  1800. qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
  1801. break;
  1802. default:
  1803. /* Type Not Supported. */
  1804. ql_dbg(ql_dbg_async, vha, 0x5042,
  1805. "Received unknown response pkt type %x "
  1806. "entry status=%x.\n",
  1807. pkt->entry_type, pkt->entry_status);
  1808. break;
  1809. }
  1810. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1811. wmb();
  1812. }
  1813. /* Adjust ring index */
  1814. if (IS_QLA82XX(ha)) {
  1815. struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
  1816. WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
  1817. } else
  1818. WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
  1819. }
  1820. static void
  1821. qla2xxx_check_risc_status(scsi_qla_host_t *vha)
  1822. {
  1823. int rval;
  1824. uint32_t cnt;
  1825. struct qla_hw_data *ha = vha->hw;
  1826. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1827. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1828. return;
  1829. rval = QLA_SUCCESS;
  1830. WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
  1831. RD_REG_DWORD(&reg->iobase_addr);
  1832. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1833. for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1834. rval == QLA_SUCCESS; cnt--) {
  1835. if (cnt) {
  1836. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1837. udelay(10);
  1838. } else
  1839. rval = QLA_FUNCTION_TIMEOUT;
  1840. }
  1841. if (rval == QLA_SUCCESS)
  1842. goto next_test;
  1843. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1844. for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1845. rval == QLA_SUCCESS; cnt--) {
  1846. if (cnt) {
  1847. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1848. udelay(10);
  1849. } else
  1850. rval = QLA_FUNCTION_TIMEOUT;
  1851. }
  1852. if (rval != QLA_SUCCESS)
  1853. goto done;
  1854. next_test:
  1855. if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
  1856. ql_log(ql_log_info, vha, 0x504c,
  1857. "Additional code -- 0x55AA.\n");
  1858. done:
  1859. WRT_REG_DWORD(&reg->iobase_window, 0x0000);
  1860. RD_REG_DWORD(&reg->iobase_window);
  1861. }
  1862. /**
  1863. * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
  1864. * @irq:
  1865. * @dev_id: SCSI driver HA context
  1866. *
  1867. * Called by system whenever the host adapter generates an interrupt.
  1868. *
  1869. * Returns handled flag.
  1870. */
  1871. irqreturn_t
  1872. qla24xx_intr_handler(int irq, void *dev_id)
  1873. {
  1874. scsi_qla_host_t *vha;
  1875. struct qla_hw_data *ha;
  1876. struct device_reg_24xx __iomem *reg;
  1877. int status;
  1878. unsigned long iter;
  1879. uint32_t stat;
  1880. uint32_t hccr;
  1881. uint16_t mb[4];
  1882. struct rsp_que *rsp;
  1883. unsigned long flags;
  1884. rsp = (struct rsp_que *) dev_id;
  1885. if (!rsp) {
  1886. printk(KERN_INFO
  1887. "%s(): NULL response queue pointer.\n", __func__);
  1888. return IRQ_NONE;
  1889. }
  1890. ha = rsp->hw;
  1891. reg = &ha->iobase->isp24;
  1892. status = 0;
  1893. if (unlikely(pci_channel_offline(ha->pdev)))
  1894. return IRQ_HANDLED;
  1895. spin_lock_irqsave(&ha->hardware_lock, flags);
  1896. vha = pci_get_drvdata(ha->pdev);
  1897. for (iter = 50; iter--; ) {
  1898. stat = RD_REG_DWORD(&reg->host_status);
  1899. if (stat & HSRX_RISC_PAUSED) {
  1900. if (unlikely(pci_channel_offline(ha->pdev)))
  1901. break;
  1902. hccr = RD_REG_DWORD(&reg->hccr);
  1903. ql_log(ql_log_warn, vha, 0x504b,
  1904. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  1905. hccr);
  1906. qla2xxx_check_risc_status(vha);
  1907. ha->isp_ops->fw_dump(vha, 1);
  1908. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1909. break;
  1910. } else if ((stat & HSRX_RISC_INT) == 0)
  1911. break;
  1912. switch (stat & 0xff) {
  1913. case 0x1:
  1914. case 0x2:
  1915. case 0x10:
  1916. case 0x11:
  1917. qla24xx_mbx_completion(vha, MSW(stat));
  1918. status |= MBX_INTERRUPT;
  1919. break;
  1920. case 0x12:
  1921. mb[0] = MSW(stat);
  1922. mb[1] = RD_REG_WORD(&reg->mailbox1);
  1923. mb[2] = RD_REG_WORD(&reg->mailbox2);
  1924. mb[3] = RD_REG_WORD(&reg->mailbox3);
  1925. qla2x00_async_event(vha, rsp, mb);
  1926. break;
  1927. case 0x13:
  1928. case 0x14:
  1929. qla24xx_process_response_queue(vha, rsp);
  1930. break;
  1931. default:
  1932. ql_dbg(ql_dbg_async, vha, 0x504f,
  1933. "Unrecognized interrupt type (%d).\n", stat * 0xff);
  1934. break;
  1935. }
  1936. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1937. RD_REG_DWORD_RELAXED(&reg->hccr);
  1938. }
  1939. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1940. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  1941. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  1942. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  1943. complete(&ha->mbx_intr_comp);
  1944. }
  1945. return IRQ_HANDLED;
  1946. }
  1947. static irqreturn_t
  1948. qla24xx_msix_rsp_q(int irq, void *dev_id)
  1949. {
  1950. struct qla_hw_data *ha;
  1951. struct rsp_que *rsp;
  1952. struct device_reg_24xx __iomem *reg;
  1953. struct scsi_qla_host *vha;
  1954. unsigned long flags;
  1955. rsp = (struct rsp_que *) dev_id;
  1956. if (!rsp) {
  1957. printk(KERN_INFO
  1958. "%s(): NULL response queue pointer.\n", __func__);
  1959. return IRQ_NONE;
  1960. }
  1961. ha = rsp->hw;
  1962. reg = &ha->iobase->isp24;
  1963. spin_lock_irqsave(&ha->hardware_lock, flags);
  1964. vha = pci_get_drvdata(ha->pdev);
  1965. qla24xx_process_response_queue(vha, rsp);
  1966. if (!ha->flags.disable_msix_handshake) {
  1967. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1968. RD_REG_DWORD_RELAXED(&reg->hccr);
  1969. }
  1970. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1971. return IRQ_HANDLED;
  1972. }
  1973. static irqreturn_t
  1974. qla25xx_msix_rsp_q(int irq, void *dev_id)
  1975. {
  1976. struct qla_hw_data *ha;
  1977. struct rsp_que *rsp;
  1978. struct device_reg_24xx __iomem *reg;
  1979. unsigned long flags;
  1980. rsp = (struct rsp_que *) dev_id;
  1981. if (!rsp) {
  1982. printk(KERN_INFO
  1983. "%s(): NULL response queue pointer.\n", __func__);
  1984. return IRQ_NONE;
  1985. }
  1986. ha = rsp->hw;
  1987. /* Clear the interrupt, if enabled, for this response queue */
  1988. if (rsp->options & ~BIT_6) {
  1989. reg = &ha->iobase->isp24;
  1990. spin_lock_irqsave(&ha->hardware_lock, flags);
  1991. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1992. RD_REG_DWORD_RELAXED(&reg->hccr);
  1993. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1994. }
  1995. queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
  1996. return IRQ_HANDLED;
  1997. }
  1998. static irqreturn_t
  1999. qla24xx_msix_default(int irq, void *dev_id)
  2000. {
  2001. scsi_qla_host_t *vha;
  2002. struct qla_hw_data *ha;
  2003. struct rsp_que *rsp;
  2004. struct device_reg_24xx __iomem *reg;
  2005. int status;
  2006. uint32_t stat;
  2007. uint32_t hccr;
  2008. uint16_t mb[4];
  2009. unsigned long flags;
  2010. rsp = (struct rsp_que *) dev_id;
  2011. if (!rsp) {
  2012. printk(KERN_INFO
  2013. "%s(): NULL response queue pointer.\n", __func__);
  2014. return IRQ_NONE;
  2015. }
  2016. ha = rsp->hw;
  2017. reg = &ha->iobase->isp24;
  2018. status = 0;
  2019. spin_lock_irqsave(&ha->hardware_lock, flags);
  2020. vha = pci_get_drvdata(ha->pdev);
  2021. do {
  2022. stat = RD_REG_DWORD(&reg->host_status);
  2023. if (stat & HSRX_RISC_PAUSED) {
  2024. if (unlikely(pci_channel_offline(ha->pdev)))
  2025. break;
  2026. hccr = RD_REG_DWORD(&reg->hccr);
  2027. ql_log(ql_log_info, vha, 0x5050,
  2028. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  2029. hccr);
  2030. qla2xxx_check_risc_status(vha);
  2031. ha->isp_ops->fw_dump(vha, 1);
  2032. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2033. break;
  2034. } else if ((stat & HSRX_RISC_INT) == 0)
  2035. break;
  2036. switch (stat & 0xff) {
  2037. case 0x1:
  2038. case 0x2:
  2039. case 0x10:
  2040. case 0x11:
  2041. qla24xx_mbx_completion(vha, MSW(stat));
  2042. status |= MBX_INTERRUPT;
  2043. break;
  2044. case 0x12:
  2045. mb[0] = MSW(stat);
  2046. mb[1] = RD_REG_WORD(&reg->mailbox1);
  2047. mb[2] = RD_REG_WORD(&reg->mailbox2);
  2048. mb[3] = RD_REG_WORD(&reg->mailbox3);
  2049. qla2x00_async_event(vha, rsp, mb);
  2050. break;
  2051. case 0x13:
  2052. case 0x14:
  2053. qla24xx_process_response_queue(vha, rsp);
  2054. break;
  2055. default:
  2056. ql_dbg(ql_dbg_async, vha, 0x5051,
  2057. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  2058. break;
  2059. }
  2060. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  2061. } while (0);
  2062. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2063. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  2064. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  2065. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  2066. complete(&ha->mbx_intr_comp);
  2067. }
  2068. return IRQ_HANDLED;
  2069. }
  2070. /* Interrupt handling helpers. */
  2071. struct qla_init_msix_entry {
  2072. const char *name;
  2073. irq_handler_t handler;
  2074. };
  2075. static struct qla_init_msix_entry msix_entries[3] = {
  2076. { "qla2xxx (default)", qla24xx_msix_default },
  2077. { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
  2078. { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
  2079. };
  2080. static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
  2081. { "qla2xxx (default)", qla82xx_msix_default },
  2082. { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
  2083. };
  2084. static void
  2085. qla24xx_disable_msix(struct qla_hw_data *ha)
  2086. {
  2087. int i;
  2088. struct qla_msix_entry *qentry;
  2089. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2090. for (i = 0; i < ha->msix_count; i++) {
  2091. qentry = &ha->msix_entries[i];
  2092. if (qentry->have_irq)
  2093. free_irq(qentry->vector, qentry->rsp);
  2094. }
  2095. pci_disable_msix(ha->pdev);
  2096. kfree(ha->msix_entries);
  2097. ha->msix_entries = NULL;
  2098. ha->flags.msix_enabled = 0;
  2099. ql_dbg(ql_dbg_init, vha, 0x0042,
  2100. "Disabled the MSI.\n");
  2101. }
  2102. static int
  2103. qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
  2104. {
  2105. #define MIN_MSIX_COUNT 2
  2106. int i, ret;
  2107. struct msix_entry *entries;
  2108. struct qla_msix_entry *qentry;
  2109. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2110. entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
  2111. GFP_KERNEL);
  2112. if (!entries) {
  2113. ql_log(ql_log_warn, vha, 0x00bc,
  2114. "Failed to allocate memory for msix_entry.\n");
  2115. return -ENOMEM;
  2116. }
  2117. for (i = 0; i < ha->msix_count; i++)
  2118. entries[i].entry = i;
  2119. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2120. if (ret) {
  2121. if (ret < MIN_MSIX_COUNT)
  2122. goto msix_failed;
  2123. ql_log(ql_log_warn, vha, 0x00c6,
  2124. "MSI-X: Failed to enable support "
  2125. "-- %d/%d\n Retry with %d vectors.\n",
  2126. ha->msix_count, ret, ret);
  2127. ha->msix_count = ret;
  2128. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2129. if (ret) {
  2130. msix_failed:
  2131. ql_log(ql_log_fatal, vha, 0x00c7,
  2132. "MSI-X: Failed to enable support, "
  2133. "giving up -- %d/%d.\n",
  2134. ha->msix_count, ret);
  2135. goto msix_out;
  2136. }
  2137. ha->max_rsp_queues = ha->msix_count - 1;
  2138. }
  2139. ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
  2140. ha->msix_count, GFP_KERNEL);
  2141. if (!ha->msix_entries) {
  2142. ql_log(ql_log_fatal, vha, 0x00c8,
  2143. "Failed to allocate memory for ha->msix_entries.\n");
  2144. ret = -ENOMEM;
  2145. goto msix_out;
  2146. }
  2147. ha->flags.msix_enabled = 1;
  2148. for (i = 0; i < ha->msix_count; i++) {
  2149. qentry = &ha->msix_entries[i];
  2150. qentry->vector = entries[i].vector;
  2151. qentry->entry = entries[i].entry;
  2152. qentry->have_irq = 0;
  2153. qentry->rsp = NULL;
  2154. }
  2155. /* Enable MSI-X vectors for the base queue */
  2156. for (i = 0; i < 2; i++) {
  2157. qentry = &ha->msix_entries[i];
  2158. if (IS_QLA82XX(ha)) {
  2159. ret = request_irq(qentry->vector,
  2160. qla82xx_msix_entries[i].handler,
  2161. 0, qla82xx_msix_entries[i].name, rsp);
  2162. } else {
  2163. ret = request_irq(qentry->vector,
  2164. msix_entries[i].handler,
  2165. 0, msix_entries[i].name, rsp);
  2166. }
  2167. if (ret) {
  2168. ql_log(ql_log_fatal, vha, 0x00cb,
  2169. "MSI-X: unable to register handler -- %x/%d.\n",
  2170. qentry->vector, ret);
  2171. qla24xx_disable_msix(ha);
  2172. ha->mqenable = 0;
  2173. goto msix_out;
  2174. }
  2175. qentry->have_irq = 1;
  2176. qentry->rsp = rsp;
  2177. rsp->msix = qentry;
  2178. }
  2179. /* Enable MSI-X vector for response queue update for queue 0 */
  2180. if (ha->mqiobase && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
  2181. ha->mqenable = 1;
  2182. ql_dbg(ql_dbg_multiq, vha, 0xc005,
  2183. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2184. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2185. ql_dbg(ql_dbg_init, vha, 0x0055,
  2186. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2187. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2188. msix_out:
  2189. kfree(entries);
  2190. return ret;
  2191. }
  2192. int
  2193. qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
  2194. {
  2195. int ret;
  2196. device_reg_t __iomem *reg = ha->iobase;
  2197. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2198. /* If possible, enable MSI-X. */
  2199. if (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
  2200. !IS_QLA8432(ha) && !IS_QLA8XXX_TYPE(ha))
  2201. goto skip_msi;
  2202. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
  2203. (ha->pdev->subsystem_device == 0x7040 ||
  2204. ha->pdev->subsystem_device == 0x7041 ||
  2205. ha->pdev->subsystem_device == 0x1705)) {
  2206. ql_log(ql_log_warn, vha, 0x0034,
  2207. "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
  2208. ha->pdev->subsystem_vendor,
  2209. ha->pdev->subsystem_device);
  2210. goto skip_msi;
  2211. }
  2212. if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
  2213. ql_log(ql_log_warn, vha, 0x0035,
  2214. "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
  2215. ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
  2216. goto skip_msix;
  2217. }
  2218. ret = qla24xx_enable_msix(ha, rsp);
  2219. if (!ret) {
  2220. ql_dbg(ql_dbg_init, vha, 0x0036,
  2221. "MSI-X: Enabled (0x%X, 0x%X).\n",
  2222. ha->chip_revision, ha->fw_attributes);
  2223. goto clear_risc_ints;
  2224. }
  2225. ql_log(ql_log_info, vha, 0x0037,
  2226. "MSI-X Falling back-to MSI mode -%d.\n", ret);
  2227. skip_msix:
  2228. if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
  2229. !IS_QLA8001(ha))
  2230. goto skip_msi;
  2231. ret = pci_enable_msi(ha->pdev);
  2232. if (!ret) {
  2233. ql_dbg(ql_dbg_init, vha, 0x0038,
  2234. "MSI: Enabled.\n");
  2235. ha->flags.msi_enabled = 1;
  2236. } else
  2237. ql_log(ql_log_warn, vha, 0x0039,
  2238. "MSI-X; Falling back-to INTa mode -- %d.\n", ret);
  2239. skip_msi:
  2240. ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
  2241. ha->flags.msi_enabled ? 0 : IRQF_SHARED,
  2242. QLA2XXX_DRIVER_NAME, rsp);
  2243. if (ret) {
  2244. ql_log(ql_log_warn, vha, 0x003a,
  2245. "Failed to reserve interrupt %d already in use.\n",
  2246. ha->pdev->irq);
  2247. goto fail;
  2248. }
  2249. clear_risc_ints:
  2250. /*
  2251. * FIXME: Noted that 8014s were being dropped during NK testing.
  2252. * Timing deltas during MSI-X/INTa transitions?
  2253. */
  2254. if (IS_QLA81XX(ha) || IS_QLA82XX(ha))
  2255. goto fail;
  2256. spin_lock_irq(&ha->hardware_lock);
  2257. if (IS_FWI2_CAPABLE(ha)) {
  2258. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_HOST_INT);
  2259. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_RISC_INT);
  2260. } else {
  2261. WRT_REG_WORD(&reg->isp.semaphore, 0);
  2262. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_RISC_INT);
  2263. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_HOST_INT);
  2264. }
  2265. spin_unlock_irq(&ha->hardware_lock);
  2266. fail:
  2267. return ret;
  2268. }
  2269. void
  2270. qla2x00_free_irqs(scsi_qla_host_t *vha)
  2271. {
  2272. struct qla_hw_data *ha = vha->hw;
  2273. struct rsp_que *rsp = ha->rsp_q_map[0];
  2274. if (ha->flags.msix_enabled)
  2275. qla24xx_disable_msix(ha);
  2276. else if (ha->flags.msi_enabled) {
  2277. free_irq(ha->pdev->irq, rsp);
  2278. pci_disable_msi(ha->pdev);
  2279. } else
  2280. free_irq(ha->pdev->irq, rsp);
  2281. }
  2282. int qla25xx_request_irq(struct rsp_que *rsp)
  2283. {
  2284. struct qla_hw_data *ha = rsp->hw;
  2285. struct qla_init_msix_entry *intr = &msix_entries[2];
  2286. struct qla_msix_entry *msix = rsp->msix;
  2287. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2288. int ret;
  2289. ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
  2290. if (ret) {
  2291. ql_log(ql_log_fatal, vha, 0x00e6,
  2292. "MSI-X: Unable to register handler -- %x/%d.\n",
  2293. msix->vector, ret);
  2294. return ret;
  2295. }
  2296. msix->have_irq = 1;
  2297. msix->rsp = rsp;
  2298. return ret;
  2299. }