prm44xx.c 2.5 KB

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  1. /*
  2. * OMAP4 PRM module functions
  3. *
  4. * Copyright (C) 2011 Texas Instruments, Inc.
  5. * Copyright (C) 2010 Nokia Corporation
  6. * Benoît Cousson
  7. * Paul Walmsley
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/delay.h>
  15. #include <linux/errno.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <plat/common.h>
  19. #include <plat/cpu.h>
  20. #include <plat/prcm.h>
  21. #include "vp.h"
  22. #include "prm44xx.h"
  23. #include "prm-regbits-44xx.h"
  24. /* PRM low-level functions */
  25. /* Read a register in a CM/PRM instance in the PRM module */
  26. u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
  27. {
  28. return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
  29. }
  30. /* Write into a register in a CM/PRM instance in the PRM module */
  31. void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
  32. {
  33. __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
  34. }
  35. /* Read-modify-write a register in a PRM module. Caller must lock */
  36. u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
  37. {
  38. u32 v;
  39. v = omap4_prm_read_inst_reg(inst, reg);
  40. v &= ~mask;
  41. v |= bits;
  42. omap4_prm_write_inst_reg(v, inst, reg);
  43. return v;
  44. }
  45. /* PRM VP */
  46. /*
  47. * struct omap4_vp - OMAP4 VP register access description.
  48. * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
  49. * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
  50. */
  51. struct omap4_vp {
  52. u32 irqstatus_mpu;
  53. u32 tranxdone_status;
  54. };
  55. static struct omap4_vp omap4_vp[] = {
  56. [OMAP4_VP_VDD_MPU_ID] = {
  57. .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
  58. .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
  59. },
  60. [OMAP4_VP_VDD_IVA_ID] = {
  61. .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
  62. .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
  63. },
  64. [OMAP4_VP_VDD_CORE_ID] = {
  65. .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
  66. .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
  67. },
  68. };
  69. u32 omap4_prm_vp_check_txdone(u8 vp_id)
  70. {
  71. struct omap4_vp *vp = &omap4_vp[vp_id];
  72. u32 irqstatus;
  73. irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
  74. OMAP4430_PRM_OCP_SOCKET_INST,
  75. vp->irqstatus_mpu);
  76. return irqstatus & vp->tranxdone_status;
  77. }
  78. void omap4_prm_vp_clear_txdone(u8 vp_id)
  79. {
  80. struct omap4_vp *vp = &omap4_vp[vp_id];
  81. omap4_prminst_write_inst_reg(vp->tranxdone_status,
  82. OMAP4430_PRM_PARTITION,
  83. OMAP4430_PRM_OCP_SOCKET_INST,
  84. vp->irqstatus_mpu);
  85. };