mainstone.c 7.8 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/sched.h>
  19. #include <linux/bitops.h>
  20. #include <linux/fb.h>
  21. #include <asm/types.h>
  22. #include <asm/setup.h>
  23. #include <asm/memory.h>
  24. #include <asm/mach-types.h>
  25. #include <asm/hardware.h>
  26. #include <asm/irq.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/mach/irq.h>
  30. #include <asm/arch/pxa-regs.h>
  31. #include <asm/arch/mainstone.h>
  32. #include <asm/arch/audio.h>
  33. #include <asm/arch/pxafb.h>
  34. #include <asm/arch/mmc.h>
  35. #include "generic.h"
  36. static unsigned long mainstone_irq_enabled;
  37. static void mainstone_mask_irq(unsigned int irq)
  38. {
  39. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  40. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  41. }
  42. static void mainstone_unmask_irq(unsigned int irq)
  43. {
  44. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  45. /* the irq can be acknowledged only if deasserted, so it's done here */
  46. MST_INTSETCLR &= ~(1 << mainstone_irq);
  47. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  48. }
  49. static struct irqchip mainstone_irq_chip = {
  50. .ack = mainstone_mask_irq,
  51. .mask = mainstone_mask_irq,
  52. .unmask = mainstone_unmask_irq,
  53. };
  54. static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
  55. struct pt_regs *regs)
  56. {
  57. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  58. do {
  59. GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
  60. if (likely(pending)) {
  61. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  62. desc = irq_desc + irq;
  63. desc->handle(irq, desc, regs);
  64. }
  65. pending = MST_INTSETCLR & mainstone_irq_enabled;
  66. } while (pending);
  67. }
  68. static void __init mainstone_init_irq(void)
  69. {
  70. int irq;
  71. pxa_init_irq();
  72. /* setup extra Mainstone irqs */
  73. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  74. set_irq_chip(irq, &mainstone_irq_chip);
  75. set_irq_handler(irq, do_level_IRQ);
  76. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  77. }
  78. set_irq_flags(MAINSTONE_IRQ(8), 0);
  79. set_irq_flags(MAINSTONE_IRQ(12), 0);
  80. MST_INTMSKENA = 0;
  81. MST_INTSETCLR = 0;
  82. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  83. set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
  84. }
  85. static struct resource smc91x_resources[] = {
  86. [0] = {
  87. .start = (MST_ETH_PHYS + 0x300),
  88. .end = (MST_ETH_PHYS + 0xfffff),
  89. .flags = IORESOURCE_MEM,
  90. },
  91. [1] = {
  92. .start = MAINSTONE_IRQ(3),
  93. .end = MAINSTONE_IRQ(3),
  94. .flags = IORESOURCE_IRQ,
  95. }
  96. };
  97. static struct platform_device smc91x_device = {
  98. .name = "smc91x",
  99. .id = 0,
  100. .num_resources = ARRAY_SIZE(smc91x_resources),
  101. .resource = smc91x_resources,
  102. };
  103. static int mst_audio_startup(snd_pcm_substream_t *substream, void *priv)
  104. {
  105. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  106. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  107. return 0;
  108. }
  109. static void mst_audio_shutdown(snd_pcm_substream_t *substream, void *priv)
  110. {
  111. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  112. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  113. }
  114. static long mst_audio_suspend_mask;
  115. static void mst_audio_suspend(void *priv)
  116. {
  117. mst_audio_suspend_mask = MST_MSCWR2;
  118. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  119. }
  120. static void mst_audio_resume(void *priv)
  121. {
  122. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  123. }
  124. static pxa2xx_audio_ops_t mst_audio_ops = {
  125. .startup = mst_audio_startup,
  126. .shutdown = mst_audio_shutdown,
  127. .suspend = mst_audio_suspend,
  128. .resume = mst_audio_resume,
  129. };
  130. static struct platform_device mst_audio_device = {
  131. .name = "pxa2xx-ac97",
  132. .id = -1,
  133. .dev = { .platform_data = &mst_audio_ops },
  134. };
  135. static void mainstone_backlight_power(int on)
  136. {
  137. if (on) {
  138. pxa_gpio_mode(GPIO16_PWM0_MD);
  139. pxa_set_cken(CKEN0_PWM0, 1);
  140. PWM_CTRL0 = 0;
  141. PWM_PWDUTY0 = 0x3ff;
  142. PWM_PERVAL0 = 0x3ff;
  143. } else {
  144. PWM_CTRL0 = 0;
  145. PWM_PWDUTY0 = 0x0;
  146. PWM_PERVAL0 = 0x3FF;
  147. pxa_set_cken(CKEN0_PWM0, 0);
  148. }
  149. }
  150. static struct pxafb_mach_info toshiba_ltm04c380k __initdata = {
  151. .pixclock = 50000,
  152. .xres = 640,
  153. .yres = 480,
  154. .bpp = 16,
  155. .hsync_len = 1,
  156. .left_margin = 0x9f,
  157. .right_margin = 1,
  158. .vsync_len = 44,
  159. .upper_margin = 0,
  160. .lower_margin = 0,
  161. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  162. .lccr0 = LCCR0_Act,
  163. .lccr3 = LCCR3_PCP,
  164. .pxafb_backlight_power = mainstone_backlight_power,
  165. };
  166. static struct pxafb_mach_info toshiba_ltm035a776c __initdata = {
  167. .pixclock = 110000,
  168. .xres = 240,
  169. .yres = 320,
  170. .bpp = 16,
  171. .hsync_len = 4,
  172. .left_margin = 8,
  173. .right_margin = 20,
  174. .vsync_len = 3,
  175. .upper_margin = 1,
  176. .lower_margin = 10,
  177. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  178. .lccr0 = LCCR0_Act,
  179. .lccr3 = LCCR3_PCP,
  180. .pxafb_backlight_power = mainstone_backlight_power,
  181. };
  182. static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *, struct pt_regs *), void *data)
  183. {
  184. int err;
  185. /*
  186. * setup GPIO for PXA27x MMC controller
  187. */
  188. pxa_gpio_mode(GPIO32_MMCCLK_MD);
  189. pxa_gpio_mode(GPIO112_MMCCMD_MD);
  190. pxa_gpio_mode(GPIO92_MMCDAT0_MD);
  191. pxa_gpio_mode(GPIO109_MMCDAT1_MD);
  192. pxa_gpio_mode(GPIO110_MMCDAT2_MD);
  193. pxa_gpio_mode(GPIO111_MMCDAT3_MD);
  194. /* make sure SD/Memory Stick multiplexer's signals
  195. * are routed to MMC controller
  196. */
  197. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  198. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, SA_INTERRUPT,
  199. "MMC card detect", data);
  200. if (err) {
  201. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  202. return -1;
  203. }
  204. return 0;
  205. }
  206. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  207. {
  208. struct pxamci_platform_data* p_d = dev->platform_data;
  209. if (( 1 << vdd) & p_d->ocr_mask) {
  210. printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
  211. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  212. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  213. } else {
  214. printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
  215. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  216. }
  217. }
  218. static void mainstone_mci_exit(struct device *dev, void *data)
  219. {
  220. free_irq(MAINSTONE_MMC_IRQ, data);
  221. }
  222. static struct pxamci_platform_data mainstone_mci_platform_data = {
  223. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  224. .init = mainstone_mci_init,
  225. .setpower = mainstone_mci_setpower,
  226. .exit = mainstone_mci_exit,
  227. };
  228. static void __init mainstone_init(void)
  229. {
  230. /*
  231. * On Mainstone, we route AC97_SYSCLK via GPIO45 to
  232. * the audio daughter card
  233. */
  234. pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
  235. platform_device_register(&smc91x_device);
  236. platform_device_register(&mst_audio_device);
  237. /* reading Mainstone's "Virtual Configuration Register"
  238. might be handy to select LCD type here */
  239. if (0)
  240. set_pxa_fb_info(&toshiba_ltm04c380k);
  241. else
  242. set_pxa_fb_info(&toshiba_ltm035a776c);
  243. pxa_set_mci_info(&mainstone_mci_platform_data);
  244. }
  245. static struct map_desc mainstone_io_desc[] __initdata = {
  246. { MST_FPGA_VIRT, MST_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */
  247. };
  248. static void __init mainstone_map_io(void)
  249. {
  250. pxa_map_io();
  251. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  252. /* initialize sleep mode regs (wake-up sources, etc) */
  253. PGSR0 = 0x00008800;
  254. PGSR1 = 0x00000002;
  255. PGSR2 = 0x0001FC00;
  256. PGSR3 = 0x00001F81;
  257. PWER = 0xC0000002;
  258. PRER = 0x00000002;
  259. PFER = 0x00000002;
  260. /* for use I SRAM as framebuffer. */
  261. PSLR |= 0xF04;
  262. PCFR = 0x66;
  263. /* For Keypad wakeup. */
  264. KPC &=~KPC_ASACT;
  265. KPC |=KPC_AS;
  266. PKWR = 0x000FD000;
  267. /* Need read PKWR back after set it. */
  268. PKWR;
  269. }
  270. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  271. MAINTAINER("MontaVista Software Inc.")
  272. BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
  273. MAPIO(mainstone_map_io)
  274. INITIRQ(mainstone_init_irq)
  275. .timer = &pxa_timer,
  276. INIT_MACHINE(mainstone_init)
  277. MACHINE_END