rt2500usb.c 56 KB

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  1. /*
  2. Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2500usb
  19. Abstract: rt2500usb device specific routines.
  20. Supported chipsets: RT2570.
  21. */
  22. /*
  23. * Set enviroment defines for rt2x00.h
  24. */
  25. #define DRV_NAME "rt2500usb"
  26. #include <linux/delay.h>
  27. #include <linux/etherdevice.h>
  28. #include <linux/init.h>
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/usb.h>
  32. #include "rt2x00.h"
  33. #include "rt2x00usb.h"
  34. #include "rt2500usb.h"
  35. /*
  36. * Register access.
  37. * All access to the CSR registers will go through the methods
  38. * rt2500usb_register_read and rt2500usb_register_write.
  39. * BBP and RF register require indirect register access,
  40. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  41. * These indirect registers work with busy bits,
  42. * and we will try maximal REGISTER_BUSY_COUNT times to access
  43. * the register while taking a REGISTER_BUSY_DELAY us delay
  44. * between each attampt. When the busy bit is still set at that time,
  45. * the access attempt is considered to have failed,
  46. * and we will print an error.
  47. */
  48. static inline void rt2500usb_register_read(const struct rt2x00_dev *rt2x00dev,
  49. const unsigned int offset,
  50. u16 *value)
  51. {
  52. __le16 reg;
  53. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  54. USB_VENDOR_REQUEST_IN, offset,
  55. &reg, sizeof(u16), REGISTER_TIMEOUT);
  56. *value = le16_to_cpu(reg);
  57. }
  58. static inline void rt2500usb_register_multiread(const struct rt2x00_dev
  59. *rt2x00dev,
  60. const unsigned int offset,
  61. void *value, const u16 length)
  62. {
  63. int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
  64. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  65. USB_VENDOR_REQUEST_IN, offset,
  66. value, length, timeout);
  67. }
  68. static inline void rt2500usb_register_write(const struct rt2x00_dev *rt2x00dev,
  69. const unsigned int offset,
  70. u16 value)
  71. {
  72. __le16 reg = cpu_to_le16(value);
  73. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  74. USB_VENDOR_REQUEST_OUT, offset,
  75. &reg, sizeof(u16), REGISTER_TIMEOUT);
  76. }
  77. static inline void rt2500usb_register_multiwrite(const struct rt2x00_dev
  78. *rt2x00dev,
  79. const unsigned int offset,
  80. void *value, const u16 length)
  81. {
  82. int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
  83. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  84. USB_VENDOR_REQUEST_OUT, offset,
  85. value, length, timeout);
  86. }
  87. static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
  88. {
  89. u16 reg;
  90. unsigned int i;
  91. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  92. rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
  93. if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
  94. break;
  95. udelay(REGISTER_BUSY_DELAY);
  96. }
  97. return reg;
  98. }
  99. static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
  100. const unsigned int word, const u8 value)
  101. {
  102. u16 reg;
  103. /*
  104. * Wait until the BBP becomes ready.
  105. */
  106. reg = rt2500usb_bbp_check(rt2x00dev);
  107. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  108. ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
  109. return;
  110. }
  111. /*
  112. * Write the data into the BBP.
  113. */
  114. reg = 0;
  115. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  116. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  117. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  118. rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
  119. }
  120. static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
  121. const unsigned int word, u8 *value)
  122. {
  123. u16 reg;
  124. /*
  125. * Wait until the BBP becomes ready.
  126. */
  127. reg = rt2500usb_bbp_check(rt2x00dev);
  128. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  129. ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
  130. return;
  131. }
  132. /*
  133. * Write the request into the BBP.
  134. */
  135. reg = 0;
  136. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  137. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  138. rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
  139. /*
  140. * Wait until the BBP becomes ready.
  141. */
  142. reg = rt2500usb_bbp_check(rt2x00dev);
  143. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  144. ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
  145. *value = 0xff;
  146. return;
  147. }
  148. rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
  149. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  150. }
  151. static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
  152. const unsigned int word, const u32 value)
  153. {
  154. u16 reg;
  155. unsigned int i;
  156. if (!word)
  157. return;
  158. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  159. rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
  160. if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
  161. goto rf_write;
  162. udelay(REGISTER_BUSY_DELAY);
  163. }
  164. ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
  165. return;
  166. rf_write:
  167. reg = 0;
  168. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  169. rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
  170. reg = 0;
  171. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  172. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  173. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  174. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  175. rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
  176. rt2x00_rf_write(rt2x00dev, word, value);
  177. }
  178. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  179. #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
  180. static void rt2500usb_read_csr(const struct rt2x00_dev *rt2x00dev,
  181. const unsigned int word, u32 *data)
  182. {
  183. rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
  184. }
  185. static void rt2500usb_write_csr(const struct rt2x00_dev *rt2x00dev,
  186. const unsigned int word, u32 data)
  187. {
  188. rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
  189. }
  190. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  191. .owner = THIS_MODULE,
  192. .csr = {
  193. .read = rt2500usb_read_csr,
  194. .write = rt2500usb_write_csr,
  195. .word_size = sizeof(u16),
  196. .word_count = CSR_REG_SIZE / sizeof(u16),
  197. },
  198. .eeprom = {
  199. .read = rt2x00_eeprom_read,
  200. .write = rt2x00_eeprom_write,
  201. .word_size = sizeof(u16),
  202. .word_count = EEPROM_SIZE / sizeof(u16),
  203. },
  204. .bbp = {
  205. .read = rt2500usb_bbp_read,
  206. .write = rt2500usb_bbp_write,
  207. .word_size = sizeof(u8),
  208. .word_count = BBP_SIZE / sizeof(u8),
  209. },
  210. .rf = {
  211. .read = rt2x00_rf_read,
  212. .write = rt2500usb_rf_write,
  213. .word_size = sizeof(u32),
  214. .word_count = RF_SIZE / sizeof(u32),
  215. },
  216. };
  217. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  218. /*
  219. * Configuration handlers.
  220. */
  221. static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev,
  222. __le32 *mac)
  223. {
  224. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, &mac,
  225. (3 * sizeof(__le16)));
  226. }
  227. static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev,
  228. __le32 *bssid)
  229. {
  230. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, bssid,
  231. (3 * sizeof(__le16)));
  232. }
  233. static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type)
  234. {
  235. struct interface *intf = &rt2x00dev->interface;
  236. u16 reg;
  237. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  238. /*
  239. * Enable beacon config
  240. */
  241. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  242. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
  243. (PREAMBLE + get_duration(IEEE80211_HEADER, 2)) >> 6);
  244. if (is_interface_type(intf, IEEE80211_IF_TYPE_STA))
  245. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
  246. else
  247. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
  248. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  249. /*
  250. * Enable synchronisation.
  251. */
  252. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  253. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  254. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  255. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  256. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  257. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  258. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  259. if (is_interface_type(intf, IEEE80211_IF_TYPE_IBSS) ||
  260. is_interface_type(intf, IEEE80211_IF_TYPE_AP))
  261. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 2);
  262. else if (is_interface_type(intf, IEEE80211_IF_TYPE_STA))
  263. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 1);
  264. else
  265. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
  266. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  267. }
  268. static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
  269. {
  270. struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
  271. u16 reg;
  272. u16 value;
  273. u16 preamble;
  274. if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
  275. preamble = SHORT_PREAMBLE;
  276. else
  277. preamble = PREAMBLE;
  278. reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK;
  279. rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg);
  280. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  281. value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
  282. SHORT_DIFS : DIFS) +
  283. PLCP + preamble + get_duration(ACK_SIZE, 10);
  284. rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, value);
  285. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  286. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  287. if (preamble == SHORT_PREAMBLE)
  288. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 1);
  289. else
  290. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 0);
  291. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  292. }
  293. static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
  294. const int phymode)
  295. {
  296. struct ieee80211_hw_mode *mode;
  297. struct ieee80211_rate *rate;
  298. if (phymode == MODE_IEEE80211A)
  299. rt2x00dev->curr_hwmode = HWMODE_A;
  300. else if (phymode == MODE_IEEE80211B)
  301. rt2x00dev->curr_hwmode = HWMODE_B;
  302. else
  303. rt2x00dev->curr_hwmode = HWMODE_G;
  304. mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
  305. rate = &mode->rates[mode->num_rates - 1];
  306. rt2500usb_config_rate(rt2x00dev, rate->val2);
  307. if (phymode == MODE_IEEE80211B) {
  308. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
  309. rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
  310. } else {
  311. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
  312. rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
  313. }
  314. }
  315. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  316. const int index, const int channel,
  317. const int txpower)
  318. {
  319. struct rf_channel reg;
  320. /*
  321. * Fill rf_reg structure.
  322. */
  323. memcpy(&reg, &rt2x00dev->spec.channels[index], sizeof(reg));
  324. /*
  325. * Set TXpower.
  326. */
  327. rt2x00_set_field32(&reg.rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  328. /*
  329. * For RT2525E we should first set the channel to half band higher.
  330. */
  331. if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  332. static const u32 vals[] = {
  333. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  334. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  335. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  336. 0x00000902, 0x00000906
  337. };
  338. rt2500usb_rf_write(rt2x00dev, 2, vals[channel - 1]);
  339. if (reg.rf4)
  340. rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
  341. }
  342. rt2500usb_rf_write(rt2x00dev, 1, reg.rf1);
  343. rt2500usb_rf_write(rt2x00dev, 2, reg.rf2);
  344. rt2500usb_rf_write(rt2x00dev, 3, reg.rf3);
  345. if (reg.rf4)
  346. rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
  347. }
  348. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  349. const int txpower)
  350. {
  351. u32 rf3;
  352. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  353. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  354. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  355. }
  356. static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
  357. const int antenna_tx, const int antenna_rx)
  358. {
  359. u8 r2;
  360. u8 r14;
  361. u16 csr5;
  362. u16 csr6;
  363. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  364. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  365. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  366. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  367. /*
  368. * Configure the TX antenna.
  369. */
  370. switch (antenna_tx) {
  371. case ANTENNA_SW_DIVERSITY:
  372. case ANTENNA_HW_DIVERSITY:
  373. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  374. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  375. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  376. break;
  377. case ANTENNA_A:
  378. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  379. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  380. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  381. break;
  382. case ANTENNA_B:
  383. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  384. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  385. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  386. break;
  387. }
  388. /*
  389. * Configure the RX antenna.
  390. */
  391. switch (antenna_rx) {
  392. case ANTENNA_SW_DIVERSITY:
  393. case ANTENNA_HW_DIVERSITY:
  394. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  395. break;
  396. case ANTENNA_A:
  397. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  398. break;
  399. case ANTENNA_B:
  400. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  401. break;
  402. }
  403. /*
  404. * RT2525E and RT5222 need to flip TX I/Q
  405. */
  406. if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
  407. rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  408. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  409. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  410. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  411. /*
  412. * RT2525E does not need RX I/Q Flip.
  413. */
  414. if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
  415. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  416. } else {
  417. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  418. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  419. }
  420. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  421. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  422. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  423. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  424. }
  425. static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
  426. const int short_slot_time,
  427. const int beacon_int)
  428. {
  429. u16 reg;
  430. rt2500usb_register_write(rt2x00dev, MAC_CSR10,
  431. short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
  432. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  433. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, beacon_int * 4);
  434. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  435. }
  436. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  437. const unsigned int flags,
  438. struct ieee80211_conf *conf)
  439. {
  440. int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
  441. if (flags & CONFIG_UPDATE_PHYMODE)
  442. rt2500usb_config_phymode(rt2x00dev, conf->phymode);
  443. if (flags & CONFIG_UPDATE_CHANNEL)
  444. rt2500usb_config_channel(rt2x00dev, conf->channel_val,
  445. conf->channel, conf->power_level);
  446. if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
  447. rt2500usb_config_txpower(rt2x00dev, conf->power_level);
  448. if (flags & CONFIG_UPDATE_ANTENNA)
  449. rt2500usb_config_antenna(rt2x00dev, conf->antenna_sel_tx,
  450. conf->antenna_sel_rx);
  451. if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
  452. rt2500usb_config_duration(rt2x00dev, short_slot_time,
  453. conf->beacon_int);
  454. }
  455. /*
  456. * LED functions.
  457. */
  458. static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
  459. {
  460. u16 reg;
  461. rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
  462. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
  463. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
  464. rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
  465. rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
  466. if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
  467. rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
  468. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
  469. } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
  470. rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
  471. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
  472. } else {
  473. rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
  474. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
  475. }
  476. rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
  477. }
  478. static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
  479. {
  480. u16 reg;
  481. rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
  482. rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
  483. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
  484. rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
  485. }
  486. /*
  487. * Link tuning
  488. */
  489. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev)
  490. {
  491. u16 reg;
  492. /*
  493. * Update FCS error count from register.
  494. */
  495. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  496. rt2x00dev->link.rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  497. /*
  498. * Update False CCA count from register.
  499. */
  500. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  501. rt2x00dev->link.false_cca =
  502. rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  503. }
  504. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
  505. {
  506. u16 eeprom;
  507. u16 value;
  508. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  509. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  510. rt2500usb_bbp_write(rt2x00dev, 24, value);
  511. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  512. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  513. rt2500usb_bbp_write(rt2x00dev, 25, value);
  514. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  515. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  516. rt2500usb_bbp_write(rt2x00dev, 61, value);
  517. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  518. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  519. rt2500usb_bbp_write(rt2x00dev, 17, value);
  520. rt2x00dev->link.vgc_level = value;
  521. }
  522. static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
  523. {
  524. int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
  525. u16 bbp_thresh;
  526. u16 vgc_bound;
  527. u16 sens;
  528. u16 r24;
  529. u16 r25;
  530. u16 r61;
  531. u16 r17_sens;
  532. u8 r17;
  533. u8 up_bound;
  534. u8 low_bound;
  535. /*
  536. * Determine the BBP tuning threshold and correctly
  537. * set BBP 24, 25 and 61.
  538. */
  539. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
  540. bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
  541. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
  542. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
  543. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
  544. if ((rssi + bbp_thresh) > 0) {
  545. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
  546. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
  547. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
  548. } else {
  549. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
  550. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
  551. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
  552. }
  553. rt2500usb_bbp_write(rt2x00dev, 24, r24);
  554. rt2500usb_bbp_write(rt2x00dev, 25, r25);
  555. rt2500usb_bbp_write(rt2x00dev, 61, r61);
  556. /*
  557. * Read current r17 value, as well as the sensitivity values
  558. * for the r17 register.
  559. */
  560. rt2500usb_bbp_read(rt2x00dev, 17, &r17);
  561. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
  562. /*
  563. * A too low RSSI will cause too much false CCA which will
  564. * then corrupt the R17 tuning. To remidy this the tuning should
  565. * be stopped (While making sure the R17 value will not exceed limits)
  566. */
  567. if (rssi >= -40) {
  568. if (r17 != 0x60)
  569. rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
  570. return;
  571. }
  572. /*
  573. * Special big-R17 for short distance
  574. */
  575. if (rssi >= -58) {
  576. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
  577. if (r17 != sens)
  578. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  579. return;
  580. }
  581. /*
  582. * Special mid-R17 for middle distance
  583. */
  584. if (rssi >= -74) {
  585. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
  586. if (r17 != sens)
  587. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  588. return;
  589. }
  590. /*
  591. * Leave short or middle distance condition, restore r17
  592. * to the dynamic tuning range.
  593. */
  594. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
  595. vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
  596. low_bound = 0x32;
  597. if (rssi >= -77)
  598. up_bound = vgc_bound;
  599. else
  600. up_bound = vgc_bound - (-77 - rssi);
  601. if (up_bound < low_bound)
  602. up_bound = low_bound;
  603. if (r17 > up_bound) {
  604. rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
  605. rt2x00dev->link.vgc_level = up_bound;
  606. } else if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) {
  607. rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
  608. rt2x00dev->link.vgc_level = r17;
  609. } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) {
  610. rt2500usb_bbp_write(rt2x00dev, 17, --r17);
  611. rt2x00dev->link.vgc_level = r17;
  612. }
  613. }
  614. /*
  615. * Initialization functions.
  616. */
  617. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  618. {
  619. u16 reg;
  620. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  621. USB_MODE_TEST, REGISTER_TIMEOUT);
  622. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  623. 0x00f0, REGISTER_TIMEOUT);
  624. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  625. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  626. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  627. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  628. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  629. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  630. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  631. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  632. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  633. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  634. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  635. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  636. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  637. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  638. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  639. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  640. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  641. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  642. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  643. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  644. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  645. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  646. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  647. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  648. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  649. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  650. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  651. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  652. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  653. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  654. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  655. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  656. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  657. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  658. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  659. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  660. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  661. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  662. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  663. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  664. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  665. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  666. return -EBUSY;
  667. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  668. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  669. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  670. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  671. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  672. if (rt2x00_get_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
  673. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  674. reg &= ~0x0002;
  675. } else {
  676. reg = 0x3002;
  677. }
  678. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  679. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  680. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  681. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  682. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  683. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  684. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  685. rt2x00dev->rx->data_size);
  686. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  687. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  688. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  689. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
  690. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  691. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  692. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  693. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  694. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  695. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  696. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  697. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  698. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  699. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  700. return 0;
  701. }
  702. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  703. {
  704. unsigned int i;
  705. u16 eeprom;
  706. u8 value;
  707. u8 reg_id;
  708. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  709. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  710. if ((value != 0xff) && (value != 0x00))
  711. goto continue_csr_init;
  712. NOTICE(rt2x00dev, "Waiting for BBP register.\n");
  713. udelay(REGISTER_BUSY_DELAY);
  714. }
  715. ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
  716. return -EACCES;
  717. continue_csr_init:
  718. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  719. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  720. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  721. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  722. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  723. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  724. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  725. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  726. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  727. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  728. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  729. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  730. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  731. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  732. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  733. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  734. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  735. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  736. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  737. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  738. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  739. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  740. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  741. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  742. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  743. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  744. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  745. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  746. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  747. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  748. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  749. DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
  750. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  751. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  752. if (eeprom != 0xffff && eeprom != 0x0000) {
  753. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  754. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  755. DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
  756. reg_id, value);
  757. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  758. }
  759. }
  760. DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
  761. return 0;
  762. }
  763. /*
  764. * Device state switch handlers.
  765. */
  766. static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
  767. enum dev_state state)
  768. {
  769. u16 reg;
  770. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  771. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
  772. state == STATE_RADIO_RX_OFF);
  773. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  774. }
  775. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  776. {
  777. /*
  778. * Initialize all registers.
  779. */
  780. if (rt2500usb_init_registers(rt2x00dev) ||
  781. rt2500usb_init_bbp(rt2x00dev)) {
  782. ERROR(rt2x00dev, "Register initialization failed.\n");
  783. return -EIO;
  784. }
  785. rt2x00usb_enable_radio(rt2x00dev);
  786. /*
  787. * Enable LED
  788. */
  789. rt2500usb_enable_led(rt2x00dev);
  790. return 0;
  791. }
  792. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  793. {
  794. /*
  795. * Disable LED
  796. */
  797. rt2500usb_disable_led(rt2x00dev);
  798. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  799. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  800. /*
  801. * Disable synchronisation.
  802. */
  803. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  804. rt2x00usb_disable_radio(rt2x00dev);
  805. }
  806. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  807. enum dev_state state)
  808. {
  809. u16 reg;
  810. u16 reg2;
  811. unsigned int i;
  812. char put_to_sleep;
  813. char bbp_state;
  814. char rf_state;
  815. put_to_sleep = (state != STATE_AWAKE);
  816. reg = 0;
  817. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  818. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  819. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  820. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  821. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  822. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  823. /*
  824. * Device is not guaranteed to be in the requested state yet.
  825. * We must wait until the register indicates that the
  826. * device has entered the correct state.
  827. */
  828. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  829. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  830. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  831. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  832. if (bbp_state == state && rf_state == state)
  833. return 0;
  834. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  835. msleep(30);
  836. }
  837. NOTICE(rt2x00dev, "Device failed to enter state %d, "
  838. "current device state: bbp %d and rf %d.\n",
  839. state, bbp_state, rf_state);
  840. return -EBUSY;
  841. }
  842. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  843. enum dev_state state)
  844. {
  845. int retval = 0;
  846. switch (state) {
  847. case STATE_RADIO_ON:
  848. retval = rt2500usb_enable_radio(rt2x00dev);
  849. break;
  850. case STATE_RADIO_OFF:
  851. rt2500usb_disable_radio(rt2x00dev);
  852. break;
  853. case STATE_RADIO_RX_ON:
  854. case STATE_RADIO_RX_OFF:
  855. rt2500usb_toggle_rx(rt2x00dev, state);
  856. break;
  857. case STATE_DEEP_SLEEP:
  858. case STATE_SLEEP:
  859. case STATE_STANDBY:
  860. case STATE_AWAKE:
  861. retval = rt2500usb_set_state(rt2x00dev, state);
  862. break;
  863. default:
  864. retval = -ENOTSUPP;
  865. break;
  866. }
  867. return retval;
  868. }
  869. /*
  870. * TX descriptor initialization
  871. */
  872. static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
  873. struct data_desc *txd,
  874. struct txdata_entry_desc *desc,
  875. struct ieee80211_hdr *ieee80211hdr,
  876. unsigned int length,
  877. struct ieee80211_tx_control *control)
  878. {
  879. u32 word;
  880. /*
  881. * Start writing the descriptor words.
  882. */
  883. rt2x00_desc_read(txd, 1, &word);
  884. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
  885. rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
  886. rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
  887. rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
  888. rt2x00_desc_write(txd, 1, word);
  889. rt2x00_desc_read(txd, 2, &word);
  890. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
  891. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
  892. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
  893. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
  894. rt2x00_desc_write(txd, 2, word);
  895. rt2x00_desc_read(txd, 0, &word);
  896. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
  897. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  898. test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
  899. rt2x00_set_field32(&word, TXD_W0_ACK,
  900. !(control->flags & IEEE80211_TXCTL_NO_ACK));
  901. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  902. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
  903. rt2x00_set_field32(&word, TXD_W0_OFDM,
  904. test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
  905. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  906. !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
  907. rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
  908. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
  909. rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
  910. rt2x00_desc_write(txd, 0, word);
  911. }
  912. /*
  913. * TX data initialization
  914. */
  915. static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
  916. unsigned int queue)
  917. {
  918. u16 reg;
  919. if (queue != IEEE80211_TX_QUEUE_BEACON)
  920. return;
  921. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  922. if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
  923. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  924. /*
  925. * Beacon generation will fail initially.
  926. * To prevent this we need to register the TXRX_CSR19
  927. * register several times.
  928. */
  929. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  930. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  931. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  932. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  933. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  934. }
  935. }
  936. /*
  937. * RX control handlers
  938. */
  939. static void rt2500usb_fill_rxdone(struct data_entry *entry,
  940. struct rxdata_entry_desc *desc)
  941. {
  942. struct urb *urb = entry->priv;
  943. struct data_desc *rxd = (struct data_desc *)(entry->skb->data +
  944. (urb->actual_length -
  945. entry->ring->desc_size));
  946. u32 word0;
  947. u32 word1;
  948. rt2x00_desc_read(rxd, 0, &word0);
  949. rt2x00_desc_read(rxd, 1, &word1);
  950. desc->flags = 0;
  951. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  952. desc->flags |= RX_FLAG_FAILED_FCS_CRC;
  953. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  954. desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  955. /*
  956. * Obtain the status about this packet.
  957. */
  958. desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  959. desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
  960. entry->ring->rt2x00dev->rssi_offset;
  961. desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
  962. desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  963. return;
  964. }
  965. /*
  966. * Interrupt functions.
  967. */
  968. static void rt2500usb_beacondone(struct urb *urb)
  969. {
  970. struct data_entry *entry = (struct data_entry *)urb->context;
  971. struct data_ring *ring = entry->ring;
  972. if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
  973. return;
  974. /*
  975. * Check if this was the guardian beacon,
  976. * if that was the case we need to send the real beacon now.
  977. * Otherwise we should free the sk_buffer, the device
  978. * should be doing the rest of the work now.
  979. */
  980. if (ring->index == 1) {
  981. rt2x00_ring_index_done_inc(ring);
  982. entry = rt2x00_get_data_entry(ring);
  983. usb_submit_urb(entry->priv, GFP_ATOMIC);
  984. rt2x00_ring_index_inc(ring);
  985. } else if (ring->index_done == 1) {
  986. entry = rt2x00_get_data_entry_done(ring);
  987. if (entry->skb) {
  988. dev_kfree_skb(entry->skb);
  989. entry->skb = NULL;
  990. }
  991. rt2x00_ring_index_done_inc(ring);
  992. }
  993. }
  994. /*
  995. * Device probe functions.
  996. */
  997. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  998. {
  999. u16 word;
  1000. u8 *mac;
  1001. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1002. /*
  1003. * Start validation of the data that has been read.
  1004. */
  1005. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1006. if (!is_valid_ether_addr(mac)) {
  1007. DECLARE_MAC_BUF(macbuf);
  1008. random_ether_addr(mac);
  1009. EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
  1010. }
  1011. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1012. if (word == 0xffff) {
  1013. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1014. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0);
  1015. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0);
  1016. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0);
  1017. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1018. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1019. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1020. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1021. EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
  1022. }
  1023. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1024. if (word == 0xffff) {
  1025. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1026. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1027. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1028. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1029. EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
  1030. }
  1031. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1032. if (word == 0xffff) {
  1033. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1034. DEFAULT_RSSI_OFFSET);
  1035. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1036. EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
  1037. }
  1038. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1039. if (word == 0xffff) {
  1040. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1041. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1042. EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1043. }
  1044. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1045. if (word == 0xffff) {
  1046. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1047. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1048. EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1049. }
  1050. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1051. if (word == 0xffff) {
  1052. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1053. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1054. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1055. EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1056. }
  1057. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1058. if (word == 0xffff) {
  1059. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1060. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1061. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1062. EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1063. }
  1064. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1065. if (word == 0xffff) {
  1066. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1067. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1068. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1069. EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1070. }
  1071. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1072. if (word == 0xffff) {
  1073. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1074. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1075. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1076. EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1077. }
  1078. return 0;
  1079. }
  1080. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1081. {
  1082. u16 reg;
  1083. u16 value;
  1084. u16 eeprom;
  1085. /*
  1086. * Read EEPROM word for configuration.
  1087. */
  1088. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1089. /*
  1090. * Identify RF chipset.
  1091. */
  1092. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1093. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1094. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1095. if (rt2x00_rev(&rt2x00dev->chip, 0xffff0)) {
  1096. ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
  1097. return -ENODEV;
  1098. }
  1099. if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
  1100. !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
  1101. !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
  1102. !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
  1103. !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
  1104. !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1105. ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
  1106. return -ENODEV;
  1107. }
  1108. /*
  1109. * Identify default antenna configuration.
  1110. */
  1111. rt2x00dev->hw->conf.antenna_sel_tx =
  1112. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1113. rt2x00dev->hw->conf.antenna_sel_rx =
  1114. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1115. /*
  1116. * Store led mode, for correct led behaviour.
  1117. */
  1118. rt2x00dev->led_mode =
  1119. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1120. /*
  1121. * Check if the BBP tuning should be disabled.
  1122. */
  1123. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
  1124. if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
  1125. __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
  1126. /*
  1127. * Read the RSSI <-> dBm offset information.
  1128. */
  1129. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1130. rt2x00dev->rssi_offset =
  1131. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1132. return 0;
  1133. }
  1134. /*
  1135. * RF value list for RF2522
  1136. * Supports: 2.4 GHz
  1137. */
  1138. static const struct rf_channel rf_vals_bg_2522[] = {
  1139. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1140. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1141. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1142. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1143. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1144. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1145. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1146. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1147. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1148. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1149. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1150. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1151. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1152. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1153. };
  1154. /*
  1155. * RF value list for RF2523
  1156. * Supports: 2.4 GHz
  1157. */
  1158. static const struct rf_channel rf_vals_bg_2523[] = {
  1159. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1160. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1161. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1162. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1163. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1164. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1165. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1166. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1167. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1168. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1169. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1170. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1171. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1172. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1173. };
  1174. /*
  1175. * RF value list for RF2524
  1176. * Supports: 2.4 GHz
  1177. */
  1178. static const struct rf_channel rf_vals_bg_2524[] = {
  1179. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1180. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1181. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1182. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1183. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1184. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1185. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1186. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1187. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1188. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1189. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1190. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1191. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1192. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1193. };
  1194. /*
  1195. * RF value list for RF2525
  1196. * Supports: 2.4 GHz
  1197. */
  1198. static const struct rf_channel rf_vals_bg_2525[] = {
  1199. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1200. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1201. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1202. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1203. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1204. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1205. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1206. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1207. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1208. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1209. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1210. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1211. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1212. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1213. };
  1214. /*
  1215. * RF value list for RF2525e
  1216. * Supports: 2.4 GHz
  1217. */
  1218. static const struct rf_channel rf_vals_bg_2525e[] = {
  1219. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1220. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1221. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1222. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1223. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1224. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1225. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1226. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1227. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1228. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1229. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1230. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1231. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1232. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1233. };
  1234. /*
  1235. * RF value list for RF5222
  1236. * Supports: 2.4 GHz & 5.2 GHz
  1237. */
  1238. static const struct rf_channel rf_vals_5222[] = {
  1239. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1240. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1241. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1242. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1243. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1244. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1245. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1246. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1247. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1248. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1249. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1250. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1251. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1252. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1253. /* 802.11 UNI / HyperLan 2 */
  1254. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1255. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1256. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1257. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1258. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1259. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1260. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1261. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1262. /* 802.11 HyperLan 2 */
  1263. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1264. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1265. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1266. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1267. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1268. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1269. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1270. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1271. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1272. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1273. /* 802.11 UNII */
  1274. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1275. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1276. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1277. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1278. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1279. };
  1280. static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1281. {
  1282. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1283. u8 *txpower;
  1284. unsigned int i;
  1285. /*
  1286. * Initialize all hw fields.
  1287. */
  1288. rt2x00dev->hw->flags =
  1289. IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
  1290. IEEE80211_HW_RX_INCLUDES_FCS |
  1291. IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
  1292. rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
  1293. rt2x00dev->hw->max_signal = MAX_SIGNAL;
  1294. rt2x00dev->hw->max_rssi = MAX_RX_SSI;
  1295. rt2x00dev->hw->queues = 2;
  1296. SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
  1297. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1298. rt2x00_eeprom_addr(rt2x00dev,
  1299. EEPROM_MAC_ADDR_0));
  1300. /*
  1301. * Convert tx_power array in eeprom.
  1302. */
  1303. txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1304. for (i = 0; i < 14; i++)
  1305. txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
  1306. /*
  1307. * Initialize hw_mode information.
  1308. */
  1309. spec->num_modes = 2;
  1310. spec->num_rates = 12;
  1311. spec->tx_power_a = NULL;
  1312. spec->tx_power_bg = txpower;
  1313. spec->tx_power_default = DEFAULT_TXPOWER;
  1314. if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
  1315. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1316. spec->channels = rf_vals_bg_2522;
  1317. } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
  1318. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1319. spec->channels = rf_vals_bg_2523;
  1320. } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
  1321. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1322. spec->channels = rf_vals_bg_2524;
  1323. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
  1324. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1325. spec->channels = rf_vals_bg_2525;
  1326. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  1327. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1328. spec->channels = rf_vals_bg_2525e;
  1329. } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1330. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1331. spec->channels = rf_vals_5222;
  1332. spec->num_modes = 3;
  1333. }
  1334. }
  1335. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1336. {
  1337. int retval;
  1338. /*
  1339. * Allocate eeprom data.
  1340. */
  1341. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1342. if (retval)
  1343. return retval;
  1344. retval = rt2500usb_init_eeprom(rt2x00dev);
  1345. if (retval)
  1346. return retval;
  1347. /*
  1348. * Initialize hw specifications.
  1349. */
  1350. rt2500usb_probe_hw_mode(rt2x00dev);
  1351. /*
  1352. * This device requires the beacon ring
  1353. */
  1354. __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
  1355. /*
  1356. * Set the rssi offset.
  1357. */
  1358. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1359. return 0;
  1360. }
  1361. /*
  1362. * IEEE80211 stack callback functions.
  1363. */
  1364. static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
  1365. unsigned int changed_flags,
  1366. unsigned int *total_flags,
  1367. int mc_count,
  1368. struct dev_addr_list *mc_list)
  1369. {
  1370. struct rt2x00_dev *rt2x00dev = hw->priv;
  1371. struct interface *intf = &rt2x00dev->interface;
  1372. u16 reg;
  1373. /*
  1374. * Mask off any flags we are going to ignore from
  1375. * the total_flags field.
  1376. */
  1377. *total_flags &=
  1378. FIF_ALLMULTI |
  1379. FIF_FCSFAIL |
  1380. FIF_PLCPFAIL |
  1381. FIF_CONTROL |
  1382. FIF_OTHER_BSS |
  1383. FIF_PROMISC_IN_BSS;
  1384. /*
  1385. * Apply some rules to the filters:
  1386. * - Some filters imply different filters to be set.
  1387. * - Some things we can't filter out at all.
  1388. * - Some filters are set based on interface type.
  1389. */
  1390. if (mc_count)
  1391. *total_flags |= FIF_ALLMULTI;
  1392. if (*total_flags & FIF_OTHER_BSS ||
  1393. *total_flags & FIF_PROMISC_IN_BSS)
  1394. *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
  1395. if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
  1396. *total_flags |= FIF_PROMISC_IN_BSS;
  1397. /*
  1398. * Check if there is any work left for us.
  1399. */
  1400. if (intf->filter == *total_flags)
  1401. return;
  1402. intf->filter = *total_flags;
  1403. /*
  1404. * When in atomic context, reschedule and let rt2x00lib
  1405. * call this function again.
  1406. */
  1407. if (in_atomic()) {
  1408. queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
  1409. return;
  1410. }
  1411. /*
  1412. * Start configuration steps.
  1413. * Note that the version error will always be dropped
  1414. * and broadcast frames will always be accepted since
  1415. * there is no filter for it at this time.
  1416. */
  1417. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  1418. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  1419. !(*total_flags & FIF_FCSFAIL));
  1420. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  1421. !(*total_flags & FIF_PLCPFAIL));
  1422. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  1423. !(*total_flags & FIF_CONTROL));
  1424. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  1425. !(*total_flags & FIF_PROMISC_IN_BSS));
  1426. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  1427. !(*total_flags & FIF_PROMISC_IN_BSS));
  1428. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  1429. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  1430. !(*total_flags & FIF_ALLMULTI));
  1431. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  1432. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  1433. }
  1434. static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
  1435. struct sk_buff *skb,
  1436. struct ieee80211_tx_control *control)
  1437. {
  1438. struct rt2x00_dev *rt2x00dev = hw->priv;
  1439. struct usb_device *usb_dev =
  1440. interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
  1441. struct data_ring *ring =
  1442. rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
  1443. struct data_entry *beacon;
  1444. struct data_entry *guardian;
  1445. int length;
  1446. /*
  1447. * Just in case the ieee80211 doesn't set this,
  1448. * but we need this queue set for the descriptor
  1449. * initialization.
  1450. */
  1451. control->queue = IEEE80211_TX_QUEUE_BEACON;
  1452. /*
  1453. * Obtain 2 entries, one for the guardian byte,
  1454. * the second for the actual beacon.
  1455. */
  1456. guardian = rt2x00_get_data_entry(ring);
  1457. rt2x00_ring_index_inc(ring);
  1458. beacon = rt2x00_get_data_entry(ring);
  1459. /*
  1460. * First we create the beacon.
  1461. */
  1462. skb_push(skb, ring->desc_size);
  1463. rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
  1464. (struct ieee80211_hdr *)(skb->data +
  1465. ring->desc_size),
  1466. skb->len - ring->desc_size, control);
  1467. /*
  1468. * Length passed to usb_fill_urb cannot be an odd number,
  1469. * so add 1 byte to make it even.
  1470. */
  1471. length = skb->len;
  1472. if (length % 2)
  1473. length++;
  1474. usb_fill_bulk_urb(beacon->priv, usb_dev,
  1475. usb_sndbulkpipe(usb_dev, 1),
  1476. skb->data, length, rt2500usb_beacondone, beacon);
  1477. beacon->skb = skb;
  1478. /*
  1479. * Second we need to create the guardian byte.
  1480. * We only need a single byte, so lets recycle
  1481. * the 'flags' field we are not using for beacons.
  1482. */
  1483. guardian->flags = 0;
  1484. usb_fill_bulk_urb(guardian->priv, usb_dev,
  1485. usb_sndbulkpipe(usb_dev, 1),
  1486. &guardian->flags, 1, rt2500usb_beacondone, guardian);
  1487. /*
  1488. * Send out the guardian byte.
  1489. */
  1490. usb_submit_urb(guardian->priv, GFP_ATOMIC);
  1491. /*
  1492. * Enable beacon generation.
  1493. */
  1494. rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
  1495. return 0;
  1496. }
  1497. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1498. .tx = rt2x00mac_tx,
  1499. .start = rt2x00mac_start,
  1500. .stop = rt2x00mac_stop,
  1501. .add_interface = rt2x00mac_add_interface,
  1502. .remove_interface = rt2x00mac_remove_interface,
  1503. .config = rt2x00mac_config,
  1504. .config_interface = rt2x00mac_config_interface,
  1505. .configure_filter = rt2500usb_configure_filter,
  1506. .get_stats = rt2x00mac_get_stats,
  1507. .conf_tx = rt2x00mac_conf_tx,
  1508. .get_tx_stats = rt2x00mac_get_tx_stats,
  1509. .beacon_update = rt2500usb_beacon_update,
  1510. };
  1511. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1512. .probe_hw = rt2500usb_probe_hw,
  1513. .initialize = rt2x00usb_initialize,
  1514. .uninitialize = rt2x00usb_uninitialize,
  1515. .set_device_state = rt2500usb_set_device_state,
  1516. .link_stats = rt2500usb_link_stats,
  1517. .reset_tuner = rt2500usb_reset_tuner,
  1518. .link_tuner = rt2500usb_link_tuner,
  1519. .write_tx_desc = rt2500usb_write_tx_desc,
  1520. .write_tx_data = rt2x00usb_write_tx_data,
  1521. .kick_tx_queue = rt2500usb_kick_tx_queue,
  1522. .fill_rxdone = rt2500usb_fill_rxdone,
  1523. .config_mac_addr = rt2500usb_config_mac_addr,
  1524. .config_bssid = rt2500usb_config_bssid,
  1525. .config_type = rt2500usb_config_type,
  1526. .config = rt2500usb_config,
  1527. };
  1528. static const struct rt2x00_ops rt2500usb_ops = {
  1529. .name = DRV_NAME,
  1530. .rxd_size = RXD_DESC_SIZE,
  1531. .txd_size = TXD_DESC_SIZE,
  1532. .eeprom_size = EEPROM_SIZE,
  1533. .rf_size = RF_SIZE,
  1534. .lib = &rt2500usb_rt2x00_ops,
  1535. .hw = &rt2500usb_mac80211_ops,
  1536. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1537. .debugfs = &rt2500usb_rt2x00debug,
  1538. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1539. };
  1540. /*
  1541. * rt2500usb module information.
  1542. */
  1543. static struct usb_device_id rt2500usb_device_table[] = {
  1544. /* ASUS */
  1545. { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1546. { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
  1547. /* Belkin */
  1548. { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
  1549. { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
  1550. { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1551. /* Cisco Systems */
  1552. { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
  1553. { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
  1554. { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1555. /* Conceptronic */
  1556. { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
  1557. /* D-LINK */
  1558. { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
  1559. /* Gigabyte */
  1560. { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
  1561. { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
  1562. /* Hercules */
  1563. { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
  1564. /* Melco */
  1565. { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
  1566. { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
  1567. { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1568. { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
  1569. /* MSI */
  1570. { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
  1571. { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
  1572. { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
  1573. /* Ralink */
  1574. { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1575. { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
  1576. { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
  1577. { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1578. /* Siemens */
  1579. { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
  1580. /* SMC */
  1581. { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
  1582. /* Spairon */
  1583. { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
  1584. /* Trust */
  1585. { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1586. /* Zinwell */
  1587. { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
  1588. { 0, }
  1589. };
  1590. MODULE_AUTHOR(DRV_PROJECT);
  1591. MODULE_VERSION(DRV_VERSION);
  1592. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1593. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1594. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1595. MODULE_LICENSE("GPL");
  1596. static struct usb_driver rt2500usb_driver = {
  1597. .name = DRV_NAME,
  1598. .id_table = rt2500usb_device_table,
  1599. .probe = rt2x00usb_probe,
  1600. .disconnect = rt2x00usb_disconnect,
  1601. .suspend = rt2x00usb_suspend,
  1602. .resume = rt2x00usb_resume,
  1603. };
  1604. static int __init rt2500usb_init(void)
  1605. {
  1606. return usb_register(&rt2500usb_driver);
  1607. }
  1608. static void __exit rt2500usb_exit(void)
  1609. {
  1610. usb_deregister(&rt2500usb_driver);
  1611. }
  1612. module_init(rt2500usb_init);
  1613. module_exit(rt2500usb_exit);