e1000_main.c 137 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.1.9-k6"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  44. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  58. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  65. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  69. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  70. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  83. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  84. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  86. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  89. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  90. INTEL_E1000_ETHERNET_DEVICE(0x10A4),
  91. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  94. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  95. /* required last entry */
  96. {0,}
  97. };
  98. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  99. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  100. struct e1000_tx_ring *txdr);
  101. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  102. struct e1000_rx_ring *rxdr);
  103. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  104. struct e1000_tx_ring *tx_ring);
  105. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  106. struct e1000_rx_ring *rx_ring);
  107. /* Local Function Prototypes */
  108. static int e1000_init_module(void);
  109. static void e1000_exit_module(void);
  110. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  111. static void __devexit e1000_remove(struct pci_dev *pdev);
  112. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  113. static int e1000_sw_init(struct e1000_adapter *adapter);
  114. static int e1000_open(struct net_device *netdev);
  115. static int e1000_close(struct net_device *netdev);
  116. static void e1000_configure_tx(struct e1000_adapter *adapter);
  117. static void e1000_configure_rx(struct e1000_adapter *adapter);
  118. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  119. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  120. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  121. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  122. struct e1000_tx_ring *tx_ring);
  123. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  124. struct e1000_rx_ring *rx_ring);
  125. static void e1000_set_multi(struct net_device *netdev);
  126. static void e1000_update_phy_info(unsigned long data);
  127. static void e1000_watchdog(unsigned long data);
  128. static void e1000_82547_tx_fifo_stall(unsigned long data);
  129. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  130. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  131. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  132. static int e1000_set_mac(struct net_device *netdev, void *p);
  133. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  134. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  135. struct e1000_tx_ring *tx_ring);
  136. #ifdef CONFIG_E1000_NAPI
  137. static int e1000_clean(struct net_device *poll_dev, int *budget);
  138. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  139. struct e1000_rx_ring *rx_ring,
  140. int *work_done, int work_to_do);
  141. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  142. struct e1000_rx_ring *rx_ring,
  143. int *work_done, int work_to_do);
  144. #else
  145. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  146. struct e1000_rx_ring *rx_ring);
  147. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  148. struct e1000_rx_ring *rx_ring);
  149. #endif
  150. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  151. struct e1000_rx_ring *rx_ring,
  152. int cleaned_count);
  153. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  154. struct e1000_rx_ring *rx_ring,
  155. int cleaned_count);
  156. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  157. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  158. int cmd);
  159. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  160. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  161. static void e1000_tx_timeout(struct net_device *dev);
  162. static void e1000_reset_task(struct net_device *dev);
  163. static void e1000_smartspeed(struct e1000_adapter *adapter);
  164. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  165. struct sk_buff *skb);
  166. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  167. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  168. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  169. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  170. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  171. #ifdef CONFIG_PM
  172. static int e1000_resume(struct pci_dev *pdev);
  173. #endif
  174. static void e1000_shutdown(struct pci_dev *pdev);
  175. #ifdef CONFIG_NET_POLL_CONTROLLER
  176. /* for netdump / net console */
  177. static void e1000_netpoll (struct net_device *netdev);
  178. #endif
  179. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  180. pci_channel_state_t state);
  181. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  182. static void e1000_io_resume(struct pci_dev *pdev);
  183. static struct pci_error_handlers e1000_err_handler = {
  184. .error_detected = e1000_io_error_detected,
  185. .slot_reset = e1000_io_slot_reset,
  186. .resume = e1000_io_resume,
  187. };
  188. static struct pci_driver e1000_driver = {
  189. .name = e1000_driver_name,
  190. .id_table = e1000_pci_tbl,
  191. .probe = e1000_probe,
  192. .remove = __devexit_p(e1000_remove),
  193. /* Power Managment Hooks */
  194. .suspend = e1000_suspend,
  195. #ifdef CONFIG_PM
  196. .resume = e1000_resume,
  197. #endif
  198. .shutdown = e1000_shutdown,
  199. .err_handler = &e1000_err_handler
  200. };
  201. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  202. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  203. MODULE_LICENSE("GPL");
  204. MODULE_VERSION(DRV_VERSION);
  205. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  206. module_param(debug, int, 0);
  207. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  208. /**
  209. * e1000_init_module - Driver Registration Routine
  210. *
  211. * e1000_init_module is the first routine called when the driver is
  212. * loaded. All it does is register with the PCI subsystem.
  213. **/
  214. static int __init
  215. e1000_init_module(void)
  216. {
  217. int ret;
  218. printk(KERN_INFO "%s - version %s\n",
  219. e1000_driver_string, e1000_driver_version);
  220. printk(KERN_INFO "%s\n", e1000_copyright);
  221. ret = pci_register_driver(&e1000_driver);
  222. return ret;
  223. }
  224. module_init(e1000_init_module);
  225. /**
  226. * e1000_exit_module - Driver Exit Cleanup Routine
  227. *
  228. * e1000_exit_module is called just before the driver is removed
  229. * from memory.
  230. **/
  231. static void __exit
  232. e1000_exit_module(void)
  233. {
  234. pci_unregister_driver(&e1000_driver);
  235. }
  236. module_exit(e1000_exit_module);
  237. static int e1000_request_irq(struct e1000_adapter *adapter)
  238. {
  239. struct net_device *netdev = adapter->netdev;
  240. int flags, err = 0;
  241. flags = IRQF_SHARED;
  242. #ifdef CONFIG_PCI_MSI
  243. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  244. adapter->have_msi = TRUE;
  245. if ((err = pci_enable_msi(adapter->pdev))) {
  246. DPRINTK(PROBE, ERR,
  247. "Unable to allocate MSI interrupt Error: %d\n", err);
  248. adapter->have_msi = FALSE;
  249. }
  250. }
  251. if (adapter->have_msi)
  252. flags &= ~IRQF_SHARED;
  253. #endif
  254. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  255. netdev->name, netdev)))
  256. DPRINTK(PROBE, ERR,
  257. "Unable to allocate interrupt Error: %d\n", err);
  258. return err;
  259. }
  260. static void e1000_free_irq(struct e1000_adapter *adapter)
  261. {
  262. struct net_device *netdev = adapter->netdev;
  263. free_irq(adapter->pdev->irq, netdev);
  264. #ifdef CONFIG_PCI_MSI
  265. if (adapter->have_msi)
  266. pci_disable_msi(adapter->pdev);
  267. #endif
  268. }
  269. /**
  270. * e1000_irq_disable - Mask off interrupt generation on the NIC
  271. * @adapter: board private structure
  272. **/
  273. static void
  274. e1000_irq_disable(struct e1000_adapter *adapter)
  275. {
  276. atomic_inc(&adapter->irq_sem);
  277. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  278. E1000_WRITE_FLUSH(&adapter->hw);
  279. synchronize_irq(adapter->pdev->irq);
  280. }
  281. /**
  282. * e1000_irq_enable - Enable default interrupt generation settings
  283. * @adapter: board private structure
  284. **/
  285. static void
  286. e1000_irq_enable(struct e1000_adapter *adapter)
  287. {
  288. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  289. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  290. E1000_WRITE_FLUSH(&adapter->hw);
  291. }
  292. }
  293. static void
  294. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  295. {
  296. struct net_device *netdev = adapter->netdev;
  297. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  298. uint16_t old_vid = adapter->mng_vlan_id;
  299. if (adapter->vlgrp) {
  300. if (!adapter->vlgrp->vlan_devices[vid]) {
  301. if (adapter->hw.mng_cookie.status &
  302. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  303. e1000_vlan_rx_add_vid(netdev, vid);
  304. adapter->mng_vlan_id = vid;
  305. } else
  306. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  307. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  308. (vid != old_vid) &&
  309. !adapter->vlgrp->vlan_devices[old_vid])
  310. e1000_vlan_rx_kill_vid(netdev, old_vid);
  311. } else
  312. adapter->mng_vlan_id = vid;
  313. }
  314. }
  315. /**
  316. * e1000_release_hw_control - release control of the h/w to f/w
  317. * @adapter: address of board private structure
  318. *
  319. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  320. * For ASF and Pass Through versions of f/w this means that the
  321. * driver is no longer loaded. For AMT version (only with 82573) i
  322. * of the f/w this means that the netowrk i/f is closed.
  323. *
  324. **/
  325. static void
  326. e1000_release_hw_control(struct e1000_adapter *adapter)
  327. {
  328. uint32_t ctrl_ext;
  329. uint32_t swsm;
  330. uint32_t extcnf;
  331. /* Let firmware taken over control of h/w */
  332. switch (adapter->hw.mac_type) {
  333. case e1000_82571:
  334. case e1000_82572:
  335. case e1000_80003es2lan:
  336. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  337. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  338. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  339. break;
  340. case e1000_82573:
  341. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  342. E1000_WRITE_REG(&adapter->hw, SWSM,
  343. swsm & ~E1000_SWSM_DRV_LOAD);
  344. case e1000_ich8lan:
  345. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  346. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  347. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  348. break;
  349. default:
  350. break;
  351. }
  352. }
  353. /**
  354. * e1000_get_hw_control - get control of the h/w from f/w
  355. * @adapter: address of board private structure
  356. *
  357. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  358. * For ASF and Pass Through versions of f/w this means that
  359. * the driver is loaded. For AMT version (only with 82573)
  360. * of the f/w this means that the netowrk i/f is open.
  361. *
  362. **/
  363. static void
  364. e1000_get_hw_control(struct e1000_adapter *adapter)
  365. {
  366. uint32_t ctrl_ext;
  367. uint32_t swsm;
  368. uint32_t extcnf;
  369. /* Let firmware know the driver has taken over */
  370. switch (adapter->hw.mac_type) {
  371. case e1000_82571:
  372. case e1000_82572:
  373. case e1000_80003es2lan:
  374. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  375. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  376. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  377. break;
  378. case e1000_82573:
  379. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  380. E1000_WRITE_REG(&adapter->hw, SWSM,
  381. swsm | E1000_SWSM_DRV_LOAD);
  382. break;
  383. case e1000_ich8lan:
  384. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  385. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  386. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  387. break;
  388. default:
  389. break;
  390. }
  391. }
  392. int
  393. e1000_up(struct e1000_adapter *adapter)
  394. {
  395. struct net_device *netdev = adapter->netdev;
  396. int i;
  397. /* hardware has been reset, we need to reload some things */
  398. e1000_set_multi(netdev);
  399. e1000_restore_vlan(adapter);
  400. e1000_configure_tx(adapter);
  401. e1000_setup_rctl(adapter);
  402. e1000_configure_rx(adapter);
  403. /* call E1000_DESC_UNUSED which always leaves
  404. * at least 1 descriptor unused to make sure
  405. * next_to_use != next_to_clean */
  406. for (i = 0; i < adapter->num_rx_queues; i++) {
  407. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  408. adapter->alloc_rx_buf(adapter, ring,
  409. E1000_DESC_UNUSED(ring));
  410. }
  411. adapter->tx_queue_len = netdev->tx_queue_len;
  412. mod_timer(&adapter->watchdog_timer, jiffies);
  413. #ifdef CONFIG_E1000_NAPI
  414. netif_poll_enable(netdev);
  415. #endif
  416. e1000_irq_enable(adapter);
  417. return 0;
  418. }
  419. /**
  420. * e1000_power_up_phy - restore link in case the phy was powered down
  421. * @adapter: address of board private structure
  422. *
  423. * The phy may be powered down to save power and turn off link when the
  424. * driver is unloaded and wake on lan is not enabled (among others)
  425. * *** this routine MUST be followed by a call to e1000_reset ***
  426. *
  427. **/
  428. void e1000_power_up_phy(struct e1000_adapter *adapter)
  429. {
  430. uint16_t mii_reg = 0;
  431. /* Just clear the power down bit to wake the phy back up */
  432. if (adapter->hw.media_type == e1000_media_type_copper) {
  433. /* according to the manual, the phy will retain its
  434. * settings across a power-down/up cycle */
  435. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  436. mii_reg &= ~MII_CR_POWER_DOWN;
  437. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  438. }
  439. }
  440. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  441. {
  442. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  443. e1000_check_mng_mode(&adapter->hw);
  444. /* Power down the PHY so no link is implied when interface is down
  445. * The PHY cannot be powered down if any of the following is TRUE
  446. * (a) WoL is enabled
  447. * (b) AMT is active
  448. * (c) SoL/IDER session is active */
  449. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  450. adapter->hw.mac_type != e1000_ich8lan &&
  451. adapter->hw.media_type == e1000_media_type_copper &&
  452. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  453. !mng_mode_enabled &&
  454. !e1000_check_phy_reset_block(&adapter->hw)) {
  455. uint16_t mii_reg = 0;
  456. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  457. mii_reg |= MII_CR_POWER_DOWN;
  458. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  459. mdelay(1);
  460. }
  461. }
  462. void
  463. e1000_down(struct e1000_adapter *adapter)
  464. {
  465. struct net_device *netdev = adapter->netdev;
  466. e1000_irq_disable(adapter);
  467. del_timer_sync(&adapter->tx_fifo_stall_timer);
  468. del_timer_sync(&adapter->watchdog_timer);
  469. del_timer_sync(&adapter->phy_info_timer);
  470. #ifdef CONFIG_E1000_NAPI
  471. netif_poll_disable(netdev);
  472. #endif
  473. netdev->tx_queue_len = adapter->tx_queue_len;
  474. adapter->link_speed = 0;
  475. adapter->link_duplex = 0;
  476. netif_carrier_off(netdev);
  477. netif_stop_queue(netdev);
  478. e1000_reset(adapter);
  479. e1000_clean_all_tx_rings(adapter);
  480. e1000_clean_all_rx_rings(adapter);
  481. }
  482. void
  483. e1000_reinit_locked(struct e1000_adapter *adapter)
  484. {
  485. WARN_ON(in_interrupt());
  486. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  487. msleep(1);
  488. e1000_down(adapter);
  489. e1000_up(adapter);
  490. clear_bit(__E1000_RESETTING, &adapter->flags);
  491. }
  492. void
  493. e1000_reset(struct e1000_adapter *adapter)
  494. {
  495. uint32_t pba, manc;
  496. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  497. /* Repartition Pba for greater than 9k mtu
  498. * To take effect CTRL.RST is required.
  499. */
  500. switch (adapter->hw.mac_type) {
  501. case e1000_82547:
  502. case e1000_82547_rev_2:
  503. pba = E1000_PBA_30K;
  504. break;
  505. case e1000_82571:
  506. case e1000_82572:
  507. case e1000_80003es2lan:
  508. pba = E1000_PBA_38K;
  509. break;
  510. case e1000_82573:
  511. pba = E1000_PBA_12K;
  512. break;
  513. case e1000_ich8lan:
  514. pba = E1000_PBA_8K;
  515. break;
  516. default:
  517. pba = E1000_PBA_48K;
  518. break;
  519. }
  520. if ((adapter->hw.mac_type != e1000_82573) &&
  521. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  522. pba -= 8; /* allocate more FIFO for Tx */
  523. if (adapter->hw.mac_type == e1000_82547) {
  524. adapter->tx_fifo_head = 0;
  525. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  526. adapter->tx_fifo_size =
  527. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  528. atomic_set(&adapter->tx_fifo_stall, 0);
  529. }
  530. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  531. /* flow control settings */
  532. /* Set the FC high water mark to 90% of the FIFO size.
  533. * Required to clear last 3 LSB */
  534. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  535. /* We can't use 90% on small FIFOs because the remainder
  536. * would be less than 1 full frame. In this case, we size
  537. * it to allow at least a full frame above the high water
  538. * mark. */
  539. if (pba < E1000_PBA_16K)
  540. fc_high_water_mark = (pba * 1024) - 1600;
  541. adapter->hw.fc_high_water = fc_high_water_mark;
  542. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  543. if (adapter->hw.mac_type == e1000_80003es2lan)
  544. adapter->hw.fc_pause_time = 0xFFFF;
  545. else
  546. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  547. adapter->hw.fc_send_xon = 1;
  548. adapter->hw.fc = adapter->hw.original_fc;
  549. /* Allow time for pending master requests to run */
  550. e1000_reset_hw(&adapter->hw);
  551. if (adapter->hw.mac_type >= e1000_82544)
  552. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  553. if (e1000_init_hw(&adapter->hw))
  554. DPRINTK(PROBE, ERR, "Hardware Error\n");
  555. e1000_update_mng_vlan(adapter);
  556. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  557. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  558. e1000_reset_adaptive(&adapter->hw);
  559. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  560. if (!adapter->smart_power_down &&
  561. (adapter->hw.mac_type == e1000_82571 ||
  562. adapter->hw.mac_type == e1000_82572)) {
  563. uint16_t phy_data = 0;
  564. /* speed up time to link by disabling smart power down, ignore
  565. * the return value of this function because there is nothing
  566. * different we would do if it failed */
  567. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  568. &phy_data);
  569. phy_data &= ~IGP02E1000_PM_SPD;
  570. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  571. phy_data);
  572. }
  573. if (adapter->hw.mac_type < e1000_ich8lan)
  574. /* FIXME: this code is duplicate and wrong for PCI Express */
  575. if (adapter->en_mng_pt) {
  576. manc = E1000_READ_REG(&adapter->hw, MANC);
  577. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  578. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  579. }
  580. }
  581. /**
  582. * e1000_probe - Device Initialization Routine
  583. * @pdev: PCI device information struct
  584. * @ent: entry in e1000_pci_tbl
  585. *
  586. * Returns 0 on success, negative on failure
  587. *
  588. * e1000_probe initializes an adapter identified by a pci_dev structure.
  589. * The OS initialization, configuring of the adapter private structure,
  590. * and a hardware reset occur.
  591. **/
  592. static int __devinit
  593. e1000_probe(struct pci_dev *pdev,
  594. const struct pci_device_id *ent)
  595. {
  596. struct net_device *netdev;
  597. struct e1000_adapter *adapter;
  598. unsigned long mmio_start, mmio_len;
  599. unsigned long flash_start, flash_len;
  600. static int cards_found = 0;
  601. static int global_quad_port_a = 0; /* global ksp3 port a indication */
  602. int i, err, pci_using_dac;
  603. uint16_t eeprom_data = 0;
  604. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  605. if ((err = pci_enable_device(pdev)))
  606. return err;
  607. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  608. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  609. pci_using_dac = 1;
  610. } else {
  611. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  612. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  613. E1000_ERR("No usable DMA configuration, aborting\n");
  614. goto err_dma;
  615. }
  616. pci_using_dac = 0;
  617. }
  618. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  619. goto err_pci_reg;
  620. pci_set_master(pdev);
  621. err = -ENOMEM;
  622. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  623. if (!netdev)
  624. goto err_alloc_etherdev;
  625. SET_MODULE_OWNER(netdev);
  626. SET_NETDEV_DEV(netdev, &pdev->dev);
  627. pci_set_drvdata(pdev, netdev);
  628. adapter = netdev_priv(netdev);
  629. adapter->netdev = netdev;
  630. adapter->pdev = pdev;
  631. adapter->hw.back = adapter;
  632. adapter->msg_enable = (1 << debug) - 1;
  633. mmio_start = pci_resource_start(pdev, BAR_0);
  634. mmio_len = pci_resource_len(pdev, BAR_0);
  635. err = -EIO;
  636. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  637. if (!adapter->hw.hw_addr)
  638. goto err_ioremap;
  639. for (i = BAR_1; i <= BAR_5; i++) {
  640. if (pci_resource_len(pdev, i) == 0)
  641. continue;
  642. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  643. adapter->hw.io_base = pci_resource_start(pdev, i);
  644. break;
  645. }
  646. }
  647. netdev->open = &e1000_open;
  648. netdev->stop = &e1000_close;
  649. netdev->hard_start_xmit = &e1000_xmit_frame;
  650. netdev->get_stats = &e1000_get_stats;
  651. netdev->set_multicast_list = &e1000_set_multi;
  652. netdev->set_mac_address = &e1000_set_mac;
  653. netdev->change_mtu = &e1000_change_mtu;
  654. netdev->do_ioctl = &e1000_ioctl;
  655. e1000_set_ethtool_ops(netdev);
  656. netdev->tx_timeout = &e1000_tx_timeout;
  657. netdev->watchdog_timeo = 5 * HZ;
  658. #ifdef CONFIG_E1000_NAPI
  659. netdev->poll = &e1000_clean;
  660. netdev->weight = 64;
  661. #endif
  662. netdev->vlan_rx_register = e1000_vlan_rx_register;
  663. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  664. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  665. #ifdef CONFIG_NET_POLL_CONTROLLER
  666. netdev->poll_controller = e1000_netpoll;
  667. #endif
  668. strcpy(netdev->name, pci_name(pdev));
  669. netdev->mem_start = mmio_start;
  670. netdev->mem_end = mmio_start + mmio_len;
  671. netdev->base_addr = adapter->hw.io_base;
  672. adapter->bd_number = cards_found;
  673. /* setup the private structure */
  674. if ((err = e1000_sw_init(adapter)))
  675. goto err_sw_init;
  676. err = -EIO;
  677. /* Flash BAR mapping must happen after e1000_sw_init
  678. * because it depends on mac_type */
  679. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  680. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  681. flash_start = pci_resource_start(pdev, 1);
  682. flash_len = pci_resource_len(pdev, 1);
  683. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  684. if (!adapter->hw.flash_address)
  685. goto err_flashmap;
  686. }
  687. if (e1000_check_phy_reset_block(&adapter->hw))
  688. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  689. if (adapter->hw.mac_type >= e1000_82543) {
  690. netdev->features = NETIF_F_SG |
  691. NETIF_F_HW_CSUM |
  692. NETIF_F_HW_VLAN_TX |
  693. NETIF_F_HW_VLAN_RX |
  694. NETIF_F_HW_VLAN_FILTER;
  695. if (adapter->hw.mac_type == e1000_ich8lan)
  696. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  697. }
  698. #ifdef NETIF_F_TSO
  699. if ((adapter->hw.mac_type >= e1000_82544) &&
  700. (adapter->hw.mac_type != e1000_82547))
  701. netdev->features |= NETIF_F_TSO;
  702. #ifdef NETIF_F_TSO_IPV6
  703. if (adapter->hw.mac_type > e1000_82547_rev_2)
  704. netdev->features |= NETIF_F_TSO_IPV6;
  705. #endif
  706. #endif
  707. if (pci_using_dac)
  708. netdev->features |= NETIF_F_HIGHDMA;
  709. netdev->features |= NETIF_F_LLTX;
  710. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  711. /* initialize eeprom parameters */
  712. if (e1000_init_eeprom_params(&adapter->hw)) {
  713. E1000_ERR("EEPROM initialization failed\n");
  714. goto err_eeprom;
  715. }
  716. /* before reading the EEPROM, reset the controller to
  717. * put the device in a known good starting state */
  718. e1000_reset_hw(&adapter->hw);
  719. /* make sure the EEPROM is good */
  720. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  721. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  722. goto err_eeprom;
  723. }
  724. /* copy the MAC address out of the EEPROM */
  725. if (e1000_read_mac_addr(&adapter->hw))
  726. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  727. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  728. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  729. if (!is_valid_ether_addr(netdev->perm_addr)) {
  730. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  731. goto err_eeprom;
  732. }
  733. e1000_get_bus_info(&adapter->hw);
  734. init_timer(&adapter->tx_fifo_stall_timer);
  735. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  736. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  737. init_timer(&adapter->watchdog_timer);
  738. adapter->watchdog_timer.function = &e1000_watchdog;
  739. adapter->watchdog_timer.data = (unsigned long) adapter;
  740. init_timer(&adapter->phy_info_timer);
  741. adapter->phy_info_timer.function = &e1000_update_phy_info;
  742. adapter->phy_info_timer.data = (unsigned long) adapter;
  743. INIT_WORK(&adapter->reset_task,
  744. (void (*)(void *))e1000_reset_task, netdev);
  745. /* we're going to reset, so assume we have no link for now */
  746. netif_carrier_off(netdev);
  747. netif_stop_queue(netdev);
  748. e1000_check_options(adapter);
  749. /* Initial Wake on LAN setting
  750. * If APM wake is enabled in the EEPROM,
  751. * enable the ACPI Magic Packet filter
  752. */
  753. switch (adapter->hw.mac_type) {
  754. case e1000_82542_rev2_0:
  755. case e1000_82542_rev2_1:
  756. case e1000_82543:
  757. break;
  758. case e1000_82544:
  759. e1000_read_eeprom(&adapter->hw,
  760. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  761. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  762. break;
  763. case e1000_ich8lan:
  764. e1000_read_eeprom(&adapter->hw,
  765. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  766. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  767. break;
  768. case e1000_82546:
  769. case e1000_82546_rev_3:
  770. case e1000_82571:
  771. case e1000_80003es2lan:
  772. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  773. e1000_read_eeprom(&adapter->hw,
  774. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  775. break;
  776. }
  777. /* Fall Through */
  778. default:
  779. e1000_read_eeprom(&adapter->hw,
  780. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  781. break;
  782. }
  783. if (eeprom_data & eeprom_apme_mask)
  784. adapter->eeprom_wol |= E1000_WUFC_MAG;
  785. /* now that we have the eeprom settings, apply the special cases
  786. * where the eeprom may be wrong or the board simply won't support
  787. * wake on lan on a particular port */
  788. switch (pdev->device) {
  789. case E1000_DEV_ID_82546GB_PCIE:
  790. adapter->eeprom_wol = 0;
  791. break;
  792. case E1000_DEV_ID_82546EB_FIBER:
  793. case E1000_DEV_ID_82546GB_FIBER:
  794. case E1000_DEV_ID_82571EB_FIBER:
  795. /* Wake events only supported on port A for dual fiber
  796. * regardless of eeprom setting */
  797. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  798. adapter->eeprom_wol = 0;
  799. break;
  800. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  801. case E1000_DEV_ID_82571EB_QUAD_COPPER:
  802. /* if quad port adapter, disable WoL on all but port A */
  803. if (global_quad_port_a != 0)
  804. adapter->eeprom_wol = 0;
  805. else
  806. adapter->quad_port_a = 1;
  807. /* Reset for multiple quad port adapters */
  808. if (++global_quad_port_a == 4)
  809. global_quad_port_a = 0;
  810. break;
  811. }
  812. /* initialize the wol settings based on the eeprom settings */
  813. adapter->wol = adapter->eeprom_wol;
  814. /* print bus type/speed/width info */
  815. {
  816. struct e1000_hw *hw = &adapter->hw;
  817. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  818. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  819. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  820. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  821. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  822. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  823. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  824. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  825. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  826. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  827. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  828. "32-bit"));
  829. }
  830. for (i = 0; i < 6; i++)
  831. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  832. /* reset the hardware with the new settings */
  833. e1000_reset(adapter);
  834. /* If the controller is 82573 and f/w is AMT, do not set
  835. * DRV_LOAD until the interface is up. For all other cases,
  836. * let the f/w know that the h/w is now under the control
  837. * of the driver. */
  838. if (adapter->hw.mac_type != e1000_82573 ||
  839. !e1000_check_mng_mode(&adapter->hw))
  840. e1000_get_hw_control(adapter);
  841. strcpy(netdev->name, "eth%d");
  842. if ((err = register_netdev(netdev)))
  843. goto err_register;
  844. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  845. cards_found++;
  846. return 0;
  847. err_register:
  848. e1000_release_hw_control(adapter);
  849. err_eeprom:
  850. if (!e1000_check_phy_reset_block(&adapter->hw))
  851. e1000_phy_hw_reset(&adapter->hw);
  852. if (adapter->hw.flash_address)
  853. iounmap(adapter->hw.flash_address);
  854. err_flashmap:
  855. #ifdef CONFIG_E1000_NAPI
  856. for (i = 0; i < adapter->num_rx_queues; i++)
  857. dev_put(&adapter->polling_netdev[i]);
  858. #endif
  859. kfree(adapter->tx_ring);
  860. kfree(adapter->rx_ring);
  861. #ifdef CONFIG_E1000_NAPI
  862. kfree(adapter->polling_netdev);
  863. #endif
  864. err_sw_init:
  865. iounmap(adapter->hw.hw_addr);
  866. err_ioremap:
  867. free_netdev(netdev);
  868. err_alloc_etherdev:
  869. pci_release_regions(pdev);
  870. err_pci_reg:
  871. err_dma:
  872. pci_disable_device(pdev);
  873. return err;
  874. }
  875. /**
  876. * e1000_remove - Device Removal Routine
  877. * @pdev: PCI device information struct
  878. *
  879. * e1000_remove is called by the PCI subsystem to alert the driver
  880. * that it should release a PCI device. The could be caused by a
  881. * Hot-Plug event, or because the driver is going to be removed from
  882. * memory.
  883. **/
  884. static void __devexit
  885. e1000_remove(struct pci_dev *pdev)
  886. {
  887. struct net_device *netdev = pci_get_drvdata(pdev);
  888. struct e1000_adapter *adapter = netdev_priv(netdev);
  889. uint32_t manc;
  890. #ifdef CONFIG_E1000_NAPI
  891. int i;
  892. #endif
  893. flush_scheduled_work();
  894. if (adapter->hw.mac_type >= e1000_82540 &&
  895. adapter->hw.mac_type != e1000_ich8lan &&
  896. adapter->hw.media_type == e1000_media_type_copper) {
  897. manc = E1000_READ_REG(&adapter->hw, MANC);
  898. if (manc & E1000_MANC_SMBUS_EN) {
  899. manc |= E1000_MANC_ARP_EN;
  900. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  901. }
  902. }
  903. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  904. * would have already happened in close and is redundant. */
  905. e1000_release_hw_control(adapter);
  906. unregister_netdev(netdev);
  907. #ifdef CONFIG_E1000_NAPI
  908. for (i = 0; i < adapter->num_rx_queues; i++)
  909. dev_put(&adapter->polling_netdev[i]);
  910. #endif
  911. if (!e1000_check_phy_reset_block(&adapter->hw))
  912. e1000_phy_hw_reset(&adapter->hw);
  913. kfree(adapter->tx_ring);
  914. kfree(adapter->rx_ring);
  915. #ifdef CONFIG_E1000_NAPI
  916. kfree(adapter->polling_netdev);
  917. #endif
  918. iounmap(adapter->hw.hw_addr);
  919. if (adapter->hw.flash_address)
  920. iounmap(adapter->hw.flash_address);
  921. pci_release_regions(pdev);
  922. free_netdev(netdev);
  923. pci_disable_device(pdev);
  924. }
  925. /**
  926. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  927. * @adapter: board private structure to initialize
  928. *
  929. * e1000_sw_init initializes the Adapter private data structure.
  930. * Fields are initialized based on PCI device information and
  931. * OS network device settings (MTU size).
  932. **/
  933. static int __devinit
  934. e1000_sw_init(struct e1000_adapter *adapter)
  935. {
  936. struct e1000_hw *hw = &adapter->hw;
  937. struct net_device *netdev = adapter->netdev;
  938. struct pci_dev *pdev = adapter->pdev;
  939. #ifdef CONFIG_E1000_NAPI
  940. int i;
  941. #endif
  942. /* PCI config space info */
  943. hw->vendor_id = pdev->vendor;
  944. hw->device_id = pdev->device;
  945. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  946. hw->subsystem_id = pdev->subsystem_device;
  947. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  948. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  949. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  950. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  951. hw->max_frame_size = netdev->mtu +
  952. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  953. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  954. /* identify the MAC */
  955. if (e1000_set_mac_type(hw)) {
  956. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  957. return -EIO;
  958. }
  959. switch (hw->mac_type) {
  960. default:
  961. break;
  962. case e1000_82541:
  963. case e1000_82547:
  964. case e1000_82541_rev_2:
  965. case e1000_82547_rev_2:
  966. hw->phy_init_script = 1;
  967. break;
  968. }
  969. e1000_set_media_type(hw);
  970. hw->wait_autoneg_complete = FALSE;
  971. hw->tbi_compatibility_en = TRUE;
  972. hw->adaptive_ifs = TRUE;
  973. /* Copper options */
  974. if (hw->media_type == e1000_media_type_copper) {
  975. hw->mdix = AUTO_ALL_MODES;
  976. hw->disable_polarity_correction = FALSE;
  977. hw->master_slave = E1000_MASTER_SLAVE;
  978. }
  979. adapter->num_tx_queues = 1;
  980. adapter->num_rx_queues = 1;
  981. if (e1000_alloc_queues(adapter)) {
  982. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  983. return -ENOMEM;
  984. }
  985. #ifdef CONFIG_E1000_NAPI
  986. for (i = 0; i < adapter->num_rx_queues; i++) {
  987. adapter->polling_netdev[i].priv = adapter;
  988. adapter->polling_netdev[i].poll = &e1000_clean;
  989. adapter->polling_netdev[i].weight = 64;
  990. dev_hold(&adapter->polling_netdev[i]);
  991. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  992. }
  993. spin_lock_init(&adapter->tx_queue_lock);
  994. #endif
  995. atomic_set(&adapter->irq_sem, 1);
  996. spin_lock_init(&adapter->stats_lock);
  997. return 0;
  998. }
  999. /**
  1000. * e1000_alloc_queues - Allocate memory for all rings
  1001. * @adapter: board private structure to initialize
  1002. *
  1003. * We allocate one ring per queue at run-time since we don't know the
  1004. * number of queues at compile-time. The polling_netdev array is
  1005. * intended for Multiqueue, but should work fine with a single queue.
  1006. **/
  1007. static int __devinit
  1008. e1000_alloc_queues(struct e1000_adapter *adapter)
  1009. {
  1010. int size;
  1011. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  1012. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  1013. if (!adapter->tx_ring)
  1014. return -ENOMEM;
  1015. memset(adapter->tx_ring, 0, size);
  1016. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  1017. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  1018. if (!adapter->rx_ring) {
  1019. kfree(adapter->tx_ring);
  1020. return -ENOMEM;
  1021. }
  1022. memset(adapter->rx_ring, 0, size);
  1023. #ifdef CONFIG_E1000_NAPI
  1024. size = sizeof(struct net_device) * adapter->num_rx_queues;
  1025. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  1026. if (!adapter->polling_netdev) {
  1027. kfree(adapter->tx_ring);
  1028. kfree(adapter->rx_ring);
  1029. return -ENOMEM;
  1030. }
  1031. memset(adapter->polling_netdev, 0, size);
  1032. #endif
  1033. return E1000_SUCCESS;
  1034. }
  1035. /**
  1036. * e1000_open - Called when a network interface is made active
  1037. * @netdev: network interface device structure
  1038. *
  1039. * Returns 0 on success, negative value on failure
  1040. *
  1041. * The open entry point is called when a network interface is made
  1042. * active by the system (IFF_UP). At this point all resources needed
  1043. * for transmit and receive operations are allocated, the interrupt
  1044. * handler is registered with the OS, the watchdog timer is started,
  1045. * and the stack is notified that the interface is ready.
  1046. **/
  1047. static int
  1048. e1000_open(struct net_device *netdev)
  1049. {
  1050. struct e1000_adapter *adapter = netdev_priv(netdev);
  1051. int err;
  1052. /* disallow open during test */
  1053. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1054. return -EBUSY;
  1055. /* allocate transmit descriptors */
  1056. if ((err = e1000_setup_all_tx_resources(adapter)))
  1057. goto err_setup_tx;
  1058. /* allocate receive descriptors */
  1059. if ((err = e1000_setup_all_rx_resources(adapter)))
  1060. goto err_setup_rx;
  1061. err = e1000_request_irq(adapter);
  1062. if (err)
  1063. goto err_req_irq;
  1064. e1000_power_up_phy(adapter);
  1065. if ((err = e1000_up(adapter)))
  1066. goto err_up;
  1067. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1068. if ((adapter->hw.mng_cookie.status &
  1069. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1070. e1000_update_mng_vlan(adapter);
  1071. }
  1072. /* If AMT is enabled, let the firmware know that the network
  1073. * interface is now open */
  1074. if (adapter->hw.mac_type == e1000_82573 &&
  1075. e1000_check_mng_mode(&adapter->hw))
  1076. e1000_get_hw_control(adapter);
  1077. return E1000_SUCCESS;
  1078. err_up:
  1079. e1000_power_down_phy(adapter);
  1080. e1000_free_irq(adapter);
  1081. err_req_irq:
  1082. e1000_free_all_rx_resources(adapter);
  1083. err_setup_rx:
  1084. e1000_free_all_tx_resources(adapter);
  1085. err_setup_tx:
  1086. e1000_reset(adapter);
  1087. return err;
  1088. }
  1089. /**
  1090. * e1000_close - Disables a network interface
  1091. * @netdev: network interface device structure
  1092. *
  1093. * Returns 0, this is not allowed to fail
  1094. *
  1095. * The close entry point is called when an interface is de-activated
  1096. * by the OS. The hardware is still under the drivers control, but
  1097. * needs to be disabled. A global MAC reset is issued to stop the
  1098. * hardware, and all transmit and receive resources are freed.
  1099. **/
  1100. static int
  1101. e1000_close(struct net_device *netdev)
  1102. {
  1103. struct e1000_adapter *adapter = netdev_priv(netdev);
  1104. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1105. e1000_down(adapter);
  1106. e1000_power_down_phy(adapter);
  1107. e1000_free_irq(adapter);
  1108. e1000_free_all_tx_resources(adapter);
  1109. e1000_free_all_rx_resources(adapter);
  1110. if ((adapter->hw.mng_cookie.status &
  1111. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1112. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1113. }
  1114. /* If AMT is enabled, let the firmware know that the network
  1115. * interface is now closed */
  1116. if (adapter->hw.mac_type == e1000_82573 &&
  1117. e1000_check_mng_mode(&adapter->hw))
  1118. e1000_release_hw_control(adapter);
  1119. return 0;
  1120. }
  1121. /**
  1122. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1123. * @adapter: address of board private structure
  1124. * @start: address of beginning of memory
  1125. * @len: length of memory
  1126. **/
  1127. static boolean_t
  1128. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1129. void *start, unsigned long len)
  1130. {
  1131. unsigned long begin = (unsigned long) start;
  1132. unsigned long end = begin + len;
  1133. /* First rev 82545 and 82546 need to not allow any memory
  1134. * write location to cross 64k boundary due to errata 23 */
  1135. if (adapter->hw.mac_type == e1000_82545 ||
  1136. adapter->hw.mac_type == e1000_82546) {
  1137. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1138. }
  1139. return TRUE;
  1140. }
  1141. /**
  1142. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1143. * @adapter: board private structure
  1144. * @txdr: tx descriptor ring (for a specific queue) to setup
  1145. *
  1146. * Return 0 on success, negative on failure
  1147. **/
  1148. static int
  1149. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1150. struct e1000_tx_ring *txdr)
  1151. {
  1152. struct pci_dev *pdev = adapter->pdev;
  1153. int size;
  1154. size = sizeof(struct e1000_buffer) * txdr->count;
  1155. txdr->buffer_info = vmalloc(size);
  1156. if (!txdr->buffer_info) {
  1157. DPRINTK(PROBE, ERR,
  1158. "Unable to allocate memory for the transmit descriptor ring\n");
  1159. return -ENOMEM;
  1160. }
  1161. memset(txdr->buffer_info, 0, size);
  1162. /* round up to nearest 4K */
  1163. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1164. E1000_ROUNDUP(txdr->size, 4096);
  1165. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1166. if (!txdr->desc) {
  1167. setup_tx_desc_die:
  1168. vfree(txdr->buffer_info);
  1169. DPRINTK(PROBE, ERR,
  1170. "Unable to allocate memory for the transmit descriptor ring\n");
  1171. return -ENOMEM;
  1172. }
  1173. /* Fix for errata 23, can't cross 64kB boundary */
  1174. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1175. void *olddesc = txdr->desc;
  1176. dma_addr_t olddma = txdr->dma;
  1177. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1178. "at %p\n", txdr->size, txdr->desc);
  1179. /* Try again, without freeing the previous */
  1180. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1181. /* Failed allocation, critical failure */
  1182. if (!txdr->desc) {
  1183. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1184. goto setup_tx_desc_die;
  1185. }
  1186. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1187. /* give up */
  1188. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1189. txdr->dma);
  1190. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1191. DPRINTK(PROBE, ERR,
  1192. "Unable to allocate aligned memory "
  1193. "for the transmit descriptor ring\n");
  1194. vfree(txdr->buffer_info);
  1195. return -ENOMEM;
  1196. } else {
  1197. /* Free old allocation, new allocation was successful */
  1198. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1199. }
  1200. }
  1201. memset(txdr->desc, 0, txdr->size);
  1202. txdr->next_to_use = 0;
  1203. txdr->next_to_clean = 0;
  1204. spin_lock_init(&txdr->tx_lock);
  1205. return 0;
  1206. }
  1207. /**
  1208. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1209. * (Descriptors) for all queues
  1210. * @adapter: board private structure
  1211. *
  1212. * Return 0 on success, negative on failure
  1213. **/
  1214. int
  1215. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1216. {
  1217. int i, err = 0;
  1218. for (i = 0; i < adapter->num_tx_queues; i++) {
  1219. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1220. if (err) {
  1221. DPRINTK(PROBE, ERR,
  1222. "Allocation for Tx Queue %u failed\n", i);
  1223. for (i-- ; i >= 0; i--)
  1224. e1000_free_tx_resources(adapter,
  1225. &adapter->tx_ring[i]);
  1226. break;
  1227. }
  1228. }
  1229. return err;
  1230. }
  1231. /**
  1232. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1233. * @adapter: board private structure
  1234. *
  1235. * Configure the Tx unit of the MAC after a reset.
  1236. **/
  1237. static void
  1238. e1000_configure_tx(struct e1000_adapter *adapter)
  1239. {
  1240. uint64_t tdba;
  1241. struct e1000_hw *hw = &adapter->hw;
  1242. uint32_t tdlen, tctl, tipg, tarc;
  1243. uint32_t ipgr1, ipgr2;
  1244. /* Setup the HW Tx Head and Tail descriptor pointers */
  1245. switch (adapter->num_tx_queues) {
  1246. case 1:
  1247. default:
  1248. tdba = adapter->tx_ring[0].dma;
  1249. tdlen = adapter->tx_ring[0].count *
  1250. sizeof(struct e1000_tx_desc);
  1251. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1252. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1253. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1254. E1000_WRITE_REG(hw, TDT, 0);
  1255. E1000_WRITE_REG(hw, TDH, 0);
  1256. adapter->tx_ring[0].tdh = E1000_TDH;
  1257. adapter->tx_ring[0].tdt = E1000_TDT;
  1258. break;
  1259. }
  1260. /* Set the default values for the Tx Inter Packet Gap timer */
  1261. if (hw->media_type == e1000_media_type_fiber ||
  1262. hw->media_type == e1000_media_type_internal_serdes)
  1263. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1264. else
  1265. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1266. switch (hw->mac_type) {
  1267. case e1000_82542_rev2_0:
  1268. case e1000_82542_rev2_1:
  1269. tipg = DEFAULT_82542_TIPG_IPGT;
  1270. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1271. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1272. break;
  1273. case e1000_80003es2lan:
  1274. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1275. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1276. break;
  1277. default:
  1278. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1279. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1280. break;
  1281. }
  1282. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1283. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1284. E1000_WRITE_REG(hw, TIPG, tipg);
  1285. /* Set the Tx Interrupt Delay register */
  1286. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1287. if (hw->mac_type >= e1000_82540)
  1288. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1289. /* Program the Transmit Control Register */
  1290. tctl = E1000_READ_REG(hw, TCTL);
  1291. tctl &= ~E1000_TCTL_CT;
  1292. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1293. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1294. #ifdef DISABLE_MULR
  1295. /* disable Multiple Reads for debugging */
  1296. tctl &= ~E1000_TCTL_MULR;
  1297. #endif
  1298. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1299. tarc = E1000_READ_REG(hw, TARC0);
  1300. tarc |= ((1 << 25) | (1 << 21));
  1301. E1000_WRITE_REG(hw, TARC0, tarc);
  1302. tarc = E1000_READ_REG(hw, TARC1);
  1303. tarc |= (1 << 25);
  1304. if (tctl & E1000_TCTL_MULR)
  1305. tarc &= ~(1 << 28);
  1306. else
  1307. tarc |= (1 << 28);
  1308. E1000_WRITE_REG(hw, TARC1, tarc);
  1309. } else if (hw->mac_type == e1000_80003es2lan) {
  1310. tarc = E1000_READ_REG(hw, TARC0);
  1311. tarc |= 1;
  1312. E1000_WRITE_REG(hw, TARC0, tarc);
  1313. tarc = E1000_READ_REG(hw, TARC1);
  1314. tarc |= 1;
  1315. E1000_WRITE_REG(hw, TARC1, tarc);
  1316. }
  1317. e1000_config_collision_dist(hw);
  1318. /* Setup Transmit Descriptor Settings for eop descriptor */
  1319. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1320. E1000_TXD_CMD_IFCS;
  1321. if (hw->mac_type < e1000_82543)
  1322. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1323. else
  1324. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1325. /* Cache if we're 82544 running in PCI-X because we'll
  1326. * need this to apply a workaround later in the send path. */
  1327. if (hw->mac_type == e1000_82544 &&
  1328. hw->bus_type == e1000_bus_type_pcix)
  1329. adapter->pcix_82544 = 1;
  1330. E1000_WRITE_REG(hw, TCTL, tctl);
  1331. }
  1332. /**
  1333. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1334. * @adapter: board private structure
  1335. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1336. *
  1337. * Returns 0 on success, negative on failure
  1338. **/
  1339. static int
  1340. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1341. struct e1000_rx_ring *rxdr)
  1342. {
  1343. struct pci_dev *pdev = adapter->pdev;
  1344. int size, desc_len;
  1345. size = sizeof(struct e1000_buffer) * rxdr->count;
  1346. rxdr->buffer_info = vmalloc(size);
  1347. if (!rxdr->buffer_info) {
  1348. DPRINTK(PROBE, ERR,
  1349. "Unable to allocate memory for the receive descriptor ring\n");
  1350. return -ENOMEM;
  1351. }
  1352. memset(rxdr->buffer_info, 0, size);
  1353. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1354. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1355. if (!rxdr->ps_page) {
  1356. vfree(rxdr->buffer_info);
  1357. DPRINTK(PROBE, ERR,
  1358. "Unable to allocate memory for the receive descriptor ring\n");
  1359. return -ENOMEM;
  1360. }
  1361. memset(rxdr->ps_page, 0, size);
  1362. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1363. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1364. if (!rxdr->ps_page_dma) {
  1365. vfree(rxdr->buffer_info);
  1366. kfree(rxdr->ps_page);
  1367. DPRINTK(PROBE, ERR,
  1368. "Unable to allocate memory for the receive descriptor ring\n");
  1369. return -ENOMEM;
  1370. }
  1371. memset(rxdr->ps_page_dma, 0, size);
  1372. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1373. desc_len = sizeof(struct e1000_rx_desc);
  1374. else
  1375. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1376. /* Round up to nearest 4K */
  1377. rxdr->size = rxdr->count * desc_len;
  1378. E1000_ROUNDUP(rxdr->size, 4096);
  1379. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1380. if (!rxdr->desc) {
  1381. DPRINTK(PROBE, ERR,
  1382. "Unable to allocate memory for the receive descriptor ring\n");
  1383. setup_rx_desc_die:
  1384. vfree(rxdr->buffer_info);
  1385. kfree(rxdr->ps_page);
  1386. kfree(rxdr->ps_page_dma);
  1387. return -ENOMEM;
  1388. }
  1389. /* Fix for errata 23, can't cross 64kB boundary */
  1390. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1391. void *olddesc = rxdr->desc;
  1392. dma_addr_t olddma = rxdr->dma;
  1393. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1394. "at %p\n", rxdr->size, rxdr->desc);
  1395. /* Try again, without freeing the previous */
  1396. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1397. /* Failed allocation, critical failure */
  1398. if (!rxdr->desc) {
  1399. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1400. DPRINTK(PROBE, ERR,
  1401. "Unable to allocate memory "
  1402. "for the receive descriptor ring\n");
  1403. goto setup_rx_desc_die;
  1404. }
  1405. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1406. /* give up */
  1407. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1408. rxdr->dma);
  1409. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1410. DPRINTK(PROBE, ERR,
  1411. "Unable to allocate aligned memory "
  1412. "for the receive descriptor ring\n");
  1413. goto setup_rx_desc_die;
  1414. } else {
  1415. /* Free old allocation, new allocation was successful */
  1416. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1417. }
  1418. }
  1419. memset(rxdr->desc, 0, rxdr->size);
  1420. rxdr->next_to_clean = 0;
  1421. rxdr->next_to_use = 0;
  1422. return 0;
  1423. }
  1424. /**
  1425. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1426. * (Descriptors) for all queues
  1427. * @adapter: board private structure
  1428. *
  1429. * Return 0 on success, negative on failure
  1430. **/
  1431. int
  1432. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1433. {
  1434. int i, err = 0;
  1435. for (i = 0; i < adapter->num_rx_queues; i++) {
  1436. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1437. if (err) {
  1438. DPRINTK(PROBE, ERR,
  1439. "Allocation for Rx Queue %u failed\n", i);
  1440. for (i-- ; i >= 0; i--)
  1441. e1000_free_rx_resources(adapter,
  1442. &adapter->rx_ring[i]);
  1443. break;
  1444. }
  1445. }
  1446. return err;
  1447. }
  1448. /**
  1449. * e1000_setup_rctl - configure the receive control registers
  1450. * @adapter: Board private structure
  1451. **/
  1452. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1453. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1454. static void
  1455. e1000_setup_rctl(struct e1000_adapter *adapter)
  1456. {
  1457. uint32_t rctl, rfctl;
  1458. uint32_t psrctl = 0;
  1459. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1460. uint32_t pages = 0;
  1461. #endif
  1462. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1463. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1464. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1465. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1466. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1467. if (adapter->hw.tbi_compatibility_on == 1)
  1468. rctl |= E1000_RCTL_SBP;
  1469. else
  1470. rctl &= ~E1000_RCTL_SBP;
  1471. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1472. rctl &= ~E1000_RCTL_LPE;
  1473. else
  1474. rctl |= E1000_RCTL_LPE;
  1475. /* Setup buffer sizes */
  1476. rctl &= ~E1000_RCTL_SZ_4096;
  1477. rctl |= E1000_RCTL_BSEX;
  1478. switch (adapter->rx_buffer_len) {
  1479. case E1000_RXBUFFER_256:
  1480. rctl |= E1000_RCTL_SZ_256;
  1481. rctl &= ~E1000_RCTL_BSEX;
  1482. break;
  1483. case E1000_RXBUFFER_512:
  1484. rctl |= E1000_RCTL_SZ_512;
  1485. rctl &= ~E1000_RCTL_BSEX;
  1486. break;
  1487. case E1000_RXBUFFER_1024:
  1488. rctl |= E1000_RCTL_SZ_1024;
  1489. rctl &= ~E1000_RCTL_BSEX;
  1490. break;
  1491. case E1000_RXBUFFER_2048:
  1492. default:
  1493. rctl |= E1000_RCTL_SZ_2048;
  1494. rctl &= ~E1000_RCTL_BSEX;
  1495. break;
  1496. case E1000_RXBUFFER_4096:
  1497. rctl |= E1000_RCTL_SZ_4096;
  1498. break;
  1499. case E1000_RXBUFFER_8192:
  1500. rctl |= E1000_RCTL_SZ_8192;
  1501. break;
  1502. case E1000_RXBUFFER_16384:
  1503. rctl |= E1000_RCTL_SZ_16384;
  1504. break;
  1505. }
  1506. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1507. /* 82571 and greater support packet-split where the protocol
  1508. * header is placed in skb->data and the packet data is
  1509. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1510. * In the case of a non-split, skb->data is linearly filled,
  1511. * followed by the page buffers. Therefore, skb->data is
  1512. * sized to hold the largest protocol header.
  1513. */
  1514. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1515. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1516. PAGE_SIZE <= 16384)
  1517. adapter->rx_ps_pages = pages;
  1518. else
  1519. adapter->rx_ps_pages = 0;
  1520. #endif
  1521. if (adapter->rx_ps_pages) {
  1522. /* Configure extra packet-split registers */
  1523. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1524. rfctl |= E1000_RFCTL_EXTEN;
  1525. /* disable IPv6 packet split support */
  1526. rfctl |= E1000_RFCTL_IPV6_DIS;
  1527. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1528. rctl |= E1000_RCTL_DTYP_PS;
  1529. psrctl |= adapter->rx_ps_bsize0 >>
  1530. E1000_PSRCTL_BSIZE0_SHIFT;
  1531. switch (adapter->rx_ps_pages) {
  1532. case 3:
  1533. psrctl |= PAGE_SIZE <<
  1534. E1000_PSRCTL_BSIZE3_SHIFT;
  1535. case 2:
  1536. psrctl |= PAGE_SIZE <<
  1537. E1000_PSRCTL_BSIZE2_SHIFT;
  1538. case 1:
  1539. psrctl |= PAGE_SIZE >>
  1540. E1000_PSRCTL_BSIZE1_SHIFT;
  1541. break;
  1542. }
  1543. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1544. }
  1545. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1546. }
  1547. /**
  1548. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1549. * @adapter: board private structure
  1550. *
  1551. * Configure the Rx unit of the MAC after a reset.
  1552. **/
  1553. static void
  1554. e1000_configure_rx(struct e1000_adapter *adapter)
  1555. {
  1556. uint64_t rdba;
  1557. struct e1000_hw *hw = &adapter->hw;
  1558. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1559. if (adapter->rx_ps_pages) {
  1560. /* this is a 32 byte descriptor */
  1561. rdlen = adapter->rx_ring[0].count *
  1562. sizeof(union e1000_rx_desc_packet_split);
  1563. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1564. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1565. } else {
  1566. rdlen = adapter->rx_ring[0].count *
  1567. sizeof(struct e1000_rx_desc);
  1568. adapter->clean_rx = e1000_clean_rx_irq;
  1569. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1570. }
  1571. /* disable receives while setting up the descriptors */
  1572. rctl = E1000_READ_REG(hw, RCTL);
  1573. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1574. /* set the Receive Delay Timer Register */
  1575. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1576. if (hw->mac_type >= e1000_82540) {
  1577. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1578. if (adapter->itr > 1)
  1579. E1000_WRITE_REG(hw, ITR,
  1580. 1000000000 / (adapter->itr * 256));
  1581. }
  1582. if (hw->mac_type >= e1000_82571) {
  1583. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1584. /* Reset delay timers after every interrupt */
  1585. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1586. #ifdef CONFIG_E1000_NAPI
  1587. /* Auto-Mask interrupts upon ICR read. */
  1588. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1589. #endif
  1590. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1591. E1000_WRITE_REG(hw, IAM, ~0);
  1592. E1000_WRITE_FLUSH(hw);
  1593. }
  1594. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1595. * the Base and Length of the Rx Descriptor Ring */
  1596. switch (adapter->num_rx_queues) {
  1597. case 1:
  1598. default:
  1599. rdba = adapter->rx_ring[0].dma;
  1600. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1601. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1602. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1603. E1000_WRITE_REG(hw, RDT, 0);
  1604. E1000_WRITE_REG(hw, RDH, 0);
  1605. adapter->rx_ring[0].rdh = E1000_RDH;
  1606. adapter->rx_ring[0].rdt = E1000_RDT;
  1607. break;
  1608. }
  1609. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1610. if (hw->mac_type >= e1000_82543) {
  1611. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1612. if (adapter->rx_csum == TRUE) {
  1613. rxcsum |= E1000_RXCSUM_TUOFL;
  1614. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1615. * Must be used in conjunction with packet-split. */
  1616. if ((hw->mac_type >= e1000_82571) &&
  1617. (adapter->rx_ps_pages)) {
  1618. rxcsum |= E1000_RXCSUM_IPPCSE;
  1619. }
  1620. } else {
  1621. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1622. /* don't need to clear IPPCSE as it defaults to 0 */
  1623. }
  1624. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1625. }
  1626. /* Enable Receives */
  1627. E1000_WRITE_REG(hw, RCTL, rctl);
  1628. }
  1629. /**
  1630. * e1000_free_tx_resources - Free Tx Resources per Queue
  1631. * @adapter: board private structure
  1632. * @tx_ring: Tx descriptor ring for a specific queue
  1633. *
  1634. * Free all transmit software resources
  1635. **/
  1636. static void
  1637. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1638. struct e1000_tx_ring *tx_ring)
  1639. {
  1640. struct pci_dev *pdev = adapter->pdev;
  1641. e1000_clean_tx_ring(adapter, tx_ring);
  1642. vfree(tx_ring->buffer_info);
  1643. tx_ring->buffer_info = NULL;
  1644. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1645. tx_ring->desc = NULL;
  1646. }
  1647. /**
  1648. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1649. * @adapter: board private structure
  1650. *
  1651. * Free all transmit software resources
  1652. **/
  1653. void
  1654. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1655. {
  1656. int i;
  1657. for (i = 0; i < adapter->num_tx_queues; i++)
  1658. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1659. }
  1660. static void
  1661. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1662. struct e1000_buffer *buffer_info)
  1663. {
  1664. if (buffer_info->dma) {
  1665. pci_unmap_page(adapter->pdev,
  1666. buffer_info->dma,
  1667. buffer_info->length,
  1668. PCI_DMA_TODEVICE);
  1669. }
  1670. if (buffer_info->skb)
  1671. dev_kfree_skb_any(buffer_info->skb);
  1672. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1673. }
  1674. /**
  1675. * e1000_clean_tx_ring - Free Tx Buffers
  1676. * @adapter: board private structure
  1677. * @tx_ring: ring to be cleaned
  1678. **/
  1679. static void
  1680. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1681. struct e1000_tx_ring *tx_ring)
  1682. {
  1683. struct e1000_buffer *buffer_info;
  1684. unsigned long size;
  1685. unsigned int i;
  1686. /* Free all the Tx ring sk_buffs */
  1687. for (i = 0; i < tx_ring->count; i++) {
  1688. buffer_info = &tx_ring->buffer_info[i];
  1689. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1690. }
  1691. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1692. memset(tx_ring->buffer_info, 0, size);
  1693. /* Zero out the descriptor ring */
  1694. memset(tx_ring->desc, 0, tx_ring->size);
  1695. tx_ring->next_to_use = 0;
  1696. tx_ring->next_to_clean = 0;
  1697. tx_ring->last_tx_tso = 0;
  1698. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1699. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1700. }
  1701. /**
  1702. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1703. * @adapter: board private structure
  1704. **/
  1705. static void
  1706. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1707. {
  1708. int i;
  1709. for (i = 0; i < adapter->num_tx_queues; i++)
  1710. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1711. }
  1712. /**
  1713. * e1000_free_rx_resources - Free Rx Resources
  1714. * @adapter: board private structure
  1715. * @rx_ring: ring to clean the resources from
  1716. *
  1717. * Free all receive software resources
  1718. **/
  1719. static void
  1720. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1721. struct e1000_rx_ring *rx_ring)
  1722. {
  1723. struct pci_dev *pdev = adapter->pdev;
  1724. e1000_clean_rx_ring(adapter, rx_ring);
  1725. vfree(rx_ring->buffer_info);
  1726. rx_ring->buffer_info = NULL;
  1727. kfree(rx_ring->ps_page);
  1728. rx_ring->ps_page = NULL;
  1729. kfree(rx_ring->ps_page_dma);
  1730. rx_ring->ps_page_dma = NULL;
  1731. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1732. rx_ring->desc = NULL;
  1733. }
  1734. /**
  1735. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1736. * @adapter: board private structure
  1737. *
  1738. * Free all receive software resources
  1739. **/
  1740. void
  1741. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1742. {
  1743. int i;
  1744. for (i = 0; i < adapter->num_rx_queues; i++)
  1745. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1746. }
  1747. /**
  1748. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1749. * @adapter: board private structure
  1750. * @rx_ring: ring to free buffers from
  1751. **/
  1752. static void
  1753. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1754. struct e1000_rx_ring *rx_ring)
  1755. {
  1756. struct e1000_buffer *buffer_info;
  1757. struct e1000_ps_page *ps_page;
  1758. struct e1000_ps_page_dma *ps_page_dma;
  1759. struct pci_dev *pdev = adapter->pdev;
  1760. unsigned long size;
  1761. unsigned int i, j;
  1762. /* Free all the Rx ring sk_buffs */
  1763. for (i = 0; i < rx_ring->count; i++) {
  1764. buffer_info = &rx_ring->buffer_info[i];
  1765. if (buffer_info->skb) {
  1766. pci_unmap_single(pdev,
  1767. buffer_info->dma,
  1768. buffer_info->length,
  1769. PCI_DMA_FROMDEVICE);
  1770. dev_kfree_skb(buffer_info->skb);
  1771. buffer_info->skb = NULL;
  1772. }
  1773. ps_page = &rx_ring->ps_page[i];
  1774. ps_page_dma = &rx_ring->ps_page_dma[i];
  1775. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1776. if (!ps_page->ps_page[j]) break;
  1777. pci_unmap_page(pdev,
  1778. ps_page_dma->ps_page_dma[j],
  1779. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1780. ps_page_dma->ps_page_dma[j] = 0;
  1781. put_page(ps_page->ps_page[j]);
  1782. ps_page->ps_page[j] = NULL;
  1783. }
  1784. }
  1785. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1786. memset(rx_ring->buffer_info, 0, size);
  1787. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1788. memset(rx_ring->ps_page, 0, size);
  1789. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1790. memset(rx_ring->ps_page_dma, 0, size);
  1791. /* Zero out the descriptor ring */
  1792. memset(rx_ring->desc, 0, rx_ring->size);
  1793. rx_ring->next_to_clean = 0;
  1794. rx_ring->next_to_use = 0;
  1795. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1796. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1797. }
  1798. /**
  1799. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1800. * @adapter: board private structure
  1801. **/
  1802. static void
  1803. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1804. {
  1805. int i;
  1806. for (i = 0; i < adapter->num_rx_queues; i++)
  1807. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1808. }
  1809. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1810. * and memory write and invalidate disabled for certain operations
  1811. */
  1812. static void
  1813. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1814. {
  1815. struct net_device *netdev = adapter->netdev;
  1816. uint32_t rctl;
  1817. e1000_pci_clear_mwi(&adapter->hw);
  1818. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1819. rctl |= E1000_RCTL_RST;
  1820. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1821. E1000_WRITE_FLUSH(&adapter->hw);
  1822. mdelay(5);
  1823. if (netif_running(netdev))
  1824. e1000_clean_all_rx_rings(adapter);
  1825. }
  1826. static void
  1827. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1828. {
  1829. struct net_device *netdev = adapter->netdev;
  1830. uint32_t rctl;
  1831. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1832. rctl &= ~E1000_RCTL_RST;
  1833. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1834. E1000_WRITE_FLUSH(&adapter->hw);
  1835. mdelay(5);
  1836. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1837. e1000_pci_set_mwi(&adapter->hw);
  1838. if (netif_running(netdev)) {
  1839. /* No need to loop, because 82542 supports only 1 queue */
  1840. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1841. e1000_configure_rx(adapter);
  1842. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1843. }
  1844. }
  1845. /**
  1846. * e1000_set_mac - Change the Ethernet Address of the NIC
  1847. * @netdev: network interface device structure
  1848. * @p: pointer to an address structure
  1849. *
  1850. * Returns 0 on success, negative on failure
  1851. **/
  1852. static int
  1853. e1000_set_mac(struct net_device *netdev, void *p)
  1854. {
  1855. struct e1000_adapter *adapter = netdev_priv(netdev);
  1856. struct sockaddr *addr = p;
  1857. if (!is_valid_ether_addr(addr->sa_data))
  1858. return -EADDRNOTAVAIL;
  1859. /* 82542 2.0 needs to be in reset to write receive address registers */
  1860. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1861. e1000_enter_82542_rst(adapter);
  1862. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1863. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1864. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1865. /* With 82571 controllers, LAA may be overwritten (with the default)
  1866. * due to controller reset from the other port. */
  1867. if (adapter->hw.mac_type == e1000_82571) {
  1868. /* activate the work around */
  1869. adapter->hw.laa_is_present = 1;
  1870. /* Hold a copy of the LAA in RAR[14] This is done so that
  1871. * between the time RAR[0] gets clobbered and the time it
  1872. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1873. * of the RARs and no incoming packets directed to this port
  1874. * are dropped. Eventaully the LAA will be in RAR[0] and
  1875. * RAR[14] */
  1876. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1877. E1000_RAR_ENTRIES - 1);
  1878. }
  1879. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1880. e1000_leave_82542_rst(adapter);
  1881. return 0;
  1882. }
  1883. /**
  1884. * e1000_set_multi - Multicast and Promiscuous mode set
  1885. * @netdev: network interface device structure
  1886. *
  1887. * The set_multi entry point is called whenever the multicast address
  1888. * list or the network interface flags are updated. This routine is
  1889. * responsible for configuring the hardware for proper multicast,
  1890. * promiscuous mode, and all-multi behavior.
  1891. **/
  1892. static void
  1893. e1000_set_multi(struct net_device *netdev)
  1894. {
  1895. struct e1000_adapter *adapter = netdev_priv(netdev);
  1896. struct e1000_hw *hw = &adapter->hw;
  1897. struct dev_mc_list *mc_ptr;
  1898. uint32_t rctl;
  1899. uint32_t hash_value;
  1900. int i, rar_entries = E1000_RAR_ENTRIES;
  1901. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1902. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1903. E1000_NUM_MTA_REGISTERS;
  1904. if (adapter->hw.mac_type == e1000_ich8lan)
  1905. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1906. /* reserve RAR[14] for LAA over-write work-around */
  1907. if (adapter->hw.mac_type == e1000_82571)
  1908. rar_entries--;
  1909. /* Check for Promiscuous and All Multicast modes */
  1910. rctl = E1000_READ_REG(hw, RCTL);
  1911. if (netdev->flags & IFF_PROMISC) {
  1912. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1913. } else if (netdev->flags & IFF_ALLMULTI) {
  1914. rctl |= E1000_RCTL_MPE;
  1915. rctl &= ~E1000_RCTL_UPE;
  1916. } else {
  1917. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1918. }
  1919. E1000_WRITE_REG(hw, RCTL, rctl);
  1920. /* 82542 2.0 needs to be in reset to write receive address registers */
  1921. if (hw->mac_type == e1000_82542_rev2_0)
  1922. e1000_enter_82542_rst(adapter);
  1923. /* load the first 14 multicast address into the exact filters 1-14
  1924. * RAR 0 is used for the station MAC adddress
  1925. * if there are not 14 addresses, go ahead and clear the filters
  1926. * -- with 82571 controllers only 0-13 entries are filled here
  1927. */
  1928. mc_ptr = netdev->mc_list;
  1929. for (i = 1; i < rar_entries; i++) {
  1930. if (mc_ptr) {
  1931. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1932. mc_ptr = mc_ptr->next;
  1933. } else {
  1934. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1935. E1000_WRITE_FLUSH(hw);
  1936. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1937. E1000_WRITE_FLUSH(hw);
  1938. }
  1939. }
  1940. /* clear the old settings from the multicast hash table */
  1941. for (i = 0; i < mta_reg_count; i++) {
  1942. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1943. E1000_WRITE_FLUSH(hw);
  1944. }
  1945. /* load any remaining addresses into the hash table */
  1946. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1947. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1948. e1000_mta_set(hw, hash_value);
  1949. }
  1950. if (hw->mac_type == e1000_82542_rev2_0)
  1951. e1000_leave_82542_rst(adapter);
  1952. }
  1953. /* Need to wait a few seconds after link up to get diagnostic information from
  1954. * the phy */
  1955. static void
  1956. e1000_update_phy_info(unsigned long data)
  1957. {
  1958. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1959. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1960. }
  1961. /**
  1962. * e1000_82547_tx_fifo_stall - Timer Call-back
  1963. * @data: pointer to adapter cast into an unsigned long
  1964. **/
  1965. static void
  1966. e1000_82547_tx_fifo_stall(unsigned long data)
  1967. {
  1968. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1969. struct net_device *netdev = adapter->netdev;
  1970. uint32_t tctl;
  1971. if (atomic_read(&adapter->tx_fifo_stall)) {
  1972. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1973. E1000_READ_REG(&adapter->hw, TDH)) &&
  1974. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1975. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1976. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1977. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1978. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1979. E1000_WRITE_REG(&adapter->hw, TCTL,
  1980. tctl & ~E1000_TCTL_EN);
  1981. E1000_WRITE_REG(&adapter->hw, TDFT,
  1982. adapter->tx_head_addr);
  1983. E1000_WRITE_REG(&adapter->hw, TDFH,
  1984. adapter->tx_head_addr);
  1985. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1986. adapter->tx_head_addr);
  1987. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1988. adapter->tx_head_addr);
  1989. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1990. E1000_WRITE_FLUSH(&adapter->hw);
  1991. adapter->tx_fifo_head = 0;
  1992. atomic_set(&adapter->tx_fifo_stall, 0);
  1993. netif_wake_queue(netdev);
  1994. } else {
  1995. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1996. }
  1997. }
  1998. }
  1999. /**
  2000. * e1000_watchdog - Timer Call-back
  2001. * @data: pointer to adapter cast into an unsigned long
  2002. **/
  2003. static void
  2004. e1000_watchdog(unsigned long data)
  2005. {
  2006. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2007. struct net_device *netdev = adapter->netdev;
  2008. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2009. uint32_t link, tctl;
  2010. int32_t ret_val;
  2011. ret_val = e1000_check_for_link(&adapter->hw);
  2012. if ((ret_val == E1000_ERR_PHY) &&
  2013. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  2014. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  2015. /* See e1000_kumeran_lock_loss_workaround() */
  2016. DPRINTK(LINK, INFO,
  2017. "Gigabit has been disabled, downgrading speed\n");
  2018. }
  2019. if (adapter->hw.mac_type == e1000_82573) {
  2020. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2021. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2022. e1000_update_mng_vlan(adapter);
  2023. }
  2024. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2025. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2026. link = !adapter->hw.serdes_link_down;
  2027. else
  2028. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2029. if (link) {
  2030. if (!netif_carrier_ok(netdev)) {
  2031. boolean_t txb2b = 1;
  2032. e1000_get_speed_and_duplex(&adapter->hw,
  2033. &adapter->link_speed,
  2034. &adapter->link_duplex);
  2035. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2036. adapter->link_speed,
  2037. adapter->link_duplex == FULL_DUPLEX ?
  2038. "Full Duplex" : "Half Duplex");
  2039. /* tweak tx_queue_len according to speed/duplex
  2040. * and adjust the timeout factor */
  2041. netdev->tx_queue_len = adapter->tx_queue_len;
  2042. adapter->tx_timeout_factor = 1;
  2043. switch (adapter->link_speed) {
  2044. case SPEED_10:
  2045. txb2b = 0;
  2046. netdev->tx_queue_len = 10;
  2047. adapter->tx_timeout_factor = 8;
  2048. break;
  2049. case SPEED_100:
  2050. txb2b = 0;
  2051. netdev->tx_queue_len = 100;
  2052. /* maybe add some timeout factor ? */
  2053. break;
  2054. }
  2055. if ((adapter->hw.mac_type == e1000_82571 ||
  2056. adapter->hw.mac_type == e1000_82572) &&
  2057. txb2b == 0) {
  2058. #define SPEED_MODE_BIT (1 << 21)
  2059. uint32_t tarc0;
  2060. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2061. tarc0 &= ~SPEED_MODE_BIT;
  2062. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2063. }
  2064. #ifdef NETIF_F_TSO
  2065. /* disable TSO for pcie and 10/100 speeds, to avoid
  2066. * some hardware issues */
  2067. if (!adapter->tso_force &&
  2068. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2069. switch (adapter->link_speed) {
  2070. case SPEED_10:
  2071. case SPEED_100:
  2072. DPRINTK(PROBE,INFO,
  2073. "10/100 speed: disabling TSO\n");
  2074. netdev->features &= ~NETIF_F_TSO;
  2075. break;
  2076. case SPEED_1000:
  2077. netdev->features |= NETIF_F_TSO;
  2078. break;
  2079. default:
  2080. /* oops */
  2081. break;
  2082. }
  2083. }
  2084. #endif
  2085. /* enable transmits in the hardware, need to do this
  2086. * after setting TARC0 */
  2087. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2088. tctl |= E1000_TCTL_EN;
  2089. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2090. netif_carrier_on(netdev);
  2091. netif_wake_queue(netdev);
  2092. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2093. adapter->smartspeed = 0;
  2094. }
  2095. } else {
  2096. if (netif_carrier_ok(netdev)) {
  2097. adapter->link_speed = 0;
  2098. adapter->link_duplex = 0;
  2099. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2100. netif_carrier_off(netdev);
  2101. netif_stop_queue(netdev);
  2102. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2103. /* 80003ES2LAN workaround--
  2104. * For packet buffer work-around on link down event;
  2105. * disable receives in the ISR and
  2106. * reset device here in the watchdog
  2107. */
  2108. if (adapter->hw.mac_type == e1000_80003es2lan)
  2109. /* reset device */
  2110. schedule_work(&adapter->reset_task);
  2111. }
  2112. e1000_smartspeed(adapter);
  2113. }
  2114. e1000_update_stats(adapter);
  2115. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2116. adapter->tpt_old = adapter->stats.tpt;
  2117. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2118. adapter->colc_old = adapter->stats.colc;
  2119. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2120. adapter->gorcl_old = adapter->stats.gorcl;
  2121. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2122. adapter->gotcl_old = adapter->stats.gotcl;
  2123. e1000_update_adaptive(&adapter->hw);
  2124. if (!netif_carrier_ok(netdev)) {
  2125. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2126. /* We've lost link, so the controller stops DMA,
  2127. * but we've got queued Tx work that's never going
  2128. * to get done, so reset controller to flush Tx.
  2129. * (Do the reset outside of interrupt context). */
  2130. adapter->tx_timeout_count++;
  2131. schedule_work(&adapter->reset_task);
  2132. }
  2133. }
  2134. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2135. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2136. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2137. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2138. * else is between 2000-8000. */
  2139. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2140. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2141. adapter->gotcl - adapter->gorcl :
  2142. adapter->gorcl - adapter->gotcl) / 10000;
  2143. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2144. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2145. }
  2146. /* Cause software interrupt to ensure rx ring is cleaned */
  2147. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2148. /* Force detection of hung controller every watchdog period */
  2149. adapter->detect_tx_hung = TRUE;
  2150. /* With 82571 controllers, LAA may be overwritten due to controller
  2151. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2152. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2153. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2154. /* Reset the timer */
  2155. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2156. }
  2157. #define E1000_TX_FLAGS_CSUM 0x00000001
  2158. #define E1000_TX_FLAGS_VLAN 0x00000002
  2159. #define E1000_TX_FLAGS_TSO 0x00000004
  2160. #define E1000_TX_FLAGS_IPV4 0x00000008
  2161. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2162. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2163. static int
  2164. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2165. struct sk_buff *skb)
  2166. {
  2167. #ifdef NETIF_F_TSO
  2168. struct e1000_context_desc *context_desc;
  2169. struct e1000_buffer *buffer_info;
  2170. unsigned int i;
  2171. uint32_t cmd_length = 0;
  2172. uint16_t ipcse = 0, tucse, mss;
  2173. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2174. int err;
  2175. if (skb_is_gso(skb)) {
  2176. if (skb_header_cloned(skb)) {
  2177. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2178. if (err)
  2179. return err;
  2180. }
  2181. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2182. mss = skb_shinfo(skb)->gso_size;
  2183. if (skb->protocol == htons(ETH_P_IP)) {
  2184. skb->nh.iph->tot_len = 0;
  2185. skb->nh.iph->check = 0;
  2186. skb->h.th->check =
  2187. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2188. skb->nh.iph->daddr,
  2189. 0,
  2190. IPPROTO_TCP,
  2191. 0);
  2192. cmd_length = E1000_TXD_CMD_IP;
  2193. ipcse = skb->h.raw - skb->data - 1;
  2194. #ifdef NETIF_F_TSO_IPV6
  2195. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2196. skb->nh.ipv6h->payload_len = 0;
  2197. skb->h.th->check =
  2198. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2199. &skb->nh.ipv6h->daddr,
  2200. 0,
  2201. IPPROTO_TCP,
  2202. 0);
  2203. ipcse = 0;
  2204. #endif
  2205. }
  2206. ipcss = skb->nh.raw - skb->data;
  2207. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2208. tucss = skb->h.raw - skb->data;
  2209. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2210. tucse = 0;
  2211. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2212. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2213. i = tx_ring->next_to_use;
  2214. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2215. buffer_info = &tx_ring->buffer_info[i];
  2216. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2217. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2218. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2219. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2220. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2221. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2222. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2223. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2224. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2225. buffer_info->time_stamp = jiffies;
  2226. if (++i == tx_ring->count) i = 0;
  2227. tx_ring->next_to_use = i;
  2228. return TRUE;
  2229. }
  2230. #endif
  2231. return FALSE;
  2232. }
  2233. static boolean_t
  2234. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2235. struct sk_buff *skb)
  2236. {
  2237. struct e1000_context_desc *context_desc;
  2238. struct e1000_buffer *buffer_info;
  2239. unsigned int i;
  2240. uint8_t css;
  2241. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2242. css = skb->h.raw - skb->data;
  2243. i = tx_ring->next_to_use;
  2244. buffer_info = &tx_ring->buffer_info[i];
  2245. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2246. context_desc->upper_setup.tcp_fields.tucss = css;
  2247. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2248. context_desc->upper_setup.tcp_fields.tucse = 0;
  2249. context_desc->tcp_seg_setup.data = 0;
  2250. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2251. buffer_info->time_stamp = jiffies;
  2252. if (unlikely(++i == tx_ring->count)) i = 0;
  2253. tx_ring->next_to_use = i;
  2254. return TRUE;
  2255. }
  2256. return FALSE;
  2257. }
  2258. #define E1000_MAX_TXD_PWR 12
  2259. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2260. static int
  2261. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2262. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2263. unsigned int nr_frags, unsigned int mss)
  2264. {
  2265. struct e1000_buffer *buffer_info;
  2266. unsigned int len = skb->len;
  2267. unsigned int offset = 0, size, count = 0, i;
  2268. unsigned int f;
  2269. len -= skb->data_len;
  2270. i = tx_ring->next_to_use;
  2271. while (len) {
  2272. buffer_info = &tx_ring->buffer_info[i];
  2273. size = min(len, max_per_txd);
  2274. #ifdef NETIF_F_TSO
  2275. /* Workaround for Controller erratum --
  2276. * descriptor for non-tso packet in a linear SKB that follows a
  2277. * tso gets written back prematurely before the data is fully
  2278. * DMA'd to the controller */
  2279. if (!skb->data_len && tx_ring->last_tx_tso &&
  2280. !skb_is_gso(skb)) {
  2281. tx_ring->last_tx_tso = 0;
  2282. size -= 4;
  2283. }
  2284. /* Workaround for premature desc write-backs
  2285. * in TSO mode. Append 4-byte sentinel desc */
  2286. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2287. size -= 4;
  2288. #endif
  2289. /* work-around for errata 10 and it applies
  2290. * to all controllers in PCI-X mode
  2291. * The fix is to make sure that the first descriptor of a
  2292. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2293. */
  2294. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2295. (size > 2015) && count == 0))
  2296. size = 2015;
  2297. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2298. * terminating buffers within evenly-aligned dwords. */
  2299. if (unlikely(adapter->pcix_82544 &&
  2300. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2301. size > 4))
  2302. size -= 4;
  2303. buffer_info->length = size;
  2304. buffer_info->dma =
  2305. pci_map_single(adapter->pdev,
  2306. skb->data + offset,
  2307. size,
  2308. PCI_DMA_TODEVICE);
  2309. buffer_info->time_stamp = jiffies;
  2310. len -= size;
  2311. offset += size;
  2312. count++;
  2313. if (unlikely(++i == tx_ring->count)) i = 0;
  2314. }
  2315. for (f = 0; f < nr_frags; f++) {
  2316. struct skb_frag_struct *frag;
  2317. frag = &skb_shinfo(skb)->frags[f];
  2318. len = frag->size;
  2319. offset = frag->page_offset;
  2320. while (len) {
  2321. buffer_info = &tx_ring->buffer_info[i];
  2322. size = min(len, max_per_txd);
  2323. #ifdef NETIF_F_TSO
  2324. /* Workaround for premature desc write-backs
  2325. * in TSO mode. Append 4-byte sentinel desc */
  2326. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2327. size -= 4;
  2328. #endif
  2329. /* Workaround for potential 82544 hang in PCI-X.
  2330. * Avoid terminating buffers within evenly-aligned
  2331. * dwords. */
  2332. if (unlikely(adapter->pcix_82544 &&
  2333. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2334. size > 4))
  2335. size -= 4;
  2336. buffer_info->length = size;
  2337. buffer_info->dma =
  2338. pci_map_page(adapter->pdev,
  2339. frag->page,
  2340. offset,
  2341. size,
  2342. PCI_DMA_TODEVICE);
  2343. buffer_info->time_stamp = jiffies;
  2344. len -= size;
  2345. offset += size;
  2346. count++;
  2347. if (unlikely(++i == tx_ring->count)) i = 0;
  2348. }
  2349. }
  2350. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2351. tx_ring->buffer_info[i].skb = skb;
  2352. tx_ring->buffer_info[first].next_to_watch = i;
  2353. return count;
  2354. }
  2355. static void
  2356. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2357. int tx_flags, int count)
  2358. {
  2359. struct e1000_tx_desc *tx_desc = NULL;
  2360. struct e1000_buffer *buffer_info;
  2361. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2362. unsigned int i;
  2363. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2364. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2365. E1000_TXD_CMD_TSE;
  2366. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2367. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2368. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2369. }
  2370. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2371. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2372. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2373. }
  2374. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2375. txd_lower |= E1000_TXD_CMD_VLE;
  2376. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2377. }
  2378. i = tx_ring->next_to_use;
  2379. while (count--) {
  2380. buffer_info = &tx_ring->buffer_info[i];
  2381. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2382. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2383. tx_desc->lower.data =
  2384. cpu_to_le32(txd_lower | buffer_info->length);
  2385. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2386. if (unlikely(++i == tx_ring->count)) i = 0;
  2387. }
  2388. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2389. /* Force memory writes to complete before letting h/w
  2390. * know there are new descriptors to fetch. (Only
  2391. * applicable for weak-ordered memory model archs,
  2392. * such as IA-64). */
  2393. wmb();
  2394. tx_ring->next_to_use = i;
  2395. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2396. }
  2397. /**
  2398. * 82547 workaround to avoid controller hang in half-duplex environment.
  2399. * The workaround is to avoid queuing a large packet that would span
  2400. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2401. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2402. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2403. * to the beginning of the Tx FIFO.
  2404. **/
  2405. #define E1000_FIFO_HDR 0x10
  2406. #define E1000_82547_PAD_LEN 0x3E0
  2407. static int
  2408. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2409. {
  2410. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2411. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2412. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2413. if (adapter->link_duplex != HALF_DUPLEX)
  2414. goto no_fifo_stall_required;
  2415. if (atomic_read(&adapter->tx_fifo_stall))
  2416. return 1;
  2417. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2418. atomic_set(&adapter->tx_fifo_stall, 1);
  2419. return 1;
  2420. }
  2421. no_fifo_stall_required:
  2422. adapter->tx_fifo_head += skb_fifo_len;
  2423. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2424. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2425. return 0;
  2426. }
  2427. #define MINIMUM_DHCP_PACKET_SIZE 282
  2428. static int
  2429. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2430. {
  2431. struct e1000_hw *hw = &adapter->hw;
  2432. uint16_t length, offset;
  2433. if (vlan_tx_tag_present(skb)) {
  2434. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2435. ( adapter->hw.mng_cookie.status &
  2436. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2437. return 0;
  2438. }
  2439. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2440. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2441. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2442. const struct iphdr *ip =
  2443. (struct iphdr *)((uint8_t *)skb->data+14);
  2444. if (IPPROTO_UDP == ip->protocol) {
  2445. struct udphdr *udp =
  2446. (struct udphdr *)((uint8_t *)ip +
  2447. (ip->ihl << 2));
  2448. if (ntohs(udp->dest) == 67) {
  2449. offset = (uint8_t *)udp + 8 - skb->data;
  2450. length = skb->len - offset;
  2451. return e1000_mng_write_dhcp_info(hw,
  2452. (uint8_t *)udp + 8,
  2453. length);
  2454. }
  2455. }
  2456. }
  2457. }
  2458. return 0;
  2459. }
  2460. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2461. static int
  2462. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2463. {
  2464. struct e1000_adapter *adapter = netdev_priv(netdev);
  2465. struct e1000_tx_ring *tx_ring;
  2466. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2467. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2468. unsigned int tx_flags = 0;
  2469. unsigned int len = skb->len;
  2470. unsigned long flags;
  2471. unsigned int nr_frags = 0;
  2472. unsigned int mss = 0;
  2473. int count = 0;
  2474. int tso;
  2475. unsigned int f;
  2476. len -= skb->data_len;
  2477. tx_ring = adapter->tx_ring;
  2478. if (unlikely(skb->len <= 0)) {
  2479. dev_kfree_skb_any(skb);
  2480. return NETDEV_TX_OK;
  2481. }
  2482. #ifdef NETIF_F_TSO
  2483. mss = skb_shinfo(skb)->gso_size;
  2484. /* The controller does a simple calculation to
  2485. * make sure there is enough room in the FIFO before
  2486. * initiating the DMA for each buffer. The calc is:
  2487. * 4 = ceil(buffer len/mss). To make sure we don't
  2488. * overrun the FIFO, adjust the max buffer len if mss
  2489. * drops. */
  2490. if (mss) {
  2491. uint8_t hdr_len;
  2492. max_per_txd = min(mss << 2, max_per_txd);
  2493. max_txd_pwr = fls(max_per_txd) - 1;
  2494. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2495. * points to just header, pull a few bytes of payload from
  2496. * frags into skb->data */
  2497. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2498. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2499. switch (adapter->hw.mac_type) {
  2500. unsigned int pull_size;
  2501. case e1000_82571:
  2502. case e1000_82572:
  2503. case e1000_82573:
  2504. case e1000_ich8lan:
  2505. pull_size = min((unsigned int)4, skb->data_len);
  2506. if (!__pskb_pull_tail(skb, pull_size)) {
  2507. DPRINTK(DRV, ERR,
  2508. "__pskb_pull_tail failed.\n");
  2509. dev_kfree_skb_any(skb);
  2510. return NETDEV_TX_OK;
  2511. }
  2512. len = skb->len - skb->data_len;
  2513. break;
  2514. default:
  2515. /* do nothing */
  2516. break;
  2517. }
  2518. }
  2519. }
  2520. /* reserve a descriptor for the offload context */
  2521. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2522. count++;
  2523. count++;
  2524. #else
  2525. if (skb->ip_summed == CHECKSUM_HW)
  2526. count++;
  2527. #endif
  2528. #ifdef NETIF_F_TSO
  2529. /* Controller Erratum workaround */
  2530. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2531. count++;
  2532. #endif
  2533. count += TXD_USE_COUNT(len, max_txd_pwr);
  2534. if (adapter->pcix_82544)
  2535. count++;
  2536. /* work-around for errata 10 and it applies to all controllers
  2537. * in PCI-X mode, so add one more descriptor to the count
  2538. */
  2539. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2540. (len > 2015)))
  2541. count++;
  2542. nr_frags = skb_shinfo(skb)->nr_frags;
  2543. for (f = 0; f < nr_frags; f++)
  2544. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2545. max_txd_pwr);
  2546. if (adapter->pcix_82544)
  2547. count += nr_frags;
  2548. if (adapter->hw.tx_pkt_filtering &&
  2549. (adapter->hw.mac_type == e1000_82573))
  2550. e1000_transfer_dhcp_info(adapter, skb);
  2551. local_irq_save(flags);
  2552. if (!spin_trylock(&tx_ring->tx_lock)) {
  2553. /* Collision - tell upper layer to requeue */
  2554. local_irq_restore(flags);
  2555. return NETDEV_TX_LOCKED;
  2556. }
  2557. /* need: count + 2 desc gap to keep tail from touching
  2558. * head, otherwise try next time */
  2559. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2560. netif_stop_queue(netdev);
  2561. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2562. return NETDEV_TX_BUSY;
  2563. }
  2564. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2565. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2566. netif_stop_queue(netdev);
  2567. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2568. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2569. return NETDEV_TX_BUSY;
  2570. }
  2571. }
  2572. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2573. tx_flags |= E1000_TX_FLAGS_VLAN;
  2574. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2575. }
  2576. first = tx_ring->next_to_use;
  2577. tso = e1000_tso(adapter, tx_ring, skb);
  2578. if (tso < 0) {
  2579. dev_kfree_skb_any(skb);
  2580. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2581. return NETDEV_TX_OK;
  2582. }
  2583. if (likely(tso)) {
  2584. tx_ring->last_tx_tso = 1;
  2585. tx_flags |= E1000_TX_FLAGS_TSO;
  2586. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2587. tx_flags |= E1000_TX_FLAGS_CSUM;
  2588. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2589. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2590. * no longer assume, we must. */
  2591. if (likely(skb->protocol == htons(ETH_P_IP)))
  2592. tx_flags |= E1000_TX_FLAGS_IPV4;
  2593. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2594. e1000_tx_map(adapter, tx_ring, skb, first,
  2595. max_per_txd, nr_frags, mss));
  2596. netdev->trans_start = jiffies;
  2597. /* Make sure there is space in the ring for the next send. */
  2598. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2599. netif_stop_queue(netdev);
  2600. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2601. return NETDEV_TX_OK;
  2602. }
  2603. /**
  2604. * e1000_tx_timeout - Respond to a Tx Hang
  2605. * @netdev: network interface device structure
  2606. **/
  2607. static void
  2608. e1000_tx_timeout(struct net_device *netdev)
  2609. {
  2610. struct e1000_adapter *adapter = netdev_priv(netdev);
  2611. /* Do the reset outside of interrupt context */
  2612. adapter->tx_timeout_count++;
  2613. schedule_work(&adapter->reset_task);
  2614. }
  2615. static void
  2616. e1000_reset_task(struct net_device *netdev)
  2617. {
  2618. struct e1000_adapter *adapter = netdev_priv(netdev);
  2619. e1000_reinit_locked(adapter);
  2620. }
  2621. /**
  2622. * e1000_get_stats - Get System Network Statistics
  2623. * @netdev: network interface device structure
  2624. *
  2625. * Returns the address of the device statistics structure.
  2626. * The statistics are actually updated from the timer callback.
  2627. **/
  2628. static struct net_device_stats *
  2629. e1000_get_stats(struct net_device *netdev)
  2630. {
  2631. struct e1000_adapter *adapter = netdev_priv(netdev);
  2632. /* only return the current stats */
  2633. return &adapter->net_stats;
  2634. }
  2635. /**
  2636. * e1000_change_mtu - Change the Maximum Transfer Unit
  2637. * @netdev: network interface device structure
  2638. * @new_mtu: new value for maximum frame size
  2639. *
  2640. * Returns 0 on success, negative on failure
  2641. **/
  2642. static int
  2643. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2644. {
  2645. struct e1000_adapter *adapter = netdev_priv(netdev);
  2646. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2647. uint16_t eeprom_data = 0;
  2648. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2649. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2650. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2651. return -EINVAL;
  2652. }
  2653. /* Adapter-specific max frame size limits. */
  2654. switch (adapter->hw.mac_type) {
  2655. case e1000_undefined ... e1000_82542_rev2_1:
  2656. case e1000_ich8lan:
  2657. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2658. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2659. return -EINVAL;
  2660. }
  2661. break;
  2662. case e1000_82573:
  2663. /* only enable jumbo frames if ASPM is disabled completely
  2664. * this means both bits must be zero in 0x1A bits 3:2 */
  2665. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2666. &eeprom_data);
  2667. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2668. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2669. DPRINTK(PROBE, ERR,
  2670. "Jumbo Frames not supported.\n");
  2671. return -EINVAL;
  2672. }
  2673. break;
  2674. }
  2675. /* fall through to get support */
  2676. case e1000_82571:
  2677. case e1000_82572:
  2678. case e1000_80003es2lan:
  2679. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2680. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2681. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2682. return -EINVAL;
  2683. }
  2684. break;
  2685. default:
  2686. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2687. break;
  2688. }
  2689. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2690. * means we reserve 2 more, this pushes us to allocate from the next
  2691. * larger slab size
  2692. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2693. if (max_frame <= E1000_RXBUFFER_256)
  2694. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2695. else if (max_frame <= E1000_RXBUFFER_512)
  2696. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2697. else if (max_frame <= E1000_RXBUFFER_1024)
  2698. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2699. else if (max_frame <= E1000_RXBUFFER_2048)
  2700. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2701. else if (max_frame <= E1000_RXBUFFER_4096)
  2702. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2703. else if (max_frame <= E1000_RXBUFFER_8192)
  2704. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2705. else if (max_frame <= E1000_RXBUFFER_16384)
  2706. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2707. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2708. if (!adapter->hw.tbi_compatibility_on &&
  2709. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2710. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2711. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2712. netdev->mtu = new_mtu;
  2713. if (netif_running(netdev))
  2714. e1000_reinit_locked(adapter);
  2715. adapter->hw.max_frame_size = max_frame;
  2716. return 0;
  2717. }
  2718. /**
  2719. * e1000_update_stats - Update the board statistics counters
  2720. * @adapter: board private structure
  2721. **/
  2722. void
  2723. e1000_update_stats(struct e1000_adapter *adapter)
  2724. {
  2725. struct e1000_hw *hw = &adapter->hw;
  2726. struct pci_dev *pdev = adapter->pdev;
  2727. unsigned long flags;
  2728. uint16_t phy_tmp;
  2729. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2730. /*
  2731. * Prevent stats update while adapter is being reset, or if the pci
  2732. * connection is down.
  2733. */
  2734. if (adapter->link_speed == 0)
  2735. return;
  2736. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2737. return;
  2738. spin_lock_irqsave(&adapter->stats_lock, flags);
  2739. /* these counters are modified from e1000_adjust_tbi_stats,
  2740. * called from the interrupt context, so they must only
  2741. * be written while holding adapter->stats_lock
  2742. */
  2743. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2744. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2745. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2746. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2747. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2748. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2749. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2750. if (adapter->hw.mac_type != e1000_ich8lan) {
  2751. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2752. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2753. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2754. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2755. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2756. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2757. }
  2758. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2759. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2760. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2761. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2762. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2763. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2764. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2765. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2766. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2767. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2768. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2769. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2770. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2771. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2772. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2773. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2774. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2775. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2776. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2777. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2778. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2779. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2780. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2781. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2782. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2783. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2784. if (adapter->hw.mac_type != e1000_ich8lan) {
  2785. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2786. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2787. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2788. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2789. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2790. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2791. }
  2792. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2793. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2794. /* used for adaptive IFS */
  2795. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2796. adapter->stats.tpt += hw->tx_packet_delta;
  2797. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2798. adapter->stats.colc += hw->collision_delta;
  2799. if (hw->mac_type >= e1000_82543) {
  2800. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2801. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2802. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2803. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2804. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2805. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2806. }
  2807. if (hw->mac_type > e1000_82547_rev_2) {
  2808. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2809. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2810. if (adapter->hw.mac_type != e1000_ich8lan) {
  2811. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2812. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2813. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2814. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2815. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2816. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2817. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2818. }
  2819. }
  2820. /* Fill out the OS statistics structure */
  2821. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2822. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2823. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2824. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2825. adapter->net_stats.multicast = adapter->stats.mprc;
  2826. adapter->net_stats.collisions = adapter->stats.colc;
  2827. /* Rx Errors */
  2828. /* RLEC on some newer hardware can be incorrect so build
  2829. * our own version based on RUC and ROC */
  2830. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2831. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2832. adapter->stats.ruc + adapter->stats.roc +
  2833. adapter->stats.cexterr;
  2834. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2835. adapter->stats.roc;
  2836. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2837. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2838. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2839. /* Tx Errors */
  2840. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2841. adapter->stats.latecol;
  2842. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2843. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2844. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2845. /* Tx Dropped needs to be maintained elsewhere */
  2846. /* Phy Stats */
  2847. if (hw->media_type == e1000_media_type_copper) {
  2848. if ((adapter->link_speed == SPEED_1000) &&
  2849. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2850. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2851. adapter->phy_stats.idle_errors += phy_tmp;
  2852. }
  2853. if ((hw->mac_type <= e1000_82546) &&
  2854. (hw->phy_type == e1000_phy_m88) &&
  2855. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2856. adapter->phy_stats.receive_errors += phy_tmp;
  2857. }
  2858. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2859. }
  2860. /**
  2861. * e1000_intr - Interrupt Handler
  2862. * @irq: interrupt number
  2863. * @data: pointer to a network interface device structure
  2864. * @pt_regs: CPU registers structure
  2865. **/
  2866. static irqreturn_t
  2867. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2868. {
  2869. struct net_device *netdev = data;
  2870. struct e1000_adapter *adapter = netdev_priv(netdev);
  2871. struct e1000_hw *hw = &adapter->hw;
  2872. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2873. #ifndef CONFIG_E1000_NAPI
  2874. int i;
  2875. #else
  2876. /* Interrupt Auto-Mask...upon reading ICR,
  2877. * interrupts are masked. No need for the
  2878. * IMC write, but it does mean we should
  2879. * account for it ASAP. */
  2880. if (likely(hw->mac_type >= e1000_82571))
  2881. atomic_inc(&adapter->irq_sem);
  2882. #endif
  2883. if (unlikely(!icr)) {
  2884. #ifdef CONFIG_E1000_NAPI
  2885. if (hw->mac_type >= e1000_82571)
  2886. e1000_irq_enable(adapter);
  2887. #endif
  2888. return IRQ_NONE; /* Not our interrupt */
  2889. }
  2890. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2891. hw->get_link_status = 1;
  2892. /* 80003ES2LAN workaround--
  2893. * For packet buffer work-around on link down event;
  2894. * disable receives here in the ISR and
  2895. * reset adapter in watchdog
  2896. */
  2897. if (netif_carrier_ok(netdev) &&
  2898. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2899. /* disable receives */
  2900. rctl = E1000_READ_REG(hw, RCTL);
  2901. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2902. }
  2903. mod_timer(&adapter->watchdog_timer, jiffies);
  2904. }
  2905. #ifdef CONFIG_E1000_NAPI
  2906. if (unlikely(hw->mac_type < e1000_82571)) {
  2907. atomic_inc(&adapter->irq_sem);
  2908. E1000_WRITE_REG(hw, IMC, ~0);
  2909. E1000_WRITE_FLUSH(hw);
  2910. }
  2911. if (likely(netif_rx_schedule_prep(netdev)))
  2912. __netif_rx_schedule(netdev);
  2913. else
  2914. e1000_irq_enable(adapter);
  2915. #else
  2916. /* Writing IMC and IMS is needed for 82547.
  2917. * Due to Hub Link bus being occupied, an interrupt
  2918. * de-assertion message is not able to be sent.
  2919. * When an interrupt assertion message is generated later,
  2920. * two messages are re-ordered and sent out.
  2921. * That causes APIC to think 82547 is in de-assertion
  2922. * state, while 82547 is in assertion state, resulting
  2923. * in dead lock. Writing IMC forces 82547 into
  2924. * de-assertion state.
  2925. */
  2926. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2927. atomic_inc(&adapter->irq_sem);
  2928. E1000_WRITE_REG(hw, IMC, ~0);
  2929. }
  2930. for (i = 0; i < E1000_MAX_INTR; i++)
  2931. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2932. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2933. break;
  2934. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2935. e1000_irq_enable(adapter);
  2936. #endif
  2937. return IRQ_HANDLED;
  2938. }
  2939. #ifdef CONFIG_E1000_NAPI
  2940. /**
  2941. * e1000_clean - NAPI Rx polling callback
  2942. * @adapter: board private structure
  2943. **/
  2944. static int
  2945. e1000_clean(struct net_device *poll_dev, int *budget)
  2946. {
  2947. struct e1000_adapter *adapter;
  2948. int work_to_do = min(*budget, poll_dev->quota);
  2949. int tx_cleaned = 0, work_done = 0;
  2950. /* Must NOT use netdev_priv macro here. */
  2951. adapter = poll_dev->priv;
  2952. /* Keep link state information with original netdev */
  2953. if (!netif_carrier_ok(poll_dev))
  2954. goto quit_polling;
  2955. /* e1000_clean is called per-cpu. This lock protects
  2956. * tx_ring[0] from being cleaned by multiple cpus
  2957. * simultaneously. A failure obtaining the lock means
  2958. * tx_ring[0] is currently being cleaned anyway. */
  2959. if (spin_trylock(&adapter->tx_queue_lock)) {
  2960. tx_cleaned = e1000_clean_tx_irq(adapter,
  2961. &adapter->tx_ring[0]);
  2962. spin_unlock(&adapter->tx_queue_lock);
  2963. }
  2964. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  2965. &work_done, work_to_do);
  2966. *budget -= work_done;
  2967. poll_dev->quota -= work_done;
  2968. /* If no Tx and not enough Rx work done, exit the polling mode */
  2969. if ((!tx_cleaned && (work_done == 0)) ||
  2970. !netif_running(poll_dev)) {
  2971. quit_polling:
  2972. netif_rx_complete(poll_dev);
  2973. e1000_irq_enable(adapter);
  2974. return 0;
  2975. }
  2976. return 1;
  2977. }
  2978. #endif
  2979. /**
  2980. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2981. * @adapter: board private structure
  2982. **/
  2983. static boolean_t
  2984. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2985. struct e1000_tx_ring *tx_ring)
  2986. {
  2987. struct net_device *netdev = adapter->netdev;
  2988. struct e1000_tx_desc *tx_desc, *eop_desc;
  2989. struct e1000_buffer *buffer_info;
  2990. unsigned int i, eop;
  2991. #ifdef CONFIG_E1000_NAPI
  2992. unsigned int count = 0;
  2993. #endif
  2994. boolean_t cleaned = FALSE;
  2995. i = tx_ring->next_to_clean;
  2996. eop = tx_ring->buffer_info[i].next_to_watch;
  2997. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2998. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2999. for (cleaned = FALSE; !cleaned; ) {
  3000. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3001. buffer_info = &tx_ring->buffer_info[i];
  3002. cleaned = (i == eop);
  3003. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3004. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  3005. if (unlikely(++i == tx_ring->count)) i = 0;
  3006. }
  3007. eop = tx_ring->buffer_info[i].next_to_watch;
  3008. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3009. #ifdef CONFIG_E1000_NAPI
  3010. #define E1000_TX_WEIGHT 64
  3011. /* weight of a sort for tx, to avoid endless transmit cleanup */
  3012. if (count++ == E1000_TX_WEIGHT) break;
  3013. #endif
  3014. }
  3015. tx_ring->next_to_clean = i;
  3016. #define TX_WAKE_THRESHOLD 32
  3017. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  3018. netif_carrier_ok(netdev))) {
  3019. spin_lock(&tx_ring->tx_lock);
  3020. if (netif_queue_stopped(netdev) &&
  3021. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  3022. netif_wake_queue(netdev);
  3023. spin_unlock(&tx_ring->tx_lock);
  3024. }
  3025. if (adapter->detect_tx_hung) {
  3026. /* Detect a transmit hang in hardware, this serializes the
  3027. * check with the clearing of time_stamp and movement of i */
  3028. adapter->detect_tx_hung = FALSE;
  3029. if (tx_ring->buffer_info[eop].dma &&
  3030. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3031. (adapter->tx_timeout_factor * HZ))
  3032. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3033. E1000_STATUS_TXOFF)) {
  3034. /* detected Tx unit hang */
  3035. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3036. " Tx Queue <%lu>\n"
  3037. " TDH <%x>\n"
  3038. " TDT <%x>\n"
  3039. " next_to_use <%x>\n"
  3040. " next_to_clean <%x>\n"
  3041. "buffer_info[next_to_clean]\n"
  3042. " time_stamp <%lx>\n"
  3043. " next_to_watch <%x>\n"
  3044. " jiffies <%lx>\n"
  3045. " next_to_watch.status <%x>\n",
  3046. (unsigned long)((tx_ring - adapter->tx_ring) /
  3047. sizeof(struct e1000_tx_ring)),
  3048. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3049. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3050. tx_ring->next_to_use,
  3051. tx_ring->next_to_clean,
  3052. tx_ring->buffer_info[eop].time_stamp,
  3053. eop,
  3054. jiffies,
  3055. eop_desc->upper.fields.status);
  3056. netif_stop_queue(netdev);
  3057. }
  3058. }
  3059. return cleaned;
  3060. }
  3061. /**
  3062. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3063. * @adapter: board private structure
  3064. * @status_err: receive descriptor status and error fields
  3065. * @csum: receive descriptor csum field
  3066. * @sk_buff: socket buffer with received data
  3067. **/
  3068. static void
  3069. e1000_rx_checksum(struct e1000_adapter *adapter,
  3070. uint32_t status_err, uint32_t csum,
  3071. struct sk_buff *skb)
  3072. {
  3073. uint16_t status = (uint16_t)status_err;
  3074. uint8_t errors = (uint8_t)(status_err >> 24);
  3075. skb->ip_summed = CHECKSUM_NONE;
  3076. /* 82543 or newer only */
  3077. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3078. /* Ignore Checksum bit is set */
  3079. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3080. /* TCP/UDP checksum error bit is set */
  3081. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3082. /* let the stack verify checksum errors */
  3083. adapter->hw_csum_err++;
  3084. return;
  3085. }
  3086. /* TCP/UDP Checksum has not been calculated */
  3087. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3088. if (!(status & E1000_RXD_STAT_TCPCS))
  3089. return;
  3090. } else {
  3091. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3092. return;
  3093. }
  3094. /* It must be a TCP or UDP packet with a valid checksum */
  3095. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3096. /* TCP checksum is good */
  3097. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3098. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3099. /* IP fragment with UDP payload */
  3100. /* Hardware complements the payload checksum, so we undo it
  3101. * and then put the value in host order for further stack use.
  3102. */
  3103. csum = ntohl(csum ^ 0xFFFF);
  3104. skb->csum = csum;
  3105. skb->ip_summed = CHECKSUM_HW;
  3106. }
  3107. adapter->hw_csum_good++;
  3108. }
  3109. /**
  3110. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3111. * @adapter: board private structure
  3112. **/
  3113. static boolean_t
  3114. #ifdef CONFIG_E1000_NAPI
  3115. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3116. struct e1000_rx_ring *rx_ring,
  3117. int *work_done, int work_to_do)
  3118. #else
  3119. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3120. struct e1000_rx_ring *rx_ring)
  3121. #endif
  3122. {
  3123. struct net_device *netdev = adapter->netdev;
  3124. struct pci_dev *pdev = adapter->pdev;
  3125. struct e1000_rx_desc *rx_desc, *next_rxd;
  3126. struct e1000_buffer *buffer_info, *next_buffer;
  3127. unsigned long flags;
  3128. uint32_t length;
  3129. uint8_t last_byte;
  3130. unsigned int i;
  3131. int cleaned_count = 0;
  3132. boolean_t cleaned = FALSE;
  3133. i = rx_ring->next_to_clean;
  3134. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3135. buffer_info = &rx_ring->buffer_info[i];
  3136. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3137. struct sk_buff *skb;
  3138. u8 status;
  3139. #ifdef CONFIG_E1000_NAPI
  3140. if (*work_done >= work_to_do)
  3141. break;
  3142. (*work_done)++;
  3143. #endif
  3144. status = rx_desc->status;
  3145. skb = buffer_info->skb;
  3146. buffer_info->skb = NULL;
  3147. prefetch(skb->data - NET_IP_ALIGN);
  3148. if (++i == rx_ring->count) i = 0;
  3149. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3150. prefetch(next_rxd);
  3151. next_buffer = &rx_ring->buffer_info[i];
  3152. cleaned = TRUE;
  3153. cleaned_count++;
  3154. pci_unmap_single(pdev,
  3155. buffer_info->dma,
  3156. buffer_info->length,
  3157. PCI_DMA_FROMDEVICE);
  3158. length = le16_to_cpu(rx_desc->length);
  3159. /* adjust length to remove Ethernet CRC */
  3160. length -= 4;
  3161. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3162. /* All receives must fit into a single buffer */
  3163. E1000_DBG("%s: Receive packet consumed multiple"
  3164. " buffers\n", netdev->name);
  3165. /* recycle */
  3166. buffer_info->skb = skb;
  3167. goto next_desc;
  3168. }
  3169. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3170. last_byte = *(skb->data + length - 1);
  3171. if (TBI_ACCEPT(&adapter->hw, status,
  3172. rx_desc->errors, length, last_byte)) {
  3173. spin_lock_irqsave(&adapter->stats_lock, flags);
  3174. e1000_tbi_adjust_stats(&adapter->hw,
  3175. &adapter->stats,
  3176. length, skb->data);
  3177. spin_unlock_irqrestore(&adapter->stats_lock,
  3178. flags);
  3179. length--;
  3180. } else {
  3181. /* recycle */
  3182. buffer_info->skb = skb;
  3183. goto next_desc;
  3184. }
  3185. }
  3186. /* code added for copybreak, this should improve
  3187. * performance for small packets with large amounts
  3188. * of reassembly being done in the stack */
  3189. #define E1000_CB_LENGTH 256
  3190. if (length < E1000_CB_LENGTH) {
  3191. struct sk_buff *new_skb =
  3192. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3193. if (new_skb) {
  3194. skb_reserve(new_skb, NET_IP_ALIGN);
  3195. new_skb->dev = netdev;
  3196. memcpy(new_skb->data - NET_IP_ALIGN,
  3197. skb->data - NET_IP_ALIGN,
  3198. length + NET_IP_ALIGN);
  3199. /* save the skb in buffer_info as good */
  3200. buffer_info->skb = skb;
  3201. skb = new_skb;
  3202. skb_put(skb, length);
  3203. }
  3204. } else
  3205. skb_put(skb, length);
  3206. /* end copybreak code */
  3207. /* Receive Checksum Offload */
  3208. e1000_rx_checksum(adapter,
  3209. (uint32_t)(status) |
  3210. ((uint32_t)(rx_desc->errors) << 24),
  3211. le16_to_cpu(rx_desc->csum), skb);
  3212. skb->protocol = eth_type_trans(skb, netdev);
  3213. #ifdef CONFIG_E1000_NAPI
  3214. if (unlikely(adapter->vlgrp &&
  3215. (status & E1000_RXD_STAT_VP))) {
  3216. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3217. le16_to_cpu(rx_desc->special) &
  3218. E1000_RXD_SPC_VLAN_MASK);
  3219. } else {
  3220. netif_receive_skb(skb);
  3221. }
  3222. #else /* CONFIG_E1000_NAPI */
  3223. if (unlikely(adapter->vlgrp &&
  3224. (status & E1000_RXD_STAT_VP))) {
  3225. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3226. le16_to_cpu(rx_desc->special) &
  3227. E1000_RXD_SPC_VLAN_MASK);
  3228. } else {
  3229. netif_rx(skb);
  3230. }
  3231. #endif /* CONFIG_E1000_NAPI */
  3232. netdev->last_rx = jiffies;
  3233. next_desc:
  3234. rx_desc->status = 0;
  3235. /* return some buffers to hardware, one at a time is too slow */
  3236. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3237. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3238. cleaned_count = 0;
  3239. }
  3240. /* use prefetched values */
  3241. rx_desc = next_rxd;
  3242. buffer_info = next_buffer;
  3243. }
  3244. rx_ring->next_to_clean = i;
  3245. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3246. if (cleaned_count)
  3247. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3248. return cleaned;
  3249. }
  3250. /**
  3251. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3252. * @adapter: board private structure
  3253. **/
  3254. static boolean_t
  3255. #ifdef CONFIG_E1000_NAPI
  3256. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3257. struct e1000_rx_ring *rx_ring,
  3258. int *work_done, int work_to_do)
  3259. #else
  3260. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3261. struct e1000_rx_ring *rx_ring)
  3262. #endif
  3263. {
  3264. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3265. struct net_device *netdev = adapter->netdev;
  3266. struct pci_dev *pdev = adapter->pdev;
  3267. struct e1000_buffer *buffer_info, *next_buffer;
  3268. struct e1000_ps_page *ps_page;
  3269. struct e1000_ps_page_dma *ps_page_dma;
  3270. struct sk_buff *skb;
  3271. unsigned int i, j;
  3272. uint32_t length, staterr;
  3273. int cleaned_count = 0;
  3274. boolean_t cleaned = FALSE;
  3275. i = rx_ring->next_to_clean;
  3276. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3277. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3278. buffer_info = &rx_ring->buffer_info[i];
  3279. while (staterr & E1000_RXD_STAT_DD) {
  3280. ps_page = &rx_ring->ps_page[i];
  3281. ps_page_dma = &rx_ring->ps_page_dma[i];
  3282. #ifdef CONFIG_E1000_NAPI
  3283. if (unlikely(*work_done >= work_to_do))
  3284. break;
  3285. (*work_done)++;
  3286. #endif
  3287. skb = buffer_info->skb;
  3288. /* in the packet split case this is header only */
  3289. prefetch(skb->data - NET_IP_ALIGN);
  3290. if (++i == rx_ring->count) i = 0;
  3291. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3292. prefetch(next_rxd);
  3293. next_buffer = &rx_ring->buffer_info[i];
  3294. cleaned = TRUE;
  3295. cleaned_count++;
  3296. pci_unmap_single(pdev, buffer_info->dma,
  3297. buffer_info->length,
  3298. PCI_DMA_FROMDEVICE);
  3299. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3300. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3301. " the full packet\n", netdev->name);
  3302. dev_kfree_skb_irq(skb);
  3303. goto next_desc;
  3304. }
  3305. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3306. dev_kfree_skb_irq(skb);
  3307. goto next_desc;
  3308. }
  3309. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3310. if (unlikely(!length)) {
  3311. E1000_DBG("%s: Last part of the packet spanning"
  3312. " multiple descriptors\n", netdev->name);
  3313. dev_kfree_skb_irq(skb);
  3314. goto next_desc;
  3315. }
  3316. /* Good Receive */
  3317. skb_put(skb, length);
  3318. {
  3319. /* this looks ugly, but it seems compiler issues make it
  3320. more efficient than reusing j */
  3321. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3322. /* page alloc/put takes too long and effects small packet
  3323. * throughput, so unsplit small packets and save the alloc/put*/
  3324. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3325. u8 *vaddr;
  3326. /* there is no documentation about how to call
  3327. * kmap_atomic, so we can't hold the mapping
  3328. * very long */
  3329. pci_dma_sync_single_for_cpu(pdev,
  3330. ps_page_dma->ps_page_dma[0],
  3331. PAGE_SIZE,
  3332. PCI_DMA_FROMDEVICE);
  3333. vaddr = kmap_atomic(ps_page->ps_page[0],
  3334. KM_SKB_DATA_SOFTIRQ);
  3335. memcpy(skb->tail, vaddr, l1);
  3336. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3337. pci_dma_sync_single_for_device(pdev,
  3338. ps_page_dma->ps_page_dma[0],
  3339. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3340. /* remove the CRC */
  3341. l1 -= 4;
  3342. skb_put(skb, l1);
  3343. goto copydone;
  3344. } /* if */
  3345. }
  3346. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3347. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3348. break;
  3349. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3350. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3351. ps_page_dma->ps_page_dma[j] = 0;
  3352. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3353. length);
  3354. ps_page->ps_page[j] = NULL;
  3355. skb->len += length;
  3356. skb->data_len += length;
  3357. skb->truesize += length;
  3358. }
  3359. /* strip the ethernet crc, problem is we're using pages now so
  3360. * this whole operation can get a little cpu intensive */
  3361. pskb_trim(skb, skb->len - 4);
  3362. copydone:
  3363. e1000_rx_checksum(adapter, staterr,
  3364. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3365. skb->protocol = eth_type_trans(skb, netdev);
  3366. if (likely(rx_desc->wb.upper.header_status &
  3367. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3368. adapter->rx_hdr_split++;
  3369. #ifdef CONFIG_E1000_NAPI
  3370. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3371. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3372. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3373. E1000_RXD_SPC_VLAN_MASK);
  3374. } else {
  3375. netif_receive_skb(skb);
  3376. }
  3377. #else /* CONFIG_E1000_NAPI */
  3378. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3379. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3380. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3381. E1000_RXD_SPC_VLAN_MASK);
  3382. } else {
  3383. netif_rx(skb);
  3384. }
  3385. #endif /* CONFIG_E1000_NAPI */
  3386. netdev->last_rx = jiffies;
  3387. next_desc:
  3388. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3389. buffer_info->skb = NULL;
  3390. /* return some buffers to hardware, one at a time is too slow */
  3391. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3392. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3393. cleaned_count = 0;
  3394. }
  3395. /* use prefetched values */
  3396. rx_desc = next_rxd;
  3397. buffer_info = next_buffer;
  3398. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3399. }
  3400. rx_ring->next_to_clean = i;
  3401. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3402. if (cleaned_count)
  3403. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3404. return cleaned;
  3405. }
  3406. /**
  3407. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3408. * @adapter: address of board private structure
  3409. **/
  3410. static void
  3411. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3412. struct e1000_rx_ring *rx_ring,
  3413. int cleaned_count)
  3414. {
  3415. struct net_device *netdev = adapter->netdev;
  3416. struct pci_dev *pdev = adapter->pdev;
  3417. struct e1000_rx_desc *rx_desc;
  3418. struct e1000_buffer *buffer_info;
  3419. struct sk_buff *skb;
  3420. unsigned int i;
  3421. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3422. i = rx_ring->next_to_use;
  3423. buffer_info = &rx_ring->buffer_info[i];
  3424. while (cleaned_count--) {
  3425. if (!(skb = buffer_info->skb))
  3426. skb = netdev_alloc_skb(netdev, bufsz);
  3427. else {
  3428. skb_trim(skb, 0);
  3429. goto map_skb;
  3430. }
  3431. if (unlikely(!skb)) {
  3432. /* Better luck next round */
  3433. adapter->alloc_rx_buff_failed++;
  3434. break;
  3435. }
  3436. /* Fix for errata 23, can't cross 64kB boundary */
  3437. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3438. struct sk_buff *oldskb = skb;
  3439. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3440. "at %p\n", bufsz, skb->data);
  3441. /* Try again, without freeing the previous */
  3442. skb = netdev_alloc_skb(netdev, bufsz);
  3443. /* Failed allocation, critical failure */
  3444. if (!skb) {
  3445. dev_kfree_skb(oldskb);
  3446. break;
  3447. }
  3448. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3449. /* give up */
  3450. dev_kfree_skb(skb);
  3451. dev_kfree_skb(oldskb);
  3452. break; /* while !buffer_info->skb */
  3453. } else {
  3454. /* Use new allocation */
  3455. dev_kfree_skb(oldskb);
  3456. }
  3457. }
  3458. /* Make buffer alignment 2 beyond a 16 byte boundary
  3459. * this will result in a 16 byte aligned IP header after
  3460. * the 14 byte MAC header is removed
  3461. */
  3462. skb_reserve(skb, NET_IP_ALIGN);
  3463. skb->dev = netdev;
  3464. buffer_info->skb = skb;
  3465. buffer_info->length = adapter->rx_buffer_len;
  3466. map_skb:
  3467. buffer_info->dma = pci_map_single(pdev,
  3468. skb->data,
  3469. adapter->rx_buffer_len,
  3470. PCI_DMA_FROMDEVICE);
  3471. /* Fix for errata 23, can't cross 64kB boundary */
  3472. if (!e1000_check_64k_bound(adapter,
  3473. (void *)(unsigned long)buffer_info->dma,
  3474. adapter->rx_buffer_len)) {
  3475. DPRINTK(RX_ERR, ERR,
  3476. "dma align check failed: %u bytes at %p\n",
  3477. adapter->rx_buffer_len,
  3478. (void *)(unsigned long)buffer_info->dma);
  3479. dev_kfree_skb(skb);
  3480. buffer_info->skb = NULL;
  3481. pci_unmap_single(pdev, buffer_info->dma,
  3482. adapter->rx_buffer_len,
  3483. PCI_DMA_FROMDEVICE);
  3484. break; /* while !buffer_info->skb */
  3485. }
  3486. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3487. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3488. if (unlikely(++i == rx_ring->count))
  3489. i = 0;
  3490. buffer_info = &rx_ring->buffer_info[i];
  3491. }
  3492. if (likely(rx_ring->next_to_use != i)) {
  3493. rx_ring->next_to_use = i;
  3494. if (unlikely(i-- == 0))
  3495. i = (rx_ring->count - 1);
  3496. /* Force memory writes to complete before letting h/w
  3497. * know there are new descriptors to fetch. (Only
  3498. * applicable for weak-ordered memory model archs,
  3499. * such as IA-64). */
  3500. wmb();
  3501. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3502. }
  3503. }
  3504. /**
  3505. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3506. * @adapter: address of board private structure
  3507. **/
  3508. static void
  3509. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3510. struct e1000_rx_ring *rx_ring,
  3511. int cleaned_count)
  3512. {
  3513. struct net_device *netdev = adapter->netdev;
  3514. struct pci_dev *pdev = adapter->pdev;
  3515. union e1000_rx_desc_packet_split *rx_desc;
  3516. struct e1000_buffer *buffer_info;
  3517. struct e1000_ps_page *ps_page;
  3518. struct e1000_ps_page_dma *ps_page_dma;
  3519. struct sk_buff *skb;
  3520. unsigned int i, j;
  3521. i = rx_ring->next_to_use;
  3522. buffer_info = &rx_ring->buffer_info[i];
  3523. ps_page = &rx_ring->ps_page[i];
  3524. ps_page_dma = &rx_ring->ps_page_dma[i];
  3525. while (cleaned_count--) {
  3526. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3527. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3528. if (j < adapter->rx_ps_pages) {
  3529. if (likely(!ps_page->ps_page[j])) {
  3530. ps_page->ps_page[j] =
  3531. alloc_page(GFP_ATOMIC);
  3532. if (unlikely(!ps_page->ps_page[j])) {
  3533. adapter->alloc_rx_buff_failed++;
  3534. goto no_buffers;
  3535. }
  3536. ps_page_dma->ps_page_dma[j] =
  3537. pci_map_page(pdev,
  3538. ps_page->ps_page[j],
  3539. 0, PAGE_SIZE,
  3540. PCI_DMA_FROMDEVICE);
  3541. }
  3542. /* Refresh the desc even if buffer_addrs didn't
  3543. * change because each write-back erases
  3544. * this info.
  3545. */
  3546. rx_desc->read.buffer_addr[j+1] =
  3547. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3548. } else
  3549. rx_desc->read.buffer_addr[j+1] = ~0;
  3550. }
  3551. skb = netdev_alloc_skb(netdev,
  3552. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3553. if (unlikely(!skb)) {
  3554. adapter->alloc_rx_buff_failed++;
  3555. break;
  3556. }
  3557. /* Make buffer alignment 2 beyond a 16 byte boundary
  3558. * this will result in a 16 byte aligned IP header after
  3559. * the 14 byte MAC header is removed
  3560. */
  3561. skb_reserve(skb, NET_IP_ALIGN);
  3562. skb->dev = netdev;
  3563. buffer_info->skb = skb;
  3564. buffer_info->length = adapter->rx_ps_bsize0;
  3565. buffer_info->dma = pci_map_single(pdev, skb->data,
  3566. adapter->rx_ps_bsize0,
  3567. PCI_DMA_FROMDEVICE);
  3568. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3569. if (unlikely(++i == rx_ring->count)) i = 0;
  3570. buffer_info = &rx_ring->buffer_info[i];
  3571. ps_page = &rx_ring->ps_page[i];
  3572. ps_page_dma = &rx_ring->ps_page_dma[i];
  3573. }
  3574. no_buffers:
  3575. if (likely(rx_ring->next_to_use != i)) {
  3576. rx_ring->next_to_use = i;
  3577. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3578. /* Force memory writes to complete before letting h/w
  3579. * know there are new descriptors to fetch. (Only
  3580. * applicable for weak-ordered memory model archs,
  3581. * such as IA-64). */
  3582. wmb();
  3583. /* Hardware increments by 16 bytes, but packet split
  3584. * descriptors are 32 bytes...so we increment tail
  3585. * twice as much.
  3586. */
  3587. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3588. }
  3589. }
  3590. /**
  3591. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3592. * @adapter:
  3593. **/
  3594. static void
  3595. e1000_smartspeed(struct e1000_adapter *adapter)
  3596. {
  3597. uint16_t phy_status;
  3598. uint16_t phy_ctrl;
  3599. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3600. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3601. return;
  3602. if (adapter->smartspeed == 0) {
  3603. /* If Master/Slave config fault is asserted twice,
  3604. * we assume back-to-back */
  3605. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3606. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3607. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3608. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3609. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3610. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3611. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3612. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3613. phy_ctrl);
  3614. adapter->smartspeed++;
  3615. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3616. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3617. &phy_ctrl)) {
  3618. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3619. MII_CR_RESTART_AUTO_NEG);
  3620. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3621. phy_ctrl);
  3622. }
  3623. }
  3624. return;
  3625. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3626. /* If still no link, perhaps using 2/3 pair cable */
  3627. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3628. phy_ctrl |= CR_1000T_MS_ENABLE;
  3629. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3630. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3631. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3632. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3633. MII_CR_RESTART_AUTO_NEG);
  3634. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3635. }
  3636. }
  3637. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3638. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3639. adapter->smartspeed = 0;
  3640. }
  3641. /**
  3642. * e1000_ioctl -
  3643. * @netdev:
  3644. * @ifreq:
  3645. * @cmd:
  3646. **/
  3647. static int
  3648. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3649. {
  3650. switch (cmd) {
  3651. case SIOCGMIIPHY:
  3652. case SIOCGMIIREG:
  3653. case SIOCSMIIREG:
  3654. return e1000_mii_ioctl(netdev, ifr, cmd);
  3655. default:
  3656. return -EOPNOTSUPP;
  3657. }
  3658. }
  3659. /**
  3660. * e1000_mii_ioctl -
  3661. * @netdev:
  3662. * @ifreq:
  3663. * @cmd:
  3664. **/
  3665. static int
  3666. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3667. {
  3668. struct e1000_adapter *adapter = netdev_priv(netdev);
  3669. struct mii_ioctl_data *data = if_mii(ifr);
  3670. int retval;
  3671. uint16_t mii_reg;
  3672. uint16_t spddplx;
  3673. unsigned long flags;
  3674. if (adapter->hw.media_type != e1000_media_type_copper)
  3675. return -EOPNOTSUPP;
  3676. switch (cmd) {
  3677. case SIOCGMIIPHY:
  3678. data->phy_id = adapter->hw.phy_addr;
  3679. break;
  3680. case SIOCGMIIREG:
  3681. if (!capable(CAP_NET_ADMIN))
  3682. return -EPERM;
  3683. spin_lock_irqsave(&adapter->stats_lock, flags);
  3684. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3685. &data->val_out)) {
  3686. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3687. return -EIO;
  3688. }
  3689. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3690. break;
  3691. case SIOCSMIIREG:
  3692. if (!capable(CAP_NET_ADMIN))
  3693. return -EPERM;
  3694. if (data->reg_num & ~(0x1F))
  3695. return -EFAULT;
  3696. mii_reg = data->val_in;
  3697. spin_lock_irqsave(&adapter->stats_lock, flags);
  3698. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3699. mii_reg)) {
  3700. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3701. return -EIO;
  3702. }
  3703. if (adapter->hw.media_type == e1000_media_type_copper) {
  3704. switch (data->reg_num) {
  3705. case PHY_CTRL:
  3706. if (mii_reg & MII_CR_POWER_DOWN)
  3707. break;
  3708. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3709. adapter->hw.autoneg = 1;
  3710. adapter->hw.autoneg_advertised = 0x2F;
  3711. } else {
  3712. if (mii_reg & 0x40)
  3713. spddplx = SPEED_1000;
  3714. else if (mii_reg & 0x2000)
  3715. spddplx = SPEED_100;
  3716. else
  3717. spddplx = SPEED_10;
  3718. spddplx += (mii_reg & 0x100)
  3719. ? DUPLEX_FULL :
  3720. DUPLEX_HALF;
  3721. retval = e1000_set_spd_dplx(adapter,
  3722. spddplx);
  3723. if (retval) {
  3724. spin_unlock_irqrestore(
  3725. &adapter->stats_lock,
  3726. flags);
  3727. return retval;
  3728. }
  3729. }
  3730. if (netif_running(adapter->netdev))
  3731. e1000_reinit_locked(adapter);
  3732. else
  3733. e1000_reset(adapter);
  3734. break;
  3735. case M88E1000_PHY_SPEC_CTRL:
  3736. case M88E1000_EXT_PHY_SPEC_CTRL:
  3737. if (e1000_phy_reset(&adapter->hw)) {
  3738. spin_unlock_irqrestore(
  3739. &adapter->stats_lock, flags);
  3740. return -EIO;
  3741. }
  3742. break;
  3743. }
  3744. } else {
  3745. switch (data->reg_num) {
  3746. case PHY_CTRL:
  3747. if (mii_reg & MII_CR_POWER_DOWN)
  3748. break;
  3749. if (netif_running(adapter->netdev))
  3750. e1000_reinit_locked(adapter);
  3751. else
  3752. e1000_reset(adapter);
  3753. break;
  3754. }
  3755. }
  3756. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3757. break;
  3758. default:
  3759. return -EOPNOTSUPP;
  3760. }
  3761. return E1000_SUCCESS;
  3762. }
  3763. void
  3764. e1000_pci_set_mwi(struct e1000_hw *hw)
  3765. {
  3766. struct e1000_adapter *adapter = hw->back;
  3767. int ret_val = pci_set_mwi(adapter->pdev);
  3768. if (ret_val)
  3769. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3770. }
  3771. void
  3772. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3773. {
  3774. struct e1000_adapter *adapter = hw->back;
  3775. pci_clear_mwi(adapter->pdev);
  3776. }
  3777. void
  3778. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3779. {
  3780. struct e1000_adapter *adapter = hw->back;
  3781. pci_read_config_word(adapter->pdev, reg, value);
  3782. }
  3783. void
  3784. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3785. {
  3786. struct e1000_adapter *adapter = hw->back;
  3787. pci_write_config_word(adapter->pdev, reg, *value);
  3788. }
  3789. #if 0
  3790. uint32_t
  3791. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3792. {
  3793. return inl(port);
  3794. }
  3795. #endif /* 0 */
  3796. void
  3797. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3798. {
  3799. outl(value, port);
  3800. }
  3801. static void
  3802. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3803. {
  3804. struct e1000_adapter *adapter = netdev_priv(netdev);
  3805. uint32_t ctrl, rctl;
  3806. e1000_irq_disable(adapter);
  3807. adapter->vlgrp = grp;
  3808. if (grp) {
  3809. /* enable VLAN tag insert/strip */
  3810. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3811. ctrl |= E1000_CTRL_VME;
  3812. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3813. if (adapter->hw.mac_type != e1000_ich8lan) {
  3814. /* enable VLAN receive filtering */
  3815. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3816. rctl |= E1000_RCTL_VFE;
  3817. rctl &= ~E1000_RCTL_CFIEN;
  3818. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3819. e1000_update_mng_vlan(adapter);
  3820. }
  3821. } else {
  3822. /* disable VLAN tag insert/strip */
  3823. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3824. ctrl &= ~E1000_CTRL_VME;
  3825. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3826. if (adapter->hw.mac_type != e1000_ich8lan) {
  3827. /* disable VLAN filtering */
  3828. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3829. rctl &= ~E1000_RCTL_VFE;
  3830. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3831. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3832. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3833. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3834. }
  3835. }
  3836. }
  3837. e1000_irq_enable(adapter);
  3838. }
  3839. static void
  3840. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3841. {
  3842. struct e1000_adapter *adapter = netdev_priv(netdev);
  3843. uint32_t vfta, index;
  3844. if ((adapter->hw.mng_cookie.status &
  3845. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3846. (vid == adapter->mng_vlan_id))
  3847. return;
  3848. /* add VID to filter table */
  3849. index = (vid >> 5) & 0x7F;
  3850. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3851. vfta |= (1 << (vid & 0x1F));
  3852. e1000_write_vfta(&adapter->hw, index, vfta);
  3853. }
  3854. static void
  3855. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3856. {
  3857. struct e1000_adapter *adapter = netdev_priv(netdev);
  3858. uint32_t vfta, index;
  3859. e1000_irq_disable(adapter);
  3860. if (adapter->vlgrp)
  3861. adapter->vlgrp->vlan_devices[vid] = NULL;
  3862. e1000_irq_enable(adapter);
  3863. if ((adapter->hw.mng_cookie.status &
  3864. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3865. (vid == adapter->mng_vlan_id)) {
  3866. /* release control to f/w */
  3867. e1000_release_hw_control(adapter);
  3868. return;
  3869. }
  3870. /* remove VID from filter table */
  3871. index = (vid >> 5) & 0x7F;
  3872. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3873. vfta &= ~(1 << (vid & 0x1F));
  3874. e1000_write_vfta(&adapter->hw, index, vfta);
  3875. }
  3876. static void
  3877. e1000_restore_vlan(struct e1000_adapter *adapter)
  3878. {
  3879. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3880. if (adapter->vlgrp) {
  3881. uint16_t vid;
  3882. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3883. if (!adapter->vlgrp->vlan_devices[vid])
  3884. continue;
  3885. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3886. }
  3887. }
  3888. }
  3889. int
  3890. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3891. {
  3892. adapter->hw.autoneg = 0;
  3893. /* Fiber NICs only allow 1000 gbps Full duplex */
  3894. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3895. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3896. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3897. return -EINVAL;
  3898. }
  3899. switch (spddplx) {
  3900. case SPEED_10 + DUPLEX_HALF:
  3901. adapter->hw.forced_speed_duplex = e1000_10_half;
  3902. break;
  3903. case SPEED_10 + DUPLEX_FULL:
  3904. adapter->hw.forced_speed_duplex = e1000_10_full;
  3905. break;
  3906. case SPEED_100 + DUPLEX_HALF:
  3907. adapter->hw.forced_speed_duplex = e1000_100_half;
  3908. break;
  3909. case SPEED_100 + DUPLEX_FULL:
  3910. adapter->hw.forced_speed_duplex = e1000_100_full;
  3911. break;
  3912. case SPEED_1000 + DUPLEX_FULL:
  3913. adapter->hw.autoneg = 1;
  3914. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3915. break;
  3916. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3917. default:
  3918. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3919. return -EINVAL;
  3920. }
  3921. return 0;
  3922. }
  3923. #ifdef CONFIG_PM
  3924. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3925. * bus we're on (PCI(X) vs. PCI-E)
  3926. */
  3927. #define PCIE_CONFIG_SPACE_LEN 256
  3928. #define PCI_CONFIG_SPACE_LEN 64
  3929. static int
  3930. e1000_pci_save_state(struct e1000_adapter *adapter)
  3931. {
  3932. struct pci_dev *dev = adapter->pdev;
  3933. int size;
  3934. int i;
  3935. if (adapter->hw.mac_type >= e1000_82571)
  3936. size = PCIE_CONFIG_SPACE_LEN;
  3937. else
  3938. size = PCI_CONFIG_SPACE_LEN;
  3939. WARN_ON(adapter->config_space != NULL);
  3940. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3941. if (!adapter->config_space) {
  3942. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3943. return -ENOMEM;
  3944. }
  3945. for (i = 0; i < (size / 4); i++)
  3946. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3947. return 0;
  3948. }
  3949. static void
  3950. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3951. {
  3952. struct pci_dev *dev = adapter->pdev;
  3953. int size;
  3954. int i;
  3955. if (adapter->config_space == NULL)
  3956. return;
  3957. if (adapter->hw.mac_type >= e1000_82571)
  3958. size = PCIE_CONFIG_SPACE_LEN;
  3959. else
  3960. size = PCI_CONFIG_SPACE_LEN;
  3961. for (i = 0; i < (size / 4); i++)
  3962. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3963. kfree(adapter->config_space);
  3964. adapter->config_space = NULL;
  3965. return;
  3966. }
  3967. #endif /* CONFIG_PM */
  3968. static int
  3969. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3970. {
  3971. struct net_device *netdev = pci_get_drvdata(pdev);
  3972. struct e1000_adapter *adapter = netdev_priv(netdev);
  3973. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3974. uint32_t wufc = adapter->wol;
  3975. #ifdef CONFIG_PM
  3976. int retval = 0;
  3977. #endif
  3978. netif_device_detach(netdev);
  3979. if (netif_running(netdev)) {
  3980. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3981. e1000_down(adapter);
  3982. }
  3983. #ifdef CONFIG_PM
  3984. /* Implement our own version of pci_save_state(pdev) because pci-
  3985. * express adapters have 256-byte config spaces. */
  3986. retval = e1000_pci_save_state(adapter);
  3987. if (retval)
  3988. return retval;
  3989. #endif
  3990. status = E1000_READ_REG(&adapter->hw, STATUS);
  3991. if (status & E1000_STATUS_LU)
  3992. wufc &= ~E1000_WUFC_LNKC;
  3993. if (wufc) {
  3994. e1000_setup_rctl(adapter);
  3995. e1000_set_multi(netdev);
  3996. /* turn on all-multi mode if wake on multicast is enabled */
  3997. if (wufc & E1000_WUFC_MC) {
  3998. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3999. rctl |= E1000_RCTL_MPE;
  4000. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4001. }
  4002. if (adapter->hw.mac_type >= e1000_82540) {
  4003. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4004. /* advertise wake from D3Cold */
  4005. #define E1000_CTRL_ADVD3WUC 0x00100000
  4006. /* phy power management enable */
  4007. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4008. ctrl |= E1000_CTRL_ADVD3WUC |
  4009. E1000_CTRL_EN_PHY_PWR_MGMT;
  4010. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4011. }
  4012. if (adapter->hw.media_type == e1000_media_type_fiber ||
  4013. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  4014. /* keep the laser running in D3 */
  4015. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  4016. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4017. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  4018. }
  4019. /* Allow time for pending master requests to run */
  4020. e1000_disable_pciex_master(&adapter->hw);
  4021. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  4022. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  4023. pci_enable_wake(pdev, PCI_D3hot, 1);
  4024. pci_enable_wake(pdev, PCI_D3cold, 1);
  4025. } else {
  4026. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  4027. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4028. pci_enable_wake(pdev, PCI_D3hot, 0);
  4029. pci_enable_wake(pdev, PCI_D3cold, 0);
  4030. }
  4031. /* FIXME: this code is incorrect for PCI Express */
  4032. if (adapter->hw.mac_type >= e1000_82540 &&
  4033. adapter->hw.mac_type != e1000_ich8lan &&
  4034. adapter->hw.media_type == e1000_media_type_copper) {
  4035. manc = E1000_READ_REG(&adapter->hw, MANC);
  4036. if (manc & E1000_MANC_SMBUS_EN) {
  4037. manc |= E1000_MANC_ARP_EN;
  4038. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4039. pci_enable_wake(pdev, PCI_D3hot, 1);
  4040. pci_enable_wake(pdev, PCI_D3cold, 1);
  4041. }
  4042. }
  4043. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4044. e1000_phy_powerdown_workaround(&adapter->hw);
  4045. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4046. * would have already happened in close and is redundant. */
  4047. e1000_release_hw_control(adapter);
  4048. pci_disable_device(pdev);
  4049. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4050. return 0;
  4051. }
  4052. #ifdef CONFIG_PM
  4053. static int
  4054. e1000_resume(struct pci_dev *pdev)
  4055. {
  4056. struct net_device *netdev = pci_get_drvdata(pdev);
  4057. struct e1000_adapter *adapter = netdev_priv(netdev);
  4058. uint32_t manc, err;
  4059. pci_set_power_state(pdev, PCI_D0);
  4060. e1000_pci_restore_state(adapter);
  4061. if ((err = pci_enable_device(pdev))) {
  4062. printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
  4063. return err;
  4064. }
  4065. pci_set_master(pdev);
  4066. pci_enable_wake(pdev, PCI_D3hot, 0);
  4067. pci_enable_wake(pdev, PCI_D3cold, 0);
  4068. e1000_reset(adapter);
  4069. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4070. if (netif_running(netdev))
  4071. e1000_up(adapter);
  4072. netif_device_attach(netdev);
  4073. /* FIXME: this code is incorrect for PCI Express */
  4074. if (adapter->hw.mac_type >= e1000_82540 &&
  4075. adapter->hw.mac_type != e1000_ich8lan &&
  4076. adapter->hw.media_type == e1000_media_type_copper) {
  4077. manc = E1000_READ_REG(&adapter->hw, MANC);
  4078. manc &= ~(E1000_MANC_ARP_EN);
  4079. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4080. }
  4081. /* If the controller is 82573 and f/w is AMT, do not set
  4082. * DRV_LOAD until the interface is up. For all other cases,
  4083. * let the f/w know that the h/w is now under the control
  4084. * of the driver. */
  4085. if (adapter->hw.mac_type != e1000_82573 ||
  4086. !e1000_check_mng_mode(&adapter->hw))
  4087. e1000_get_hw_control(adapter);
  4088. return 0;
  4089. }
  4090. #endif
  4091. static void e1000_shutdown(struct pci_dev *pdev)
  4092. {
  4093. e1000_suspend(pdev, PMSG_SUSPEND);
  4094. }
  4095. #ifdef CONFIG_NET_POLL_CONTROLLER
  4096. /*
  4097. * Polling 'interrupt' - used by things like netconsole to send skbs
  4098. * without having to re-enable interrupts. It's not called while
  4099. * the interrupt routine is executing.
  4100. */
  4101. static void
  4102. e1000_netpoll(struct net_device *netdev)
  4103. {
  4104. struct e1000_adapter *adapter = netdev_priv(netdev);
  4105. disable_irq(adapter->pdev->irq);
  4106. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4107. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4108. #ifndef CONFIG_E1000_NAPI
  4109. adapter->clean_rx(adapter, adapter->rx_ring);
  4110. #endif
  4111. enable_irq(adapter->pdev->irq);
  4112. }
  4113. #endif
  4114. /**
  4115. * e1000_io_error_detected - called when PCI error is detected
  4116. * @pdev: Pointer to PCI device
  4117. * @state: The current pci conneection state
  4118. *
  4119. * This function is called after a PCI bus error affecting
  4120. * this device has been detected.
  4121. */
  4122. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4123. {
  4124. struct net_device *netdev = pci_get_drvdata(pdev);
  4125. struct e1000_adapter *adapter = netdev->priv;
  4126. netif_device_detach(netdev);
  4127. if (netif_running(netdev))
  4128. e1000_down(adapter);
  4129. /* Request a slot slot reset. */
  4130. return PCI_ERS_RESULT_NEED_RESET;
  4131. }
  4132. /**
  4133. * e1000_io_slot_reset - called after the pci bus has been reset.
  4134. * @pdev: Pointer to PCI device
  4135. *
  4136. * Restart the card from scratch, as if from a cold-boot. Implementation
  4137. * resembles the first-half of the e1000_resume routine.
  4138. */
  4139. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4140. {
  4141. struct net_device *netdev = pci_get_drvdata(pdev);
  4142. struct e1000_adapter *adapter = netdev->priv;
  4143. if (pci_enable_device(pdev)) {
  4144. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4145. return PCI_ERS_RESULT_DISCONNECT;
  4146. }
  4147. pci_set_master(pdev);
  4148. pci_enable_wake(pdev, 3, 0);
  4149. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4150. /* Perform card reset only on one instance of the card */
  4151. if (PCI_FUNC (pdev->devfn) != 0)
  4152. return PCI_ERS_RESULT_RECOVERED;
  4153. e1000_reset(adapter);
  4154. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4155. return PCI_ERS_RESULT_RECOVERED;
  4156. }
  4157. /**
  4158. * e1000_io_resume - called when traffic can start flowing again.
  4159. * @pdev: Pointer to PCI device
  4160. *
  4161. * This callback is called when the error recovery driver tells us that
  4162. * its OK to resume normal operation. Implementation resembles the
  4163. * second-half of the e1000_resume routine.
  4164. */
  4165. static void e1000_io_resume(struct pci_dev *pdev)
  4166. {
  4167. struct net_device *netdev = pci_get_drvdata(pdev);
  4168. struct e1000_adapter *adapter = netdev->priv;
  4169. uint32_t manc, swsm;
  4170. if (netif_running(netdev)) {
  4171. if (e1000_up(adapter)) {
  4172. printk("e1000: can't bring device back up after reset\n");
  4173. return;
  4174. }
  4175. }
  4176. netif_device_attach(netdev);
  4177. if (adapter->hw.mac_type >= e1000_82540 &&
  4178. adapter->hw.media_type == e1000_media_type_copper) {
  4179. manc = E1000_READ_REG(&adapter->hw, MANC);
  4180. manc &= ~(E1000_MANC_ARP_EN);
  4181. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4182. }
  4183. switch (adapter->hw.mac_type) {
  4184. case e1000_82573:
  4185. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4186. E1000_WRITE_REG(&adapter->hw, SWSM,
  4187. swsm | E1000_SWSM_DRV_LOAD);
  4188. break;
  4189. default:
  4190. break;
  4191. }
  4192. if (netif_running(netdev))
  4193. mod_timer(&adapter->watchdog_timer, jiffies);
  4194. }
  4195. /* e1000_main.c */