pinctrl.h 4.5 KB

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  1. /*
  2. * Interface the pinctrl subsystem
  3. *
  4. * Copyright (C) 2011 ST-Ericsson SA
  5. * Written on behalf of Linaro for ST-Ericsson
  6. * This interface is used in the core to keep track of pins.
  7. *
  8. * Author: Linus Walleij <linus.walleij@linaro.org>
  9. *
  10. * License terms: GNU General Public License (GPL) version 2
  11. */
  12. #ifndef __LINUX_PINCTRL_PINCTRL_H
  13. #define __LINUX_PINCTRL_PINCTRL_H
  14. #ifdef CONFIG_PINCTRL
  15. #include <linux/radix-tree.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/list.h>
  18. #include <linux/seq_file.h>
  19. struct pinctrl_dev;
  20. struct pinmux_ops;
  21. struct gpio_chip;
  22. /**
  23. * struct pinctrl_pin_desc - boards/machines provide information on their
  24. * pins, pads or other muxable units in this struct
  25. * @number: unique pin number from the global pin number space
  26. * @name: a name for this pin
  27. */
  28. struct pinctrl_pin_desc {
  29. unsigned number;
  30. const char *name;
  31. };
  32. /* Convenience macro to define a single named or anonymous pin descriptor */
  33. #define PINCTRL_PIN(a, b) { .number = a, .name = b }
  34. #define PINCTRL_PIN_ANON(a) { .number = a }
  35. /**
  36. * struct pinctrl_gpio_range - each pin controller can provide subranges of
  37. * the GPIO number space to be handled by the controller
  38. * @node: list node for internal use
  39. * @name: a name for the chip in this range
  40. * @id: an ID number for the chip in this range
  41. * @base: base offset of the GPIO range
  42. * @npins: number of pins in the GPIO range, including the base number
  43. * @gc: an optional pointer to a gpio_chip
  44. */
  45. struct pinctrl_gpio_range {
  46. struct list_head node;
  47. const char *name;
  48. unsigned int id;
  49. unsigned int base;
  50. unsigned int npins;
  51. struct gpio_chip *gc;
  52. };
  53. /**
  54. * struct pinctrl_ops - global pin control operations, to be implemented by
  55. * pin controller drivers.
  56. * @list_groups: list the number of selectable named groups available
  57. * in this pinmux driver, the core will begin on 0 and call this
  58. * repeatedly as long as it returns >= 0 to enumerate the groups
  59. * @get_group_name: return the group name of the pin group
  60. * @get_group_pins: return an array of pins corresponding to a certain
  61. * group selector @pins, and the size of the array in @num_pins
  62. * @pin_dbg_show: optional debugfs display hook that will provide per-device
  63. * info for a certain pin in debugfs
  64. */
  65. struct pinctrl_ops {
  66. int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector);
  67. const char *(*get_group_name) (struct pinctrl_dev *pctldev,
  68. unsigned selector);
  69. int (*get_group_pins) (struct pinctrl_dev *pctldev,
  70. unsigned selector,
  71. const unsigned **pins,
  72. unsigned *num_pins);
  73. void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
  74. unsigned offset);
  75. };
  76. /**
  77. * struct pinctrl_desc - pin controller descriptor, register this to pin
  78. * control subsystem
  79. * @name: name for the pin controller
  80. * @pins: an array of pin descriptors describing all the pins handled by
  81. * this pin controller
  82. * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
  83. * of the pins field above
  84. * @maxpin: since pin spaces may be sparse, there can he "holes" in the
  85. * pin range, this attribute gives the maximum pin number in the
  86. * total range. This should not be lower than npins for example,
  87. * but may be equal to npins if you have no holes in the pin range.
  88. * @pctlops: pin control operation vtable, to support global concepts like
  89. * grouping of pins, this is optional.
  90. * @pmxops: pinmux operation vtable, if you support pinmuxing in your driver
  91. * @owner: module providing the pin controller, used for refcounting
  92. */
  93. struct pinctrl_desc {
  94. const char *name;
  95. struct pinctrl_pin_desc const *pins;
  96. unsigned int npins;
  97. unsigned int maxpin;
  98. struct pinctrl_ops *pctlops;
  99. struct pinmux_ops *pmxops;
  100. struct module *owner;
  101. };
  102. /* External interface to pin controller */
  103. extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
  104. struct device *dev, void *driver_data);
  105. extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
  106. extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
  107. extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
  108. struct pinctrl_gpio_range *range);
  109. extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
  110. struct pinctrl_gpio_range *range);
  111. extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
  112. extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
  113. #else
  114. struct pinctrl_dev;
  115. /* Sufficiently stupid default function when pinctrl is not in use */
  116. static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
  117. {
  118. return pin >= 0;
  119. }
  120. #endif /* !CONFIG_PINCTRL */
  121. #endif /* __LINUX_PINCTRL_PINCTRL_H */