tps65910-regulator.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251
  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mfd/tps65910.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in milivolts */
  32. static const u16 VIO_VSEL_table[] = {
  33. 1500, 1800, 2500, 3300,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VDD3 voltages in milivolts */
  37. static const u16 VDD3_VSEL_table[] = {
  38. 5000,
  39. };
  40. /* supported VDIG1 voltages in milivolts */
  41. static const u16 VDIG1_VSEL_table[] = {
  42. 1200, 1500, 1800, 2700,
  43. };
  44. /* supported VDIG2 voltages in milivolts */
  45. static const u16 VDIG2_VSEL_table[] = {
  46. 1000, 1100, 1200, 1800,
  47. };
  48. /* supported VPLL voltages in milivolts */
  49. static const u16 VPLL_VSEL_table[] = {
  50. 1000, 1100, 1800, 2500,
  51. };
  52. /* supported VDAC voltages in milivolts */
  53. static const u16 VDAC_VSEL_table[] = {
  54. 1800, 2600, 2800, 2850,
  55. };
  56. /* supported VAUX1 voltages in milivolts */
  57. static const u16 VAUX1_VSEL_table[] = {
  58. 1800, 2500, 2800, 2850,
  59. };
  60. /* supported VAUX2 voltages in milivolts */
  61. static const u16 VAUX2_VSEL_table[] = {
  62. 1800, 2800, 2900, 3300,
  63. };
  64. /* supported VAUX33 voltages in milivolts */
  65. static const u16 VAUX33_VSEL_table[] = {
  66. 1800, 2000, 2800, 3300,
  67. };
  68. /* supported VMMC voltages in milivolts */
  69. static const u16 VMMC_VSEL_table[] = {
  70. 1800, 2800, 3000, 3300,
  71. };
  72. struct tps_info {
  73. const char *name;
  74. unsigned min_uV;
  75. unsigned max_uV;
  76. u8 n_voltages;
  77. const u16 *voltage_table;
  78. };
  79. static struct tps_info tps65910_regs[] = {
  80. {
  81. .name = "VRTC",
  82. },
  83. {
  84. .name = "VIO",
  85. .min_uV = 1500000,
  86. .max_uV = 3300000,
  87. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  88. .voltage_table = VIO_VSEL_table,
  89. },
  90. {
  91. .name = "VDD1",
  92. .min_uV = 600000,
  93. .max_uV = 4500000,
  94. },
  95. {
  96. .name = "VDD2",
  97. .min_uV = 600000,
  98. .max_uV = 4500000,
  99. },
  100. {
  101. .name = "VDD3",
  102. .min_uV = 5000000,
  103. .max_uV = 5000000,
  104. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  105. .voltage_table = VDD3_VSEL_table,
  106. },
  107. {
  108. .name = "VDIG1",
  109. .min_uV = 1200000,
  110. .max_uV = 2700000,
  111. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  112. .voltage_table = VDIG1_VSEL_table,
  113. },
  114. {
  115. .name = "VDIG2",
  116. .min_uV = 1000000,
  117. .max_uV = 1800000,
  118. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  119. .voltage_table = VDIG2_VSEL_table,
  120. },
  121. {
  122. .name = "VPLL",
  123. .min_uV = 1000000,
  124. .max_uV = 2500000,
  125. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  126. .voltage_table = VPLL_VSEL_table,
  127. },
  128. {
  129. .name = "VDAC",
  130. .min_uV = 1800000,
  131. .max_uV = 2850000,
  132. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  133. .voltage_table = VDAC_VSEL_table,
  134. },
  135. {
  136. .name = "VAUX1",
  137. .min_uV = 1800000,
  138. .max_uV = 2850000,
  139. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  140. .voltage_table = VAUX1_VSEL_table,
  141. },
  142. {
  143. .name = "VAUX2",
  144. .min_uV = 1800000,
  145. .max_uV = 3300000,
  146. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  147. .voltage_table = VAUX2_VSEL_table,
  148. },
  149. {
  150. .name = "VAUX33",
  151. .min_uV = 1800000,
  152. .max_uV = 3300000,
  153. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  154. .voltage_table = VAUX33_VSEL_table,
  155. },
  156. {
  157. .name = "VMMC",
  158. .min_uV = 1800000,
  159. .max_uV = 3300000,
  160. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  161. .voltage_table = VMMC_VSEL_table,
  162. },
  163. };
  164. static struct tps_info tps65911_regs[] = {
  165. {
  166. .name = "VRTC",
  167. },
  168. {
  169. .name = "VIO",
  170. .min_uV = 1500000,
  171. .max_uV = 3300000,
  172. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  173. .voltage_table = VIO_VSEL_table,
  174. },
  175. {
  176. .name = "VDD1",
  177. .min_uV = 600000,
  178. .max_uV = 4500000,
  179. .n_voltages = 73,
  180. },
  181. {
  182. .name = "VDD2",
  183. .min_uV = 600000,
  184. .max_uV = 4500000,
  185. .n_voltages = 73,
  186. },
  187. {
  188. .name = "VDDCTRL",
  189. .min_uV = 600000,
  190. .max_uV = 1400000,
  191. .n_voltages = 65,
  192. },
  193. {
  194. .name = "LDO1",
  195. .min_uV = 1000000,
  196. .max_uV = 3300000,
  197. .n_voltages = 47,
  198. },
  199. {
  200. .name = "LDO2",
  201. .min_uV = 1000000,
  202. .max_uV = 3300000,
  203. .n_voltages = 47,
  204. },
  205. {
  206. .name = "LDO3",
  207. .min_uV = 1000000,
  208. .max_uV = 3300000,
  209. .n_voltages = 24,
  210. },
  211. {
  212. .name = "LDO4",
  213. .min_uV = 1000000,
  214. .max_uV = 3300000,
  215. .n_voltages = 47,
  216. },
  217. {
  218. .name = "LDO5",
  219. .min_uV = 1000000,
  220. .max_uV = 3300000,
  221. .n_voltages = 24,
  222. },
  223. {
  224. .name = "LDO6",
  225. .min_uV = 1000000,
  226. .max_uV = 3300000,
  227. .n_voltages = 24,
  228. },
  229. {
  230. .name = "LDO7",
  231. .min_uV = 1000000,
  232. .max_uV = 3300000,
  233. .n_voltages = 24,
  234. },
  235. {
  236. .name = "LDO8",
  237. .min_uV = 1000000,
  238. .max_uV = 3300000,
  239. .n_voltages = 24,
  240. },
  241. };
  242. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  243. static unsigned int tps65910_ext_sleep_control[] = {
  244. 0,
  245. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  246. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  247. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  248. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  249. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  250. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  251. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  252. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  253. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  254. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  255. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  256. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  257. };
  258. static unsigned int tps65911_ext_sleep_control[] = {
  259. 0,
  260. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  261. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  262. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  263. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  264. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  265. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  266. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  267. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  268. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  269. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  270. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  271. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  272. };
  273. struct tps65910_reg {
  274. struct regulator_desc *desc;
  275. struct tps65910 *mfd;
  276. struct regulator_dev **rdev;
  277. struct tps_info **info;
  278. struct mutex mutex;
  279. int num_regulators;
  280. int mode;
  281. int (*get_ctrl_reg)(int);
  282. unsigned int *ext_sleep_control;
  283. unsigned int board_ext_control[TPS65910_NUM_REGS];
  284. };
  285. static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
  286. {
  287. u8 val;
  288. int err;
  289. err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
  290. if (err)
  291. return err;
  292. return val;
  293. }
  294. static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  295. {
  296. return pmic->mfd->write(pmic->mfd, reg, 1, &val);
  297. }
  298. static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
  299. u8 set_mask, u8 clear_mask)
  300. {
  301. int err, data;
  302. mutex_lock(&pmic->mutex);
  303. data = tps65910_read(pmic, reg);
  304. if (data < 0) {
  305. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  306. err = data;
  307. goto out;
  308. }
  309. data &= ~clear_mask;
  310. data |= set_mask;
  311. err = tps65910_write(pmic, reg, data);
  312. if (err)
  313. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  314. out:
  315. mutex_unlock(&pmic->mutex);
  316. return err;
  317. }
  318. static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
  319. {
  320. int data;
  321. mutex_lock(&pmic->mutex);
  322. data = tps65910_read(pmic, reg);
  323. if (data < 0)
  324. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  325. mutex_unlock(&pmic->mutex);
  326. return data;
  327. }
  328. static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  329. {
  330. int err;
  331. mutex_lock(&pmic->mutex);
  332. err = tps65910_write(pmic, reg, val);
  333. if (err < 0)
  334. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  335. mutex_unlock(&pmic->mutex);
  336. return err;
  337. }
  338. static int tps65910_get_ctrl_register(int id)
  339. {
  340. switch (id) {
  341. case TPS65910_REG_VRTC:
  342. return TPS65910_VRTC;
  343. case TPS65910_REG_VIO:
  344. return TPS65910_VIO;
  345. case TPS65910_REG_VDD1:
  346. return TPS65910_VDD1;
  347. case TPS65910_REG_VDD2:
  348. return TPS65910_VDD2;
  349. case TPS65910_REG_VDD3:
  350. return TPS65910_VDD3;
  351. case TPS65910_REG_VDIG1:
  352. return TPS65910_VDIG1;
  353. case TPS65910_REG_VDIG2:
  354. return TPS65910_VDIG2;
  355. case TPS65910_REG_VPLL:
  356. return TPS65910_VPLL;
  357. case TPS65910_REG_VDAC:
  358. return TPS65910_VDAC;
  359. case TPS65910_REG_VAUX1:
  360. return TPS65910_VAUX1;
  361. case TPS65910_REG_VAUX2:
  362. return TPS65910_VAUX2;
  363. case TPS65910_REG_VAUX33:
  364. return TPS65910_VAUX33;
  365. case TPS65910_REG_VMMC:
  366. return TPS65910_VMMC;
  367. default:
  368. return -EINVAL;
  369. }
  370. }
  371. static int tps65911_get_ctrl_register(int id)
  372. {
  373. switch (id) {
  374. case TPS65910_REG_VRTC:
  375. return TPS65910_VRTC;
  376. case TPS65910_REG_VIO:
  377. return TPS65910_VIO;
  378. case TPS65910_REG_VDD1:
  379. return TPS65910_VDD1;
  380. case TPS65910_REG_VDD2:
  381. return TPS65910_VDD2;
  382. case TPS65911_REG_VDDCTRL:
  383. return TPS65911_VDDCTRL;
  384. case TPS65911_REG_LDO1:
  385. return TPS65911_LDO1;
  386. case TPS65911_REG_LDO2:
  387. return TPS65911_LDO2;
  388. case TPS65911_REG_LDO3:
  389. return TPS65911_LDO3;
  390. case TPS65911_REG_LDO4:
  391. return TPS65911_LDO4;
  392. case TPS65911_REG_LDO5:
  393. return TPS65911_LDO5;
  394. case TPS65911_REG_LDO6:
  395. return TPS65911_LDO6;
  396. case TPS65911_REG_LDO7:
  397. return TPS65911_LDO7;
  398. case TPS65911_REG_LDO8:
  399. return TPS65911_LDO8;
  400. default:
  401. return -EINVAL;
  402. }
  403. }
  404. static int tps65910_is_enabled(struct regulator_dev *dev)
  405. {
  406. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  407. int reg, value, id = rdev_get_id(dev);
  408. reg = pmic->get_ctrl_reg(id);
  409. if (reg < 0)
  410. return reg;
  411. value = tps65910_reg_read(pmic, reg);
  412. if (value < 0)
  413. return value;
  414. return value & TPS65910_SUPPLY_STATE_ENABLED;
  415. }
  416. static int tps65910_enable(struct regulator_dev *dev)
  417. {
  418. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  419. struct tps65910 *mfd = pmic->mfd;
  420. int reg, id = rdev_get_id(dev);
  421. reg = pmic->get_ctrl_reg(id);
  422. if (reg < 0)
  423. return reg;
  424. return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
  425. }
  426. static int tps65910_disable(struct regulator_dev *dev)
  427. {
  428. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  429. struct tps65910 *mfd = pmic->mfd;
  430. int reg, id = rdev_get_id(dev);
  431. reg = pmic->get_ctrl_reg(id);
  432. if (reg < 0)
  433. return reg;
  434. return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
  435. }
  436. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  437. {
  438. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  439. struct tps65910 *mfd = pmic->mfd;
  440. int reg, value, id = rdev_get_id(dev);
  441. reg = pmic->get_ctrl_reg(id);
  442. if (reg < 0)
  443. return reg;
  444. switch (mode) {
  445. case REGULATOR_MODE_NORMAL:
  446. return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
  447. LDO_ST_MODE_BIT);
  448. case REGULATOR_MODE_IDLE:
  449. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  450. return tps65910_set_bits(mfd, reg, value);
  451. case REGULATOR_MODE_STANDBY:
  452. return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  453. }
  454. return -EINVAL;
  455. }
  456. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  457. {
  458. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  459. int reg, value, id = rdev_get_id(dev);
  460. reg = pmic->get_ctrl_reg(id);
  461. if (reg < 0)
  462. return reg;
  463. value = tps65910_reg_read(pmic, reg);
  464. if (value < 0)
  465. return value;
  466. if (!(value & LDO_ST_ON_BIT))
  467. return REGULATOR_MODE_STANDBY;
  468. else if (value & LDO_ST_MODE_BIT)
  469. return REGULATOR_MODE_IDLE;
  470. else
  471. return REGULATOR_MODE_NORMAL;
  472. }
  473. static int tps65910_get_voltage_dcdc(struct regulator_dev *dev)
  474. {
  475. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  476. int id = rdev_get_id(dev), voltage = 0;
  477. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  478. switch (id) {
  479. case TPS65910_REG_VDD1:
  480. opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
  481. mult = tps65910_reg_read(pmic, TPS65910_VDD1);
  482. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  483. srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
  484. sr = opvsel & VDD1_OP_CMD_MASK;
  485. opvsel &= VDD1_OP_SEL_MASK;
  486. srvsel &= VDD1_SR_SEL_MASK;
  487. vselmax = 75;
  488. break;
  489. case TPS65910_REG_VDD2:
  490. opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
  491. mult = tps65910_reg_read(pmic, TPS65910_VDD2);
  492. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  493. srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
  494. sr = opvsel & VDD2_OP_CMD_MASK;
  495. opvsel &= VDD2_OP_SEL_MASK;
  496. srvsel &= VDD2_SR_SEL_MASK;
  497. vselmax = 75;
  498. break;
  499. case TPS65911_REG_VDDCTRL:
  500. opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
  501. srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
  502. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  503. opvsel &= VDDCTRL_OP_SEL_MASK;
  504. srvsel &= VDDCTRL_SR_SEL_MASK;
  505. vselmax = 64;
  506. break;
  507. }
  508. /* multiplier 0 == 1 but 2,3 normal */
  509. if (!mult)
  510. mult=1;
  511. if (sr) {
  512. /* normalise to valid range */
  513. if (srvsel < 3)
  514. srvsel = 3;
  515. if (srvsel > vselmax)
  516. srvsel = vselmax;
  517. srvsel -= 3;
  518. voltage = (srvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
  519. } else {
  520. /* normalise to valid range*/
  521. if (opvsel < 3)
  522. opvsel = 3;
  523. if (opvsel > vselmax)
  524. opvsel = vselmax;
  525. opvsel -= 3;
  526. voltage = (opvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100;
  527. }
  528. voltage *= mult;
  529. return voltage;
  530. }
  531. static int tps65910_get_voltage(struct regulator_dev *dev)
  532. {
  533. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  534. int reg, value, id = rdev_get_id(dev), voltage = 0;
  535. reg = pmic->get_ctrl_reg(id);
  536. if (reg < 0)
  537. return reg;
  538. value = tps65910_reg_read(pmic, reg);
  539. if (value < 0)
  540. return value;
  541. switch (id) {
  542. case TPS65910_REG_VIO:
  543. case TPS65910_REG_VDIG1:
  544. case TPS65910_REG_VDIG2:
  545. case TPS65910_REG_VPLL:
  546. case TPS65910_REG_VDAC:
  547. case TPS65910_REG_VAUX1:
  548. case TPS65910_REG_VAUX2:
  549. case TPS65910_REG_VAUX33:
  550. case TPS65910_REG_VMMC:
  551. value &= LDO_SEL_MASK;
  552. value >>= LDO_SEL_SHIFT;
  553. break;
  554. default:
  555. return -EINVAL;
  556. }
  557. voltage = pmic->info[id]->voltage_table[value] * 1000;
  558. return voltage;
  559. }
  560. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  561. {
  562. return 5 * 1000 * 1000;
  563. }
  564. static int tps65911_get_voltage(struct regulator_dev *dev)
  565. {
  566. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  567. int step_mv, id = rdev_get_id(dev);
  568. u8 value, reg;
  569. reg = pmic->get_ctrl_reg(id);
  570. value = tps65910_reg_read(pmic, reg);
  571. switch (id) {
  572. case TPS65911_REG_LDO1:
  573. case TPS65911_REG_LDO2:
  574. case TPS65911_REG_LDO4:
  575. value &= LDO1_SEL_MASK;
  576. value >>= LDO_SEL_SHIFT;
  577. /* The first 5 values of the selector correspond to 1V */
  578. if (value < 5)
  579. value = 0;
  580. else
  581. value -= 4;
  582. step_mv = 50;
  583. break;
  584. case TPS65911_REG_LDO3:
  585. case TPS65911_REG_LDO5:
  586. case TPS65911_REG_LDO6:
  587. case TPS65911_REG_LDO7:
  588. case TPS65911_REG_LDO8:
  589. value &= LDO3_SEL_MASK;
  590. value >>= LDO_SEL_SHIFT;
  591. /* The first 3 values of the selector correspond to 1V */
  592. if (value < 3)
  593. value = 0;
  594. else
  595. value -= 2;
  596. step_mv = 100;
  597. break;
  598. case TPS65910_REG_VIO:
  599. value &= LDO_SEL_MASK;
  600. value >>= LDO_SEL_SHIFT;
  601. return pmic->info[id]->voltage_table[value] * 1000;
  602. default:
  603. return -EINVAL;
  604. }
  605. return (LDO_MIN_VOLT + value * step_mv) * 1000;
  606. }
  607. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  608. unsigned selector)
  609. {
  610. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  611. int id = rdev_get_id(dev), vsel;
  612. int dcdc_mult = 0;
  613. switch (id) {
  614. case TPS65910_REG_VDD1:
  615. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  616. if (dcdc_mult == 1)
  617. dcdc_mult--;
  618. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  619. tps65910_modify_bits(pmic, TPS65910_VDD1,
  620. (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
  621. VDD1_VGAIN_SEL_MASK);
  622. tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
  623. break;
  624. case TPS65910_REG_VDD2:
  625. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  626. if (dcdc_mult == 1)
  627. dcdc_mult--;
  628. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  629. tps65910_modify_bits(pmic, TPS65910_VDD2,
  630. (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
  631. VDD1_VGAIN_SEL_MASK);
  632. tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
  633. break;
  634. case TPS65911_REG_VDDCTRL:
  635. vsel = selector;
  636. tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
  637. }
  638. return 0;
  639. }
  640. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  641. unsigned selector)
  642. {
  643. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  644. int reg, id = rdev_get_id(dev);
  645. reg = pmic->get_ctrl_reg(id);
  646. if (reg < 0)
  647. return reg;
  648. switch (id) {
  649. case TPS65910_REG_VIO:
  650. case TPS65910_REG_VDIG1:
  651. case TPS65910_REG_VDIG2:
  652. case TPS65910_REG_VPLL:
  653. case TPS65910_REG_VDAC:
  654. case TPS65910_REG_VAUX1:
  655. case TPS65910_REG_VAUX2:
  656. case TPS65910_REG_VAUX33:
  657. case TPS65910_REG_VMMC:
  658. return tps65910_modify_bits(pmic, reg,
  659. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  660. }
  661. return -EINVAL;
  662. }
  663. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  664. unsigned selector)
  665. {
  666. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  667. int reg, id = rdev_get_id(dev);
  668. reg = pmic->get_ctrl_reg(id);
  669. if (reg < 0)
  670. return reg;
  671. switch (id) {
  672. case TPS65911_REG_LDO1:
  673. case TPS65911_REG_LDO2:
  674. case TPS65911_REG_LDO4:
  675. return tps65910_modify_bits(pmic, reg,
  676. (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
  677. case TPS65911_REG_LDO3:
  678. case TPS65911_REG_LDO5:
  679. case TPS65911_REG_LDO6:
  680. case TPS65911_REG_LDO7:
  681. case TPS65911_REG_LDO8:
  682. return tps65910_modify_bits(pmic, reg,
  683. (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
  684. case TPS65910_REG_VIO:
  685. return tps65910_modify_bits(pmic, reg,
  686. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  687. }
  688. return -EINVAL;
  689. }
  690. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  691. unsigned selector)
  692. {
  693. int volt, mult = 1, id = rdev_get_id(dev);
  694. switch (id) {
  695. case TPS65910_REG_VDD1:
  696. case TPS65910_REG_VDD2:
  697. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  698. volt = VDD1_2_MIN_VOLT +
  699. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  700. break;
  701. case TPS65911_REG_VDDCTRL:
  702. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  703. break;
  704. default:
  705. BUG();
  706. return -EINVAL;
  707. }
  708. return volt * 100 * mult;
  709. }
  710. static int tps65910_list_voltage(struct regulator_dev *dev,
  711. unsigned selector)
  712. {
  713. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  714. int id = rdev_get_id(dev), voltage;
  715. if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
  716. return -EINVAL;
  717. if (selector >= pmic->info[id]->n_voltages)
  718. return -EINVAL;
  719. else
  720. voltage = pmic->info[id]->voltage_table[selector] * 1000;
  721. return voltage;
  722. }
  723. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  724. {
  725. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  726. int step_mv = 0, id = rdev_get_id(dev);
  727. switch(id) {
  728. case TPS65911_REG_LDO1:
  729. case TPS65911_REG_LDO2:
  730. case TPS65911_REG_LDO4:
  731. /* The first 5 values of the selector correspond to 1V */
  732. if (selector < 5)
  733. selector = 0;
  734. else
  735. selector -= 4;
  736. step_mv = 50;
  737. break;
  738. case TPS65911_REG_LDO3:
  739. case TPS65911_REG_LDO5:
  740. case TPS65911_REG_LDO6:
  741. case TPS65911_REG_LDO7:
  742. case TPS65911_REG_LDO8:
  743. /* The first 3 values of the selector correspond to 1V */
  744. if (selector < 3)
  745. selector = 0;
  746. else
  747. selector -= 2;
  748. step_mv = 100;
  749. break;
  750. case TPS65910_REG_VIO:
  751. return pmic->info[id]->voltage_table[selector] * 1000;
  752. default:
  753. return -EINVAL;
  754. }
  755. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  756. }
  757. /* Regulator ops (except VRTC) */
  758. static struct regulator_ops tps65910_ops_dcdc = {
  759. .is_enabled = tps65910_is_enabled,
  760. .enable = tps65910_enable,
  761. .disable = tps65910_disable,
  762. .set_mode = tps65910_set_mode,
  763. .get_mode = tps65910_get_mode,
  764. .get_voltage = tps65910_get_voltage_dcdc,
  765. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  766. .list_voltage = tps65910_list_voltage_dcdc,
  767. };
  768. static struct regulator_ops tps65910_ops_vdd3 = {
  769. .is_enabled = tps65910_is_enabled,
  770. .enable = tps65910_enable,
  771. .disable = tps65910_disable,
  772. .set_mode = tps65910_set_mode,
  773. .get_mode = tps65910_get_mode,
  774. .get_voltage = tps65910_get_voltage_vdd3,
  775. .list_voltage = tps65910_list_voltage,
  776. };
  777. static struct regulator_ops tps65910_ops = {
  778. .is_enabled = tps65910_is_enabled,
  779. .enable = tps65910_enable,
  780. .disable = tps65910_disable,
  781. .set_mode = tps65910_set_mode,
  782. .get_mode = tps65910_get_mode,
  783. .get_voltage = tps65910_get_voltage,
  784. .set_voltage_sel = tps65910_set_voltage_sel,
  785. .list_voltage = tps65910_list_voltage,
  786. };
  787. static struct regulator_ops tps65911_ops = {
  788. .is_enabled = tps65910_is_enabled,
  789. .enable = tps65910_enable,
  790. .disable = tps65910_disable,
  791. .set_mode = tps65910_set_mode,
  792. .get_mode = tps65910_get_mode,
  793. .get_voltage = tps65911_get_voltage,
  794. .set_voltage_sel = tps65911_set_voltage_sel,
  795. .list_voltage = tps65911_list_voltage,
  796. };
  797. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  798. int id, int ext_sleep_config)
  799. {
  800. struct tps65910 *mfd = pmic->mfd;
  801. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  802. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  803. int ret;
  804. /*
  805. * Regulator can not be control from multiple external input EN1, EN2
  806. * and EN3 together.
  807. */
  808. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  809. int en_count;
  810. en_count = ((ext_sleep_config &
  811. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  812. en_count += ((ext_sleep_config &
  813. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  814. en_count += ((ext_sleep_config &
  815. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  816. en_count += ((ext_sleep_config &
  817. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  818. if (en_count > 1) {
  819. dev_err(mfd->dev,
  820. "External sleep control flag is not proper\n");
  821. return -EINVAL;
  822. }
  823. }
  824. pmic->board_ext_control[id] = ext_sleep_config;
  825. /* External EN1 control */
  826. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  827. ret = tps65910_set_bits(mfd,
  828. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  829. else
  830. ret = tps65910_clear_bits(mfd,
  831. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  832. if (ret < 0) {
  833. dev_err(mfd->dev,
  834. "Error in configuring external control EN1\n");
  835. return ret;
  836. }
  837. /* External EN2 control */
  838. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  839. ret = tps65910_set_bits(mfd,
  840. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  841. else
  842. ret = tps65910_clear_bits(mfd,
  843. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  844. if (ret < 0) {
  845. dev_err(mfd->dev,
  846. "Error in configuring external control EN2\n");
  847. return ret;
  848. }
  849. /* External EN3 control for TPS65910 LDO only */
  850. if ((tps65910_chip_id(mfd) == TPS65910) &&
  851. (id >= TPS65910_REG_VDIG1)) {
  852. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  853. ret = tps65910_set_bits(mfd,
  854. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  855. else
  856. ret = tps65910_clear_bits(mfd,
  857. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  858. if (ret < 0) {
  859. dev_err(mfd->dev,
  860. "Error in configuring external control EN3\n");
  861. return ret;
  862. }
  863. }
  864. /* Return if no external control is selected */
  865. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  866. /* Clear all sleep controls */
  867. ret = tps65910_clear_bits(mfd,
  868. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  869. if (!ret)
  870. ret = tps65910_clear_bits(mfd,
  871. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  872. if (ret < 0)
  873. dev_err(mfd->dev,
  874. "Error in configuring SLEEP register\n");
  875. return ret;
  876. }
  877. /*
  878. * For regulator that has separate operational and sleep register make
  879. * sure that operational is used and clear sleep register to turn
  880. * regulator off when external control is inactive
  881. */
  882. if ((id == TPS65910_REG_VDD1) ||
  883. (id == TPS65910_REG_VDD2) ||
  884. ((id == TPS65911_REG_VDDCTRL) &&
  885. (tps65910_chip_id(mfd) == TPS65911))) {
  886. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  887. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  888. int opvsel = tps65910_reg_read(pmic, op_reg_add);
  889. int srvsel = tps65910_reg_read(pmic, sr_reg_add);
  890. if (opvsel & VDD1_OP_CMD_MASK) {
  891. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  892. ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
  893. if (ret < 0) {
  894. dev_err(mfd->dev,
  895. "Error in configuring op register\n");
  896. return ret;
  897. }
  898. }
  899. ret = tps65910_reg_write(pmic, sr_reg_add, 0);
  900. if (ret < 0) {
  901. dev_err(mfd->dev, "Error in settting sr register\n");
  902. return ret;
  903. }
  904. }
  905. ret = tps65910_clear_bits(mfd,
  906. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  907. if (!ret) {
  908. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  909. ret = tps65910_set_bits(mfd,
  910. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  911. else
  912. ret = tps65910_clear_bits(mfd,
  913. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  914. }
  915. if (ret < 0)
  916. dev_err(mfd->dev,
  917. "Error in configuring SLEEP register\n");
  918. return ret;
  919. }
  920. static __devinit int tps65910_probe(struct platform_device *pdev)
  921. {
  922. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  923. struct tps_info *info;
  924. struct regulator_init_data *reg_data;
  925. struct regulator_dev *rdev;
  926. struct tps65910_reg *pmic;
  927. struct tps65910_board *pmic_plat_data;
  928. int i, err;
  929. pmic_plat_data = dev_get_platdata(tps65910->dev);
  930. if (!pmic_plat_data)
  931. return -EINVAL;
  932. pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);
  933. if (!pmic)
  934. return -ENOMEM;
  935. mutex_init(&pmic->mutex);
  936. pmic->mfd = tps65910;
  937. platform_set_drvdata(pdev, pmic);
  938. /* Give control of all register to control port */
  939. tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  940. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  941. switch(tps65910_chip_id(tps65910)) {
  942. case TPS65910:
  943. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  944. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  945. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  946. info = tps65910_regs;
  947. break;
  948. case TPS65911:
  949. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  950. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  951. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  952. info = tps65911_regs;
  953. break;
  954. default:
  955. pr_err("Invalid tps chip version\n");
  956. kfree(pmic);
  957. return -ENODEV;
  958. }
  959. pmic->desc = kcalloc(pmic->num_regulators,
  960. sizeof(struct regulator_desc), GFP_KERNEL);
  961. if (!pmic->desc) {
  962. err = -ENOMEM;
  963. goto err_free_pmic;
  964. }
  965. pmic->info = kcalloc(pmic->num_regulators,
  966. sizeof(struct tps_info *), GFP_KERNEL);
  967. if (!pmic->info) {
  968. err = -ENOMEM;
  969. goto err_free_desc;
  970. }
  971. pmic->rdev = kcalloc(pmic->num_regulators,
  972. sizeof(struct regulator_dev *), GFP_KERNEL);
  973. if (!pmic->rdev) {
  974. err = -ENOMEM;
  975. goto err_free_info;
  976. }
  977. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  978. i++, info++) {
  979. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  980. /* Regulator API handles empty constraints but not NULL
  981. * constraints */
  982. if (!reg_data)
  983. continue;
  984. /* Register the regulators */
  985. pmic->info[i] = info;
  986. pmic->desc[i].name = info->name;
  987. pmic->desc[i].id = i;
  988. pmic->desc[i].n_voltages = info->n_voltages;
  989. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  990. pmic->desc[i].ops = &tps65910_ops_dcdc;
  991. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  992. VDD1_2_NUM_VOLT_COARSE;
  993. } else if (i == TPS65910_REG_VDD3) {
  994. if (tps65910_chip_id(tps65910) == TPS65910)
  995. pmic->desc[i].ops = &tps65910_ops_vdd3;
  996. else
  997. pmic->desc[i].ops = &tps65910_ops_dcdc;
  998. } else {
  999. if (tps65910_chip_id(tps65910) == TPS65910)
  1000. pmic->desc[i].ops = &tps65910_ops;
  1001. else
  1002. pmic->desc[i].ops = &tps65911_ops;
  1003. }
  1004. err = tps65910_set_ext_sleep_config(pmic, i,
  1005. pmic_plat_data->regulator_ext_sleep_control[i]);
  1006. /*
  1007. * Failing on regulator for configuring externally control
  1008. * is not a serious issue, just throw warning.
  1009. */
  1010. if (err < 0)
  1011. dev_warn(tps65910->dev,
  1012. "Failed to initialise ext control config\n");
  1013. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1014. pmic->desc[i].owner = THIS_MODULE;
  1015. rdev = regulator_register(&pmic->desc[i],
  1016. tps65910->dev, reg_data, pmic, NULL);
  1017. if (IS_ERR(rdev)) {
  1018. dev_err(tps65910->dev,
  1019. "failed to register %s regulator\n",
  1020. pdev->name);
  1021. err = PTR_ERR(rdev);
  1022. goto err_unregister_regulator;
  1023. }
  1024. /* Save regulator for cleanup */
  1025. pmic->rdev[i] = rdev;
  1026. }
  1027. return 0;
  1028. err_unregister_regulator:
  1029. while (--i >= 0)
  1030. regulator_unregister(pmic->rdev[i]);
  1031. kfree(pmic->rdev);
  1032. err_free_info:
  1033. kfree(pmic->info);
  1034. err_free_desc:
  1035. kfree(pmic->desc);
  1036. err_free_pmic:
  1037. kfree(pmic);
  1038. return err;
  1039. }
  1040. static int __devexit tps65910_remove(struct platform_device *pdev)
  1041. {
  1042. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1043. int i;
  1044. for (i = 0; i < pmic->num_regulators; i++)
  1045. regulator_unregister(pmic->rdev[i]);
  1046. kfree(pmic->rdev);
  1047. kfree(pmic->info);
  1048. kfree(pmic->desc);
  1049. kfree(pmic);
  1050. return 0;
  1051. }
  1052. static void tps65910_shutdown(struct platform_device *pdev)
  1053. {
  1054. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1055. int i;
  1056. /*
  1057. * Before bootloader jumps to kernel, it makes sure that required
  1058. * external control signals are in desired state so that given rails
  1059. * can be configure accordingly.
  1060. * If rails are configured to be controlled from external control
  1061. * then before shutting down/rebooting the system, the external
  1062. * control configuration need to be remove from the rails so that
  1063. * its output will be available as per register programming even
  1064. * if external controls are removed. This is require when the POR
  1065. * value of the control signals are not in active state and before
  1066. * bootloader initializes it, the system requires the rail output
  1067. * to be active for booting.
  1068. */
  1069. for (i = 0; i < pmic->num_regulators; i++) {
  1070. int err;
  1071. if (!pmic->rdev[i])
  1072. continue;
  1073. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1074. if (err < 0)
  1075. dev_err(&pdev->dev,
  1076. "Error in clearing external control\n");
  1077. }
  1078. }
  1079. static struct platform_driver tps65910_driver = {
  1080. .driver = {
  1081. .name = "tps65910-pmic",
  1082. .owner = THIS_MODULE,
  1083. },
  1084. .probe = tps65910_probe,
  1085. .remove = __devexit_p(tps65910_remove),
  1086. .shutdown = tps65910_shutdown,
  1087. };
  1088. static int __init tps65910_init(void)
  1089. {
  1090. return platform_driver_register(&tps65910_driver);
  1091. }
  1092. subsys_initcall(tps65910_init);
  1093. static void __exit tps65910_cleanup(void)
  1094. {
  1095. platform_driver_unregister(&tps65910_driver);
  1096. }
  1097. module_exit(tps65910_cleanup);
  1098. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1099. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1100. MODULE_LICENSE("GPL v2");
  1101. MODULE_ALIAS("platform:tps65910-pmic");