cache.c 3.4 KB

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  1. /* MN10300 Cache flushing routines
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/mm.h>
  13. #include <linux/mman.h>
  14. #include <linux/threads.h>
  15. #include <asm/page.h>
  16. #include <asm/pgtable.h>
  17. #include <asm/processor.h>
  18. #include <asm/cacheflush.h>
  19. #include <asm/io.h>
  20. #include <asm/uaccess.h>
  21. EXPORT_SYMBOL(mn10300_icache_inv);
  22. EXPORT_SYMBOL(mn10300_dcache_inv);
  23. EXPORT_SYMBOL(mn10300_dcache_inv_range);
  24. EXPORT_SYMBOL(mn10300_dcache_inv_range2);
  25. EXPORT_SYMBOL(mn10300_dcache_inv_page);
  26. #ifdef CONFIG_MN10300_CACHE_WBACK
  27. EXPORT_SYMBOL(mn10300_dcache_flush);
  28. EXPORT_SYMBOL(mn10300_dcache_flush_inv);
  29. EXPORT_SYMBOL(mn10300_dcache_flush_inv_range);
  30. EXPORT_SYMBOL(mn10300_dcache_flush_inv_range2);
  31. EXPORT_SYMBOL(mn10300_dcache_flush_inv_page);
  32. EXPORT_SYMBOL(mn10300_dcache_flush_range);
  33. EXPORT_SYMBOL(mn10300_dcache_flush_range2);
  34. EXPORT_SYMBOL(mn10300_dcache_flush_page);
  35. #endif
  36. /*
  37. * write a page back from the dcache and invalidate the icache so that we can
  38. * run code from it that we've just written into it
  39. */
  40. void flush_icache_page(struct vm_area_struct *vma, struct page *page)
  41. {
  42. mn10300_dcache_flush_page(page_to_phys(page));
  43. mn10300_icache_inv();
  44. }
  45. EXPORT_SYMBOL(flush_icache_page);
  46. /*
  47. * write some code we've just written back from the dcache and invalidate the
  48. * icache so that we can run that code
  49. */
  50. void flush_icache_range(unsigned long start, unsigned long end)
  51. {
  52. #ifdef CONFIG_MN10300_CACHE_WBACK
  53. unsigned long addr, size, base, off;
  54. struct page *page;
  55. pgd_t *pgd;
  56. pud_t *pud;
  57. pmd_t *pmd;
  58. pte_t *ppte, pte;
  59. if (end > 0x80000000UL) {
  60. /* addresses above 0xa0000000 do not go through the cache */
  61. if (end > 0xa0000000UL) {
  62. end = 0xa0000000UL;
  63. if (start >= end)
  64. return;
  65. }
  66. /* kernel addresses between 0x80000000 and 0x9fffffff do not
  67. * require page tables, so we just map such addresses directly */
  68. base = (start >= 0x80000000UL) ? start : 0x80000000UL;
  69. mn10300_dcache_flush_range(base, end);
  70. if (base == start)
  71. goto invalidate;
  72. end = base;
  73. }
  74. for (; start < end; start += size) {
  75. /* work out how much of the page to flush */
  76. off = start & (PAGE_SIZE - 1);
  77. size = end - start;
  78. if (size > PAGE_SIZE - off)
  79. size = PAGE_SIZE - off;
  80. /* get the physical address the page is mapped to from the page
  81. * tables */
  82. pgd = pgd_offset(current->mm, start);
  83. if (!pgd || !pgd_val(*pgd))
  84. continue;
  85. pud = pud_offset(pgd, start);
  86. if (!pud || !pud_val(*pud))
  87. continue;
  88. pmd = pmd_offset(pud, start);
  89. if (!pmd || !pmd_val(*pmd))
  90. continue;
  91. ppte = pte_offset_map(pmd, start);
  92. if (!ppte)
  93. continue;
  94. pte = *ppte;
  95. pte_unmap(ppte);
  96. if (pte_none(pte))
  97. continue;
  98. page = pte_page(pte);
  99. if (!page)
  100. continue;
  101. addr = page_to_phys(page);
  102. /* flush the dcache and invalidate the icache coverage on that
  103. * region */
  104. mn10300_dcache_flush_range2(addr + off, size);
  105. }
  106. #endif
  107. invalidate:
  108. mn10300_icache_inv();
  109. }
  110. EXPORT_SYMBOL(flush_icache_range);
  111. /*
  112. * allow userspace to flush the instruction cache
  113. */
  114. asmlinkage long sys_cacheflush(unsigned long start, unsigned long end)
  115. {
  116. if (end < start)
  117. return -EINVAL;
  118. flush_icache_range(start, end);
  119. return 0;
  120. }