iwl3945-base.c 127 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /*************** STATION TABLE MANAGEMENT ****
  85. * mac80211 should be examined to determine if sta_info is duplicating
  86. * the functionality provided here
  87. */
  88. /**************************************************************/
  89. #if 0 /* temporary disable till we add real remove station */
  90. /**
  91. * iwl3945_remove_station - Remove driver's knowledge of station.
  92. *
  93. * NOTE: This does not remove station from device's station table.
  94. */
  95. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  96. {
  97. int index = IWL_INVALID_STATION;
  98. int i;
  99. unsigned long flags;
  100. spin_lock_irqsave(&priv->sta_lock, flags);
  101. if (is_ap)
  102. index = IWL_AP_ID;
  103. else if (is_broadcast_ether_addr(addr))
  104. index = priv->hw_params.bcast_sta_id;
  105. else
  106. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  107. if (priv->stations_39[i].used &&
  108. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  109. addr)) {
  110. index = i;
  111. break;
  112. }
  113. if (unlikely(index == IWL_INVALID_STATION))
  114. goto out;
  115. if (priv->stations_39[index].used) {
  116. priv->stations_39[index].used = 0;
  117. priv->num_stations--;
  118. }
  119. BUG_ON(priv->num_stations < 0);
  120. out:
  121. spin_unlock_irqrestore(&priv->sta_lock, flags);
  122. return 0;
  123. }
  124. #endif
  125. /**
  126. * iwl3945_clear_stations_table - Clear the driver's station table
  127. *
  128. * NOTE: This does not clear or otherwise alter the device's station table.
  129. */
  130. void iwl3945_clear_stations_table(struct iwl_priv *priv)
  131. {
  132. unsigned long flags;
  133. spin_lock_irqsave(&priv->sta_lock, flags);
  134. priv->num_stations = 0;
  135. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  136. spin_unlock_irqrestore(&priv->sta_lock, flags);
  137. }
  138. /**
  139. * iwl3945_add_station - Add station to station tables in driver and device
  140. */
  141. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info)
  142. {
  143. int i;
  144. int index = IWL_INVALID_STATION;
  145. struct iwl3945_station_entry *station;
  146. unsigned long flags_spin;
  147. u8 rate;
  148. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  149. if (is_ap)
  150. index = IWL_AP_ID;
  151. else if (is_broadcast_ether_addr(addr))
  152. index = priv->hw_params.bcast_sta_id;
  153. else
  154. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  155. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  156. addr)) {
  157. index = i;
  158. break;
  159. }
  160. if (!priv->stations_39[i].used &&
  161. index == IWL_INVALID_STATION)
  162. index = i;
  163. }
  164. /* These two conditions has the same outcome but keep them separate
  165. since they have different meaning */
  166. if (unlikely(index == IWL_INVALID_STATION)) {
  167. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  168. return index;
  169. }
  170. if (priv->stations_39[index].used &&
  171. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  172. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  173. return index;
  174. }
  175. IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
  176. station = &priv->stations_39[index];
  177. station->used = 1;
  178. priv->num_stations++;
  179. /* Set up the REPLY_ADD_STA command to send to device */
  180. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  181. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  182. station->sta.mode = 0;
  183. station->sta.sta.sta_id = index;
  184. station->sta.station_flags = 0;
  185. if (priv->band == IEEE80211_BAND_5GHZ)
  186. rate = IWL_RATE_6M_PLCP;
  187. else
  188. rate = IWL_RATE_1M_PLCP;
  189. /* Turn on both antennas for the station... */
  190. station->sta.rate_n_flags =
  191. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  192. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  193. /* Add station to device's station table */
  194. iwl_send_add_sta(priv,
  195. (struct iwl_addsta_cmd *)&station->sta, flags);
  196. return index;
  197. }
  198. /**
  199. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  200. * @priv: eeprom and antenna fields are used to determine antenna flags
  201. *
  202. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  203. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  204. *
  205. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  206. * IWL_ANTENNA_MAIN - Force MAIN antenna
  207. * IWL_ANTENNA_AUX - Force AUX antenna
  208. */
  209. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  210. {
  211. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  212. switch (iwl3945_mod_params.antenna) {
  213. case IWL_ANTENNA_DIVERSITY:
  214. return 0;
  215. case IWL_ANTENNA_MAIN:
  216. if (eeprom->antenna_switch_type)
  217. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  218. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  219. case IWL_ANTENNA_AUX:
  220. if (eeprom->antenna_switch_type)
  221. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  222. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  223. }
  224. /* bad antenna selector value */
  225. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  226. iwl3945_mod_params.antenna);
  227. return 0; /* "diversity" is default if error */
  228. }
  229. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  230. struct ieee80211_key_conf *keyconf,
  231. u8 sta_id)
  232. {
  233. unsigned long flags;
  234. __le16 key_flags = 0;
  235. int ret;
  236. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  237. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  238. if (sta_id == priv->hw_params.bcast_sta_id)
  239. key_flags |= STA_KEY_MULTICAST_MSK;
  240. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  241. keyconf->hw_key_idx = keyconf->keyidx;
  242. key_flags &= ~STA_KEY_FLG_INVALID;
  243. spin_lock_irqsave(&priv->sta_lock, flags);
  244. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  245. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  246. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  247. keyconf->keylen);
  248. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  249. keyconf->keylen);
  250. if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  251. == STA_KEY_FLG_NO_ENC)
  252. priv->stations_39[sta_id].sta.key.key_offset =
  253. iwl_get_free_ucode_key_index(priv);
  254. /* else, we are overriding an existing key => no need to allocated room
  255. * in uCode. */
  256. WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  257. "no space for a new key");
  258. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  259. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  260. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  261. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  262. ret = iwl_send_add_sta(priv,
  263. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
  264. spin_unlock_irqrestore(&priv->sta_lock, flags);
  265. return ret;
  266. }
  267. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  268. struct ieee80211_key_conf *keyconf,
  269. u8 sta_id)
  270. {
  271. return -EOPNOTSUPP;
  272. }
  273. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  274. struct ieee80211_key_conf *keyconf,
  275. u8 sta_id)
  276. {
  277. return -EOPNOTSUPP;
  278. }
  279. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  280. {
  281. unsigned long flags;
  282. spin_lock_irqsave(&priv->sta_lock, flags);
  283. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  284. memset(&priv->stations_39[sta_id].sta.key, 0,
  285. sizeof(struct iwl4965_keyinfo));
  286. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  287. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  288. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  289. spin_unlock_irqrestore(&priv->sta_lock, flags);
  290. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  291. iwl_send_add_sta(priv,
  292. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
  293. return 0;
  294. }
  295. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  296. struct ieee80211_key_conf *keyconf, u8 sta_id)
  297. {
  298. int ret = 0;
  299. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  300. switch (keyconf->alg) {
  301. case ALG_CCMP:
  302. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  303. break;
  304. case ALG_TKIP:
  305. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  306. break;
  307. case ALG_WEP:
  308. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  309. break;
  310. default:
  311. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  312. ret = -EINVAL;
  313. }
  314. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  315. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  316. sta_id, ret);
  317. return ret;
  318. }
  319. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  320. {
  321. int ret = -EOPNOTSUPP;
  322. return ret;
  323. }
  324. static int iwl3945_set_static_key(struct iwl_priv *priv,
  325. struct ieee80211_key_conf *key)
  326. {
  327. if (key->alg == ALG_WEP)
  328. return -EOPNOTSUPP;
  329. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  330. return -EINVAL;
  331. }
  332. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  333. {
  334. struct list_head *element;
  335. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  336. priv->frames_count);
  337. while (!list_empty(&priv->free_frames)) {
  338. element = priv->free_frames.next;
  339. list_del(element);
  340. kfree(list_entry(element, struct iwl3945_frame, list));
  341. priv->frames_count--;
  342. }
  343. if (priv->frames_count) {
  344. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  345. priv->frames_count);
  346. priv->frames_count = 0;
  347. }
  348. }
  349. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  350. {
  351. struct iwl3945_frame *frame;
  352. struct list_head *element;
  353. if (list_empty(&priv->free_frames)) {
  354. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  355. if (!frame) {
  356. IWL_ERR(priv, "Could not allocate frame!\n");
  357. return NULL;
  358. }
  359. priv->frames_count++;
  360. return frame;
  361. }
  362. element = priv->free_frames.next;
  363. list_del(element);
  364. return list_entry(element, struct iwl3945_frame, list);
  365. }
  366. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  367. {
  368. memset(frame, 0, sizeof(*frame));
  369. list_add(&frame->list, &priv->free_frames);
  370. }
  371. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  372. struct ieee80211_hdr *hdr,
  373. int left)
  374. {
  375. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  376. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  377. (priv->iw_mode != NL80211_IFTYPE_AP)))
  378. return 0;
  379. if (priv->ibss_beacon->len > left)
  380. return 0;
  381. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  382. return priv->ibss_beacon->len;
  383. }
  384. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  385. {
  386. struct iwl3945_frame *frame;
  387. unsigned int frame_size;
  388. int rc;
  389. u8 rate;
  390. frame = iwl3945_get_free_frame(priv);
  391. if (!frame) {
  392. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  393. "command.\n");
  394. return -ENOMEM;
  395. }
  396. rate = iwl_rate_get_lowest_plcp(priv);
  397. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  398. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  399. &frame->u.cmd[0]);
  400. iwl3945_free_frame(priv, frame);
  401. return rc;
  402. }
  403. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  404. {
  405. if (priv->shared_virt)
  406. pci_free_consistent(priv->pci_dev,
  407. sizeof(struct iwl3945_shared),
  408. priv->shared_virt,
  409. priv->shared_phys);
  410. }
  411. #define MAX_UCODE_BEACON_INTERVAL 1024
  412. #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
  413. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  414. {
  415. u16 new_val = 0;
  416. u16 beacon_factor = 0;
  417. beacon_factor =
  418. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  419. / MAX_UCODE_BEACON_INTERVAL;
  420. new_val = beacon_val / beacon_factor;
  421. return cpu_to_le16(new_val);
  422. }
  423. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  424. {
  425. u64 interval_tm_unit;
  426. u64 tsf, result;
  427. unsigned long flags;
  428. struct ieee80211_conf *conf = NULL;
  429. u16 beacon_int = 0;
  430. conf = ieee80211_get_hw_conf(priv->hw);
  431. spin_lock_irqsave(&priv->lock, flags);
  432. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  433. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  434. tsf = priv->timestamp;
  435. beacon_int = priv->beacon_int;
  436. spin_unlock_irqrestore(&priv->lock, flags);
  437. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  438. if (beacon_int == 0) {
  439. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  440. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  441. } else {
  442. priv->rxon_timing.beacon_interval =
  443. cpu_to_le16(beacon_int);
  444. priv->rxon_timing.beacon_interval =
  445. iwl3945_adjust_beacon_interval(
  446. le16_to_cpu(priv->rxon_timing.beacon_interval));
  447. }
  448. priv->rxon_timing.atim_window = 0;
  449. } else {
  450. priv->rxon_timing.beacon_interval =
  451. iwl3945_adjust_beacon_interval(
  452. priv->vif->bss_conf.beacon_int);
  453. /* TODO: we need to get atim_window from upper stack
  454. * for now we set to 0 */
  455. priv->rxon_timing.atim_window = 0;
  456. }
  457. interval_tm_unit =
  458. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  459. result = do_div(tsf, interval_tm_unit);
  460. priv->rxon_timing.beacon_init_val =
  461. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  462. IWL_DEBUG_ASSOC(priv,
  463. "beacon interval %d beacon timer %d beacon tim %d\n",
  464. le16_to_cpu(priv->rxon_timing.beacon_interval),
  465. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  466. le16_to_cpu(priv->rxon_timing.atim_window));
  467. }
  468. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  469. struct ieee80211_tx_info *info,
  470. struct iwl_cmd *cmd,
  471. struct sk_buff *skb_frag,
  472. int sta_id)
  473. {
  474. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  475. struct iwl3945_hw_key *keyinfo =
  476. &priv->stations_39[sta_id].keyinfo;
  477. switch (keyinfo->alg) {
  478. case ALG_CCMP:
  479. tx->sec_ctl = TX_CMD_SEC_CCM;
  480. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  481. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  482. break;
  483. case ALG_TKIP:
  484. break;
  485. case ALG_WEP:
  486. tx->sec_ctl = TX_CMD_SEC_WEP |
  487. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  488. if (keyinfo->keylen == 13)
  489. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  490. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  491. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  492. "with key %d\n", info->control.hw_key->hw_key_idx);
  493. break;
  494. default:
  495. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  496. break;
  497. }
  498. }
  499. /*
  500. * handle build REPLY_TX command notification.
  501. */
  502. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  503. struct iwl_cmd *cmd,
  504. struct ieee80211_tx_info *info,
  505. struct ieee80211_hdr *hdr, u8 std_id)
  506. {
  507. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  508. __le32 tx_flags = tx->tx_flags;
  509. __le16 fc = hdr->frame_control;
  510. u8 rc_flags = info->control.rates[0].flags;
  511. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  512. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  513. tx_flags |= TX_CMD_FLG_ACK_MSK;
  514. if (ieee80211_is_mgmt(fc))
  515. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  516. if (ieee80211_is_probe_resp(fc) &&
  517. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  518. tx_flags |= TX_CMD_FLG_TSF_MSK;
  519. } else {
  520. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  521. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  522. }
  523. tx->sta_id = std_id;
  524. if (ieee80211_has_morefrags(fc))
  525. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  526. if (ieee80211_is_data_qos(fc)) {
  527. u8 *qc = ieee80211_get_qos_ctl(hdr);
  528. tx->tid_tspec = qc[0] & 0xf;
  529. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  530. } else {
  531. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  532. }
  533. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  534. tx_flags |= TX_CMD_FLG_RTS_MSK;
  535. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  536. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  537. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  538. tx_flags |= TX_CMD_FLG_CTS_MSK;
  539. }
  540. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  541. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  542. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  543. if (ieee80211_is_mgmt(fc)) {
  544. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  545. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  546. else
  547. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  548. } else {
  549. tx->timeout.pm_frame_timeout = 0;
  550. #ifdef CONFIG_IWLWIFI_LEDS
  551. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  552. #endif
  553. }
  554. tx->driver_txop = 0;
  555. tx->tx_flags = tx_flags;
  556. tx->next_frame_len = 0;
  557. }
  558. /*
  559. * start REPLY_TX command process
  560. */
  561. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  562. {
  563. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  564. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  565. struct iwl3945_tx_cmd *tx;
  566. struct iwl_tx_queue *txq = NULL;
  567. struct iwl_queue *q = NULL;
  568. struct iwl_cmd *out_cmd = NULL;
  569. dma_addr_t phys_addr;
  570. dma_addr_t txcmd_phys;
  571. int txq_id = skb_get_queue_mapping(skb);
  572. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  573. u8 id;
  574. u8 unicast;
  575. u8 sta_id;
  576. u8 tid = 0;
  577. u16 seq_number = 0;
  578. __le16 fc;
  579. u8 wait_write_ptr = 0;
  580. u8 *qc = NULL;
  581. unsigned long flags;
  582. int rc;
  583. spin_lock_irqsave(&priv->lock, flags);
  584. if (iwl_is_rfkill(priv)) {
  585. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  586. goto drop_unlock;
  587. }
  588. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  589. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  590. goto drop_unlock;
  591. }
  592. unicast = !is_multicast_ether_addr(hdr->addr1);
  593. id = 0;
  594. fc = hdr->frame_control;
  595. #ifdef CONFIG_IWLWIFI_DEBUG
  596. if (ieee80211_is_auth(fc))
  597. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  598. else if (ieee80211_is_assoc_req(fc))
  599. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  600. else if (ieee80211_is_reassoc_req(fc))
  601. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  602. #endif
  603. /* drop all data frame if we are not associated */
  604. if (ieee80211_is_data(fc) &&
  605. (!iwl_is_monitor_mode(priv)) && /* packet injection */
  606. (!iwl_is_associated(priv) ||
  607. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  608. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  609. goto drop_unlock;
  610. }
  611. spin_unlock_irqrestore(&priv->lock, flags);
  612. hdr_len = ieee80211_hdrlen(fc);
  613. /* Find (or create) index into station table for destination station */
  614. sta_id = iwl_get_sta_id(priv, hdr);
  615. if (sta_id == IWL_INVALID_STATION) {
  616. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  617. hdr->addr1);
  618. goto drop;
  619. }
  620. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  621. if (ieee80211_is_data_qos(fc)) {
  622. qc = ieee80211_get_qos_ctl(hdr);
  623. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  624. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  625. IEEE80211_SCTL_SEQ;
  626. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  627. (hdr->seq_ctrl &
  628. cpu_to_le16(IEEE80211_SCTL_FRAG));
  629. seq_number += 0x10;
  630. }
  631. /* Descriptor for chosen Tx queue */
  632. txq = &priv->txq[txq_id];
  633. q = &txq->q;
  634. spin_lock_irqsave(&priv->lock, flags);
  635. idx = get_cmd_index(q, q->write_ptr, 0);
  636. /* Set up driver data for this TFD */
  637. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  638. txq->txb[q->write_ptr].skb[0] = skb;
  639. /* Init first empty entry in queue's array of Tx/cmd buffers */
  640. out_cmd = txq->cmd[idx];
  641. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  642. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  643. memset(tx, 0, sizeof(*tx));
  644. /*
  645. * Set up the Tx-command (not MAC!) header.
  646. * Store the chosen Tx queue and TFD index within the sequence field;
  647. * after Tx, uCode's Tx response will return this value so driver can
  648. * locate the frame within the tx queue and do post-tx processing.
  649. */
  650. out_cmd->hdr.cmd = REPLY_TX;
  651. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  652. INDEX_TO_SEQ(q->write_ptr)));
  653. /* Copy MAC header from skb into command buffer */
  654. memcpy(tx->hdr, hdr, hdr_len);
  655. if (info->control.hw_key)
  656. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  657. /* TODO need this for burst mode later on */
  658. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  659. /* set is_hcca to 0; it probably will never be implemented */
  660. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  661. /* Total # bytes to be transmitted */
  662. len = (u16)skb->len;
  663. tx->len = cpu_to_le16(len);
  664. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  665. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  666. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  667. txq->need_update = 1;
  668. if (qc)
  669. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  670. } else {
  671. wait_write_ptr = 1;
  672. txq->need_update = 0;
  673. }
  674. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  675. le16_to_cpu(out_cmd->hdr.sequence));
  676. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  677. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  678. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  679. ieee80211_hdrlen(fc));
  680. /*
  681. * Use the first empty entry in this queue's command buffer array
  682. * to contain the Tx command and MAC header concatenated together
  683. * (payload data will be in another buffer).
  684. * Size of this varies, due to varying MAC header length.
  685. * If end is not dword aligned, we'll have 2 extra bytes at the end
  686. * of the MAC header (device reads on dword boundaries).
  687. * We'll tell device about this padding later.
  688. */
  689. len = sizeof(struct iwl3945_tx_cmd) +
  690. sizeof(struct iwl_cmd_header) + hdr_len;
  691. len_org = len;
  692. len = (len + 3) & ~3;
  693. if (len_org != len)
  694. len_org = 1;
  695. else
  696. len_org = 0;
  697. /* Physical address of this Tx command's header (not MAC header!),
  698. * within command buffer array. */
  699. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  700. len, PCI_DMA_TODEVICE);
  701. /* we do not map meta data ... so we can safely access address to
  702. * provide to unmap command*/
  703. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  704. pci_unmap_len_set(&out_cmd->meta, len, len);
  705. /* Add buffer containing Tx command and MAC(!) header to TFD's
  706. * first entry */
  707. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  708. txcmd_phys, len, 1, 0);
  709. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  710. * if any (802.11 null frames have no payload). */
  711. len = skb->len - hdr_len;
  712. if (len) {
  713. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  714. len, PCI_DMA_TODEVICE);
  715. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  716. phys_addr, len,
  717. 0, U32_PAD(len));
  718. }
  719. /* Tell device the write index *just past* this latest filled TFD */
  720. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  721. rc = iwl_txq_update_write_ptr(priv, txq);
  722. spin_unlock_irqrestore(&priv->lock, flags);
  723. if (rc)
  724. return rc;
  725. if ((iwl_queue_space(q) < q->high_mark)
  726. && priv->mac80211_registered) {
  727. if (wait_write_ptr) {
  728. spin_lock_irqsave(&priv->lock, flags);
  729. txq->need_update = 1;
  730. iwl_txq_update_write_ptr(priv, txq);
  731. spin_unlock_irqrestore(&priv->lock, flags);
  732. }
  733. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  734. }
  735. return 0;
  736. drop_unlock:
  737. spin_unlock_irqrestore(&priv->lock, flags);
  738. drop:
  739. return -1;
  740. }
  741. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  742. #include "iwl-spectrum.h"
  743. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  744. #define BEACON_TIME_MASK_HIGH 0xFF000000
  745. #define TIME_UNIT 1024
  746. /*
  747. * extended beacon time format
  748. * time in usec will be changed into a 32-bit value in 8:24 format
  749. * the high 1 byte is the beacon counts
  750. * the lower 3 bytes is the time in usec within one beacon interval
  751. */
  752. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  753. {
  754. u32 quot;
  755. u32 rem;
  756. u32 interval = beacon_interval * 1024;
  757. if (!interval || !usec)
  758. return 0;
  759. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  760. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  761. return (quot << 24) + rem;
  762. }
  763. /* base is usually what we get from ucode with each received frame,
  764. * the same as HW timer counter counting down
  765. */
  766. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  767. {
  768. u32 base_low = base & BEACON_TIME_MASK_LOW;
  769. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  770. u32 interval = beacon_interval * TIME_UNIT;
  771. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  772. (addon & BEACON_TIME_MASK_HIGH);
  773. if (base_low > addon_low)
  774. res += base_low - addon_low;
  775. else if (base_low < addon_low) {
  776. res += interval + base_low - addon_low;
  777. res += (1 << 24);
  778. } else
  779. res += (1 << 24);
  780. return cpu_to_le32(res);
  781. }
  782. static int iwl3945_get_measurement(struct iwl_priv *priv,
  783. struct ieee80211_measurement_params *params,
  784. u8 type)
  785. {
  786. struct iwl_spectrum_cmd spectrum;
  787. struct iwl_rx_packet *res;
  788. struct iwl_host_cmd cmd = {
  789. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  790. .data = (void *)&spectrum,
  791. .meta.flags = CMD_WANT_SKB,
  792. };
  793. u32 add_time = le64_to_cpu(params->start_time);
  794. int rc;
  795. int spectrum_resp_status;
  796. int duration = le16_to_cpu(params->duration);
  797. if (iwl_is_associated(priv))
  798. add_time =
  799. iwl3945_usecs_to_beacons(
  800. le64_to_cpu(params->start_time) - priv->last_tsf,
  801. le16_to_cpu(priv->rxon_timing.beacon_interval));
  802. memset(&spectrum, 0, sizeof(spectrum));
  803. spectrum.channel_count = cpu_to_le16(1);
  804. spectrum.flags =
  805. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  806. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  807. cmd.len = sizeof(spectrum);
  808. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  809. if (iwl_is_associated(priv))
  810. spectrum.start_time =
  811. iwl3945_add_beacon_time(priv->last_beacon_time,
  812. add_time,
  813. le16_to_cpu(priv->rxon_timing.beacon_interval));
  814. else
  815. spectrum.start_time = 0;
  816. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  817. spectrum.channels[0].channel = params->channel;
  818. spectrum.channels[0].type = type;
  819. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  820. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  821. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  822. rc = iwl_send_cmd_sync(priv, &cmd);
  823. if (rc)
  824. return rc;
  825. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  826. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  827. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  828. rc = -EIO;
  829. }
  830. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  831. switch (spectrum_resp_status) {
  832. case 0: /* Command will be handled */
  833. if (res->u.spectrum.id != 0xff) {
  834. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  835. res->u.spectrum.id);
  836. priv->measurement_status &= ~MEASUREMENT_READY;
  837. }
  838. priv->measurement_status |= MEASUREMENT_ACTIVE;
  839. rc = 0;
  840. break;
  841. case 1: /* Command will not be handled */
  842. rc = -EAGAIN;
  843. break;
  844. }
  845. dev_kfree_skb_any(cmd.meta.u.skb);
  846. return rc;
  847. }
  848. #endif
  849. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  850. struct iwl_rx_mem_buffer *rxb)
  851. {
  852. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  853. struct iwl_alive_resp *palive;
  854. struct delayed_work *pwork;
  855. palive = &pkt->u.alive_frame;
  856. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  857. "0x%01X 0x%01X\n",
  858. palive->is_valid, palive->ver_type,
  859. palive->ver_subtype);
  860. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  861. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  862. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  863. sizeof(struct iwl_alive_resp));
  864. pwork = &priv->init_alive_start;
  865. } else {
  866. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  867. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  868. sizeof(struct iwl_alive_resp));
  869. pwork = &priv->alive_start;
  870. iwl3945_disable_events(priv);
  871. }
  872. /* We delay the ALIVE response by 5ms to
  873. * give the HW RF Kill time to activate... */
  874. if (palive->is_valid == UCODE_VALID_OK)
  875. queue_delayed_work(priv->workqueue, pwork,
  876. msecs_to_jiffies(5));
  877. else
  878. IWL_WARN(priv, "uCode did not respond OK.\n");
  879. }
  880. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  881. struct iwl_rx_mem_buffer *rxb)
  882. {
  883. #ifdef CONFIG_IWLWIFI_DEBUG
  884. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  885. #endif
  886. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  887. return;
  888. }
  889. static void iwl3945_bg_beacon_update(struct work_struct *work)
  890. {
  891. struct iwl_priv *priv =
  892. container_of(work, struct iwl_priv, beacon_update);
  893. struct sk_buff *beacon;
  894. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  895. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  896. if (!beacon) {
  897. IWL_ERR(priv, "update beacon failed\n");
  898. return;
  899. }
  900. mutex_lock(&priv->mutex);
  901. /* new beacon skb is allocated every time; dispose previous.*/
  902. if (priv->ibss_beacon)
  903. dev_kfree_skb(priv->ibss_beacon);
  904. priv->ibss_beacon = beacon;
  905. mutex_unlock(&priv->mutex);
  906. iwl3945_send_beacon_cmd(priv);
  907. }
  908. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  909. struct iwl_rx_mem_buffer *rxb)
  910. {
  911. #ifdef CONFIG_IWLWIFI_DEBUG
  912. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  913. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  914. u8 rate = beacon->beacon_notify_hdr.rate;
  915. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  916. "tsf %d %d rate %d\n",
  917. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  918. beacon->beacon_notify_hdr.failure_frame,
  919. le32_to_cpu(beacon->ibss_mgr_status),
  920. le32_to_cpu(beacon->high_tsf),
  921. le32_to_cpu(beacon->low_tsf), rate);
  922. #endif
  923. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  924. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  925. queue_work(priv->workqueue, &priv->beacon_update);
  926. }
  927. /* Handle notification from uCode that card's power state is changing
  928. * due to software, hardware, or critical temperature RFKILL */
  929. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  930. struct iwl_rx_mem_buffer *rxb)
  931. {
  932. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  933. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  934. unsigned long status = priv->status;
  935. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
  936. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  937. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  938. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  939. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  940. if (flags & HW_CARD_DISABLED)
  941. set_bit(STATUS_RF_KILL_HW, &priv->status);
  942. else
  943. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  944. if (flags & SW_CARD_DISABLED)
  945. set_bit(STATUS_RF_KILL_SW, &priv->status);
  946. else
  947. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  948. iwl_scan_cancel(priv);
  949. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  950. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  951. (test_bit(STATUS_RF_KILL_SW, &status) !=
  952. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  953. queue_work(priv->workqueue, &priv->rf_kill);
  954. else
  955. wake_up_interruptible(&priv->wait_command_queue);
  956. }
  957. /**
  958. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  959. *
  960. * Setup the RX handlers for each of the reply types sent from the uCode
  961. * to the host.
  962. *
  963. * This function chains into the hardware specific files for them to setup
  964. * any hardware specific handlers as well.
  965. */
  966. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  967. {
  968. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  969. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  970. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  971. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  972. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  973. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  974. iwl_rx_pm_debug_statistics_notif;
  975. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  976. /*
  977. * The same handler is used for both the REPLY to a discrete
  978. * statistics request from the host as well as for the periodic
  979. * statistics notifications (after received beacons) from the uCode.
  980. */
  981. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  982. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  983. iwl_setup_spectrum_handlers(priv);
  984. iwl_setup_rx_scan_handlers(priv);
  985. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  986. /* Set up hardware specific Rx handlers */
  987. iwl3945_hw_rx_handler_setup(priv);
  988. }
  989. /************************** RX-FUNCTIONS ****************************/
  990. /*
  991. * Rx theory of operation
  992. *
  993. * The host allocates 32 DMA target addresses and passes the host address
  994. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  995. * 0 to 31
  996. *
  997. * Rx Queue Indexes
  998. * The host/firmware share two index registers for managing the Rx buffers.
  999. *
  1000. * The READ index maps to the first position that the firmware may be writing
  1001. * to -- the driver can read up to (but not including) this position and get
  1002. * good data.
  1003. * The READ index is managed by the firmware once the card is enabled.
  1004. *
  1005. * The WRITE index maps to the last position the driver has read from -- the
  1006. * position preceding WRITE is the last slot the firmware can place a packet.
  1007. *
  1008. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  1009. * WRITE = READ.
  1010. *
  1011. * During initialization, the host sets up the READ queue position to the first
  1012. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  1013. *
  1014. * When the firmware places a packet in a buffer, it will advance the READ index
  1015. * and fire the RX interrupt. The driver can then query the READ index and
  1016. * process as many packets as possible, moving the WRITE index forward as it
  1017. * resets the Rx queue buffers with new memory.
  1018. *
  1019. * The management in the driver is as follows:
  1020. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  1021. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  1022. * to replenish the iwl->rxq->rx_free.
  1023. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  1024. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  1025. * 'processed' and 'read' driver indexes as well)
  1026. * + A received packet is processed and handed to the kernel network stack,
  1027. * detached from the iwl->rxq. The driver 'processed' index is updated.
  1028. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  1029. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  1030. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  1031. * were enough free buffers and RX_STALLED is set it is cleared.
  1032. *
  1033. *
  1034. * Driver sequence:
  1035. *
  1036. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  1037. * iwl3945_rx_queue_restock
  1038. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  1039. * queue, updates firmware pointers, and updates
  1040. * the WRITE index. If insufficient rx_free buffers
  1041. * are available, schedules iwl3945_rx_replenish
  1042. *
  1043. * -- enable interrupts --
  1044. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  1045. * READ INDEX, detaching the SKB from the pool.
  1046. * Moves the packet buffer from queue to rx_used.
  1047. * Calls iwl3945_rx_queue_restock to refill any empty
  1048. * slots.
  1049. * ...
  1050. *
  1051. */
  1052. /**
  1053. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  1054. */
  1055. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  1056. dma_addr_t dma_addr)
  1057. {
  1058. return cpu_to_le32((u32)dma_addr);
  1059. }
  1060. /**
  1061. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  1062. *
  1063. * If there are slots in the RX queue that need to be restocked,
  1064. * and we have free pre-allocated buffers, fill the ranks as much
  1065. * as we can, pulling from rx_free.
  1066. *
  1067. * This moves the 'write' index forward to catch up with 'processed', and
  1068. * also updates the memory address in the firmware to reference the new
  1069. * target buffer.
  1070. */
  1071. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  1072. {
  1073. struct iwl_rx_queue *rxq = &priv->rxq;
  1074. struct list_head *element;
  1075. struct iwl_rx_mem_buffer *rxb;
  1076. unsigned long flags;
  1077. int write, rc;
  1078. spin_lock_irqsave(&rxq->lock, flags);
  1079. write = rxq->write & ~0x7;
  1080. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  1081. /* Get next free Rx buffer, remove from free list */
  1082. element = rxq->rx_free.next;
  1083. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1084. list_del(element);
  1085. /* Point to Rx buffer via next RBD in circular buffer */
  1086. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  1087. rxq->queue[rxq->write] = rxb;
  1088. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  1089. rxq->free_count--;
  1090. }
  1091. spin_unlock_irqrestore(&rxq->lock, flags);
  1092. /* If the pre-allocated buffer pool is dropping low, schedule to
  1093. * refill it */
  1094. if (rxq->free_count <= RX_LOW_WATERMARK)
  1095. queue_work(priv->workqueue, &priv->rx_replenish);
  1096. /* If we've added more space for the firmware to place data, tell it.
  1097. * Increment device's write pointer in multiples of 8. */
  1098. if ((write != (rxq->write & ~0x7))
  1099. || (abs(rxq->write - rxq->read) > 7)) {
  1100. spin_lock_irqsave(&rxq->lock, flags);
  1101. rxq->need_update = 1;
  1102. spin_unlock_irqrestore(&rxq->lock, flags);
  1103. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  1104. if (rc)
  1105. return rc;
  1106. }
  1107. return 0;
  1108. }
  1109. /**
  1110. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  1111. *
  1112. * When moving to rx_free an SKB is allocated for the slot.
  1113. *
  1114. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  1115. * This is called as a scheduled work item (except for during initialization)
  1116. */
  1117. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  1118. {
  1119. struct iwl_rx_queue *rxq = &priv->rxq;
  1120. struct list_head *element;
  1121. struct iwl_rx_mem_buffer *rxb;
  1122. unsigned long flags;
  1123. spin_lock_irqsave(&rxq->lock, flags);
  1124. while (!list_empty(&rxq->rx_used)) {
  1125. element = rxq->rx_used.next;
  1126. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1127. /* Alloc a new receive buffer */
  1128. rxb->skb =
  1129. alloc_skb(priv->hw_params.rx_buf_size,
  1130. __GFP_NOWARN | GFP_ATOMIC);
  1131. if (!rxb->skb) {
  1132. if (net_ratelimit())
  1133. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  1134. /* We don't reschedule replenish work here -- we will
  1135. * call the restock method and if it still needs
  1136. * more buffers it will schedule replenish */
  1137. break;
  1138. }
  1139. /* If radiotap head is required, reserve some headroom here.
  1140. * The physical head count is a variable rx_stats->phy_count.
  1141. * We reserve 4 bytes here. Plus these extra bytes, the
  1142. * headroom of the physical head should be enough for the
  1143. * radiotap head that iwl3945 supported. See iwl3945_rt.
  1144. */
  1145. skb_reserve(rxb->skb, 4);
  1146. priv->alloc_rxb_skb++;
  1147. list_del(element);
  1148. /* Get physical address of RB/SKB */
  1149. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  1150. rxb->skb->data,
  1151. priv->hw_params.rx_buf_size,
  1152. PCI_DMA_FROMDEVICE);
  1153. list_add_tail(&rxb->list, &rxq->rx_free);
  1154. rxq->free_count++;
  1155. }
  1156. spin_unlock_irqrestore(&rxq->lock, flags);
  1157. }
  1158. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1159. {
  1160. unsigned long flags;
  1161. int i;
  1162. spin_lock_irqsave(&rxq->lock, flags);
  1163. INIT_LIST_HEAD(&rxq->rx_free);
  1164. INIT_LIST_HEAD(&rxq->rx_used);
  1165. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1166. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1167. /* In the reset function, these buffers may have been allocated
  1168. * to an SKB, so we need to unmap and free potential storage */
  1169. if (rxq->pool[i].skb != NULL) {
  1170. pci_unmap_single(priv->pci_dev,
  1171. rxq->pool[i].real_dma_addr,
  1172. priv->hw_params.rx_buf_size,
  1173. PCI_DMA_FROMDEVICE);
  1174. priv->alloc_rxb_skb--;
  1175. dev_kfree_skb(rxq->pool[i].skb);
  1176. rxq->pool[i].skb = NULL;
  1177. }
  1178. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1179. }
  1180. /* Set us so that we have processed and used all buffers, but have
  1181. * not restocked the Rx queue with fresh buffers */
  1182. rxq->read = rxq->write = 0;
  1183. rxq->free_count = 0;
  1184. spin_unlock_irqrestore(&rxq->lock, flags);
  1185. }
  1186. /*
  1187. * this should be called while priv->lock is locked
  1188. */
  1189. static void __iwl3945_rx_replenish(void *data)
  1190. {
  1191. struct iwl_priv *priv = data;
  1192. iwl3945_rx_allocate(priv);
  1193. iwl3945_rx_queue_restock(priv);
  1194. }
  1195. void iwl3945_rx_replenish(void *data)
  1196. {
  1197. struct iwl_priv *priv = data;
  1198. unsigned long flags;
  1199. iwl3945_rx_allocate(priv);
  1200. spin_lock_irqsave(&priv->lock, flags);
  1201. iwl3945_rx_queue_restock(priv);
  1202. spin_unlock_irqrestore(&priv->lock, flags);
  1203. }
  1204. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1205. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1206. * This free routine walks the list of POOL entries and if SKB is set to
  1207. * non NULL it is unmapped and freed
  1208. */
  1209. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1210. {
  1211. int i;
  1212. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1213. if (rxq->pool[i].skb != NULL) {
  1214. pci_unmap_single(priv->pci_dev,
  1215. rxq->pool[i].real_dma_addr,
  1216. priv->hw_params.rx_buf_size,
  1217. PCI_DMA_FROMDEVICE);
  1218. dev_kfree_skb(rxq->pool[i].skb);
  1219. }
  1220. }
  1221. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1222. rxq->dma_addr);
  1223. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1224. rxq->rb_stts, rxq->rb_stts_dma);
  1225. rxq->bd = NULL;
  1226. rxq->rb_stts = NULL;
  1227. }
  1228. EXPORT_SYMBOL(iwl3945_rx_queue_free);
  1229. /* Convert linear signal-to-noise ratio into dB */
  1230. static u8 ratio2dB[100] = {
  1231. /* 0 1 2 3 4 5 6 7 8 9 */
  1232. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1233. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1234. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1235. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1236. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1237. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1238. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1239. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1240. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1241. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1242. };
  1243. /* Calculates a relative dB value from a ratio of linear
  1244. * (i.e. not dB) signal levels.
  1245. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1246. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1247. {
  1248. /* 1000:1 or higher just report as 60 dB */
  1249. if (sig_ratio >= 1000)
  1250. return 60;
  1251. /* 100:1 or higher, divide by 10 and use table,
  1252. * add 20 dB to make up for divide by 10 */
  1253. if (sig_ratio >= 100)
  1254. return 20 + (int)ratio2dB[sig_ratio/10];
  1255. /* We shouldn't see this */
  1256. if (sig_ratio < 1)
  1257. return 0;
  1258. /* Use table for ratios 1:1 - 99:1 */
  1259. return (int)ratio2dB[sig_ratio];
  1260. }
  1261. #define PERFECT_RSSI (-20) /* dBm */
  1262. #define WORST_RSSI (-95) /* dBm */
  1263. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1264. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1265. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1266. * about formulas used below. */
  1267. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1268. {
  1269. int sig_qual;
  1270. int degradation = PERFECT_RSSI - rssi_dbm;
  1271. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1272. * as indicator; formula is (signal dbm - noise dbm).
  1273. * SNR at or above 40 is a great signal (100%).
  1274. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1275. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1276. if (noise_dbm) {
  1277. if (rssi_dbm - noise_dbm >= 40)
  1278. return 100;
  1279. else if (rssi_dbm < noise_dbm)
  1280. return 0;
  1281. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1282. /* Else use just the signal level.
  1283. * This formula is a least squares fit of data points collected and
  1284. * compared with a reference system that had a percentage (%) display
  1285. * for signal quality. */
  1286. } else
  1287. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1288. (15 * RSSI_RANGE + 62 * degradation)) /
  1289. (RSSI_RANGE * RSSI_RANGE);
  1290. if (sig_qual > 100)
  1291. sig_qual = 100;
  1292. else if (sig_qual < 1)
  1293. sig_qual = 0;
  1294. return sig_qual;
  1295. }
  1296. /**
  1297. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1298. *
  1299. * Uses the priv->rx_handlers callback function array to invoke
  1300. * the appropriate handlers, including command responses,
  1301. * frame-received notifications, and other notifications.
  1302. */
  1303. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1304. {
  1305. struct iwl_rx_mem_buffer *rxb;
  1306. struct iwl_rx_packet *pkt;
  1307. struct iwl_rx_queue *rxq = &priv->rxq;
  1308. u32 r, i;
  1309. int reclaim;
  1310. unsigned long flags;
  1311. u8 fill_rx = 0;
  1312. u32 count = 8;
  1313. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1314. * buffer that the driver may process (last buffer filled by ucode). */
  1315. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1316. i = rxq->read;
  1317. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  1318. fill_rx = 1;
  1319. /* Rx interrupt, but nothing sent from uCode */
  1320. if (i == r)
  1321. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1322. while (i != r) {
  1323. rxb = rxq->queue[i];
  1324. /* If an RXB doesn't have a Rx queue slot associated with it,
  1325. * then a bug has been introduced in the queue refilling
  1326. * routines -- catch it here */
  1327. BUG_ON(rxb == NULL);
  1328. rxq->queue[i] = NULL;
  1329. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1330. priv->hw_params.rx_buf_size,
  1331. PCI_DMA_FROMDEVICE);
  1332. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1333. /* Reclaim a command buffer only if this packet is a response
  1334. * to a (driver-originated) command.
  1335. * If the packet (e.g. Rx frame) originated from uCode,
  1336. * there is no command buffer to reclaim.
  1337. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1338. * but apparently a few don't get set; catch them here. */
  1339. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1340. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1341. (pkt->hdr.cmd != REPLY_TX);
  1342. /* Based on type of command response or notification,
  1343. * handle those that need handling via function in
  1344. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1345. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1346. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1347. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1348. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1349. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1350. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1351. } else {
  1352. /* No handling needed */
  1353. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1354. "r %d i %d No handler needed for %s, 0x%02x\n",
  1355. r, i, get_cmd_string(pkt->hdr.cmd),
  1356. pkt->hdr.cmd);
  1357. }
  1358. if (reclaim) {
  1359. /* Invoke any callbacks, transfer the skb to caller, and
  1360. * fire off the (possibly) blocking iwl_send_cmd()
  1361. * as we reclaim the driver command queue */
  1362. if (rxb && rxb->skb)
  1363. iwl_tx_cmd_complete(priv, rxb);
  1364. else
  1365. IWL_WARN(priv, "Claim null rxb?\n");
  1366. }
  1367. /* For now we just don't re-use anything. We can tweak this
  1368. * later to try and re-use notification packets and SKBs that
  1369. * fail to Rx correctly */
  1370. if (rxb->skb != NULL) {
  1371. priv->alloc_rxb_skb--;
  1372. dev_kfree_skb_any(rxb->skb);
  1373. rxb->skb = NULL;
  1374. }
  1375. spin_lock_irqsave(&rxq->lock, flags);
  1376. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1377. spin_unlock_irqrestore(&rxq->lock, flags);
  1378. i = (i + 1) & RX_QUEUE_MASK;
  1379. /* If there are a lot of unused frames,
  1380. * restock the Rx queue so ucode won't assert. */
  1381. if (fill_rx) {
  1382. count++;
  1383. if (count >= 8) {
  1384. priv->rxq.read = i;
  1385. __iwl3945_rx_replenish(priv);
  1386. count = 0;
  1387. }
  1388. }
  1389. }
  1390. /* Backtrack one entry */
  1391. priv->rxq.read = i;
  1392. iwl3945_rx_queue_restock(priv);
  1393. }
  1394. /* call this function to flush any scheduled tasklet */
  1395. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1396. {
  1397. /* wait to make sure we flush pending tasklet*/
  1398. synchronize_irq(priv->pci_dev->irq);
  1399. tasklet_kill(&priv->irq_tasklet);
  1400. }
  1401. static const char *desc_lookup(int i)
  1402. {
  1403. switch (i) {
  1404. case 1:
  1405. return "FAIL";
  1406. case 2:
  1407. return "BAD_PARAM";
  1408. case 3:
  1409. return "BAD_CHECKSUM";
  1410. case 4:
  1411. return "NMI_INTERRUPT";
  1412. case 5:
  1413. return "SYSASSERT";
  1414. case 6:
  1415. return "FATAL_ERROR";
  1416. }
  1417. return "UNKNOWN";
  1418. }
  1419. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1420. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1421. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1422. {
  1423. u32 i;
  1424. u32 desc, time, count, base, data1;
  1425. u32 blink1, blink2, ilink1, ilink2;
  1426. int rc;
  1427. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1428. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1429. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1430. return;
  1431. }
  1432. rc = iwl_grab_nic_access(priv);
  1433. if (rc) {
  1434. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1435. return;
  1436. }
  1437. count = iwl_read_targ_mem(priv, base);
  1438. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1439. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1440. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1441. priv->status, count);
  1442. }
  1443. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1444. "ilink1 nmiPC Line\n");
  1445. for (i = ERROR_START_OFFSET;
  1446. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1447. i += ERROR_ELEM_SIZE) {
  1448. desc = iwl_read_targ_mem(priv, base + i);
  1449. time =
  1450. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1451. blink1 =
  1452. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1453. blink2 =
  1454. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1455. ilink1 =
  1456. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1457. ilink2 =
  1458. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1459. data1 =
  1460. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1461. IWL_ERR(priv,
  1462. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1463. desc_lookup(desc), desc, time, blink1, blink2,
  1464. ilink1, ilink2, data1);
  1465. }
  1466. iwl_release_nic_access(priv);
  1467. }
  1468. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1469. /**
  1470. * iwl3945_print_event_log - Dump error event log to syslog
  1471. *
  1472. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  1473. */
  1474. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1475. u32 num_events, u32 mode)
  1476. {
  1477. u32 i;
  1478. u32 base; /* SRAM byte address of event log header */
  1479. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1480. u32 ptr; /* SRAM byte address of log data */
  1481. u32 ev, time, data; /* event log data */
  1482. if (num_events == 0)
  1483. return;
  1484. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1485. if (mode == 0)
  1486. event_size = 2 * sizeof(u32);
  1487. else
  1488. event_size = 3 * sizeof(u32);
  1489. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1490. /* "time" is actually "data" for mode 0 (no timestamp).
  1491. * place event id # at far right for easier visual parsing. */
  1492. for (i = 0; i < num_events; i++) {
  1493. ev = iwl_read_targ_mem(priv, ptr);
  1494. ptr += sizeof(u32);
  1495. time = iwl_read_targ_mem(priv, ptr);
  1496. ptr += sizeof(u32);
  1497. if (mode == 0) {
  1498. /* data, ev */
  1499. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1500. } else {
  1501. data = iwl_read_targ_mem(priv, ptr);
  1502. ptr += sizeof(u32);
  1503. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1504. }
  1505. }
  1506. }
  1507. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1508. {
  1509. int rc;
  1510. u32 base; /* SRAM byte address of event log header */
  1511. u32 capacity; /* event log capacity in # entries */
  1512. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1513. u32 num_wraps; /* # times uCode wrapped to top of log */
  1514. u32 next_entry; /* index of next entry to be written by uCode */
  1515. u32 size; /* # entries that we'll print */
  1516. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1517. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1518. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1519. return;
  1520. }
  1521. rc = iwl_grab_nic_access(priv);
  1522. if (rc) {
  1523. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1524. return;
  1525. }
  1526. /* event log header */
  1527. capacity = iwl_read_targ_mem(priv, base);
  1528. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1529. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1530. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1531. size = num_wraps ? capacity : next_entry;
  1532. /* bail out if nothing in log */
  1533. if (size == 0) {
  1534. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1535. iwl_release_nic_access(priv);
  1536. return;
  1537. }
  1538. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1539. size, num_wraps);
  1540. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1541. * i.e the next one that uCode would fill. */
  1542. if (num_wraps)
  1543. iwl3945_print_event_log(priv, next_entry,
  1544. capacity - next_entry, mode);
  1545. /* (then/else) start at top of log */
  1546. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1547. iwl_release_nic_access(priv);
  1548. }
  1549. static void iwl3945_error_recovery(struct iwl_priv *priv)
  1550. {
  1551. unsigned long flags;
  1552. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  1553. sizeof(priv->staging_rxon));
  1554. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1555. iwlcore_commit_rxon(priv);
  1556. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 1, 0, NULL);
  1557. spin_lock_irqsave(&priv->lock, flags);
  1558. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  1559. priv->error_recovering = 0;
  1560. spin_unlock_irqrestore(&priv->lock, flags);
  1561. }
  1562. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1563. {
  1564. u32 inta, handled = 0;
  1565. u32 inta_fh;
  1566. unsigned long flags;
  1567. #ifdef CONFIG_IWLWIFI_DEBUG
  1568. u32 inta_mask;
  1569. #endif
  1570. spin_lock_irqsave(&priv->lock, flags);
  1571. /* Ack/clear/reset pending uCode interrupts.
  1572. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1573. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1574. inta = iwl_read32(priv, CSR_INT);
  1575. iwl_write32(priv, CSR_INT, inta);
  1576. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1577. * Any new interrupts that happen after this, either while we're
  1578. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1579. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1580. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1581. #ifdef CONFIG_IWLWIFI_DEBUG
  1582. if (priv->debug_level & IWL_DL_ISR) {
  1583. /* just for debug */
  1584. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1585. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1586. inta, inta_mask, inta_fh);
  1587. }
  1588. #endif
  1589. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1590. * atomic, make sure that inta covers all the interrupts that
  1591. * we've discovered, even if FH interrupt came in just after
  1592. * reading CSR_INT. */
  1593. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1594. inta |= CSR_INT_BIT_FH_RX;
  1595. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1596. inta |= CSR_INT_BIT_FH_TX;
  1597. /* Now service all interrupt bits discovered above. */
  1598. if (inta & CSR_INT_BIT_HW_ERR) {
  1599. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  1600. /* Tell the device to stop sending interrupts */
  1601. iwl_disable_interrupts(priv);
  1602. priv->isr_stats.hw++;
  1603. iwl_irq_handle_error(priv);
  1604. handled |= CSR_INT_BIT_HW_ERR;
  1605. spin_unlock_irqrestore(&priv->lock, flags);
  1606. return;
  1607. }
  1608. #ifdef CONFIG_IWLWIFI_DEBUG
  1609. if (priv->debug_level & (IWL_DL_ISR)) {
  1610. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1611. if (inta & CSR_INT_BIT_SCD) {
  1612. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1613. "the frame/frames.\n");
  1614. priv->isr_stats.sch++;
  1615. }
  1616. /* Alive notification via Rx interrupt will do the real work */
  1617. if (inta & CSR_INT_BIT_ALIVE) {
  1618. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1619. priv->isr_stats.alive++;
  1620. }
  1621. }
  1622. #endif
  1623. /* Safely ignore these bits for debug checks below */
  1624. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1625. /* Error detected by uCode */
  1626. if (inta & CSR_INT_BIT_SW_ERR) {
  1627. IWL_ERR(priv, "Microcode SW error detected. "
  1628. "Restarting 0x%X.\n", inta);
  1629. priv->isr_stats.sw++;
  1630. priv->isr_stats.sw_err = inta;
  1631. iwl_irq_handle_error(priv);
  1632. handled |= CSR_INT_BIT_SW_ERR;
  1633. }
  1634. /* uCode wakes up after power-down sleep */
  1635. if (inta & CSR_INT_BIT_WAKEUP) {
  1636. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1637. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1638. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1639. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1640. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1641. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1642. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1643. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1644. priv->isr_stats.wakeup++;
  1645. handled |= CSR_INT_BIT_WAKEUP;
  1646. }
  1647. /* All uCode command responses, including Tx command responses,
  1648. * Rx "responses" (frame-received notification), and other
  1649. * notifications from uCode come through here*/
  1650. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1651. iwl3945_rx_handle(priv);
  1652. priv->isr_stats.rx++;
  1653. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1654. }
  1655. if (inta & CSR_INT_BIT_FH_TX) {
  1656. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1657. priv->isr_stats.tx++;
  1658. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1659. if (!iwl_grab_nic_access(priv)) {
  1660. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1661. (FH39_SRVC_CHNL), 0x0);
  1662. iwl_release_nic_access(priv);
  1663. }
  1664. handled |= CSR_INT_BIT_FH_TX;
  1665. }
  1666. if (inta & ~handled) {
  1667. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1668. priv->isr_stats.unhandled++;
  1669. }
  1670. if (inta & ~CSR_INI_SET_MASK) {
  1671. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1672. inta & ~CSR_INI_SET_MASK);
  1673. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1674. }
  1675. /* Re-enable all interrupts */
  1676. /* only Re-enable if disabled by irq */
  1677. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1678. iwl_enable_interrupts(priv);
  1679. #ifdef CONFIG_IWLWIFI_DEBUG
  1680. if (priv->debug_level & (IWL_DL_ISR)) {
  1681. inta = iwl_read32(priv, CSR_INT);
  1682. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1683. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1684. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1685. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1686. }
  1687. #endif
  1688. spin_unlock_irqrestore(&priv->lock, flags);
  1689. }
  1690. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1691. enum ieee80211_band band,
  1692. u8 is_active, u8 n_probes,
  1693. struct iwl3945_scan_channel *scan_ch)
  1694. {
  1695. const struct ieee80211_channel *channels = NULL;
  1696. const struct ieee80211_supported_band *sband;
  1697. const struct iwl_channel_info *ch_info;
  1698. u16 passive_dwell = 0;
  1699. u16 active_dwell = 0;
  1700. int added, i;
  1701. sband = iwl_get_hw_mode(priv, band);
  1702. if (!sband)
  1703. return 0;
  1704. channels = sband->channels;
  1705. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1706. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1707. if (passive_dwell <= active_dwell)
  1708. passive_dwell = active_dwell + 1;
  1709. for (i = 0, added = 0; i < sband->n_channels; i++) {
  1710. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  1711. continue;
  1712. scan_ch->channel = channels[i].hw_value;
  1713. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1714. if (!is_channel_valid(ch_info)) {
  1715. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1716. scan_ch->channel);
  1717. continue;
  1718. }
  1719. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1720. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1721. /* If passive , set up for auto-switch
  1722. * and use long active_dwell time.
  1723. */
  1724. if (!is_active || is_channel_passive(ch_info) ||
  1725. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1726. scan_ch->type = 0; /* passive */
  1727. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1728. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1729. } else {
  1730. scan_ch->type = 1; /* active */
  1731. }
  1732. /* Set direct probe bits. These may be used both for active
  1733. * scan channels (probes gets sent right away),
  1734. * or for passive channels (probes get se sent only after
  1735. * hearing clear Rx packet).*/
  1736. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1737. if (n_probes)
  1738. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1739. } else {
  1740. /* uCode v1 does not allow setting direct probe bits on
  1741. * passive channel. */
  1742. if ((scan_ch->type & 1) && n_probes)
  1743. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1744. }
  1745. /* Set txpower levels to defaults */
  1746. scan_ch->tpc.dsp_atten = 110;
  1747. /* scan_pwr_info->tpc.dsp_atten; */
  1748. /*scan_pwr_info->tpc.tx_gain; */
  1749. if (band == IEEE80211_BAND_5GHZ)
  1750. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1751. else {
  1752. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1753. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1754. * power level:
  1755. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1756. */
  1757. }
  1758. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1759. scan_ch->channel,
  1760. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1761. (scan_ch->type & 1) ?
  1762. active_dwell : passive_dwell);
  1763. scan_ch++;
  1764. added++;
  1765. }
  1766. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1767. return added;
  1768. }
  1769. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1770. struct ieee80211_rate *rates)
  1771. {
  1772. int i;
  1773. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1774. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1775. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1776. rates[i].hw_value_short = i;
  1777. rates[i].flags = 0;
  1778. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1779. /*
  1780. * If CCK != 1M then set short preamble rate flag.
  1781. */
  1782. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1783. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1784. }
  1785. }
  1786. }
  1787. /******************************************************************************
  1788. *
  1789. * uCode download functions
  1790. *
  1791. ******************************************************************************/
  1792. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1793. {
  1794. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1795. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1796. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1797. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1798. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1799. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1800. }
  1801. /**
  1802. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1803. * looking at all data.
  1804. */
  1805. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1806. {
  1807. u32 val;
  1808. u32 save_len = len;
  1809. int rc = 0;
  1810. u32 errcnt;
  1811. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1812. rc = iwl_grab_nic_access(priv);
  1813. if (rc)
  1814. return rc;
  1815. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1816. IWL39_RTC_INST_LOWER_BOUND);
  1817. errcnt = 0;
  1818. for (; len > 0; len -= sizeof(u32), image++) {
  1819. /* read data comes through single port, auto-incr addr */
  1820. /* NOTE: Use the debugless read so we don't flood kernel log
  1821. * if IWL_DL_IO is set */
  1822. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1823. if (val != le32_to_cpu(*image)) {
  1824. IWL_ERR(priv, "uCode INST section is invalid at "
  1825. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1826. save_len - len, val, le32_to_cpu(*image));
  1827. rc = -EIO;
  1828. errcnt++;
  1829. if (errcnt >= 20)
  1830. break;
  1831. }
  1832. }
  1833. iwl_release_nic_access(priv);
  1834. if (!errcnt)
  1835. IWL_DEBUG_INFO(priv,
  1836. "ucode image in INSTRUCTION memory is good\n");
  1837. return rc;
  1838. }
  1839. /**
  1840. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1841. * using sample data 100 bytes apart. If these sample points are good,
  1842. * it's a pretty good bet that everything between them is good, too.
  1843. */
  1844. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1845. {
  1846. u32 val;
  1847. int rc = 0;
  1848. u32 errcnt = 0;
  1849. u32 i;
  1850. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1851. rc = iwl_grab_nic_access(priv);
  1852. if (rc)
  1853. return rc;
  1854. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1855. /* read data comes through single port, auto-incr addr */
  1856. /* NOTE: Use the debugless read so we don't flood kernel log
  1857. * if IWL_DL_IO is set */
  1858. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1859. i + IWL39_RTC_INST_LOWER_BOUND);
  1860. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1861. if (val != le32_to_cpu(*image)) {
  1862. #if 0 /* Enable this if you want to see details */
  1863. IWL_ERR(priv, "uCode INST section is invalid at "
  1864. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1865. i, val, *image);
  1866. #endif
  1867. rc = -EIO;
  1868. errcnt++;
  1869. if (errcnt >= 3)
  1870. break;
  1871. }
  1872. }
  1873. iwl_release_nic_access(priv);
  1874. return rc;
  1875. }
  1876. /**
  1877. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1878. * and verify its contents
  1879. */
  1880. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1881. {
  1882. __le32 *image;
  1883. u32 len;
  1884. int rc = 0;
  1885. /* Try bootstrap */
  1886. image = (__le32 *)priv->ucode_boot.v_addr;
  1887. len = priv->ucode_boot.len;
  1888. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1889. if (rc == 0) {
  1890. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1891. return 0;
  1892. }
  1893. /* Try initialize */
  1894. image = (__le32 *)priv->ucode_init.v_addr;
  1895. len = priv->ucode_init.len;
  1896. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1897. if (rc == 0) {
  1898. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1899. return 0;
  1900. }
  1901. /* Try runtime/protocol */
  1902. image = (__le32 *)priv->ucode_code.v_addr;
  1903. len = priv->ucode_code.len;
  1904. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1905. if (rc == 0) {
  1906. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1907. return 0;
  1908. }
  1909. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1910. /* Since nothing seems to match, show first several data entries in
  1911. * instruction SRAM, so maybe visual inspection will give a clue.
  1912. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1913. image = (__le32 *)priv->ucode_boot.v_addr;
  1914. len = priv->ucode_boot.len;
  1915. rc = iwl3945_verify_inst_full(priv, image, len);
  1916. return rc;
  1917. }
  1918. static void iwl3945_nic_start(struct iwl_priv *priv)
  1919. {
  1920. /* Remove all resets to allow NIC to operate */
  1921. iwl_write32(priv, CSR_RESET, 0);
  1922. }
  1923. /**
  1924. * iwl3945_read_ucode - Read uCode images from disk file.
  1925. *
  1926. * Copy into buffers for card to fetch via bus-mastering
  1927. */
  1928. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1929. {
  1930. struct iwl_ucode *ucode;
  1931. int ret = -EINVAL, index;
  1932. const struct firmware *ucode_raw;
  1933. /* firmware file name contains uCode/driver compatibility version */
  1934. const char *name_pre = priv->cfg->fw_name_pre;
  1935. const unsigned int api_max = priv->cfg->ucode_api_max;
  1936. const unsigned int api_min = priv->cfg->ucode_api_min;
  1937. char buf[25];
  1938. u8 *src;
  1939. size_t len;
  1940. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1941. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1942. * request_firmware() is synchronous, file is in memory on return. */
  1943. for (index = api_max; index >= api_min; index--) {
  1944. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1945. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1946. if (ret < 0) {
  1947. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1948. buf, ret);
  1949. if (ret == -ENOENT)
  1950. continue;
  1951. else
  1952. goto error;
  1953. } else {
  1954. if (index < api_max)
  1955. IWL_ERR(priv, "Loaded firmware %s, "
  1956. "which is deprecated. "
  1957. " Please use API v%u instead.\n",
  1958. buf, api_max);
  1959. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1960. "(%zd bytes) from disk\n",
  1961. buf, ucode_raw->size);
  1962. break;
  1963. }
  1964. }
  1965. if (ret < 0)
  1966. goto error;
  1967. /* Make sure that we got at least our header! */
  1968. if (ucode_raw->size < sizeof(*ucode)) {
  1969. IWL_ERR(priv, "File size way too small!\n");
  1970. ret = -EINVAL;
  1971. goto err_release;
  1972. }
  1973. /* Data from ucode file: header followed by uCode images */
  1974. ucode = (void *)ucode_raw->data;
  1975. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1976. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1977. inst_size = le32_to_cpu(ucode->inst_size);
  1978. data_size = le32_to_cpu(ucode->data_size);
  1979. init_size = le32_to_cpu(ucode->init_size);
  1980. init_data_size = le32_to_cpu(ucode->init_data_size);
  1981. boot_size = le32_to_cpu(ucode->boot_size);
  1982. /* api_ver should match the api version forming part of the
  1983. * firmware filename ... but we don't check for that and only rely
  1984. * on the API version read from firmware header from here on forward */
  1985. if (api_ver < api_min || api_ver > api_max) {
  1986. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1987. "Driver supports v%u, firmware is v%u.\n",
  1988. api_max, api_ver);
  1989. priv->ucode_ver = 0;
  1990. ret = -EINVAL;
  1991. goto err_release;
  1992. }
  1993. if (api_ver != api_max)
  1994. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1995. "got %u. New firmware can be obtained "
  1996. "from http://www.intellinuxwireless.org.\n",
  1997. api_max, api_ver);
  1998. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1999. IWL_UCODE_MAJOR(priv->ucode_ver),
  2000. IWL_UCODE_MINOR(priv->ucode_ver),
  2001. IWL_UCODE_API(priv->ucode_ver),
  2002. IWL_UCODE_SERIAL(priv->ucode_ver));
  2003. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  2004. priv->ucode_ver);
  2005. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  2006. inst_size);
  2007. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  2008. data_size);
  2009. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  2010. init_size);
  2011. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  2012. init_data_size);
  2013. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  2014. boot_size);
  2015. /* Verify size of file vs. image size info in file's header */
  2016. if (ucode_raw->size < sizeof(*ucode) +
  2017. inst_size + data_size + init_size +
  2018. init_data_size + boot_size) {
  2019. IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
  2020. ucode_raw->size);
  2021. ret = -EINVAL;
  2022. goto err_release;
  2023. }
  2024. /* Verify that uCode images will fit in card's SRAM */
  2025. if (inst_size > IWL39_MAX_INST_SIZE) {
  2026. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  2027. inst_size);
  2028. ret = -EINVAL;
  2029. goto err_release;
  2030. }
  2031. if (data_size > IWL39_MAX_DATA_SIZE) {
  2032. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  2033. data_size);
  2034. ret = -EINVAL;
  2035. goto err_release;
  2036. }
  2037. if (init_size > IWL39_MAX_INST_SIZE) {
  2038. IWL_DEBUG_INFO(priv,
  2039. "uCode init instr len %d too large to fit in\n",
  2040. init_size);
  2041. ret = -EINVAL;
  2042. goto err_release;
  2043. }
  2044. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  2045. IWL_DEBUG_INFO(priv,
  2046. "uCode init data len %d too large to fit in\n",
  2047. init_data_size);
  2048. ret = -EINVAL;
  2049. goto err_release;
  2050. }
  2051. if (boot_size > IWL39_MAX_BSM_SIZE) {
  2052. IWL_DEBUG_INFO(priv,
  2053. "uCode boot instr len %d too large to fit in\n",
  2054. boot_size);
  2055. ret = -EINVAL;
  2056. goto err_release;
  2057. }
  2058. /* Allocate ucode buffers for card's bus-master loading ... */
  2059. /* Runtime instructions and 2 copies of data:
  2060. * 1) unmodified from disk
  2061. * 2) backup cache for save/restore during power-downs */
  2062. priv->ucode_code.len = inst_size;
  2063. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  2064. priv->ucode_data.len = data_size;
  2065. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  2066. priv->ucode_data_backup.len = data_size;
  2067. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2068. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  2069. !priv->ucode_data_backup.v_addr)
  2070. goto err_pci_alloc;
  2071. /* Initialization instructions and data */
  2072. if (init_size && init_data_size) {
  2073. priv->ucode_init.len = init_size;
  2074. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  2075. priv->ucode_init_data.len = init_data_size;
  2076. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2077. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  2078. goto err_pci_alloc;
  2079. }
  2080. /* Bootstrap (instructions only, no data) */
  2081. if (boot_size) {
  2082. priv->ucode_boot.len = boot_size;
  2083. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2084. if (!priv->ucode_boot.v_addr)
  2085. goto err_pci_alloc;
  2086. }
  2087. /* Copy images into buffers for card's bus-master reads ... */
  2088. /* Runtime instructions (first block of data in file) */
  2089. src = &ucode->data[0];
  2090. len = priv->ucode_code.len;
  2091. IWL_DEBUG_INFO(priv,
  2092. "Copying (but not loading) uCode instr len %zd\n", len);
  2093. memcpy(priv->ucode_code.v_addr, src, len);
  2094. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  2095. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  2096. /* Runtime data (2nd block)
  2097. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  2098. src = &ucode->data[inst_size];
  2099. len = priv->ucode_data.len;
  2100. IWL_DEBUG_INFO(priv,
  2101. "Copying (but not loading) uCode data len %zd\n", len);
  2102. memcpy(priv->ucode_data.v_addr, src, len);
  2103. memcpy(priv->ucode_data_backup.v_addr, src, len);
  2104. /* Initialization instructions (3rd block) */
  2105. if (init_size) {
  2106. src = &ucode->data[inst_size + data_size];
  2107. len = priv->ucode_init.len;
  2108. IWL_DEBUG_INFO(priv,
  2109. "Copying (but not loading) init instr len %zd\n", len);
  2110. memcpy(priv->ucode_init.v_addr, src, len);
  2111. }
  2112. /* Initialization data (4th block) */
  2113. if (init_data_size) {
  2114. src = &ucode->data[inst_size + data_size + init_size];
  2115. len = priv->ucode_init_data.len;
  2116. IWL_DEBUG_INFO(priv,
  2117. "Copying (but not loading) init data len %zd\n", len);
  2118. memcpy(priv->ucode_init_data.v_addr, src, len);
  2119. }
  2120. /* Bootstrap instructions (5th block) */
  2121. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  2122. len = priv->ucode_boot.len;
  2123. IWL_DEBUG_INFO(priv,
  2124. "Copying (but not loading) boot instr len %zd\n", len);
  2125. memcpy(priv->ucode_boot.v_addr, src, len);
  2126. /* We have our copies now, allow OS release its copies */
  2127. release_firmware(ucode_raw);
  2128. return 0;
  2129. err_pci_alloc:
  2130. IWL_ERR(priv, "failed to allocate pci memory\n");
  2131. ret = -ENOMEM;
  2132. iwl3945_dealloc_ucode_pci(priv);
  2133. err_release:
  2134. release_firmware(ucode_raw);
  2135. error:
  2136. return ret;
  2137. }
  2138. /**
  2139. * iwl3945_set_ucode_ptrs - Set uCode address location
  2140. *
  2141. * Tell initialization uCode where to find runtime uCode.
  2142. *
  2143. * BSM registers initially contain pointers to initialization uCode.
  2144. * We need to replace them to load runtime uCode inst and data,
  2145. * and to save runtime data when powering down.
  2146. */
  2147. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2148. {
  2149. dma_addr_t pinst;
  2150. dma_addr_t pdata;
  2151. int rc = 0;
  2152. unsigned long flags;
  2153. /* bits 31:0 for 3945 */
  2154. pinst = priv->ucode_code.p_addr;
  2155. pdata = priv->ucode_data_backup.p_addr;
  2156. spin_lock_irqsave(&priv->lock, flags);
  2157. rc = iwl_grab_nic_access(priv);
  2158. if (rc) {
  2159. spin_unlock_irqrestore(&priv->lock, flags);
  2160. return rc;
  2161. }
  2162. /* Tell bootstrap uCode where to find image to load */
  2163. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2164. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2165. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2166. priv->ucode_data.len);
  2167. /* Inst byte count must be last to set up, bit 31 signals uCode
  2168. * that all new ptr/size info is in place */
  2169. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2170. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2171. iwl_release_nic_access(priv);
  2172. spin_unlock_irqrestore(&priv->lock, flags);
  2173. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2174. return rc;
  2175. }
  2176. /**
  2177. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2178. *
  2179. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2180. *
  2181. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2182. */
  2183. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2184. {
  2185. /* Check alive response for "valid" sign from uCode */
  2186. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2187. /* We had an error bringing up the hardware, so take it
  2188. * all the way back down so we can try again */
  2189. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2190. goto restart;
  2191. }
  2192. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2193. * This is a paranoid check, because we would not have gotten the
  2194. * "initialize" alive if code weren't properly loaded. */
  2195. if (iwl3945_verify_ucode(priv)) {
  2196. /* Runtime instruction load was bad;
  2197. * take it all the way back down so we can try again */
  2198. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2199. goto restart;
  2200. }
  2201. /* Send pointers to protocol/runtime uCode image ... init code will
  2202. * load and launch runtime uCode, which will send us another "Alive"
  2203. * notification. */
  2204. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2205. if (iwl3945_set_ucode_ptrs(priv)) {
  2206. /* Runtime instruction load won't happen;
  2207. * take it all the way back down so we can try again */
  2208. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2209. goto restart;
  2210. }
  2211. return;
  2212. restart:
  2213. queue_work(priv->workqueue, &priv->restart);
  2214. }
  2215. /**
  2216. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2217. * from protocol/runtime uCode (initialization uCode's
  2218. * Alive gets handled by iwl3945_init_alive_start()).
  2219. */
  2220. static void iwl3945_alive_start(struct iwl_priv *priv)
  2221. {
  2222. int rc = 0;
  2223. int thermal_spin = 0;
  2224. u32 rfkill;
  2225. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2226. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2227. /* We had an error bringing up the hardware, so take it
  2228. * all the way back down so we can try again */
  2229. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2230. goto restart;
  2231. }
  2232. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2233. * This is a paranoid check, because we would not have gotten the
  2234. * "runtime" alive if code weren't properly loaded. */
  2235. if (iwl3945_verify_ucode(priv)) {
  2236. /* Runtime instruction load was bad;
  2237. * take it all the way back down so we can try again */
  2238. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2239. goto restart;
  2240. }
  2241. priv->cfg->ops->smgmt->clear_station_table(priv);
  2242. rc = iwl_grab_nic_access(priv);
  2243. if (rc) {
  2244. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  2245. return;
  2246. }
  2247. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2248. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2249. iwl_release_nic_access(priv);
  2250. if (rfkill & 0x1) {
  2251. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2252. /* if RFKILL is not on, then wait for thermal
  2253. * sensor in adapter to kick in */
  2254. while (iwl3945_hw_get_temperature(priv) == 0) {
  2255. thermal_spin++;
  2256. udelay(10);
  2257. }
  2258. if (thermal_spin)
  2259. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2260. thermal_spin * 10);
  2261. } else
  2262. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2263. /* After the ALIVE response, we can send commands to 3945 uCode */
  2264. set_bit(STATUS_ALIVE, &priv->status);
  2265. /* Clear out the uCode error bit if it is set */
  2266. clear_bit(STATUS_FW_ERROR, &priv->status);
  2267. if (iwl_is_rfkill(priv))
  2268. return;
  2269. ieee80211_wake_queues(priv->hw);
  2270. priv->active_rate = priv->rates_mask;
  2271. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2272. iwl_power_update_mode(priv, false);
  2273. if (iwl_is_associated(priv)) {
  2274. struct iwl3945_rxon_cmd *active_rxon =
  2275. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2276. memcpy(&priv->staging_rxon, &priv->active_rxon,
  2277. sizeof(priv->staging_rxon));
  2278. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2279. } else {
  2280. /* Initialize our rx_config data */
  2281. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2282. }
  2283. /* Configure Bluetooth device coexistence support */
  2284. iwl_send_bt_config(priv);
  2285. /* Configure the adapter for unassociated operation */
  2286. iwlcore_commit_rxon(priv);
  2287. iwl3945_reg_txpower_periodic(priv);
  2288. iwl3945_led_register(priv);
  2289. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2290. set_bit(STATUS_READY, &priv->status);
  2291. wake_up_interruptible(&priv->wait_command_queue);
  2292. if (priv->error_recovering)
  2293. iwl3945_error_recovery(priv);
  2294. /* reassociate for ADHOC mode */
  2295. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2296. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2297. priv->vif);
  2298. if (beacon)
  2299. iwl_mac_beacon_update(priv->hw, beacon);
  2300. }
  2301. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2302. iwl_set_mode(priv, priv->iw_mode);
  2303. return;
  2304. restart:
  2305. queue_work(priv->workqueue, &priv->restart);
  2306. }
  2307. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2308. static void __iwl3945_down(struct iwl_priv *priv)
  2309. {
  2310. unsigned long flags;
  2311. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2312. struct ieee80211_conf *conf = NULL;
  2313. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2314. conf = ieee80211_get_hw_conf(priv->hw);
  2315. if (!exit_pending)
  2316. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2317. iwl3945_led_unregister(priv);
  2318. priv->cfg->ops->smgmt->clear_station_table(priv);
  2319. /* Unblock any waiting calls */
  2320. wake_up_interruptible_all(&priv->wait_command_queue);
  2321. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2322. * exiting the module */
  2323. if (!exit_pending)
  2324. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2325. /* stop and reset the on-board processor */
  2326. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2327. /* tell the device to stop sending interrupts */
  2328. spin_lock_irqsave(&priv->lock, flags);
  2329. iwl_disable_interrupts(priv);
  2330. spin_unlock_irqrestore(&priv->lock, flags);
  2331. iwl_synchronize_irq(priv);
  2332. if (priv->mac80211_registered)
  2333. ieee80211_stop_queues(priv->hw);
  2334. /* If we have not previously called iwl3945_init() then
  2335. * clear all bits but the RF Kill bits and return */
  2336. if (!iwl_is_init(priv)) {
  2337. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2338. STATUS_RF_KILL_HW |
  2339. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2340. STATUS_RF_KILL_SW |
  2341. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2342. STATUS_GEO_CONFIGURED |
  2343. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2344. STATUS_EXIT_PENDING;
  2345. goto exit;
  2346. }
  2347. /* ...otherwise clear out all the status bits but the RF Kill
  2348. * bits and continue taking the NIC down. */
  2349. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2350. STATUS_RF_KILL_HW |
  2351. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2352. STATUS_RF_KILL_SW |
  2353. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2354. STATUS_GEO_CONFIGURED |
  2355. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2356. STATUS_FW_ERROR |
  2357. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2358. STATUS_EXIT_PENDING;
  2359. priv->cfg->ops->lib->apm_ops.reset(priv);
  2360. spin_lock_irqsave(&priv->lock, flags);
  2361. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2362. spin_unlock_irqrestore(&priv->lock, flags);
  2363. iwl3945_hw_txq_ctx_stop(priv);
  2364. iwl3945_hw_rxq_stop(priv);
  2365. spin_lock_irqsave(&priv->lock, flags);
  2366. if (!iwl_grab_nic_access(priv)) {
  2367. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2368. APMG_CLK_VAL_DMA_CLK_RQT);
  2369. iwl_release_nic_access(priv);
  2370. }
  2371. spin_unlock_irqrestore(&priv->lock, flags);
  2372. udelay(5);
  2373. if (exit_pending)
  2374. priv->cfg->ops->lib->apm_ops.stop(priv);
  2375. else
  2376. priv->cfg->ops->lib->apm_ops.reset(priv);
  2377. exit:
  2378. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2379. if (priv->ibss_beacon)
  2380. dev_kfree_skb(priv->ibss_beacon);
  2381. priv->ibss_beacon = NULL;
  2382. /* clear out any free frames */
  2383. iwl3945_clear_free_frames(priv);
  2384. }
  2385. static void iwl3945_down(struct iwl_priv *priv)
  2386. {
  2387. mutex_lock(&priv->mutex);
  2388. __iwl3945_down(priv);
  2389. mutex_unlock(&priv->mutex);
  2390. iwl3945_cancel_deferred_work(priv);
  2391. }
  2392. #define MAX_HW_RESTARTS 5
  2393. static int __iwl3945_up(struct iwl_priv *priv)
  2394. {
  2395. int rc, i;
  2396. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2397. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2398. return -EIO;
  2399. }
  2400. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  2401. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  2402. "parameter)\n");
  2403. return -ENODEV;
  2404. }
  2405. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2406. IWL_ERR(priv, "ucode not available for device bring up\n");
  2407. return -EIO;
  2408. }
  2409. /* If platform's RF_KILL switch is NOT set to KILL */
  2410. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2411. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2412. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2413. else {
  2414. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2415. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2416. return -ENODEV;
  2417. }
  2418. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2419. rc = iwl3945_hw_nic_init(priv);
  2420. if (rc) {
  2421. IWL_ERR(priv, "Unable to int nic\n");
  2422. return rc;
  2423. }
  2424. /* make sure rfkill handshake bits are cleared */
  2425. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2426. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2427. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2428. /* clear (again), then enable host interrupts */
  2429. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2430. iwl_enable_interrupts(priv);
  2431. /* really make sure rfkill handshake bits are cleared */
  2432. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2433. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2434. /* Copy original ucode data image from disk into backup cache.
  2435. * This will be used to initialize the on-board processor's
  2436. * data SRAM for a clean start when the runtime program first loads. */
  2437. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2438. priv->ucode_data.len);
  2439. /* We return success when we resume from suspend and rf_kill is on. */
  2440. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2441. return 0;
  2442. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2443. priv->cfg->ops->smgmt->clear_station_table(priv);
  2444. /* load bootstrap state machine,
  2445. * load bootstrap program into processor's memory,
  2446. * prepare to load the "initialize" uCode */
  2447. priv->cfg->ops->lib->load_ucode(priv);
  2448. if (rc) {
  2449. IWL_ERR(priv,
  2450. "Unable to set up bootstrap uCode: %d\n", rc);
  2451. continue;
  2452. }
  2453. /* start card; "initialize" will load runtime ucode */
  2454. iwl3945_nic_start(priv);
  2455. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2456. return 0;
  2457. }
  2458. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2459. __iwl3945_down(priv);
  2460. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2461. /* tried to restart and config the device for as long as our
  2462. * patience could withstand */
  2463. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2464. return -EIO;
  2465. }
  2466. /*****************************************************************************
  2467. *
  2468. * Workqueue callbacks
  2469. *
  2470. *****************************************************************************/
  2471. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2472. {
  2473. struct iwl_priv *priv =
  2474. container_of(data, struct iwl_priv, init_alive_start.work);
  2475. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2476. return;
  2477. mutex_lock(&priv->mutex);
  2478. iwl3945_init_alive_start(priv);
  2479. mutex_unlock(&priv->mutex);
  2480. }
  2481. static void iwl3945_bg_alive_start(struct work_struct *data)
  2482. {
  2483. struct iwl_priv *priv =
  2484. container_of(data, struct iwl_priv, alive_start.work);
  2485. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2486. return;
  2487. mutex_lock(&priv->mutex);
  2488. iwl3945_alive_start(priv);
  2489. mutex_unlock(&priv->mutex);
  2490. }
  2491. static void iwl3945_rfkill_poll(struct work_struct *data)
  2492. {
  2493. struct iwl_priv *priv =
  2494. container_of(data, struct iwl_priv, rfkill_poll.work);
  2495. unsigned long status = priv->status;
  2496. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2497. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2498. else
  2499. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2500. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  2501. queue_work(priv->workqueue, &priv->rf_kill);
  2502. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2503. round_jiffies_relative(2 * HZ));
  2504. }
  2505. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2506. static void iwl3945_bg_request_scan(struct work_struct *data)
  2507. {
  2508. struct iwl_priv *priv =
  2509. container_of(data, struct iwl_priv, request_scan);
  2510. struct iwl_host_cmd cmd = {
  2511. .id = REPLY_SCAN_CMD,
  2512. .len = sizeof(struct iwl3945_scan_cmd),
  2513. .meta.flags = CMD_SIZE_HUGE,
  2514. };
  2515. int rc = 0;
  2516. struct iwl3945_scan_cmd *scan;
  2517. struct ieee80211_conf *conf = NULL;
  2518. u8 n_probes = 0;
  2519. enum ieee80211_band band;
  2520. bool is_active = false;
  2521. conf = ieee80211_get_hw_conf(priv->hw);
  2522. mutex_lock(&priv->mutex);
  2523. if (!iwl_is_ready(priv)) {
  2524. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2525. goto done;
  2526. }
  2527. /* Make sure the scan wasn't canceled before this queued work
  2528. * was given the chance to run... */
  2529. if (!test_bit(STATUS_SCANNING, &priv->status))
  2530. goto done;
  2531. /* This should never be called or scheduled if there is currently
  2532. * a scan active in the hardware. */
  2533. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2534. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2535. "Ignoring second request.\n");
  2536. rc = -EIO;
  2537. goto done;
  2538. }
  2539. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2540. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2541. goto done;
  2542. }
  2543. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2544. IWL_DEBUG_HC(priv,
  2545. "Scan request while abort pending. Queuing.\n");
  2546. goto done;
  2547. }
  2548. if (iwl_is_rfkill(priv)) {
  2549. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2550. goto done;
  2551. }
  2552. if (!test_bit(STATUS_READY, &priv->status)) {
  2553. IWL_DEBUG_HC(priv,
  2554. "Scan request while uninitialized. Queuing.\n");
  2555. goto done;
  2556. }
  2557. if (!priv->scan_bands) {
  2558. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2559. goto done;
  2560. }
  2561. if (!priv->scan) {
  2562. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2563. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2564. if (!priv->scan) {
  2565. rc = -ENOMEM;
  2566. goto done;
  2567. }
  2568. }
  2569. scan = priv->scan;
  2570. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2571. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2572. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2573. if (iwl_is_associated(priv)) {
  2574. u16 interval = 0;
  2575. u32 extra;
  2576. u32 suspend_time = 100;
  2577. u32 scan_suspend_time = 100;
  2578. unsigned long flags;
  2579. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2580. spin_lock_irqsave(&priv->lock, flags);
  2581. interval = priv->beacon_int;
  2582. spin_unlock_irqrestore(&priv->lock, flags);
  2583. scan->suspend_time = 0;
  2584. scan->max_out_time = cpu_to_le32(200 * 1024);
  2585. if (!interval)
  2586. interval = suspend_time;
  2587. /*
  2588. * suspend time format:
  2589. * 0-19: beacon interval in usec (time before exec.)
  2590. * 20-23: 0
  2591. * 24-31: number of beacons (suspend between channels)
  2592. */
  2593. extra = (suspend_time / interval) << 24;
  2594. scan_suspend_time = 0xFF0FFFFF &
  2595. (extra | ((suspend_time % interval) * 1024));
  2596. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2597. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2598. scan_suspend_time, interval);
  2599. }
  2600. if (priv->scan_request->n_ssids) {
  2601. int i, p = 0;
  2602. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2603. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2604. /* always does wildcard anyway */
  2605. if (!priv->scan_request->ssids[i].ssid_len)
  2606. continue;
  2607. scan->direct_scan[p].id = WLAN_EID_SSID;
  2608. scan->direct_scan[p].len =
  2609. priv->scan_request->ssids[i].ssid_len;
  2610. memcpy(scan->direct_scan[p].ssid,
  2611. priv->scan_request->ssids[i].ssid,
  2612. priv->scan_request->ssids[i].ssid_len);
  2613. n_probes++;
  2614. p++;
  2615. }
  2616. is_active = true;
  2617. } else
  2618. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2619. /* We don't build a direct scan probe request; the uCode will do
  2620. * that based on the direct_mask added to each channel entry */
  2621. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2622. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2623. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2624. /* flags + rate selection */
  2625. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2626. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2627. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2628. scan->good_CRC_th = 0;
  2629. band = IEEE80211_BAND_2GHZ;
  2630. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2631. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2632. /*
  2633. * If active scaning is requested but a certain channel
  2634. * is marked passive, we can do active scanning if we
  2635. * detect transmissions.
  2636. */
  2637. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2638. band = IEEE80211_BAND_5GHZ;
  2639. } else {
  2640. IWL_WARN(priv, "Invalid scan band count\n");
  2641. goto done;
  2642. }
  2643. scan->tx_cmd.len = cpu_to_le16(
  2644. iwl_fill_probe_req(priv,
  2645. (struct ieee80211_mgmt *)scan->data,
  2646. priv->scan_request->ie,
  2647. priv->scan_request->ie_len,
  2648. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2649. /* select Rx antennas */
  2650. scan->flags |= iwl3945_get_antenna_flags(priv);
  2651. if (iwl_is_monitor_mode(priv))
  2652. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2653. scan->channel_count =
  2654. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2655. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2656. if (scan->channel_count == 0) {
  2657. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2658. goto done;
  2659. }
  2660. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2661. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2662. cmd.data = scan;
  2663. scan->len = cpu_to_le16(cmd.len);
  2664. set_bit(STATUS_SCAN_HW, &priv->status);
  2665. rc = iwl_send_cmd_sync(priv, &cmd);
  2666. if (rc)
  2667. goto done;
  2668. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2669. IWL_SCAN_CHECK_WATCHDOG);
  2670. mutex_unlock(&priv->mutex);
  2671. return;
  2672. done:
  2673. /* can not perform scan make sure we clear scanning
  2674. * bits from status so next scan request can be performed.
  2675. * if we dont clear scanning status bit here all next scan
  2676. * will fail
  2677. */
  2678. clear_bit(STATUS_SCAN_HW, &priv->status);
  2679. clear_bit(STATUS_SCANNING, &priv->status);
  2680. /* inform mac80211 scan aborted */
  2681. queue_work(priv->workqueue, &priv->scan_completed);
  2682. mutex_unlock(&priv->mutex);
  2683. }
  2684. static void iwl3945_bg_up(struct work_struct *data)
  2685. {
  2686. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2687. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2688. return;
  2689. mutex_lock(&priv->mutex);
  2690. __iwl3945_up(priv);
  2691. mutex_unlock(&priv->mutex);
  2692. iwl_rfkill_set_hw_state(priv);
  2693. }
  2694. static void iwl3945_bg_restart(struct work_struct *data)
  2695. {
  2696. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2697. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2698. return;
  2699. iwl3945_down(priv);
  2700. queue_work(priv->workqueue, &priv->up);
  2701. }
  2702. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2703. {
  2704. struct iwl_priv *priv =
  2705. container_of(data, struct iwl_priv, rx_replenish);
  2706. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2707. return;
  2708. mutex_lock(&priv->mutex);
  2709. iwl3945_rx_replenish(priv);
  2710. mutex_unlock(&priv->mutex);
  2711. }
  2712. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2713. void iwl3945_post_associate(struct iwl_priv *priv)
  2714. {
  2715. int rc = 0;
  2716. struct ieee80211_conf *conf = NULL;
  2717. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2718. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2719. return;
  2720. }
  2721. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2722. priv->assoc_id, priv->active_rxon.bssid_addr);
  2723. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2724. return;
  2725. if (!priv->vif || !priv->is_open)
  2726. return;
  2727. iwl_scan_cancel_timeout(priv, 200);
  2728. conf = ieee80211_get_hw_conf(priv->hw);
  2729. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2730. iwlcore_commit_rxon(priv);
  2731. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2732. iwl3945_setup_rxon_timing(priv);
  2733. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2734. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2735. if (rc)
  2736. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2737. "Attempting to continue.\n");
  2738. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2739. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2740. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2741. priv->assoc_id, priv->beacon_int);
  2742. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2743. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2744. else
  2745. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2746. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2747. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2748. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2749. else
  2750. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2751. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2752. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2753. }
  2754. iwlcore_commit_rxon(priv);
  2755. switch (priv->iw_mode) {
  2756. case NL80211_IFTYPE_STATION:
  2757. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2758. break;
  2759. case NL80211_IFTYPE_ADHOC:
  2760. priv->assoc_id = 1;
  2761. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0, NULL);
  2762. iwl3945_sync_sta(priv, IWL_STA_ID,
  2763. (priv->band == IEEE80211_BAND_5GHZ) ?
  2764. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2765. CMD_ASYNC);
  2766. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2767. iwl3945_send_beacon_cmd(priv);
  2768. break;
  2769. default:
  2770. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2771. __func__, priv->iw_mode);
  2772. break;
  2773. }
  2774. iwl_activate_qos(priv, 0);
  2775. /* we have just associated, don't start scan too early */
  2776. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2777. }
  2778. /*****************************************************************************
  2779. *
  2780. * mac80211 entry point functions
  2781. *
  2782. *****************************************************************************/
  2783. #define UCODE_READY_TIMEOUT (2 * HZ)
  2784. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2785. {
  2786. struct iwl_priv *priv = hw->priv;
  2787. int ret;
  2788. IWL_DEBUG_MAC80211(priv, "enter\n");
  2789. /* we should be verifying the device is ready to be opened */
  2790. mutex_lock(&priv->mutex);
  2791. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2792. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2793. * ucode filename and max sizes are card-specific. */
  2794. if (!priv->ucode_code.len) {
  2795. ret = iwl3945_read_ucode(priv);
  2796. if (ret) {
  2797. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2798. mutex_unlock(&priv->mutex);
  2799. goto out_release_irq;
  2800. }
  2801. }
  2802. ret = __iwl3945_up(priv);
  2803. mutex_unlock(&priv->mutex);
  2804. iwl_rfkill_set_hw_state(priv);
  2805. if (ret)
  2806. goto out_release_irq;
  2807. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2808. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2809. * mac80211 will not be run successfully. */
  2810. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2811. test_bit(STATUS_READY, &priv->status),
  2812. UCODE_READY_TIMEOUT);
  2813. if (!ret) {
  2814. if (!test_bit(STATUS_READY, &priv->status)) {
  2815. IWL_ERR(priv,
  2816. "Wait for START_ALIVE timeout after %dms.\n",
  2817. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2818. ret = -ETIMEDOUT;
  2819. goto out_release_irq;
  2820. }
  2821. }
  2822. /* ucode is running and will send rfkill notifications,
  2823. * no need to poll the killswitch state anymore */
  2824. cancel_delayed_work(&priv->rfkill_poll);
  2825. priv->is_open = 1;
  2826. IWL_DEBUG_MAC80211(priv, "leave\n");
  2827. return 0;
  2828. out_release_irq:
  2829. priv->is_open = 0;
  2830. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2831. return ret;
  2832. }
  2833. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2834. {
  2835. struct iwl_priv *priv = hw->priv;
  2836. IWL_DEBUG_MAC80211(priv, "enter\n");
  2837. if (!priv->is_open) {
  2838. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2839. return;
  2840. }
  2841. priv->is_open = 0;
  2842. if (iwl_is_ready_rf(priv)) {
  2843. /* stop mac, cancel any scan request and clear
  2844. * RXON_FILTER_ASSOC_MSK BIT
  2845. */
  2846. mutex_lock(&priv->mutex);
  2847. iwl_scan_cancel_timeout(priv, 100);
  2848. mutex_unlock(&priv->mutex);
  2849. }
  2850. iwl3945_down(priv);
  2851. flush_workqueue(priv->workqueue);
  2852. /* start polling the killswitch state again */
  2853. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2854. round_jiffies_relative(2 * HZ));
  2855. IWL_DEBUG_MAC80211(priv, "leave\n");
  2856. }
  2857. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2858. {
  2859. struct iwl_priv *priv = hw->priv;
  2860. IWL_DEBUG_MAC80211(priv, "enter\n");
  2861. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2862. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2863. if (iwl3945_tx_skb(priv, skb))
  2864. dev_kfree_skb_any(skb);
  2865. IWL_DEBUG_MAC80211(priv, "leave\n");
  2866. return NETDEV_TX_OK;
  2867. }
  2868. void iwl3945_config_ap(struct iwl_priv *priv)
  2869. {
  2870. int rc = 0;
  2871. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2872. return;
  2873. /* The following should be done only at AP bring up */
  2874. if (!(iwl_is_associated(priv))) {
  2875. /* RXON - unassoc (to set timing command) */
  2876. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2877. iwlcore_commit_rxon(priv);
  2878. /* RXON Timing */
  2879. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2880. iwl3945_setup_rxon_timing(priv);
  2881. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2882. sizeof(priv->rxon_timing),
  2883. &priv->rxon_timing);
  2884. if (rc)
  2885. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2886. "Attempting to continue.\n");
  2887. /* FIXME: what should be the assoc_id for AP? */
  2888. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2889. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2890. priv->staging_rxon.flags |=
  2891. RXON_FLG_SHORT_PREAMBLE_MSK;
  2892. else
  2893. priv->staging_rxon.flags &=
  2894. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2895. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2896. if (priv->assoc_capability &
  2897. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2898. priv->staging_rxon.flags |=
  2899. RXON_FLG_SHORT_SLOT_MSK;
  2900. else
  2901. priv->staging_rxon.flags &=
  2902. ~RXON_FLG_SHORT_SLOT_MSK;
  2903. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2904. priv->staging_rxon.flags &=
  2905. ~RXON_FLG_SHORT_SLOT_MSK;
  2906. }
  2907. /* restore RXON assoc */
  2908. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2909. iwlcore_commit_rxon(priv);
  2910. priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL);
  2911. }
  2912. iwl3945_send_beacon_cmd(priv);
  2913. /* FIXME - we need to add code here to detect a totally new
  2914. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2915. * clear sta table, add BCAST sta... */
  2916. }
  2917. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2918. struct ieee80211_vif *vif,
  2919. struct ieee80211_sta *sta,
  2920. struct ieee80211_key_conf *key)
  2921. {
  2922. struct iwl_priv *priv = hw->priv;
  2923. const u8 *addr;
  2924. int ret = 0;
  2925. u8 sta_id = IWL_INVALID_STATION;
  2926. u8 static_key;
  2927. IWL_DEBUG_MAC80211(priv, "enter\n");
  2928. if (iwl3945_mod_params.sw_crypto) {
  2929. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2930. return -EOPNOTSUPP;
  2931. }
  2932. addr = sta ? sta->addr : iwl_bcast_addr;
  2933. static_key = !iwl_is_associated(priv);
  2934. if (!static_key) {
  2935. sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
  2936. if (sta_id == IWL_INVALID_STATION) {
  2937. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2938. addr);
  2939. return -EINVAL;
  2940. }
  2941. }
  2942. mutex_lock(&priv->mutex);
  2943. iwl_scan_cancel_timeout(priv, 100);
  2944. mutex_unlock(&priv->mutex);
  2945. switch (cmd) {
  2946. case SET_KEY:
  2947. if (static_key)
  2948. ret = iwl3945_set_static_key(priv, key);
  2949. else
  2950. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2951. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2952. break;
  2953. case DISABLE_KEY:
  2954. if (static_key)
  2955. ret = iwl3945_remove_static_key(priv);
  2956. else
  2957. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2958. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2959. break;
  2960. default:
  2961. ret = -EINVAL;
  2962. }
  2963. IWL_DEBUG_MAC80211(priv, "leave\n");
  2964. return ret;
  2965. }
  2966. /*****************************************************************************
  2967. *
  2968. * sysfs attributes
  2969. *
  2970. *****************************************************************************/
  2971. #ifdef CONFIG_IWLWIFI_DEBUG
  2972. /*
  2973. * The following adds a new attribute to the sysfs representation
  2974. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2975. * used for controlling the debug level.
  2976. *
  2977. * See the level definitions in iwl for details.
  2978. */
  2979. static ssize_t show_debug_level(struct device *d,
  2980. struct device_attribute *attr, char *buf)
  2981. {
  2982. struct iwl_priv *priv = d->driver_data;
  2983. return sprintf(buf, "0x%08X\n", priv->debug_level);
  2984. }
  2985. static ssize_t store_debug_level(struct device *d,
  2986. struct device_attribute *attr,
  2987. const char *buf, size_t count)
  2988. {
  2989. struct iwl_priv *priv = d->driver_data;
  2990. unsigned long val;
  2991. int ret;
  2992. ret = strict_strtoul(buf, 0, &val);
  2993. if (ret)
  2994. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2995. else
  2996. priv->debug_level = val;
  2997. return strnlen(buf, count);
  2998. }
  2999. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  3000. show_debug_level, store_debug_level);
  3001. #endif /* CONFIG_IWLWIFI_DEBUG */
  3002. static ssize_t show_temperature(struct device *d,
  3003. struct device_attribute *attr, char *buf)
  3004. {
  3005. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3006. if (!iwl_is_alive(priv))
  3007. return -EAGAIN;
  3008. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  3009. }
  3010. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  3011. static ssize_t show_tx_power(struct device *d,
  3012. struct device_attribute *attr, char *buf)
  3013. {
  3014. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3015. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  3016. }
  3017. static ssize_t store_tx_power(struct device *d,
  3018. struct device_attribute *attr,
  3019. const char *buf, size_t count)
  3020. {
  3021. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3022. char *p = (char *)buf;
  3023. u32 val;
  3024. val = simple_strtoul(p, &p, 10);
  3025. if (p == buf)
  3026. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  3027. else
  3028. iwl3945_hw_reg_set_txpower(priv, val);
  3029. return count;
  3030. }
  3031. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  3032. static ssize_t show_flags(struct device *d,
  3033. struct device_attribute *attr, char *buf)
  3034. {
  3035. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3036. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  3037. }
  3038. static ssize_t store_flags(struct device *d,
  3039. struct device_attribute *attr,
  3040. const char *buf, size_t count)
  3041. {
  3042. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3043. u32 flags = simple_strtoul(buf, NULL, 0);
  3044. mutex_lock(&priv->mutex);
  3045. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  3046. /* Cancel any currently running scans... */
  3047. if (iwl_scan_cancel_timeout(priv, 100))
  3048. IWL_WARN(priv, "Could not cancel scan.\n");
  3049. else {
  3050. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  3051. flags);
  3052. priv->staging_rxon.flags = cpu_to_le32(flags);
  3053. iwlcore_commit_rxon(priv);
  3054. }
  3055. }
  3056. mutex_unlock(&priv->mutex);
  3057. return count;
  3058. }
  3059. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  3060. static ssize_t show_filter_flags(struct device *d,
  3061. struct device_attribute *attr, char *buf)
  3062. {
  3063. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3064. return sprintf(buf, "0x%04X\n",
  3065. le32_to_cpu(priv->active_rxon.filter_flags));
  3066. }
  3067. static ssize_t store_filter_flags(struct device *d,
  3068. struct device_attribute *attr,
  3069. const char *buf, size_t count)
  3070. {
  3071. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3072. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  3073. mutex_lock(&priv->mutex);
  3074. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  3075. /* Cancel any currently running scans... */
  3076. if (iwl_scan_cancel_timeout(priv, 100))
  3077. IWL_WARN(priv, "Could not cancel scan.\n");
  3078. else {
  3079. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  3080. "0x%04X\n", filter_flags);
  3081. priv->staging_rxon.filter_flags =
  3082. cpu_to_le32(filter_flags);
  3083. iwlcore_commit_rxon(priv);
  3084. }
  3085. }
  3086. mutex_unlock(&priv->mutex);
  3087. return count;
  3088. }
  3089. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  3090. store_filter_flags);
  3091. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3092. static ssize_t show_measurement(struct device *d,
  3093. struct device_attribute *attr, char *buf)
  3094. {
  3095. struct iwl_priv *priv = dev_get_drvdata(d);
  3096. struct iwl_spectrum_notification measure_report;
  3097. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  3098. u8 *data = (u8 *)&measure_report;
  3099. unsigned long flags;
  3100. spin_lock_irqsave(&priv->lock, flags);
  3101. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  3102. spin_unlock_irqrestore(&priv->lock, flags);
  3103. return 0;
  3104. }
  3105. memcpy(&measure_report, &priv->measure_report, size);
  3106. priv->measurement_status = 0;
  3107. spin_unlock_irqrestore(&priv->lock, flags);
  3108. while (size && (PAGE_SIZE - len)) {
  3109. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3110. PAGE_SIZE - len, 1);
  3111. len = strlen(buf);
  3112. if (PAGE_SIZE - len)
  3113. buf[len++] = '\n';
  3114. ofs += 16;
  3115. size -= min(size, 16U);
  3116. }
  3117. return len;
  3118. }
  3119. static ssize_t store_measurement(struct device *d,
  3120. struct device_attribute *attr,
  3121. const char *buf, size_t count)
  3122. {
  3123. struct iwl_priv *priv = dev_get_drvdata(d);
  3124. struct ieee80211_measurement_params params = {
  3125. .channel = le16_to_cpu(priv->active_rxon.channel),
  3126. .start_time = cpu_to_le64(priv->last_tsf),
  3127. .duration = cpu_to_le16(1),
  3128. };
  3129. u8 type = IWL_MEASURE_BASIC;
  3130. u8 buffer[32];
  3131. u8 channel;
  3132. if (count) {
  3133. char *p = buffer;
  3134. strncpy(buffer, buf, min(sizeof(buffer), count));
  3135. channel = simple_strtoul(p, NULL, 0);
  3136. if (channel)
  3137. params.channel = channel;
  3138. p = buffer;
  3139. while (*p && *p != ' ')
  3140. p++;
  3141. if (*p)
  3142. type = simple_strtoul(p + 1, NULL, 0);
  3143. }
  3144. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3145. "channel %d (for '%s')\n", type, params.channel, buf);
  3146. iwl3945_get_measurement(priv, &params, type);
  3147. return count;
  3148. }
  3149. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3150. show_measurement, store_measurement);
  3151. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  3152. static ssize_t store_retry_rate(struct device *d,
  3153. struct device_attribute *attr,
  3154. const char *buf, size_t count)
  3155. {
  3156. struct iwl_priv *priv = dev_get_drvdata(d);
  3157. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3158. if (priv->retry_rate <= 0)
  3159. priv->retry_rate = 1;
  3160. return count;
  3161. }
  3162. static ssize_t show_retry_rate(struct device *d,
  3163. struct device_attribute *attr, char *buf)
  3164. {
  3165. struct iwl_priv *priv = dev_get_drvdata(d);
  3166. return sprintf(buf, "%d", priv->retry_rate);
  3167. }
  3168. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3169. store_retry_rate);
  3170. static ssize_t store_power_level(struct device *d,
  3171. struct device_attribute *attr,
  3172. const char *buf, size_t count)
  3173. {
  3174. struct iwl_priv *priv = dev_get_drvdata(d);
  3175. int ret;
  3176. unsigned long mode;
  3177. mutex_lock(&priv->mutex);
  3178. ret = strict_strtoul(buf, 10, &mode);
  3179. if (ret)
  3180. goto out;
  3181. ret = iwl_power_set_user_mode(priv, mode);
  3182. if (ret) {
  3183. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  3184. goto out;
  3185. }
  3186. ret = count;
  3187. out:
  3188. mutex_unlock(&priv->mutex);
  3189. return ret;
  3190. }
  3191. static ssize_t show_power_level(struct device *d,
  3192. struct device_attribute *attr, char *buf)
  3193. {
  3194. struct iwl_priv *priv = dev_get_drvdata(d);
  3195. int mode = priv->power_data.user_power_setting;
  3196. int system = priv->power_data.system_power_setting;
  3197. int level = priv->power_data.power_mode;
  3198. char *p = buf;
  3199. switch (system) {
  3200. case IWL_POWER_SYS_AUTO:
  3201. p += sprintf(p, "SYSTEM:auto");
  3202. break;
  3203. case IWL_POWER_SYS_AC:
  3204. p += sprintf(p, "SYSTEM:ac");
  3205. break;
  3206. case IWL_POWER_SYS_BATTERY:
  3207. p += sprintf(p, "SYSTEM:battery");
  3208. break;
  3209. }
  3210. p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
  3211. "fixed" : "auto");
  3212. p += sprintf(p, "\tINDEX:%d", level);
  3213. p += sprintf(p, "\n");
  3214. return p - buf + 1;
  3215. }
  3216. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  3217. show_power_level, store_power_level);
  3218. #define MAX_WX_STRING 80
  3219. /* Values are in microsecond */
  3220. static const s32 timeout_duration[] = {
  3221. 350000,
  3222. 250000,
  3223. 75000,
  3224. 37000,
  3225. 25000,
  3226. };
  3227. static const s32 period_duration[] = {
  3228. 400000,
  3229. 700000,
  3230. 1000000,
  3231. 1000000,
  3232. 1000000
  3233. };
  3234. static ssize_t show_channels(struct device *d,
  3235. struct device_attribute *attr, char *buf)
  3236. {
  3237. /* all this shit doesn't belong into sysfs anyway */
  3238. return 0;
  3239. }
  3240. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3241. static ssize_t show_statistics(struct device *d,
  3242. struct device_attribute *attr, char *buf)
  3243. {
  3244. struct iwl_priv *priv = dev_get_drvdata(d);
  3245. u32 size = sizeof(struct iwl3945_notif_statistics);
  3246. u32 len = 0, ofs = 0;
  3247. u8 *data = (u8 *)&priv->statistics_39;
  3248. int rc = 0;
  3249. if (!iwl_is_alive(priv))
  3250. return -EAGAIN;
  3251. mutex_lock(&priv->mutex);
  3252. rc = iwl_send_statistics_request(priv, 0);
  3253. mutex_unlock(&priv->mutex);
  3254. if (rc) {
  3255. len = sprintf(buf,
  3256. "Error sending statistics request: 0x%08X\n", rc);
  3257. return len;
  3258. }
  3259. while (size && (PAGE_SIZE - len)) {
  3260. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3261. PAGE_SIZE - len, 1);
  3262. len = strlen(buf);
  3263. if (PAGE_SIZE - len)
  3264. buf[len++] = '\n';
  3265. ofs += 16;
  3266. size -= min(size, 16U);
  3267. }
  3268. return len;
  3269. }
  3270. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3271. static ssize_t show_antenna(struct device *d,
  3272. struct device_attribute *attr, char *buf)
  3273. {
  3274. struct iwl_priv *priv = dev_get_drvdata(d);
  3275. if (!iwl_is_alive(priv))
  3276. return -EAGAIN;
  3277. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3278. }
  3279. static ssize_t store_antenna(struct device *d,
  3280. struct device_attribute *attr,
  3281. const char *buf, size_t count)
  3282. {
  3283. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3284. int ant;
  3285. if (count == 0)
  3286. return 0;
  3287. if (sscanf(buf, "%1i", &ant) != 1) {
  3288. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3289. return count;
  3290. }
  3291. if ((ant >= 0) && (ant <= 2)) {
  3292. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3293. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3294. } else
  3295. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3296. return count;
  3297. }
  3298. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3299. static ssize_t show_status(struct device *d,
  3300. struct device_attribute *attr, char *buf)
  3301. {
  3302. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3303. if (!iwl_is_alive(priv))
  3304. return -EAGAIN;
  3305. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3306. }
  3307. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3308. static ssize_t dump_error_log(struct device *d,
  3309. struct device_attribute *attr,
  3310. const char *buf, size_t count)
  3311. {
  3312. char *p = (char *)buf;
  3313. if (p[0] == '1')
  3314. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  3315. return strnlen(buf, count);
  3316. }
  3317. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3318. static ssize_t dump_event_log(struct device *d,
  3319. struct device_attribute *attr,
  3320. const char *buf, size_t count)
  3321. {
  3322. char *p = (char *)buf;
  3323. if (p[0] == '1')
  3324. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  3325. return strnlen(buf, count);
  3326. }
  3327. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3328. /*****************************************************************************
  3329. *
  3330. * driver setup and tear down
  3331. *
  3332. *****************************************************************************/
  3333. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3334. {
  3335. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3336. init_waitqueue_head(&priv->wait_command_queue);
  3337. INIT_WORK(&priv->up, iwl3945_bg_up);
  3338. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3339. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3340. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  3341. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3342. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3343. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3344. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3345. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3346. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3347. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3348. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3349. iwl3945_hw_setup_deferred_work(priv);
  3350. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3351. iwl3945_irq_tasklet, (unsigned long)priv);
  3352. }
  3353. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3354. {
  3355. iwl3945_hw_cancel_deferred_work(priv);
  3356. cancel_delayed_work_sync(&priv->init_alive_start);
  3357. cancel_delayed_work(&priv->scan_check);
  3358. cancel_delayed_work(&priv->alive_start);
  3359. cancel_work_sync(&priv->beacon_update);
  3360. }
  3361. static struct attribute *iwl3945_sysfs_entries[] = {
  3362. &dev_attr_antenna.attr,
  3363. &dev_attr_channels.attr,
  3364. &dev_attr_dump_errors.attr,
  3365. &dev_attr_dump_events.attr,
  3366. &dev_attr_flags.attr,
  3367. &dev_attr_filter_flags.attr,
  3368. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3369. &dev_attr_measurement.attr,
  3370. #endif
  3371. &dev_attr_power_level.attr,
  3372. &dev_attr_retry_rate.attr,
  3373. &dev_attr_statistics.attr,
  3374. &dev_attr_status.attr,
  3375. &dev_attr_temperature.attr,
  3376. &dev_attr_tx_power.attr,
  3377. #ifdef CONFIG_IWLWIFI_DEBUG
  3378. &dev_attr_debug_level.attr,
  3379. #endif
  3380. NULL
  3381. };
  3382. static struct attribute_group iwl3945_attribute_group = {
  3383. .name = NULL, /* put in device directory */
  3384. .attrs = iwl3945_sysfs_entries,
  3385. };
  3386. static struct ieee80211_ops iwl3945_hw_ops = {
  3387. .tx = iwl3945_mac_tx,
  3388. .start = iwl3945_mac_start,
  3389. .stop = iwl3945_mac_stop,
  3390. .add_interface = iwl_mac_add_interface,
  3391. .remove_interface = iwl_mac_remove_interface,
  3392. .config = iwl_mac_config,
  3393. .config_interface = iwl_mac_config_interface,
  3394. .configure_filter = iwl_configure_filter,
  3395. .set_key = iwl3945_mac_set_key,
  3396. .get_tx_stats = iwl_mac_get_tx_stats,
  3397. .conf_tx = iwl_mac_conf_tx,
  3398. .reset_tsf = iwl_mac_reset_tsf,
  3399. .bss_info_changed = iwl_bss_info_changed,
  3400. .hw_scan = iwl_mac_hw_scan
  3401. };
  3402. static int iwl3945_init_drv(struct iwl_priv *priv)
  3403. {
  3404. int ret;
  3405. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3406. priv->retry_rate = 1;
  3407. priv->ibss_beacon = NULL;
  3408. spin_lock_init(&priv->lock);
  3409. spin_lock_init(&priv->power_data.lock);
  3410. spin_lock_init(&priv->sta_lock);
  3411. spin_lock_init(&priv->hcmd_lock);
  3412. INIT_LIST_HEAD(&priv->free_frames);
  3413. mutex_init(&priv->mutex);
  3414. /* Clear the driver's (not device's) station table */
  3415. priv->cfg->ops->smgmt->clear_station_table(priv);
  3416. priv->data_retry_limit = -1;
  3417. priv->ieee_channels = NULL;
  3418. priv->ieee_rates = NULL;
  3419. priv->band = IEEE80211_BAND_2GHZ;
  3420. priv->iw_mode = NL80211_IFTYPE_STATION;
  3421. iwl_reset_qos(priv);
  3422. priv->qos_data.qos_active = 0;
  3423. priv->qos_data.qos_cap.val = 0;
  3424. priv->rates_mask = IWL_RATES_MASK;
  3425. /* If power management is turned on, default to CAM mode */
  3426. priv->power_mode = IWL_POWER_MODE_CAM;
  3427. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3428. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3429. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3430. eeprom->version);
  3431. ret = -EINVAL;
  3432. goto err;
  3433. }
  3434. ret = iwl_init_channel_map(priv);
  3435. if (ret) {
  3436. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3437. goto err;
  3438. }
  3439. /* Set up txpower settings in driver for all channels */
  3440. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3441. ret = -EIO;
  3442. goto err_free_channel_map;
  3443. }
  3444. ret = iwlcore_init_geos(priv);
  3445. if (ret) {
  3446. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3447. goto err_free_channel_map;
  3448. }
  3449. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3450. return 0;
  3451. err_free_channel_map:
  3452. iwl_free_channel_map(priv);
  3453. err:
  3454. return ret;
  3455. }
  3456. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3457. {
  3458. int ret;
  3459. struct ieee80211_hw *hw = priv->hw;
  3460. hw->rate_control_algorithm = "iwl-3945-rs";
  3461. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3462. /* Tell mac80211 our characteristics */
  3463. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3464. IEEE80211_HW_NOISE_DBM |
  3465. IEEE80211_HW_SPECTRUM_MGMT;
  3466. hw->wiphy->interface_modes =
  3467. BIT(NL80211_IFTYPE_STATION) |
  3468. BIT(NL80211_IFTYPE_ADHOC);
  3469. hw->wiphy->custom_regulatory = true;
  3470. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3471. /* we create the 802.11 header and a zero-length SSID element */
  3472. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3473. /* Default value; 4 EDCA QOS priorities */
  3474. hw->queues = 4;
  3475. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3476. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3477. &priv->bands[IEEE80211_BAND_2GHZ];
  3478. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3479. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3480. &priv->bands[IEEE80211_BAND_5GHZ];
  3481. ret = ieee80211_register_hw(priv->hw);
  3482. if (ret) {
  3483. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3484. return ret;
  3485. }
  3486. priv->mac80211_registered = 1;
  3487. return 0;
  3488. }
  3489. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3490. {
  3491. int err = 0;
  3492. struct iwl_priv *priv;
  3493. struct ieee80211_hw *hw;
  3494. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3495. struct iwl3945_eeprom *eeprom;
  3496. unsigned long flags;
  3497. /***********************
  3498. * 1. Allocating HW data
  3499. * ********************/
  3500. /* mac80211 allocates memory for this device instance, including
  3501. * space for this driver's private structure */
  3502. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3503. if (hw == NULL) {
  3504. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3505. err = -ENOMEM;
  3506. goto out;
  3507. }
  3508. priv = hw->priv;
  3509. SET_IEEE80211_DEV(hw, &pdev->dev);
  3510. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  3511. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  3512. IWL_ERR(priv,
  3513. "invalid queues_num, should be between %d and %d\n",
  3514. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  3515. err = -EINVAL;
  3516. goto out_ieee80211_free_hw;
  3517. }
  3518. /*
  3519. * Disabling hardware scan means that mac80211 will perform scans
  3520. * "the hard way", rather than using device's scan.
  3521. */
  3522. if (iwl3945_mod_params.disable_hw_scan) {
  3523. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3524. iwl3945_hw_ops.hw_scan = NULL;
  3525. }
  3526. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3527. priv->cfg = cfg;
  3528. priv->pci_dev = pdev;
  3529. #ifdef CONFIG_IWLWIFI_DEBUG
  3530. priv->debug_level = iwl3945_mod_params.debug;
  3531. atomic_set(&priv->restrict_refcnt, 0);
  3532. #endif
  3533. /***************************
  3534. * 2. Initializing PCI bus
  3535. * *************************/
  3536. if (pci_enable_device(pdev)) {
  3537. err = -ENODEV;
  3538. goto out_ieee80211_free_hw;
  3539. }
  3540. pci_set_master(pdev);
  3541. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3542. if (!err)
  3543. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3544. if (err) {
  3545. IWL_WARN(priv, "No suitable DMA available.\n");
  3546. goto out_pci_disable_device;
  3547. }
  3548. pci_set_drvdata(pdev, priv);
  3549. err = pci_request_regions(pdev, DRV_NAME);
  3550. if (err)
  3551. goto out_pci_disable_device;
  3552. /***********************
  3553. * 3. Read REV Register
  3554. * ********************/
  3555. priv->hw_base = pci_iomap(pdev, 0, 0);
  3556. if (!priv->hw_base) {
  3557. err = -ENODEV;
  3558. goto out_pci_release_regions;
  3559. }
  3560. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3561. (unsigned long long) pci_resource_len(pdev, 0));
  3562. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3563. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3564. * PCI Tx retries from interfering with C3 CPU state */
  3565. pci_write_config_byte(pdev, 0x41, 0x00);
  3566. /* amp init */
  3567. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3568. if (err < 0) {
  3569. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3570. goto out_iounmap;
  3571. }
  3572. /***********************
  3573. * 4. Read EEPROM
  3574. * ********************/
  3575. /* Read the EEPROM */
  3576. err = iwl_eeprom_init(priv);
  3577. if (err) {
  3578. IWL_ERR(priv, "Unable to init EEPROM\n");
  3579. goto out_iounmap;
  3580. }
  3581. /* MAC Address location in EEPROM same for 3945/4965 */
  3582. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3583. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3584. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3585. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3586. /***********************
  3587. * 5. Setup HW Constants
  3588. * ********************/
  3589. /* Device-specific setup */
  3590. if (iwl3945_hw_set_hw_params(priv)) {
  3591. IWL_ERR(priv, "failed to set hw settings\n");
  3592. goto out_eeprom_free;
  3593. }
  3594. /***********************
  3595. * 6. Setup priv
  3596. * ********************/
  3597. err = iwl3945_init_drv(priv);
  3598. if (err) {
  3599. IWL_ERR(priv, "initializing driver failed\n");
  3600. goto out_unset_hw_params;
  3601. }
  3602. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3603. priv->cfg->name);
  3604. /***********************
  3605. * 7. Setup Services
  3606. * ********************/
  3607. spin_lock_irqsave(&priv->lock, flags);
  3608. iwl_disable_interrupts(priv);
  3609. spin_unlock_irqrestore(&priv->lock, flags);
  3610. pci_enable_msi(priv->pci_dev);
  3611. err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
  3612. DRV_NAME, priv);
  3613. if (err) {
  3614. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3615. goto out_disable_msi;
  3616. }
  3617. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3618. if (err) {
  3619. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3620. goto out_release_irq;
  3621. }
  3622. iwl_set_rxon_channel(priv,
  3623. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3624. iwl3945_setup_deferred_work(priv);
  3625. iwl3945_setup_rx_handlers(priv);
  3626. /*********************************
  3627. * 8. Setup and Register mac80211
  3628. * *******************************/
  3629. iwl_enable_interrupts(priv);
  3630. err = iwl3945_setup_mac(priv);
  3631. if (err)
  3632. goto out_remove_sysfs;
  3633. err = iwl_dbgfs_register(priv, DRV_NAME);
  3634. if (err)
  3635. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3636. err = iwl_rfkill_init(priv);
  3637. if (err)
  3638. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  3639. "Ignoring error: %d\n", err);
  3640. else
  3641. iwl_rfkill_set_hw_state(priv);
  3642. /* Start monitoring the killswitch */
  3643. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3644. 2 * HZ);
  3645. return 0;
  3646. out_remove_sysfs:
  3647. destroy_workqueue(priv->workqueue);
  3648. priv->workqueue = NULL;
  3649. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3650. out_release_irq:
  3651. free_irq(priv->pci_dev->irq, priv);
  3652. out_disable_msi:
  3653. pci_disable_msi(priv->pci_dev);
  3654. iwlcore_free_geos(priv);
  3655. iwl_free_channel_map(priv);
  3656. out_unset_hw_params:
  3657. iwl3945_unset_hw_params(priv);
  3658. out_eeprom_free:
  3659. iwl_eeprom_free(priv);
  3660. out_iounmap:
  3661. pci_iounmap(pdev, priv->hw_base);
  3662. out_pci_release_regions:
  3663. pci_release_regions(pdev);
  3664. out_pci_disable_device:
  3665. pci_set_drvdata(pdev, NULL);
  3666. pci_disable_device(pdev);
  3667. out_ieee80211_free_hw:
  3668. ieee80211_free_hw(priv->hw);
  3669. out:
  3670. return err;
  3671. }
  3672. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3673. {
  3674. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3675. unsigned long flags;
  3676. if (!priv)
  3677. return;
  3678. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3679. iwl_dbgfs_unregister(priv);
  3680. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3681. if (priv->mac80211_registered) {
  3682. ieee80211_unregister_hw(priv->hw);
  3683. priv->mac80211_registered = 0;
  3684. } else {
  3685. iwl3945_down(priv);
  3686. }
  3687. /* make sure we flush any pending irq or
  3688. * tasklet for the driver
  3689. */
  3690. spin_lock_irqsave(&priv->lock, flags);
  3691. iwl_disable_interrupts(priv);
  3692. spin_unlock_irqrestore(&priv->lock, flags);
  3693. iwl_synchronize_irq(priv);
  3694. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3695. iwl_rfkill_unregister(priv);
  3696. cancel_delayed_work_sync(&priv->rfkill_poll);
  3697. iwl3945_dealloc_ucode_pci(priv);
  3698. if (priv->rxq.bd)
  3699. iwl3945_rx_queue_free(priv, &priv->rxq);
  3700. iwl3945_hw_txq_ctx_free(priv);
  3701. iwl3945_unset_hw_params(priv);
  3702. priv->cfg->ops->smgmt->clear_station_table(priv);
  3703. /*netif_stop_queue(dev); */
  3704. flush_workqueue(priv->workqueue);
  3705. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3706. * priv->workqueue... so we can't take down the workqueue
  3707. * until now... */
  3708. destroy_workqueue(priv->workqueue);
  3709. priv->workqueue = NULL;
  3710. free_irq(pdev->irq, priv);
  3711. pci_disable_msi(pdev);
  3712. pci_iounmap(pdev, priv->hw_base);
  3713. pci_release_regions(pdev);
  3714. pci_disable_device(pdev);
  3715. pci_set_drvdata(pdev, NULL);
  3716. iwl_free_channel_map(priv);
  3717. iwlcore_free_geos(priv);
  3718. kfree(priv->scan);
  3719. if (priv->ibss_beacon)
  3720. dev_kfree_skb(priv->ibss_beacon);
  3721. ieee80211_free_hw(priv->hw);
  3722. }
  3723. /*****************************************************************************
  3724. *
  3725. * driver and module entry point
  3726. *
  3727. *****************************************************************************/
  3728. static struct pci_driver iwl3945_driver = {
  3729. .name = DRV_NAME,
  3730. .id_table = iwl3945_hw_card_ids,
  3731. .probe = iwl3945_pci_probe,
  3732. .remove = __devexit_p(iwl3945_pci_remove),
  3733. #ifdef CONFIG_PM
  3734. .suspend = iwl_pci_suspend,
  3735. .resume = iwl_pci_resume,
  3736. #endif
  3737. };
  3738. static int __init iwl3945_init(void)
  3739. {
  3740. int ret;
  3741. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3742. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3743. ret = iwl3945_rate_control_register();
  3744. if (ret) {
  3745. printk(KERN_ERR DRV_NAME
  3746. "Unable to register rate control algorithm: %d\n", ret);
  3747. return ret;
  3748. }
  3749. ret = pci_register_driver(&iwl3945_driver);
  3750. if (ret) {
  3751. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3752. goto error_register;
  3753. }
  3754. return ret;
  3755. error_register:
  3756. iwl3945_rate_control_unregister();
  3757. return ret;
  3758. }
  3759. static void __exit iwl3945_exit(void)
  3760. {
  3761. pci_unregister_driver(&iwl3945_driver);
  3762. iwl3945_rate_control_unregister();
  3763. }
  3764. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3765. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3766. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3767. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3768. MODULE_PARM_DESC(swcrypto,
  3769. "using software crypto (default 1 [software])\n");
  3770. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  3771. MODULE_PARM_DESC(debug, "debug output mask");
  3772. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3773. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3774. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  3775. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3776. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3777. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3778. module_exit(iwl3945_exit);
  3779. module_init(iwl3945_init);