cx23885.h 15 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c-algo-bit.h>
  24. #include <linux/kdev_t.h>
  25. #include <media/v4l2-common.h>
  26. #include <media/tuner.h>
  27. #include <media/tveeprom.h>
  28. #include <media/videobuf-dma-sg.h>
  29. #include <media/videobuf-dvb.h>
  30. #include "btcx-risc.h"
  31. #include "cx23885-reg.h"
  32. #include "media/cx2341x.h"
  33. #include <linux/version.h>
  34. #include <linux/mutex.h>
  35. #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 1)
  36. #define UNSET (-1U)
  37. #define CX23885_MAXBOARDS 8
  38. /* Max number of inputs by card */
  39. #define MAX_CX23885_INPUT 8
  40. #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  41. #define RESOURCE_OVERLAY 1
  42. #define RESOURCE_VIDEO 2
  43. #define RESOURCE_VBI 4
  44. #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
  45. #define CX23885_BOARD_NOAUTO UNSET
  46. #define CX23885_BOARD_UNKNOWN 0
  47. #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
  48. #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
  49. #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
  50. #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
  51. #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
  52. #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
  53. #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
  54. #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
  55. #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
  56. #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  57. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  58. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  59. #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
  60. #define CX23885_BOARD_TBS_6920 14
  61. #define CX23885_BOARD_TEVII_S470 15
  62. /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  63. #define CX23885_NORMS (\
  64. V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
  65. V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
  66. V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
  67. V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
  68. struct cx23885_fmt {
  69. char *name;
  70. u32 fourcc; /* v4l2 format id */
  71. int depth;
  72. int flags;
  73. u32 cxformat;
  74. };
  75. struct cx23885_ctrl {
  76. struct v4l2_queryctrl v;
  77. u32 off;
  78. u32 reg;
  79. u32 mask;
  80. u32 shift;
  81. };
  82. struct cx23885_tvnorm {
  83. char *name;
  84. v4l2_std_id id;
  85. u32 cxiformat;
  86. u32 cxoformat;
  87. };
  88. struct cx23885_fh {
  89. struct cx23885_dev *dev;
  90. enum v4l2_buf_type type;
  91. int radio;
  92. u32 resources;
  93. /* video overlay */
  94. struct v4l2_window win;
  95. struct v4l2_clip *clips;
  96. unsigned int nclips;
  97. /* video capture */
  98. struct cx23885_fmt *fmt;
  99. unsigned int width, height;
  100. /* vbi capture */
  101. struct videobuf_queue vidq;
  102. struct videobuf_queue vbiq;
  103. /* MPEG Encoder specifics ONLY */
  104. struct videobuf_queue mpegq;
  105. atomic_t v4l_reading;
  106. };
  107. enum cx23885_itype {
  108. CX23885_VMUX_COMPOSITE1 = 1,
  109. CX23885_VMUX_COMPOSITE2,
  110. CX23885_VMUX_COMPOSITE3,
  111. CX23885_VMUX_COMPOSITE4,
  112. CX23885_VMUX_SVIDEO,
  113. CX23885_VMUX_TELEVISION,
  114. CX23885_VMUX_CABLE,
  115. CX23885_VMUX_DVB,
  116. CX23885_VMUX_DEBUG,
  117. CX23885_RADIO,
  118. };
  119. enum cx23885_src_sel_type {
  120. CX23885_SRC_SEL_EXT_656_VIDEO = 0,
  121. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  122. };
  123. /* buffer for one video frame */
  124. struct cx23885_buffer {
  125. /* common v4l buffer stuff -- must be first */
  126. struct videobuf_buffer vb;
  127. /* cx23885 specific */
  128. unsigned int bpl;
  129. struct btcx_riscmem risc;
  130. struct cx23885_fmt *fmt;
  131. u32 count;
  132. };
  133. struct cx23885_input {
  134. enum cx23885_itype type;
  135. unsigned int vmux;
  136. u32 gpio0, gpio1, gpio2, gpio3;
  137. };
  138. typedef enum {
  139. CX23885_MPEG_UNDEFINED = 0,
  140. CX23885_MPEG_DVB,
  141. CX23885_ANALOG_VIDEO,
  142. CX23885_MPEG_ENCODER,
  143. } port_t;
  144. struct cx23885_board {
  145. char *name;
  146. port_t porta, portb, portc;
  147. unsigned int tuner_type;
  148. unsigned int radio_type;
  149. unsigned char tuner_addr;
  150. unsigned char radio_addr;
  151. /* Vendors can and do run the PCIe bridge at different
  152. * clock rates, driven physically by crystals on the PCBs.
  153. * The core has to accomodate this. This allows the user
  154. * to add new boards with new frequencys. The value is
  155. * expressed in Hz.
  156. *
  157. * The core framework will default this value based on
  158. * current designs, but it can vary.
  159. */
  160. u32 clk_freq;
  161. struct cx23885_input input[MAX_CX23885_INPUT];
  162. };
  163. struct cx23885_subid {
  164. u16 subvendor;
  165. u16 subdevice;
  166. u32 card;
  167. };
  168. struct cx23885_i2c {
  169. struct cx23885_dev *dev;
  170. int nr;
  171. /* i2c i/o */
  172. struct i2c_adapter i2c_adap;
  173. struct i2c_algo_bit_data i2c_algo;
  174. struct i2c_client i2c_client;
  175. u32 i2c_rc;
  176. /* 885 registers used for raw addess */
  177. u32 i2c_period;
  178. u32 reg_ctrl;
  179. u32 reg_stat;
  180. u32 reg_addr;
  181. u32 reg_rdata;
  182. u32 reg_wdata;
  183. };
  184. struct cx23885_dmaqueue {
  185. struct list_head active;
  186. struct list_head queued;
  187. struct timer_list timeout;
  188. struct btcx_riscmem stopper;
  189. u32 count;
  190. };
  191. struct cx23885_tsport {
  192. struct cx23885_dev *dev;
  193. int nr;
  194. int sram_chno;
  195. struct videobuf_dvb_frontends frontends;
  196. /* dma queues */
  197. struct cx23885_dmaqueue mpegq;
  198. u32 ts_packet_size;
  199. u32 ts_packet_count;
  200. int width;
  201. int height;
  202. spinlock_t slock;
  203. /* registers */
  204. u32 reg_gpcnt;
  205. u32 reg_gpcnt_ctl;
  206. u32 reg_dma_ctl;
  207. u32 reg_lngth;
  208. u32 reg_hw_sop_ctrl;
  209. u32 reg_gen_ctrl;
  210. u32 reg_bd_pkt_status;
  211. u32 reg_sop_status;
  212. u32 reg_fifo_ovfl_stat;
  213. u32 reg_vld_misc;
  214. u32 reg_ts_clk_en;
  215. u32 reg_ts_int_msk;
  216. u32 reg_ts_int_stat;
  217. u32 reg_src_sel;
  218. /* Default register vals */
  219. int pci_irqmask;
  220. u32 dma_ctl_val;
  221. u32 ts_int_msk_val;
  222. u32 gen_ctrl_val;
  223. u32 ts_clk_en_val;
  224. u32 src_sel_val;
  225. u32 vld_misc_val;
  226. u32 hw_sop_ctrl_val;
  227. /* Allow a single tsport to have multiple frontends */
  228. u32 num_frontends;
  229. };
  230. struct cx23885_dev {
  231. struct list_head devlist;
  232. atomic_t refcount;
  233. /* pci stuff */
  234. struct pci_dev *pci;
  235. unsigned char pci_rev, pci_lat;
  236. int pci_bus, pci_slot;
  237. u32 __iomem *lmmio;
  238. u8 __iomem *bmmio;
  239. int pci_irqmask;
  240. int hwrevision;
  241. /* This valud is board specific and is used to configure the
  242. * AV core so we see nice clean and stable video and audio. */
  243. u32 clk_freq;
  244. /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
  245. struct cx23885_i2c i2c_bus[3];
  246. int nr;
  247. struct mutex lock;
  248. /* board details */
  249. unsigned int board;
  250. char name[32];
  251. struct cx23885_tsport ts1, ts2;
  252. /* sram configuration */
  253. struct sram_channel *sram_channels;
  254. enum {
  255. CX23885_BRIDGE_UNDEFINED = 0,
  256. CX23885_BRIDGE_885 = 885,
  257. CX23885_BRIDGE_887 = 887,
  258. } bridge;
  259. /* Analog video */
  260. u32 resources;
  261. unsigned int input;
  262. u32 tvaudio;
  263. v4l2_std_id tvnorm;
  264. unsigned int tuner_type;
  265. unsigned char tuner_addr;
  266. unsigned int radio_type;
  267. unsigned char radio_addr;
  268. unsigned int has_radio;
  269. /* V4l */
  270. u32 freq;
  271. struct video_device *video_dev;
  272. struct video_device *vbi_dev;
  273. struct video_device *radio_dev;
  274. struct cx23885_dmaqueue vidq;
  275. struct cx23885_dmaqueue vbiq;
  276. spinlock_t slock;
  277. /* MPEG Encoder ONLY settings */
  278. u32 cx23417_mailbox;
  279. struct cx2341x_mpeg_params mpeg_params;
  280. struct video_device *v4l_device;
  281. atomic_t v4l_reader_count;
  282. struct cx23885_tvnorm encodernorm;
  283. };
  284. extern struct list_head cx23885_devlist;
  285. #define SRAM_CH01 0 /* Video A */
  286. #define SRAM_CH02 1 /* VBI A */
  287. #define SRAM_CH03 2 /* Video B */
  288. #define SRAM_CH04 3 /* Transport via B */
  289. #define SRAM_CH05 4 /* VBI B */
  290. #define SRAM_CH06 5 /* Video C */
  291. #define SRAM_CH07 6 /* Transport via C */
  292. #define SRAM_CH08 7 /* Audio Internal A */
  293. #define SRAM_CH09 8 /* Audio Internal B */
  294. #define SRAM_CH10 9 /* Audio External */
  295. #define SRAM_CH11 10 /* COMB_3D_N */
  296. #define SRAM_CH12 11 /* Comb 3D N1 */
  297. #define SRAM_CH13 12 /* Comb 3D N2 */
  298. #define SRAM_CH14 13 /* MOE Vid */
  299. #define SRAM_CH15 14 /* MOE RSLT */
  300. struct sram_channel {
  301. char *name;
  302. u32 cmds_start;
  303. u32 ctrl_start;
  304. u32 cdt;
  305. u32 fifo_start;;
  306. u32 fifo_size;
  307. u32 ptr1_reg;
  308. u32 ptr2_reg;
  309. u32 cnt1_reg;
  310. u32 cnt2_reg;
  311. u32 jumponly;
  312. };
  313. /* ----------------------------------------------------------- */
  314. #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
  315. #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
  316. #define cx_andor(reg, mask, value) \
  317. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  318. ((value) & (mask)), dev->lmmio+((reg)>>2))
  319. #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
  320. #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
  321. /* ----------------------------------------------------------- */
  322. /* cx23885-core.c */
  323. extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
  324. struct sram_channel *ch,
  325. unsigned int bpl, u32 risc);
  326. extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
  327. struct sram_channel *ch);
  328. extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
  329. u32 reg, u32 mask, u32 value);
  330. extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
  331. struct scatterlist *sglist,
  332. unsigned int top_offset, unsigned int bottom_offset,
  333. unsigned int bpl, unsigned int padding, unsigned int lines);
  334. void cx23885_cancel_buffers(struct cx23885_tsport *port);
  335. extern int cx23885_restart_queue(struct cx23885_tsport *port,
  336. struct cx23885_dmaqueue *q);
  337. extern void cx23885_wakeup(struct cx23885_tsport *port,
  338. struct cx23885_dmaqueue *q, u32 count);
  339. /* ----------------------------------------------------------- */
  340. /* cx23885-cards.c */
  341. extern struct cx23885_board cx23885_boards[];
  342. extern const unsigned int cx23885_bcount;
  343. extern struct cx23885_subid cx23885_subids[];
  344. extern const unsigned int cx23885_idcount;
  345. extern int cx23885_tuner_callback(void *priv, int component,
  346. int command, int arg);
  347. extern void cx23885_card_list(struct cx23885_dev *dev);
  348. extern int cx23885_ir_init(struct cx23885_dev *dev);
  349. extern void cx23885_gpio_setup(struct cx23885_dev *dev);
  350. extern void cx23885_card_setup(struct cx23885_dev *dev);
  351. extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
  352. extern int cx23885_dvb_register(struct cx23885_tsport *port);
  353. extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
  354. extern int cx23885_buf_prepare(struct videobuf_queue *q,
  355. struct cx23885_tsport *port,
  356. struct cx23885_buffer *buf,
  357. enum v4l2_field field);
  358. extern void cx23885_buf_queue(struct cx23885_tsport *port,
  359. struct cx23885_buffer *buf);
  360. extern void cx23885_free_buffer(struct videobuf_queue *q,
  361. struct cx23885_buffer *buf);
  362. /* ----------------------------------------------------------- */
  363. /* cx23885-video.c */
  364. /* Video */
  365. extern int cx23885_video_register(struct cx23885_dev *dev);
  366. extern void cx23885_video_unregister(struct cx23885_dev *dev);
  367. extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
  368. /* ----------------------------------------------------------- */
  369. /* cx23885-vbi.c */
  370. extern int cx23885_vbi_fmt(struct file *file, void *priv,
  371. struct v4l2_format *f);
  372. extern void cx23885_vbi_timeout(unsigned long data);
  373. extern struct videobuf_queue_ops cx23885_vbi_qops;
  374. /* cx23885-i2c.c */
  375. extern int cx23885_i2c_register(struct cx23885_i2c *bus);
  376. extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
  377. extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
  378. void *arg);
  379. extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
  380. /* ----------------------------------------------------------- */
  381. /* cx23885-417.c */
  382. extern int cx23885_417_register(struct cx23885_dev *dev);
  383. extern void cx23885_417_unregister(struct cx23885_dev *dev);
  384. extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
  385. extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
  386. extern void cx23885_mc417_init(struct cx23885_dev *dev);
  387. extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
  388. extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
  389. /* ----------------------------------------------------------- */
  390. /* tv norms */
  391. static inline unsigned int norm_maxw(v4l2_std_id norm)
  392. {
  393. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
  394. }
  395. static inline unsigned int norm_maxh(v4l2_std_id norm)
  396. {
  397. return (norm & V4L2_STD_625_50) ? 576 : 480;
  398. }
  399. static inline unsigned int norm_swidth(v4l2_std_id norm)
  400. {
  401. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
  402. }