core.c 3.7 KB

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  1. /*
  2. * linux/arch/arm/mach-integrator/core.c
  3. *
  4. * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/export.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/irq.h>
  18. #include <linux/memblock.h>
  19. #include <linux/sched.h>
  20. #include <linux/smp.h>
  21. #include <linux/amba/bus.h>
  22. #include <linux/amba/serial.h>
  23. #include <linux/io.h>
  24. #include <linux/stat.h>
  25. #include <mach/hardware.h>
  26. #include <mach/platform.h>
  27. #include <mach/cm.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/time.h>
  30. #include <asm/pgtable.h>
  31. #include "common.h"
  32. static DEFINE_RAW_SPINLOCK(cm_lock);
  33. /**
  34. * cm_get - get the value from the CM_CTRL register
  35. */
  36. u32 cm_get(void)
  37. {
  38. return readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
  39. }
  40. /**
  41. * cm_control - update the CM_CTRL register.
  42. * @mask: bits to change
  43. * @set: bits to set
  44. */
  45. void cm_control(u32 mask, u32 set)
  46. {
  47. unsigned long flags;
  48. u32 val;
  49. raw_spin_lock_irqsave(&cm_lock, flags);
  50. val = readl(CM_CTRL) & ~mask;
  51. writel(val | set, CM_CTRL);
  52. raw_spin_unlock_irqrestore(&cm_lock, flags);
  53. }
  54. EXPORT_SYMBOL(cm_control);
  55. /*
  56. * We need to stop things allocating the low memory; ideally we need a
  57. * better implementation of GFP_DMA which does not assume that DMA-able
  58. * memory starts at zero.
  59. */
  60. void __init integrator_reserve(void)
  61. {
  62. memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
  63. }
  64. /*
  65. * To reset, we hit the on-board reset register in the system FPGA
  66. */
  67. void integrator_restart(enum reboot_mode mode, const char *cmd)
  68. {
  69. cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
  70. }
  71. static u32 integrator_id;
  72. static ssize_t intcp_get_manf(struct device *dev,
  73. struct device_attribute *attr,
  74. char *buf)
  75. {
  76. return sprintf(buf, "%02x\n", integrator_id >> 24);
  77. }
  78. static struct device_attribute intcp_manf_attr =
  79. __ATTR(manufacturer, S_IRUGO, intcp_get_manf, NULL);
  80. static ssize_t intcp_get_arch(struct device *dev,
  81. struct device_attribute *attr,
  82. char *buf)
  83. {
  84. const char *arch;
  85. switch ((integrator_id >> 16) & 0xff) {
  86. case 0x00:
  87. arch = "ASB little-endian";
  88. break;
  89. case 0x01:
  90. arch = "AHB little-endian";
  91. break;
  92. case 0x03:
  93. arch = "AHB-Lite system bus, bi-endian";
  94. break;
  95. case 0x04:
  96. arch = "AHB";
  97. break;
  98. default:
  99. arch = "Unknown";
  100. break;
  101. }
  102. return sprintf(buf, "%s\n", arch);
  103. }
  104. static struct device_attribute intcp_arch_attr =
  105. __ATTR(architecture, S_IRUGO, intcp_get_arch, NULL);
  106. static ssize_t intcp_get_fpga(struct device *dev,
  107. struct device_attribute *attr,
  108. char *buf)
  109. {
  110. const char *fpga;
  111. switch ((integrator_id >> 12) & 0xf) {
  112. case 0x01:
  113. fpga = "XC4062";
  114. break;
  115. case 0x02:
  116. fpga = "XC4085";
  117. break;
  118. case 0x04:
  119. fpga = "EPM7256AE (Altera PLD)";
  120. break;
  121. default:
  122. fpga = "Unknown";
  123. break;
  124. }
  125. return sprintf(buf, "%s\n", fpga);
  126. }
  127. static struct device_attribute intcp_fpga_attr =
  128. __ATTR(fpga, S_IRUGO, intcp_get_fpga, NULL);
  129. static ssize_t intcp_get_build(struct device *dev,
  130. struct device_attribute *attr,
  131. char *buf)
  132. {
  133. return sprintf(buf, "%02x\n", (integrator_id >> 4) & 0xFF);
  134. }
  135. static struct device_attribute intcp_build_attr =
  136. __ATTR(build, S_IRUGO, intcp_get_build, NULL);
  137. void integrator_init_sysfs(struct device *parent, u32 id)
  138. {
  139. integrator_id = id;
  140. device_create_file(parent, &intcp_manf_attr);
  141. device_create_file(parent, &intcp_arch_attr);
  142. device_create_file(parent, &intcp_fpga_attr);
  143. device_create_file(parent, &intcp_build_attr);
  144. }