coda.c 88 KB

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  1. /*
  2. * Coda multi-standard codec IP
  3. *
  4. * Copyright (C) 2012 Vista Silicon S.L.
  5. * Javier Martin, <javier.martin@vista-silicon.com>
  6. * Xavier Duret
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/firmware.h>
  16. #include <linux/genalloc.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/irq.h>
  20. #include <linux/kfifo.h>
  21. #include <linux/module.h>
  22. #include <linux/of_device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/slab.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/of.h>
  27. #include <linux/platform_data/coda.h>
  28. #include <media/v4l2-ctrls.h>
  29. #include <media/v4l2-device.h>
  30. #include <media/v4l2-event.h>
  31. #include <media/v4l2-ioctl.h>
  32. #include <media/v4l2-mem2mem.h>
  33. #include <media/videobuf2-core.h>
  34. #include <media/videobuf2-dma-contig.h>
  35. #include "coda.h"
  36. #define CODA_NAME "coda"
  37. #define CODADX6_MAX_INSTANCES 4
  38. #define CODA_FMO_BUF_SIZE 32
  39. #define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  40. #define CODA7_WORK_BUF_SIZE (128 * 1024)
  41. #define CODA7_TEMP_BUF_SIZE (304 * 1024)
  42. #define CODA_PARA_BUF_SIZE (10 * 1024)
  43. #define CODA_ISRAM_SIZE (2048 * 2)
  44. #define CODADX6_IRAM_SIZE 0xb000
  45. #define CODA7_IRAM_SIZE 0x14000
  46. #define CODA7_PS_BUF_SIZE 0x28000
  47. #define CODA_MAX_FRAMEBUFFERS 8
  48. #define CODA_MAX_FRAME_SIZE 0x100000
  49. #define FMO_SLICE_SAVE_BUF_SIZE (32)
  50. #define CODA_DEFAULT_GAMMA 4096
  51. #define MIN_W 176
  52. #define MIN_H 144
  53. #define S_ALIGN 1 /* multiple of 2 */
  54. #define W_ALIGN 1 /* multiple of 2 */
  55. #define H_ALIGN 1 /* multiple of 2 */
  56. #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  57. static int coda_debug;
  58. module_param(coda_debug, int, 0644);
  59. MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  60. enum {
  61. V4L2_M2M_SRC = 0,
  62. V4L2_M2M_DST = 1,
  63. };
  64. enum coda_inst_type {
  65. CODA_INST_ENCODER,
  66. CODA_INST_DECODER,
  67. };
  68. enum coda_product {
  69. CODA_DX6 = 0xf001,
  70. CODA_7541 = 0xf012,
  71. };
  72. struct coda_fmt {
  73. char *name;
  74. u32 fourcc;
  75. };
  76. struct coda_codec {
  77. u32 mode;
  78. u32 src_fourcc;
  79. u32 dst_fourcc;
  80. u32 max_w;
  81. u32 max_h;
  82. };
  83. struct coda_devtype {
  84. char *firmware;
  85. enum coda_product product;
  86. struct coda_codec *codecs;
  87. unsigned int num_codecs;
  88. size_t workbuf_size;
  89. };
  90. /* Per-queue, driver-specific private data */
  91. struct coda_q_data {
  92. unsigned int width;
  93. unsigned int height;
  94. unsigned int sizeimage;
  95. unsigned int fourcc;
  96. };
  97. struct coda_aux_buf {
  98. void *vaddr;
  99. dma_addr_t paddr;
  100. u32 size;
  101. };
  102. struct coda_dev {
  103. struct v4l2_device v4l2_dev;
  104. struct video_device vfd;
  105. struct platform_device *plat_dev;
  106. const struct coda_devtype *devtype;
  107. void __iomem *regs_base;
  108. struct clk *clk_per;
  109. struct clk *clk_ahb;
  110. struct coda_aux_buf codebuf;
  111. struct coda_aux_buf tempbuf;
  112. struct coda_aux_buf workbuf;
  113. struct gen_pool *iram_pool;
  114. long unsigned int iram_vaddr;
  115. long unsigned int iram_paddr;
  116. unsigned long iram_size;
  117. spinlock_t irqlock;
  118. struct mutex dev_mutex;
  119. struct mutex coda_mutex;
  120. struct v4l2_m2m_dev *m2m_dev;
  121. struct vb2_alloc_ctx *alloc_ctx;
  122. struct list_head instances;
  123. unsigned long instance_mask;
  124. struct delayed_work timeout;
  125. };
  126. struct coda_params {
  127. u8 rot_mode;
  128. u8 h264_intra_qp;
  129. u8 h264_inter_qp;
  130. u8 mpeg4_intra_qp;
  131. u8 mpeg4_inter_qp;
  132. u8 gop_size;
  133. int codec_mode;
  134. int codec_mode_aux;
  135. enum v4l2_mpeg_video_multi_slice_mode slice_mode;
  136. u32 framerate;
  137. u16 bitrate;
  138. u32 slice_max_bits;
  139. u32 slice_max_mb;
  140. };
  141. struct coda_iram_info {
  142. u32 axi_sram_use;
  143. phys_addr_t buf_bit_use;
  144. phys_addr_t buf_ip_ac_dc_use;
  145. phys_addr_t buf_dbk_y_use;
  146. phys_addr_t buf_dbk_c_use;
  147. phys_addr_t buf_ovl_use;
  148. phys_addr_t buf_btp_use;
  149. phys_addr_t search_ram_paddr;
  150. int search_ram_size;
  151. };
  152. struct coda_ctx {
  153. struct coda_dev *dev;
  154. struct mutex buffer_mutex;
  155. struct list_head list;
  156. struct work_struct skip_run;
  157. int aborting;
  158. int initialized;
  159. int streamon_out;
  160. int streamon_cap;
  161. u32 isequence;
  162. u32 qsequence;
  163. u32 osequence;
  164. struct coda_q_data q_data[2];
  165. enum coda_inst_type inst_type;
  166. struct coda_codec *codec;
  167. enum v4l2_colorspace colorspace;
  168. struct coda_params params;
  169. struct v4l2_m2m_ctx *m2m_ctx;
  170. struct v4l2_ctrl_handler ctrls;
  171. struct v4l2_fh fh;
  172. int gopcounter;
  173. int runcounter;
  174. char vpu_header[3][64];
  175. int vpu_header_size[3];
  176. struct kfifo bitstream_fifo;
  177. struct mutex bitstream_mutex;
  178. struct coda_aux_buf bitstream;
  179. bool prescan_failed;
  180. struct coda_aux_buf parabuf;
  181. struct coda_aux_buf psbuf;
  182. struct coda_aux_buf slicebuf;
  183. struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
  184. struct coda_aux_buf workbuf;
  185. int num_internal_frames;
  186. int idx;
  187. int reg_idx;
  188. struct coda_iram_info iram_info;
  189. u32 bit_stream_param;
  190. u32 frm_dis_flg;
  191. int display_idx;
  192. };
  193. static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
  194. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
  195. static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
  196. static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
  197. {
  198. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  199. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  200. writel(data, dev->regs_base + reg);
  201. }
  202. static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
  203. {
  204. u32 data;
  205. data = readl(dev->regs_base + reg);
  206. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  207. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  208. return data;
  209. }
  210. static inline unsigned long coda_isbusy(struct coda_dev *dev)
  211. {
  212. return coda_read(dev, CODA_REG_BIT_BUSY);
  213. }
  214. static inline int coda_is_initialized(struct coda_dev *dev)
  215. {
  216. return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
  217. }
  218. static int coda_wait_timeout(struct coda_dev *dev)
  219. {
  220. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  221. while (coda_isbusy(dev)) {
  222. if (time_after(jiffies, timeout))
  223. return -ETIMEDOUT;
  224. }
  225. return 0;
  226. }
  227. static void coda_command_async(struct coda_ctx *ctx, int cmd)
  228. {
  229. struct coda_dev *dev = ctx->dev;
  230. if (dev->devtype->product == CODA_7541) {
  231. /* Restore context related registers to CODA */
  232. coda_write(dev, ctx->bit_stream_param,
  233. CODA_REG_BIT_BIT_STREAM_PARAM);
  234. coda_write(dev, ctx->frm_dis_flg,
  235. CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  236. coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  237. }
  238. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  239. coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  240. coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  241. coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  242. coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  243. }
  244. static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  245. {
  246. struct coda_dev *dev = ctx->dev;
  247. coda_command_async(ctx, cmd);
  248. return coda_wait_timeout(dev);
  249. }
  250. static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
  251. enum v4l2_buf_type type)
  252. {
  253. switch (type) {
  254. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  255. return &(ctx->q_data[V4L2_M2M_SRC]);
  256. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  257. return &(ctx->q_data[V4L2_M2M_DST]);
  258. default:
  259. BUG();
  260. }
  261. return NULL;
  262. }
  263. /*
  264. * Array of all formats supported by any version of Coda:
  265. */
  266. static struct coda_fmt coda_formats[] = {
  267. {
  268. .name = "YUV 4:2:0 Planar, YCbCr",
  269. .fourcc = V4L2_PIX_FMT_YUV420,
  270. },
  271. {
  272. .name = "YUV 4:2:0 Planar, YCrCb",
  273. .fourcc = V4L2_PIX_FMT_YVU420,
  274. },
  275. {
  276. .name = "H264 Encoded Stream",
  277. .fourcc = V4L2_PIX_FMT_H264,
  278. },
  279. {
  280. .name = "MPEG4 Encoded Stream",
  281. .fourcc = V4L2_PIX_FMT_MPEG4,
  282. },
  283. };
  284. #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
  285. { mode, src_fourcc, dst_fourcc, max_w, max_h }
  286. /*
  287. * Arrays of codecs supported by each given version of Coda:
  288. * i.MX27 -> codadx6
  289. * i.MX5x -> coda7
  290. * i.MX6 -> coda960
  291. * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
  292. */
  293. static struct coda_codec codadx6_codecs[] = {
  294. CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 720, 576),
  295. CODA_CODEC(CODADX6_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
  296. };
  297. static struct coda_codec coda7_codecs[] = {
  298. CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1280, 720),
  299. CODA_CODEC(CODA7_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1280, 720),
  300. CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1080),
  301. CODA_CODEC(CODA7_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1080),
  302. };
  303. static bool coda_format_is_yuv(u32 fourcc)
  304. {
  305. switch (fourcc) {
  306. case V4L2_PIX_FMT_YUV420:
  307. case V4L2_PIX_FMT_YVU420:
  308. return true;
  309. default:
  310. return false;
  311. }
  312. }
  313. /*
  314. * Normalize all supported YUV 4:2:0 formats to the value used in the codec
  315. * tables.
  316. */
  317. static u32 coda_format_normalize_yuv(u32 fourcc)
  318. {
  319. return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
  320. }
  321. static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
  322. int dst_fourcc)
  323. {
  324. struct coda_codec *codecs = dev->devtype->codecs;
  325. int num_codecs = dev->devtype->num_codecs;
  326. int k;
  327. src_fourcc = coda_format_normalize_yuv(src_fourcc);
  328. dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
  329. if (src_fourcc == dst_fourcc)
  330. return NULL;
  331. for (k = 0; k < num_codecs; k++) {
  332. if (codecs[k].src_fourcc == src_fourcc &&
  333. codecs[k].dst_fourcc == dst_fourcc)
  334. break;
  335. }
  336. if (k == num_codecs)
  337. return NULL;
  338. return &codecs[k];
  339. }
  340. static void coda_get_max_dimensions(struct coda_dev *dev,
  341. struct coda_codec *codec,
  342. int *max_w, int *max_h)
  343. {
  344. struct coda_codec *codecs = dev->devtype->codecs;
  345. int num_codecs = dev->devtype->num_codecs;
  346. unsigned int w, h;
  347. int k;
  348. if (codec) {
  349. w = codec->max_w;
  350. h = codec->max_h;
  351. } else {
  352. for (k = 0, w = 0, h = 0; k < num_codecs; k++) {
  353. w = max(w, codecs[k].max_w);
  354. h = max(h, codecs[k].max_h);
  355. }
  356. }
  357. if (max_w)
  358. *max_w = w;
  359. if (max_h)
  360. *max_h = h;
  361. }
  362. static char *coda_product_name(int product)
  363. {
  364. static char buf[9];
  365. switch (product) {
  366. case CODA_DX6:
  367. return "CodaDx6";
  368. case CODA_7541:
  369. return "CODA7541";
  370. default:
  371. snprintf(buf, sizeof(buf), "(0x%04x)", product);
  372. return buf;
  373. }
  374. }
  375. /*
  376. * V4L2 ioctl() operations.
  377. */
  378. static int coda_querycap(struct file *file, void *priv,
  379. struct v4l2_capability *cap)
  380. {
  381. struct coda_ctx *ctx = fh_to_ctx(priv);
  382. strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
  383. strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
  384. sizeof(cap->card));
  385. strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
  386. /*
  387. * This is only a mem-to-mem video device. The capture and output
  388. * device capability flags are left only for backward compatibility
  389. * and are scheduled for removal.
  390. */
  391. cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
  392. V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
  393. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  394. return 0;
  395. }
  396. static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
  397. enum v4l2_buf_type type, int src_fourcc)
  398. {
  399. struct coda_ctx *ctx = fh_to_ctx(priv);
  400. struct coda_codec *codecs = ctx->dev->devtype->codecs;
  401. struct coda_fmt *formats = coda_formats;
  402. struct coda_fmt *fmt;
  403. int num_codecs = ctx->dev->devtype->num_codecs;
  404. int num_formats = ARRAY_SIZE(coda_formats);
  405. int i, k, num = 0;
  406. for (i = 0; i < num_formats; i++) {
  407. /* Both uncompressed formats are always supported */
  408. if (coda_format_is_yuv(formats[i].fourcc) &&
  409. !coda_format_is_yuv(src_fourcc)) {
  410. if (num == f->index)
  411. break;
  412. ++num;
  413. continue;
  414. }
  415. /* Compressed formats may be supported, check the codec list */
  416. for (k = 0; k < num_codecs; k++) {
  417. /* if src_fourcc is set, only consider matching codecs */
  418. if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
  419. formats[i].fourcc == codecs[k].dst_fourcc &&
  420. (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
  421. break;
  422. if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
  423. formats[i].fourcc == codecs[k].src_fourcc)
  424. break;
  425. }
  426. if (k < num_codecs) {
  427. if (num == f->index)
  428. break;
  429. ++num;
  430. }
  431. }
  432. if (i < num_formats) {
  433. fmt = &formats[i];
  434. strlcpy(f->description, fmt->name, sizeof(f->description));
  435. f->pixelformat = fmt->fourcc;
  436. if (!coda_format_is_yuv(fmt->fourcc))
  437. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  438. return 0;
  439. }
  440. /* Format not found */
  441. return -EINVAL;
  442. }
  443. static int coda_enum_fmt_vid_cap(struct file *file, void *priv,
  444. struct v4l2_fmtdesc *f)
  445. {
  446. struct coda_ctx *ctx = fh_to_ctx(priv);
  447. struct vb2_queue *src_vq;
  448. struct coda_q_data *q_data_src;
  449. /* If the source format is already fixed, only list matching formats */
  450. src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  451. if (vb2_is_streaming(src_vq)) {
  452. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  453. return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  454. q_data_src->fourcc);
  455. }
  456. return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
  457. }
  458. static int coda_enum_fmt_vid_out(struct file *file, void *priv,
  459. struct v4l2_fmtdesc *f)
  460. {
  461. return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
  462. }
  463. static int coda_g_fmt(struct file *file, void *priv,
  464. struct v4l2_format *f)
  465. {
  466. struct vb2_queue *vq;
  467. struct coda_q_data *q_data;
  468. struct coda_ctx *ctx = fh_to_ctx(priv);
  469. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  470. if (!vq)
  471. return -EINVAL;
  472. q_data = get_q_data(ctx, f->type);
  473. f->fmt.pix.field = V4L2_FIELD_NONE;
  474. f->fmt.pix.pixelformat = q_data->fourcc;
  475. f->fmt.pix.width = q_data->width;
  476. f->fmt.pix.height = q_data->height;
  477. if (coda_format_is_yuv(f->fmt.pix.pixelformat))
  478. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
  479. else /* encoded formats h.264/mpeg4 */
  480. f->fmt.pix.bytesperline = 0;
  481. f->fmt.pix.sizeimage = q_data->sizeimage;
  482. f->fmt.pix.colorspace = ctx->colorspace;
  483. return 0;
  484. }
  485. static int coda_try_fmt(struct coda_ctx *ctx, struct coda_codec *codec,
  486. struct v4l2_format *f)
  487. {
  488. struct coda_dev *dev = ctx->dev;
  489. struct coda_q_data *q_data;
  490. unsigned int max_w, max_h;
  491. enum v4l2_field field;
  492. field = f->fmt.pix.field;
  493. if (field == V4L2_FIELD_ANY)
  494. field = V4L2_FIELD_NONE;
  495. else if (V4L2_FIELD_NONE != field)
  496. return -EINVAL;
  497. /* V4L2 specification suggests the driver corrects the format struct
  498. * if any of the dimensions is unsupported */
  499. f->fmt.pix.field = field;
  500. coda_get_max_dimensions(dev, codec, &max_w, &max_h);
  501. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN,
  502. &f->fmt.pix.height, MIN_H, max_h, H_ALIGN,
  503. S_ALIGN);
  504. switch (f->fmt.pix.pixelformat) {
  505. case V4L2_PIX_FMT_YUV420:
  506. case V4L2_PIX_FMT_YVU420:
  507. case V4L2_PIX_FMT_H264:
  508. case V4L2_PIX_FMT_MPEG4:
  509. case V4L2_PIX_FMT_JPEG:
  510. break;
  511. default:
  512. q_data = get_q_data(ctx, f->type);
  513. f->fmt.pix.pixelformat = q_data->fourcc;
  514. }
  515. switch (f->fmt.pix.pixelformat) {
  516. case V4L2_PIX_FMT_YUV420:
  517. case V4L2_PIX_FMT_YVU420:
  518. /* Frame stride must be multiple of 8 */
  519. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
  520. f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
  521. f->fmt.pix.height * 3 / 2;
  522. break;
  523. case V4L2_PIX_FMT_H264:
  524. case V4L2_PIX_FMT_MPEG4:
  525. case V4L2_PIX_FMT_JPEG:
  526. f->fmt.pix.bytesperline = 0;
  527. f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
  528. break;
  529. default:
  530. BUG();
  531. }
  532. return 0;
  533. }
  534. static int coda_try_fmt_vid_cap(struct file *file, void *priv,
  535. struct v4l2_format *f)
  536. {
  537. struct coda_ctx *ctx = fh_to_ctx(priv);
  538. struct coda_codec *codec;
  539. struct vb2_queue *src_vq;
  540. int ret;
  541. /*
  542. * If the source format is already fixed, try to find a codec that
  543. * converts to the given destination format
  544. */
  545. src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  546. if (vb2_is_streaming(src_vq)) {
  547. struct coda_q_data *q_data_src;
  548. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  549. codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
  550. f->fmt.pix.pixelformat);
  551. if (!codec)
  552. return -EINVAL;
  553. } else {
  554. /* Otherwise determine codec by encoded format, if possible */
  555. codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
  556. f->fmt.pix.pixelformat);
  557. }
  558. f->fmt.pix.colorspace = ctx->colorspace;
  559. ret = coda_try_fmt(ctx, codec, f);
  560. if (ret < 0)
  561. return ret;
  562. /* The h.264 decoder only returns complete 16x16 macroblocks */
  563. if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
  564. f->fmt.pix.width = round_up(f->fmt.pix.width, 16);
  565. f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
  566. f->fmt.pix.bytesperline = f->fmt.pix.width;
  567. f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
  568. f->fmt.pix.height * 3 / 2;
  569. }
  570. return 0;
  571. }
  572. static int coda_try_fmt_vid_out(struct file *file, void *priv,
  573. struct v4l2_format *f)
  574. {
  575. struct coda_ctx *ctx = fh_to_ctx(priv);
  576. struct coda_codec *codec;
  577. /* Determine codec by encoded format, returns NULL if raw or invalid */
  578. codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
  579. V4L2_PIX_FMT_YUV420);
  580. if (!f->fmt.pix.colorspace)
  581. f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
  582. return coda_try_fmt(ctx, codec, f);
  583. }
  584. static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
  585. {
  586. struct coda_q_data *q_data;
  587. struct vb2_queue *vq;
  588. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  589. if (!vq)
  590. return -EINVAL;
  591. q_data = get_q_data(ctx, f->type);
  592. if (!q_data)
  593. return -EINVAL;
  594. if (vb2_is_busy(vq)) {
  595. v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
  596. return -EBUSY;
  597. }
  598. q_data->fourcc = f->fmt.pix.pixelformat;
  599. q_data->width = f->fmt.pix.width;
  600. q_data->height = f->fmt.pix.height;
  601. q_data->sizeimage = f->fmt.pix.sizeimage;
  602. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  603. "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
  604. f->type, q_data->width, q_data->height, q_data->fourcc);
  605. return 0;
  606. }
  607. static int coda_s_fmt_vid_cap(struct file *file, void *priv,
  608. struct v4l2_format *f)
  609. {
  610. struct coda_ctx *ctx = fh_to_ctx(priv);
  611. int ret;
  612. ret = coda_try_fmt_vid_cap(file, priv, f);
  613. if (ret)
  614. return ret;
  615. return coda_s_fmt(ctx, f);
  616. }
  617. static int coda_s_fmt_vid_out(struct file *file, void *priv,
  618. struct v4l2_format *f)
  619. {
  620. struct coda_ctx *ctx = fh_to_ctx(priv);
  621. int ret;
  622. ret = coda_try_fmt_vid_out(file, priv, f);
  623. if (ret)
  624. return ret;
  625. ret = coda_s_fmt(ctx, f);
  626. if (ret)
  627. ctx->colorspace = f->fmt.pix.colorspace;
  628. return ret;
  629. }
  630. static int coda_reqbufs(struct file *file, void *priv,
  631. struct v4l2_requestbuffers *reqbufs)
  632. {
  633. struct coda_ctx *ctx = fh_to_ctx(priv);
  634. return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
  635. }
  636. static int coda_querybuf(struct file *file, void *priv,
  637. struct v4l2_buffer *buf)
  638. {
  639. struct coda_ctx *ctx = fh_to_ctx(priv);
  640. return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
  641. }
  642. static int coda_qbuf(struct file *file, void *priv,
  643. struct v4l2_buffer *buf)
  644. {
  645. struct coda_ctx *ctx = fh_to_ctx(priv);
  646. return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
  647. }
  648. static int coda_expbuf(struct file *file, void *priv,
  649. struct v4l2_exportbuffer *eb)
  650. {
  651. struct coda_ctx *ctx = fh_to_ctx(priv);
  652. return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
  653. }
  654. static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
  655. struct v4l2_buffer *buf)
  656. {
  657. struct vb2_queue *src_vq;
  658. src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  659. return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
  660. (buf->sequence == (ctx->qsequence - 1)));
  661. }
  662. static int coda_dqbuf(struct file *file, void *priv,
  663. struct v4l2_buffer *buf)
  664. {
  665. struct coda_ctx *ctx = fh_to_ctx(priv);
  666. int ret;
  667. ret = v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
  668. /* If this is the last capture buffer, emit an end-of-stream event */
  669. if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
  670. coda_buf_is_end_of_stream(ctx, buf)) {
  671. const struct v4l2_event eos_event = {
  672. .type = V4L2_EVENT_EOS
  673. };
  674. v4l2_event_queue_fh(&ctx->fh, &eos_event);
  675. }
  676. return ret;
  677. }
  678. static int coda_create_bufs(struct file *file, void *priv,
  679. struct v4l2_create_buffers *create)
  680. {
  681. struct coda_ctx *ctx = fh_to_ctx(priv);
  682. return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create);
  683. }
  684. static int coda_streamon(struct file *file, void *priv,
  685. enum v4l2_buf_type type)
  686. {
  687. struct coda_ctx *ctx = fh_to_ctx(priv);
  688. return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
  689. }
  690. static int coda_streamoff(struct file *file, void *priv,
  691. enum v4l2_buf_type type)
  692. {
  693. struct coda_ctx *ctx = fh_to_ctx(priv);
  694. int ret;
  695. /*
  696. * This indirectly calls __vb2_queue_cancel, which dequeues all buffers.
  697. * We therefore have to lock it against running hardware in this context,
  698. * which still needs the buffers.
  699. */
  700. mutex_lock(&ctx->buffer_mutex);
  701. ret = v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
  702. mutex_unlock(&ctx->buffer_mutex);
  703. return ret;
  704. }
  705. static int coda_decoder_cmd(struct file *file, void *fh,
  706. struct v4l2_decoder_cmd *dc)
  707. {
  708. struct coda_ctx *ctx = fh_to_ctx(fh);
  709. if (dc->cmd != V4L2_DEC_CMD_STOP)
  710. return -EINVAL;
  711. if ((dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK) ||
  712. (dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY))
  713. return -EINVAL;
  714. if (dc->stop.pts != 0)
  715. return -EINVAL;
  716. if (ctx->inst_type != CODA_INST_DECODER)
  717. return -EINVAL;
  718. /* Set the strem-end flag on this context */
  719. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  720. return 0;
  721. }
  722. static int coda_subscribe_event(struct v4l2_fh *fh,
  723. const struct v4l2_event_subscription *sub)
  724. {
  725. switch (sub->type) {
  726. case V4L2_EVENT_EOS:
  727. return v4l2_event_subscribe(fh, sub, 0, NULL);
  728. default:
  729. return v4l2_ctrl_subscribe_event(fh, sub);
  730. }
  731. }
  732. static const struct v4l2_ioctl_ops coda_ioctl_ops = {
  733. .vidioc_querycap = coda_querycap,
  734. .vidioc_enum_fmt_vid_cap = coda_enum_fmt_vid_cap,
  735. .vidioc_g_fmt_vid_cap = coda_g_fmt,
  736. .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
  737. .vidioc_s_fmt_vid_cap = coda_s_fmt_vid_cap,
  738. .vidioc_enum_fmt_vid_out = coda_enum_fmt_vid_out,
  739. .vidioc_g_fmt_vid_out = coda_g_fmt,
  740. .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
  741. .vidioc_s_fmt_vid_out = coda_s_fmt_vid_out,
  742. .vidioc_reqbufs = coda_reqbufs,
  743. .vidioc_querybuf = coda_querybuf,
  744. .vidioc_qbuf = coda_qbuf,
  745. .vidioc_expbuf = coda_expbuf,
  746. .vidioc_dqbuf = coda_dqbuf,
  747. .vidioc_create_bufs = coda_create_bufs,
  748. .vidioc_streamon = coda_streamon,
  749. .vidioc_streamoff = coda_streamoff,
  750. .vidioc_decoder_cmd = coda_decoder_cmd,
  751. .vidioc_subscribe_event = coda_subscribe_event,
  752. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  753. };
  754. static int coda_start_decoding(struct coda_ctx *ctx);
  755. static void coda_skip_run(struct work_struct *work)
  756. {
  757. struct coda_ctx *ctx = container_of(work, struct coda_ctx, skip_run);
  758. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  759. }
  760. static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
  761. {
  762. return kfifo_len(&ctx->bitstream_fifo);
  763. }
  764. static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
  765. {
  766. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  767. struct coda_dev *dev = ctx->dev;
  768. u32 rd_ptr;
  769. rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  770. kfifo->out = (kfifo->in & ~kfifo->mask) |
  771. (rd_ptr - ctx->bitstream.paddr);
  772. if (kfifo->out > kfifo->in)
  773. kfifo->out -= kfifo->mask + 1;
  774. }
  775. static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
  776. {
  777. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  778. struct coda_dev *dev = ctx->dev;
  779. u32 rd_ptr, wr_ptr;
  780. rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
  781. coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  782. wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
  783. coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  784. }
  785. static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
  786. {
  787. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  788. struct coda_dev *dev = ctx->dev;
  789. u32 wr_ptr;
  790. wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
  791. coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  792. }
  793. static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
  794. {
  795. u32 src_size = vb2_get_plane_payload(src_buf, 0);
  796. u32 n;
  797. n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
  798. if (n < src_size)
  799. return -ENOSPC;
  800. dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
  801. ctx->bitstream.size, DMA_TO_DEVICE);
  802. ctx->qsequence++;
  803. return 0;
  804. }
  805. static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
  806. struct vb2_buffer *src_buf)
  807. {
  808. int ret;
  809. if (coda_get_bitstream_payload(ctx) +
  810. vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
  811. return false;
  812. if (vb2_plane_vaddr(src_buf, 0) == NULL) {
  813. v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
  814. return true;
  815. }
  816. ret = coda_bitstream_queue(ctx, src_buf);
  817. if (ret < 0) {
  818. v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
  819. return false;
  820. }
  821. /* Sync read pointer to device */
  822. if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
  823. coda_kfifo_sync_to_device_write(ctx);
  824. ctx->prescan_failed = false;
  825. return true;
  826. }
  827. static void coda_fill_bitstream(struct coda_ctx *ctx)
  828. {
  829. struct vb2_buffer *src_buf;
  830. while (v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) > 0) {
  831. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  832. if (coda_bitstream_try_queue(ctx, src_buf)) {
  833. src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
  834. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  835. } else {
  836. break;
  837. }
  838. }
  839. }
  840. /*
  841. * Mem-to-mem operations.
  842. */
  843. static int coda_prepare_decode(struct coda_ctx *ctx)
  844. {
  845. struct vb2_buffer *dst_buf;
  846. struct coda_dev *dev = ctx->dev;
  847. struct coda_q_data *q_data_dst;
  848. u32 stridey, height;
  849. u32 picture_y, picture_cb, picture_cr;
  850. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  851. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  852. if (ctx->params.rot_mode & CODA_ROT_90) {
  853. stridey = q_data_dst->height;
  854. height = q_data_dst->width;
  855. } else {
  856. stridey = q_data_dst->width;
  857. height = q_data_dst->height;
  858. }
  859. /* Try to copy source buffer contents into the bitstream ringbuffer */
  860. mutex_lock(&ctx->bitstream_mutex);
  861. coda_fill_bitstream(ctx);
  862. mutex_unlock(&ctx->bitstream_mutex);
  863. if (coda_get_bitstream_payload(ctx) < 512 &&
  864. (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
  865. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  866. "bitstream payload: %d, skipping\n",
  867. coda_get_bitstream_payload(ctx));
  868. schedule_work(&ctx->skip_run);
  869. return -EAGAIN;
  870. }
  871. /* Run coda_start_decoding (again) if not yet initialized */
  872. if (!ctx->initialized) {
  873. int ret = coda_start_decoding(ctx);
  874. if (ret < 0) {
  875. v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
  876. schedule_work(&ctx->skip_run);
  877. return -EAGAIN;
  878. } else {
  879. ctx->initialized = 1;
  880. }
  881. }
  882. /* Set rotator output */
  883. picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
  884. if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
  885. /* Switch Cr and Cb for YVU420 format */
  886. picture_cr = picture_y + stridey * height;
  887. picture_cb = picture_cr + stridey / 2 * height / 2;
  888. } else {
  889. picture_cb = picture_y + stridey * height;
  890. picture_cr = picture_cb + stridey / 2 * height / 2;
  891. }
  892. coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
  893. coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
  894. coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
  895. coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
  896. coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
  897. CODA_CMD_DEC_PIC_ROT_MODE);
  898. switch (dev->devtype->product) {
  899. case CODA_DX6:
  900. /* TBD */
  901. case CODA_7541:
  902. coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
  903. break;
  904. }
  905. coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
  906. coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
  907. coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
  908. return 0;
  909. }
  910. static void coda_prepare_encode(struct coda_ctx *ctx)
  911. {
  912. struct coda_q_data *q_data_src, *q_data_dst;
  913. struct vb2_buffer *src_buf, *dst_buf;
  914. struct coda_dev *dev = ctx->dev;
  915. int force_ipicture;
  916. int quant_param = 0;
  917. u32 picture_y, picture_cb, picture_cr;
  918. u32 pic_stream_buffer_addr, pic_stream_buffer_size;
  919. u32 dst_fourcc;
  920. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  921. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  922. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  923. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  924. dst_fourcc = q_data_dst->fourcc;
  925. src_buf->v4l2_buf.sequence = ctx->osequence;
  926. dst_buf->v4l2_buf.sequence = ctx->osequence;
  927. ctx->osequence++;
  928. /*
  929. * Workaround coda firmware BUG that only marks the first
  930. * frame as IDR. This is a problem for some decoders that can't
  931. * recover when a frame is lost.
  932. */
  933. if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
  934. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  935. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  936. } else {
  937. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  938. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  939. }
  940. /*
  941. * Copy headers at the beginning of the first frame for H.264 only.
  942. * In MPEG4 they are already copied by the coda.
  943. */
  944. if (src_buf->v4l2_buf.sequence == 0) {
  945. pic_stream_buffer_addr =
  946. vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
  947. ctx->vpu_header_size[0] +
  948. ctx->vpu_header_size[1] +
  949. ctx->vpu_header_size[2];
  950. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
  951. ctx->vpu_header_size[0] -
  952. ctx->vpu_header_size[1] -
  953. ctx->vpu_header_size[2];
  954. memcpy(vb2_plane_vaddr(dst_buf, 0),
  955. &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
  956. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
  957. &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
  958. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
  959. ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
  960. ctx->vpu_header_size[2]);
  961. } else {
  962. pic_stream_buffer_addr =
  963. vb2_dma_contig_plane_dma_addr(dst_buf, 0);
  964. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
  965. }
  966. if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
  967. force_ipicture = 1;
  968. switch (dst_fourcc) {
  969. case V4L2_PIX_FMT_H264:
  970. quant_param = ctx->params.h264_intra_qp;
  971. break;
  972. case V4L2_PIX_FMT_MPEG4:
  973. quant_param = ctx->params.mpeg4_intra_qp;
  974. break;
  975. default:
  976. v4l2_warn(&ctx->dev->v4l2_dev,
  977. "cannot set intra qp, fmt not supported\n");
  978. break;
  979. }
  980. } else {
  981. force_ipicture = 0;
  982. switch (dst_fourcc) {
  983. case V4L2_PIX_FMT_H264:
  984. quant_param = ctx->params.h264_inter_qp;
  985. break;
  986. case V4L2_PIX_FMT_MPEG4:
  987. quant_param = ctx->params.mpeg4_inter_qp;
  988. break;
  989. default:
  990. v4l2_warn(&ctx->dev->v4l2_dev,
  991. "cannot set inter qp, fmt not supported\n");
  992. break;
  993. }
  994. }
  995. /* submit */
  996. coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
  997. coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
  998. picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
  999. switch (q_data_src->fourcc) {
  1000. case V4L2_PIX_FMT_YVU420:
  1001. /* Switch Cb and Cr for YVU420 format */
  1002. picture_cr = picture_y + q_data_src->width * q_data_src->height;
  1003. picture_cb = picture_cr + q_data_src->width / 2 *
  1004. q_data_src->height / 2;
  1005. break;
  1006. case V4L2_PIX_FMT_YUV420:
  1007. default:
  1008. picture_cb = picture_y + q_data_src->width * q_data_src->height;
  1009. picture_cr = picture_cb + q_data_src->width / 2 *
  1010. q_data_src->height / 2;
  1011. break;
  1012. }
  1013. coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
  1014. coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
  1015. coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
  1016. coda_write(dev, force_ipicture << 1 & 0x2,
  1017. CODA_CMD_ENC_PIC_OPTION);
  1018. coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
  1019. coda_write(dev, pic_stream_buffer_size / 1024,
  1020. CODA_CMD_ENC_PIC_BB_SIZE);
  1021. }
  1022. static void coda_device_run(void *m2m_priv)
  1023. {
  1024. struct coda_ctx *ctx = m2m_priv;
  1025. struct coda_dev *dev = ctx->dev;
  1026. int ret;
  1027. mutex_lock(&ctx->buffer_mutex);
  1028. /*
  1029. * If streamoff dequeued all buffers before we could get the lock,
  1030. * just bail out immediately.
  1031. */
  1032. if ((!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
  1033. ctx->inst_type != CODA_INST_DECODER) ||
  1034. !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
  1035. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1036. "%d: device_run without buffers\n", ctx->idx);
  1037. mutex_unlock(&ctx->buffer_mutex);
  1038. schedule_work(&ctx->skip_run);
  1039. return;
  1040. }
  1041. mutex_lock(&dev->coda_mutex);
  1042. if (ctx->inst_type == CODA_INST_DECODER) {
  1043. ret = coda_prepare_decode(ctx);
  1044. if (ret < 0) {
  1045. mutex_unlock(&dev->coda_mutex);
  1046. mutex_unlock(&ctx->buffer_mutex);
  1047. /* job_finish scheduled by prepare_decode */
  1048. return;
  1049. }
  1050. } else {
  1051. coda_prepare_encode(ctx);
  1052. }
  1053. if (dev->devtype->product != CODA_DX6)
  1054. coda_write(dev, ctx->iram_info.axi_sram_use,
  1055. CODA7_REG_BIT_AXI_SRAM_USE);
  1056. /* 1 second timeout in case CODA locks up */
  1057. schedule_delayed_work(&dev->timeout, HZ);
  1058. if (ctx->inst_type == CODA_INST_DECODER)
  1059. coda_kfifo_sync_to_device_full(ctx);
  1060. coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
  1061. }
  1062. static int coda_job_ready(void *m2m_priv)
  1063. {
  1064. struct coda_ctx *ctx = m2m_priv;
  1065. /*
  1066. * For both 'P' and 'key' frame cases 1 picture
  1067. * and 1 frame are needed. In the decoder case,
  1068. * the compressed frame can be in the bitstream.
  1069. */
  1070. if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
  1071. ctx->inst_type != CODA_INST_DECODER) {
  1072. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1073. "not ready: not enough video buffers.\n");
  1074. return 0;
  1075. }
  1076. if (!v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
  1077. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1078. "not ready: not enough video capture buffers.\n");
  1079. return 0;
  1080. }
  1081. if (ctx->prescan_failed ||
  1082. ((ctx->inst_type == CODA_INST_DECODER) &&
  1083. (coda_get_bitstream_payload(ctx) < 512) &&
  1084. !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
  1085. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1086. "%d: not ready: not enough bitstream data.\n",
  1087. ctx->idx);
  1088. return 0;
  1089. }
  1090. if (ctx->aborting) {
  1091. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1092. "not ready: aborting\n");
  1093. return 0;
  1094. }
  1095. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1096. "job ready\n");
  1097. return 1;
  1098. }
  1099. static void coda_job_abort(void *priv)
  1100. {
  1101. struct coda_ctx *ctx = priv;
  1102. ctx->aborting = 1;
  1103. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1104. "Aborting task\n");
  1105. }
  1106. static void coda_lock(void *m2m_priv)
  1107. {
  1108. struct coda_ctx *ctx = m2m_priv;
  1109. struct coda_dev *pcdev = ctx->dev;
  1110. mutex_lock(&pcdev->dev_mutex);
  1111. }
  1112. static void coda_unlock(void *m2m_priv)
  1113. {
  1114. struct coda_ctx *ctx = m2m_priv;
  1115. struct coda_dev *pcdev = ctx->dev;
  1116. mutex_unlock(&pcdev->dev_mutex);
  1117. }
  1118. static struct v4l2_m2m_ops coda_m2m_ops = {
  1119. .device_run = coda_device_run,
  1120. .job_ready = coda_job_ready,
  1121. .job_abort = coda_job_abort,
  1122. .lock = coda_lock,
  1123. .unlock = coda_unlock,
  1124. };
  1125. static void set_default_params(struct coda_ctx *ctx)
  1126. {
  1127. int max_w;
  1128. int max_h;
  1129. ctx->codec = &ctx->dev->devtype->codecs[0];
  1130. max_w = ctx->codec->max_w;
  1131. max_h = ctx->codec->max_h;
  1132. ctx->params.codec_mode = CODA_MODE_INVALID;
  1133. ctx->colorspace = V4L2_COLORSPACE_REC709;
  1134. ctx->params.framerate = 30;
  1135. ctx->aborting = 0;
  1136. /* Default formats for output and input queues */
  1137. ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
  1138. ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
  1139. ctx->q_data[V4L2_M2M_SRC].width = max_w;
  1140. ctx->q_data[V4L2_M2M_SRC].height = max_h;
  1141. ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
  1142. ctx->q_data[V4L2_M2M_DST].width = max_w;
  1143. ctx->q_data[V4L2_M2M_DST].height = max_h;
  1144. ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
  1145. }
  1146. /*
  1147. * Queue operations
  1148. */
  1149. static int coda_queue_setup(struct vb2_queue *vq,
  1150. const struct v4l2_format *fmt,
  1151. unsigned int *nbuffers, unsigned int *nplanes,
  1152. unsigned int sizes[], void *alloc_ctxs[])
  1153. {
  1154. struct coda_ctx *ctx = vb2_get_drv_priv(vq);
  1155. struct coda_q_data *q_data;
  1156. unsigned int size;
  1157. q_data = get_q_data(ctx, vq->type);
  1158. size = q_data->sizeimage;
  1159. *nplanes = 1;
  1160. sizes[0] = size;
  1161. alloc_ctxs[0] = ctx->dev->alloc_ctx;
  1162. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1163. "get %d buffer(s) of size %d each.\n", *nbuffers, size);
  1164. return 0;
  1165. }
  1166. static int coda_buf_prepare(struct vb2_buffer *vb)
  1167. {
  1168. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  1169. struct coda_q_data *q_data;
  1170. q_data = get_q_data(ctx, vb->vb2_queue->type);
  1171. if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
  1172. v4l2_warn(&ctx->dev->v4l2_dev,
  1173. "%s data will not fit into plane (%lu < %lu)\n",
  1174. __func__, vb2_plane_size(vb, 0),
  1175. (long)q_data->sizeimage);
  1176. return -EINVAL;
  1177. }
  1178. return 0;
  1179. }
  1180. static void coda_buf_queue(struct vb2_buffer *vb)
  1181. {
  1182. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  1183. struct coda_q_data *q_data;
  1184. q_data = get_q_data(ctx, vb->vb2_queue->type);
  1185. /*
  1186. * In the decoder case, immediately try to copy the buffer into the
  1187. * bitstream ringbuffer and mark it as ready to be dequeued.
  1188. */
  1189. if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
  1190. vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  1191. /*
  1192. * For backwards compatiblity, queuing an empty buffer marks
  1193. * the stream end
  1194. */
  1195. if (vb2_get_plane_payload(vb, 0) == 0)
  1196. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  1197. mutex_lock(&ctx->bitstream_mutex);
  1198. v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
  1199. coda_fill_bitstream(ctx);
  1200. mutex_unlock(&ctx->bitstream_mutex);
  1201. } else {
  1202. v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
  1203. }
  1204. }
  1205. static void coda_wait_prepare(struct vb2_queue *q)
  1206. {
  1207. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1208. coda_unlock(ctx);
  1209. }
  1210. static void coda_wait_finish(struct vb2_queue *q)
  1211. {
  1212. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1213. coda_lock(ctx);
  1214. }
  1215. static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
  1216. {
  1217. struct coda_dev *dev = ctx->dev;
  1218. u32 *p = ctx->parabuf.vaddr;
  1219. if (dev->devtype->product == CODA_DX6)
  1220. p[index] = value;
  1221. else
  1222. p[index ^ 1] = value;
  1223. }
  1224. static int coda_alloc_aux_buf(struct coda_dev *dev,
  1225. struct coda_aux_buf *buf, size_t size)
  1226. {
  1227. buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
  1228. GFP_KERNEL);
  1229. if (!buf->vaddr)
  1230. return -ENOMEM;
  1231. buf->size = size;
  1232. return 0;
  1233. }
  1234. static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
  1235. struct coda_aux_buf *buf, size_t size)
  1236. {
  1237. return coda_alloc_aux_buf(ctx->dev, buf, size);
  1238. }
  1239. static void coda_free_aux_buf(struct coda_dev *dev,
  1240. struct coda_aux_buf *buf)
  1241. {
  1242. if (buf->vaddr) {
  1243. dma_free_coherent(&dev->plat_dev->dev, buf->size,
  1244. buf->vaddr, buf->paddr);
  1245. buf->vaddr = NULL;
  1246. buf->size = 0;
  1247. }
  1248. }
  1249. static void coda_free_framebuffers(struct coda_ctx *ctx)
  1250. {
  1251. int i;
  1252. for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
  1253. coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
  1254. }
  1255. static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
  1256. {
  1257. struct coda_dev *dev = ctx->dev;
  1258. int height = q_data->height;
  1259. dma_addr_t paddr;
  1260. int ysize;
  1261. int ret;
  1262. int i;
  1263. if (ctx->codec && ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
  1264. height = round_up(height, 16);
  1265. ysize = round_up(q_data->width, 8) * height;
  1266. /* Allocate frame buffers */
  1267. for (i = 0; i < ctx->num_internal_frames; i++) {
  1268. size_t size;
  1269. size = q_data->sizeimage;
  1270. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
  1271. dev->devtype->product != CODA_DX6)
  1272. ctx->internal_frames[i].size += ysize/4;
  1273. ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], size);
  1274. if (ret < 0) {
  1275. coda_free_framebuffers(ctx);
  1276. return ret;
  1277. }
  1278. }
  1279. /* Register frame buffers in the parameter buffer */
  1280. for (i = 0; i < ctx->num_internal_frames; i++) {
  1281. paddr = ctx->internal_frames[i].paddr;
  1282. coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
  1283. coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
  1284. coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
  1285. /* mvcol buffer for h.264 */
  1286. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
  1287. dev->devtype->product != CODA_DX6)
  1288. coda_parabuf_write(ctx, 96 + i,
  1289. ctx->internal_frames[i].paddr +
  1290. ysize + ysize/4 + ysize/4);
  1291. }
  1292. /* mvcol buffer for mpeg4 */
  1293. if ((dev->devtype->product != CODA_DX6) &&
  1294. (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
  1295. coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
  1296. ysize + ysize/4 + ysize/4);
  1297. return 0;
  1298. }
  1299. static int coda_h264_padding(int size, char *p)
  1300. {
  1301. int nal_size;
  1302. int diff;
  1303. diff = size - (size & ~0x7);
  1304. if (diff == 0)
  1305. return 0;
  1306. nal_size = coda_filler_size[diff];
  1307. memcpy(p, coda_filler_nal, nal_size);
  1308. /* Add rbsp stop bit and trailing at the end */
  1309. *(p + nal_size - 1) = 0x80;
  1310. return nal_size;
  1311. }
  1312. static void coda_setup_iram(struct coda_ctx *ctx)
  1313. {
  1314. struct coda_iram_info *iram_info = &ctx->iram_info;
  1315. struct coda_dev *dev = ctx->dev;
  1316. int ipacdc_size;
  1317. int bitram_size;
  1318. int dbk_size;
  1319. int ovl_size;
  1320. int mb_width;
  1321. int me_size;
  1322. int size;
  1323. memset(iram_info, 0, sizeof(*iram_info));
  1324. size = dev->iram_size;
  1325. if (dev->devtype->product == CODA_DX6)
  1326. return;
  1327. if (ctx->inst_type == CODA_INST_ENCODER) {
  1328. struct coda_q_data *q_data_src;
  1329. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1330. mb_width = DIV_ROUND_UP(q_data_src->width, 16);
  1331. /* Prioritize in case IRAM is too small for everything */
  1332. me_size = round_up(round_up(q_data_src->width, 16) * 36 + 2048,
  1333. 1024);
  1334. iram_info->search_ram_size = me_size;
  1335. if (size >= iram_info->search_ram_size) {
  1336. if (dev->devtype->product == CODA_7541)
  1337. iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE;
  1338. iram_info->search_ram_paddr = dev->iram_paddr;
  1339. size -= iram_info->search_ram_size;
  1340. } else {
  1341. pr_err("IRAM is smaller than the search ram size\n");
  1342. goto out;
  1343. }
  1344. /* Only H.264BP and H.263P3 are considered */
  1345. dbk_size = round_up(128 * mb_width, 1024);
  1346. if (size >= dbk_size) {
  1347. iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
  1348. iram_info->buf_dbk_y_use = dev->iram_paddr +
  1349. iram_info->search_ram_size;
  1350. iram_info->buf_dbk_c_use = iram_info->buf_dbk_y_use +
  1351. dbk_size / 2;
  1352. size -= dbk_size;
  1353. } else {
  1354. goto out;
  1355. }
  1356. bitram_size = round_up(128 * mb_width, 1024);
  1357. if (size >= bitram_size) {
  1358. iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
  1359. iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
  1360. dbk_size / 2;
  1361. size -= bitram_size;
  1362. } else {
  1363. goto out;
  1364. }
  1365. ipacdc_size = round_up(128 * mb_width, 1024);
  1366. if (size >= ipacdc_size) {
  1367. iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
  1368. iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
  1369. bitram_size;
  1370. size -= ipacdc_size;
  1371. }
  1372. /* OVL and BTP disabled for encoder */
  1373. } else if (ctx->inst_type == CODA_INST_DECODER) {
  1374. struct coda_q_data *q_data_dst;
  1375. int mb_height;
  1376. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1377. mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
  1378. mb_height = DIV_ROUND_UP(q_data_dst->height, 16);
  1379. dbk_size = round_up(256 * mb_width, 1024);
  1380. if (size >= dbk_size) {
  1381. iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
  1382. iram_info->buf_dbk_y_use = dev->iram_paddr;
  1383. iram_info->buf_dbk_c_use = dev->iram_paddr +
  1384. dbk_size / 2;
  1385. size -= dbk_size;
  1386. } else {
  1387. goto out;
  1388. }
  1389. bitram_size = round_up(128 * mb_width, 1024);
  1390. if (size >= bitram_size) {
  1391. iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
  1392. iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
  1393. dbk_size / 2;
  1394. size -= bitram_size;
  1395. } else {
  1396. goto out;
  1397. }
  1398. ipacdc_size = round_up(128 * mb_width, 1024);
  1399. if (size >= ipacdc_size) {
  1400. iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
  1401. iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
  1402. bitram_size;
  1403. size -= ipacdc_size;
  1404. } else {
  1405. goto out;
  1406. }
  1407. ovl_size = round_up(80 * mb_width, 1024);
  1408. }
  1409. out:
  1410. switch (dev->devtype->product) {
  1411. case CODA_DX6:
  1412. break;
  1413. case CODA_7541:
  1414. /* i.MX53 uses secondary AXI for IRAM access */
  1415. if (iram_info->axi_sram_use & CODA7_USE_HOST_BIT_ENABLE)
  1416. iram_info->axi_sram_use |= CODA7_USE_BIT_ENABLE;
  1417. if (iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)
  1418. iram_info->axi_sram_use |= CODA7_USE_IP_ENABLE;
  1419. if (iram_info->axi_sram_use & CODA7_USE_HOST_DBK_ENABLE)
  1420. iram_info->axi_sram_use |= CODA7_USE_DBK_ENABLE;
  1421. if (iram_info->axi_sram_use & CODA7_USE_HOST_OVL_ENABLE)
  1422. iram_info->axi_sram_use |= CODA7_USE_OVL_ENABLE;
  1423. if (iram_info->axi_sram_use & CODA7_USE_HOST_ME_ENABLE)
  1424. iram_info->axi_sram_use |= CODA7_USE_ME_ENABLE;
  1425. }
  1426. if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
  1427. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1428. "IRAM smaller than needed\n");
  1429. if (dev->devtype->product == CODA_7541) {
  1430. /* TODO - Enabling these causes picture errors on CODA7541 */
  1431. if (ctx->inst_type == CODA_INST_DECODER) {
  1432. /* fw 1.4.50 */
  1433. iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
  1434. CODA7_USE_IP_ENABLE);
  1435. } else {
  1436. /* fw 13.4.29 */
  1437. iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
  1438. CODA7_USE_HOST_DBK_ENABLE |
  1439. CODA7_USE_IP_ENABLE |
  1440. CODA7_USE_DBK_ENABLE);
  1441. }
  1442. }
  1443. }
  1444. static void coda_free_context_buffers(struct coda_ctx *ctx)
  1445. {
  1446. struct coda_dev *dev = ctx->dev;
  1447. coda_free_aux_buf(dev, &ctx->slicebuf);
  1448. coda_free_aux_buf(dev, &ctx->psbuf);
  1449. if (dev->devtype->product != CODA_DX6)
  1450. coda_free_aux_buf(dev, &ctx->workbuf);
  1451. }
  1452. static int coda_alloc_context_buffers(struct coda_ctx *ctx,
  1453. struct coda_q_data *q_data)
  1454. {
  1455. struct coda_dev *dev = ctx->dev;
  1456. size_t size;
  1457. int ret;
  1458. switch (dev->devtype->product) {
  1459. case CODA_7541:
  1460. size = CODA7_WORK_BUF_SIZE;
  1461. break;
  1462. default:
  1463. return 0;
  1464. }
  1465. if (ctx->psbuf.vaddr) {
  1466. v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
  1467. return -EBUSY;
  1468. }
  1469. if (ctx->slicebuf.vaddr) {
  1470. v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
  1471. return -EBUSY;
  1472. }
  1473. if (ctx->workbuf.vaddr) {
  1474. v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
  1475. ret = -EBUSY;
  1476. return -ENOMEM;
  1477. }
  1478. if (q_data->fourcc == V4L2_PIX_FMT_H264) {
  1479. /* worst case slice size */
  1480. size = (DIV_ROUND_UP(q_data->width, 16) *
  1481. DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
  1482. ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size);
  1483. if (ret < 0) {
  1484. v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
  1485. ctx->slicebuf.size);
  1486. return ret;
  1487. }
  1488. }
  1489. if (dev->devtype->product == CODA_7541) {
  1490. ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE);
  1491. if (ret < 0) {
  1492. v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
  1493. goto err;
  1494. }
  1495. }
  1496. ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size);
  1497. if (ret < 0) {
  1498. v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
  1499. ctx->workbuf.size);
  1500. goto err;
  1501. }
  1502. return 0;
  1503. err:
  1504. coda_free_context_buffers(ctx);
  1505. return ret;
  1506. }
  1507. static int coda_start_decoding(struct coda_ctx *ctx)
  1508. {
  1509. struct coda_q_data *q_data_src, *q_data_dst;
  1510. u32 bitstream_buf, bitstream_size;
  1511. struct coda_dev *dev = ctx->dev;
  1512. int width, height;
  1513. u32 src_fourcc;
  1514. u32 val;
  1515. int ret;
  1516. /* Start decoding */
  1517. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1518. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1519. bitstream_buf = ctx->bitstream.paddr;
  1520. bitstream_size = ctx->bitstream.size;
  1521. src_fourcc = q_data_src->fourcc;
  1522. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  1523. /* Update coda bitstream read and write pointers from kfifo */
  1524. coda_kfifo_sync_to_device_full(ctx);
  1525. ctx->display_idx = -1;
  1526. ctx->frm_dis_flg = 0;
  1527. coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  1528. coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
  1529. CODA_REG_BIT_BIT_STREAM_PARAM);
  1530. coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
  1531. coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
  1532. val = 0;
  1533. if (dev->devtype->product == CODA_7541)
  1534. val |= CODA_REORDER_ENABLE;
  1535. coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
  1536. ctx->params.codec_mode = ctx->codec->mode;
  1537. ctx->params.codec_mode_aux = 0;
  1538. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1539. if (dev->devtype->product == CODA_7541) {
  1540. coda_write(dev, ctx->psbuf.paddr,
  1541. CODA_CMD_DEC_SEQ_PS_BB_START);
  1542. coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
  1543. CODA_CMD_DEC_SEQ_PS_BB_SIZE);
  1544. }
  1545. }
  1546. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
  1547. v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  1548. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  1549. return -ETIMEDOUT;
  1550. }
  1551. /* Update kfifo out pointer from coda bitstream read pointer */
  1552. coda_kfifo_sync_from_device(ctx);
  1553. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  1554. if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
  1555. v4l2_err(&dev->v4l2_dev,
  1556. "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
  1557. coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
  1558. return -EAGAIN;
  1559. }
  1560. val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
  1561. if (dev->devtype->product == CODA_DX6) {
  1562. width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
  1563. height = val & CODADX6_PICHEIGHT_MASK;
  1564. } else {
  1565. width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
  1566. height = val & CODA7_PICHEIGHT_MASK;
  1567. }
  1568. if (width > q_data_dst->width || height > q_data_dst->height) {
  1569. v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
  1570. width, height, q_data_dst->width, q_data_dst->height);
  1571. return -EINVAL;
  1572. }
  1573. width = round_up(width, 16);
  1574. height = round_up(height, 16);
  1575. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
  1576. __func__, ctx->idx, width, height);
  1577. ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED) + 1;
  1578. if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
  1579. v4l2_err(&dev->v4l2_dev,
  1580. "not enough framebuffers to decode (%d < %d)\n",
  1581. CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
  1582. return -EINVAL;
  1583. }
  1584. ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
  1585. if (ret < 0)
  1586. return ret;
  1587. /* Tell the decoder how many frame buffers we allocated. */
  1588. coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
  1589. coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
  1590. if (dev->devtype->product != CODA_DX6) {
  1591. /* Set secondary AXI IRAM */
  1592. coda_setup_iram(ctx);
  1593. coda_write(dev, ctx->iram_info.buf_bit_use,
  1594. CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  1595. coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
  1596. CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  1597. coda_write(dev, ctx->iram_info.buf_dbk_y_use,
  1598. CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  1599. coda_write(dev, ctx->iram_info.buf_dbk_c_use,
  1600. CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  1601. coda_write(dev, ctx->iram_info.buf_ovl_use,
  1602. CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  1603. }
  1604. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1605. coda_write(dev, ctx->slicebuf.paddr,
  1606. CODA_CMD_SET_FRAME_SLICE_BB_START);
  1607. coda_write(dev, ctx->slicebuf.size / 1024,
  1608. CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
  1609. }
  1610. if (dev->devtype->product == CODA_7541) {
  1611. int max_mb_x = 1920 / 16;
  1612. int max_mb_y = 1088 / 16;
  1613. int max_mb_num = max_mb_x * max_mb_y;
  1614. coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
  1615. CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
  1616. }
  1617. if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
  1618. v4l2_err(&ctx->dev->v4l2_dev,
  1619. "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  1620. return -ETIMEDOUT;
  1621. }
  1622. return 0;
  1623. }
  1624. static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
  1625. int header_code, u8 *header, int *size)
  1626. {
  1627. struct coda_dev *dev = ctx->dev;
  1628. int ret;
  1629. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
  1630. CODA_CMD_ENC_HEADER_BB_START);
  1631. coda_write(dev, vb2_plane_size(buf, 0), CODA_CMD_ENC_HEADER_BB_SIZE);
  1632. coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
  1633. ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
  1634. if (ret < 0) {
  1635. v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  1636. return ret;
  1637. }
  1638. *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
  1639. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  1640. memcpy(header, vb2_plane_vaddr(buf, 0), *size);
  1641. return 0;
  1642. }
  1643. static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
  1644. {
  1645. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1646. struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
  1647. u32 bitstream_buf, bitstream_size;
  1648. struct coda_dev *dev = ctx->dev;
  1649. struct coda_q_data *q_data_src, *q_data_dst;
  1650. struct vb2_buffer *buf;
  1651. u32 dst_fourcc;
  1652. u32 value;
  1653. int ret = 0;
  1654. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1655. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  1656. if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
  1657. if (coda_get_bitstream_payload(ctx) < 512)
  1658. return -EINVAL;
  1659. } else {
  1660. if (count < 1)
  1661. return -EINVAL;
  1662. }
  1663. ctx->streamon_out = 1;
  1664. if (coda_format_is_yuv(q_data_src->fourcc))
  1665. ctx->inst_type = CODA_INST_ENCODER;
  1666. else
  1667. ctx->inst_type = CODA_INST_DECODER;
  1668. } else {
  1669. if (count < 1)
  1670. return -EINVAL;
  1671. ctx->streamon_cap = 1;
  1672. }
  1673. /* Don't start the coda unless both queues are on */
  1674. if (!(ctx->streamon_out & ctx->streamon_cap))
  1675. return 0;
  1676. /* Allow decoder device_run with no new buffers queued */
  1677. if (ctx->inst_type == CODA_INST_DECODER)
  1678. v4l2_m2m_set_src_buffered(ctx->m2m_ctx, true);
  1679. ctx->gopcounter = ctx->params.gop_size - 1;
  1680. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  1681. bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
  1682. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1683. bitstream_size = q_data_dst->sizeimage;
  1684. dst_fourcc = q_data_dst->fourcc;
  1685. ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
  1686. q_data_dst->fourcc);
  1687. if (!ctx->codec) {
  1688. v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
  1689. return -EINVAL;
  1690. }
  1691. /* Allocate per-instance buffers */
  1692. ret = coda_alloc_context_buffers(ctx, q_data_src);
  1693. if (ret < 0)
  1694. return ret;
  1695. if (ctx->inst_type == CODA_INST_DECODER) {
  1696. mutex_lock(&dev->coda_mutex);
  1697. ret = coda_start_decoding(ctx);
  1698. mutex_unlock(&dev->coda_mutex);
  1699. if (ret == -EAGAIN) {
  1700. return 0;
  1701. } else if (ret < 0) {
  1702. return ret;
  1703. } else {
  1704. ctx->initialized = 1;
  1705. return 0;
  1706. }
  1707. }
  1708. if (!coda_is_initialized(dev)) {
  1709. v4l2_err(v4l2_dev, "coda is not initialized.\n");
  1710. return -EFAULT;
  1711. }
  1712. mutex_lock(&dev->coda_mutex);
  1713. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  1714. coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  1715. coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  1716. switch (dev->devtype->product) {
  1717. case CODA_DX6:
  1718. coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
  1719. CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  1720. break;
  1721. default:
  1722. coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
  1723. CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  1724. }
  1725. if (dev->devtype->product == CODA_DX6) {
  1726. /* Configure the coda */
  1727. coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
  1728. }
  1729. /* Could set rotation here if needed */
  1730. switch (dev->devtype->product) {
  1731. case CODA_DX6:
  1732. value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
  1733. value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
  1734. break;
  1735. default:
  1736. value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
  1737. value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
  1738. }
  1739. coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
  1740. coda_write(dev, ctx->params.framerate,
  1741. CODA_CMD_ENC_SEQ_SRC_F_RATE);
  1742. ctx->params.codec_mode = ctx->codec->mode;
  1743. switch (dst_fourcc) {
  1744. case V4L2_PIX_FMT_MPEG4:
  1745. coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
  1746. coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
  1747. break;
  1748. case V4L2_PIX_FMT_H264:
  1749. coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
  1750. coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
  1751. break;
  1752. default:
  1753. v4l2_err(v4l2_dev,
  1754. "dst format (0x%08x) invalid.\n", dst_fourcc);
  1755. ret = -EINVAL;
  1756. goto out;
  1757. }
  1758. switch (ctx->params.slice_mode) {
  1759. case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
  1760. value = 0;
  1761. break;
  1762. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
  1763. value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
  1764. value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
  1765. value |= 1 & CODA_SLICING_MODE_MASK;
  1766. break;
  1767. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
  1768. value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
  1769. value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
  1770. value |= 1 & CODA_SLICING_MODE_MASK;
  1771. break;
  1772. }
  1773. coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
  1774. value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
  1775. coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
  1776. if (ctx->params.bitrate) {
  1777. /* Rate control enabled */
  1778. value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
  1779. value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
  1780. } else {
  1781. value = 0;
  1782. }
  1783. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
  1784. coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
  1785. coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
  1786. coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
  1787. coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
  1788. /* set default gamma */
  1789. value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
  1790. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
  1791. if (CODA_DEFAULT_GAMMA > 0) {
  1792. if (dev->devtype->product == CODA_DX6)
  1793. value = 1 << CODADX6_OPTION_GAMMA_OFFSET;
  1794. else
  1795. value = 1 << CODA7_OPTION_GAMMA_OFFSET;
  1796. } else {
  1797. value = 0;
  1798. }
  1799. coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
  1800. coda_setup_iram(ctx);
  1801. if (dst_fourcc == V4L2_PIX_FMT_H264) {
  1802. if (dev->devtype->product == CODA_DX6) {
  1803. value = FMO_SLICE_SAVE_BUF_SIZE << 7;
  1804. coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
  1805. } else {
  1806. coda_write(dev, ctx->iram_info.search_ram_paddr,
  1807. CODA7_CMD_ENC_SEQ_SEARCH_BASE);
  1808. coda_write(dev, ctx->iram_info.search_ram_size,
  1809. CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
  1810. }
  1811. }
  1812. ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
  1813. if (ret < 0) {
  1814. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  1815. goto out;
  1816. }
  1817. if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
  1818. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
  1819. ret = -EFAULT;
  1820. goto out;
  1821. }
  1822. ctx->num_internal_frames = 2;
  1823. ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
  1824. if (ret < 0) {
  1825. v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
  1826. goto out;
  1827. }
  1828. coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
  1829. coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
  1830. if (dev->devtype->product == CODA_7541)
  1831. coda_write(dev, round_up(q_data_src->width, 8),
  1832. CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
  1833. if (dev->devtype->product != CODA_DX6) {
  1834. coda_write(dev, ctx->iram_info.buf_bit_use,
  1835. CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  1836. coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
  1837. CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  1838. coda_write(dev, ctx->iram_info.buf_dbk_y_use,
  1839. CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  1840. coda_write(dev, ctx->iram_info.buf_dbk_c_use,
  1841. CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  1842. coda_write(dev, ctx->iram_info.buf_ovl_use,
  1843. CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  1844. }
  1845. ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
  1846. if (ret < 0) {
  1847. v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  1848. goto out;
  1849. }
  1850. /* Save stream headers */
  1851. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  1852. switch (dst_fourcc) {
  1853. case V4L2_PIX_FMT_H264:
  1854. /*
  1855. * Get SPS in the first frame and copy it to an
  1856. * intermediate buffer.
  1857. */
  1858. ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
  1859. &ctx->vpu_header[0][0],
  1860. &ctx->vpu_header_size[0]);
  1861. if (ret < 0)
  1862. goto out;
  1863. /*
  1864. * Get PPS in the first frame and copy it to an
  1865. * intermediate buffer.
  1866. */
  1867. ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
  1868. &ctx->vpu_header[1][0],
  1869. &ctx->vpu_header_size[1]);
  1870. if (ret < 0)
  1871. goto out;
  1872. /*
  1873. * Length of H.264 headers is variable and thus it might not be
  1874. * aligned for the coda to append the encoded frame. In that is
  1875. * the case a filler NAL must be added to header 2.
  1876. */
  1877. ctx->vpu_header_size[2] = coda_h264_padding(
  1878. (ctx->vpu_header_size[0] +
  1879. ctx->vpu_header_size[1]),
  1880. ctx->vpu_header[2]);
  1881. break;
  1882. case V4L2_PIX_FMT_MPEG4:
  1883. /*
  1884. * Get VOS in the first frame and copy it to an
  1885. * intermediate buffer
  1886. */
  1887. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
  1888. &ctx->vpu_header[0][0],
  1889. &ctx->vpu_header_size[0]);
  1890. if (ret < 0)
  1891. goto out;
  1892. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
  1893. &ctx->vpu_header[1][0],
  1894. &ctx->vpu_header_size[1]);
  1895. if (ret < 0)
  1896. goto out;
  1897. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
  1898. &ctx->vpu_header[2][0],
  1899. &ctx->vpu_header_size[2]);
  1900. if (ret < 0)
  1901. goto out;
  1902. break;
  1903. default:
  1904. /* No more formats need to save headers at the moment */
  1905. break;
  1906. }
  1907. out:
  1908. mutex_unlock(&dev->coda_mutex);
  1909. return ret;
  1910. }
  1911. static int coda_stop_streaming(struct vb2_queue *q)
  1912. {
  1913. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1914. struct coda_dev *dev = ctx->dev;
  1915. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  1916. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1917. "%s: output\n", __func__);
  1918. ctx->streamon_out = 0;
  1919. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  1920. ctx->isequence = 0;
  1921. } else {
  1922. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1923. "%s: capture\n", __func__);
  1924. ctx->streamon_cap = 0;
  1925. ctx->osequence = 0;
  1926. }
  1927. if (!ctx->streamon_out && !ctx->streamon_cap) {
  1928. kfifo_init(&ctx->bitstream_fifo,
  1929. ctx->bitstream.vaddr, ctx->bitstream.size);
  1930. ctx->runcounter = 0;
  1931. }
  1932. return 0;
  1933. }
  1934. static struct vb2_ops coda_qops = {
  1935. .queue_setup = coda_queue_setup,
  1936. .buf_prepare = coda_buf_prepare,
  1937. .buf_queue = coda_buf_queue,
  1938. .wait_prepare = coda_wait_prepare,
  1939. .wait_finish = coda_wait_finish,
  1940. .start_streaming = coda_start_streaming,
  1941. .stop_streaming = coda_stop_streaming,
  1942. };
  1943. static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
  1944. {
  1945. struct coda_ctx *ctx =
  1946. container_of(ctrl->handler, struct coda_ctx, ctrls);
  1947. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1948. "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
  1949. switch (ctrl->id) {
  1950. case V4L2_CID_HFLIP:
  1951. if (ctrl->val)
  1952. ctx->params.rot_mode |= CODA_MIR_HOR;
  1953. else
  1954. ctx->params.rot_mode &= ~CODA_MIR_HOR;
  1955. break;
  1956. case V4L2_CID_VFLIP:
  1957. if (ctrl->val)
  1958. ctx->params.rot_mode |= CODA_MIR_VER;
  1959. else
  1960. ctx->params.rot_mode &= ~CODA_MIR_VER;
  1961. break;
  1962. case V4L2_CID_MPEG_VIDEO_BITRATE:
  1963. ctx->params.bitrate = ctrl->val / 1000;
  1964. break;
  1965. case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
  1966. ctx->params.gop_size = ctrl->val;
  1967. break;
  1968. case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
  1969. ctx->params.h264_intra_qp = ctrl->val;
  1970. break;
  1971. case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
  1972. ctx->params.h264_inter_qp = ctrl->val;
  1973. break;
  1974. case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
  1975. ctx->params.mpeg4_intra_qp = ctrl->val;
  1976. break;
  1977. case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
  1978. ctx->params.mpeg4_inter_qp = ctrl->val;
  1979. break;
  1980. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
  1981. ctx->params.slice_mode = ctrl->val;
  1982. break;
  1983. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
  1984. ctx->params.slice_max_mb = ctrl->val;
  1985. break;
  1986. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
  1987. ctx->params.slice_max_bits = ctrl->val * 8;
  1988. break;
  1989. case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
  1990. break;
  1991. default:
  1992. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1993. "Invalid control, id=%d, val=%d\n",
  1994. ctrl->id, ctrl->val);
  1995. return -EINVAL;
  1996. }
  1997. return 0;
  1998. }
  1999. static struct v4l2_ctrl_ops coda_ctrl_ops = {
  2000. .s_ctrl = coda_s_ctrl,
  2001. };
  2002. static int coda_ctrls_setup(struct coda_ctx *ctx)
  2003. {
  2004. v4l2_ctrl_handler_init(&ctx->ctrls, 9);
  2005. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2006. V4L2_CID_HFLIP, 0, 1, 1, 0);
  2007. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2008. V4L2_CID_VFLIP, 0, 1, 1, 0);
  2009. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2010. V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
  2011. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2012. V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
  2013. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2014. V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
  2015. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2016. V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
  2017. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2018. V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
  2019. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2020. V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
  2021. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  2022. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
  2023. V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
  2024. V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
  2025. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2026. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
  2027. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  2028. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
  2029. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  2030. V4L2_CID_MPEG_VIDEO_HEADER_MODE,
  2031. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
  2032. (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
  2033. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
  2034. if (ctx->ctrls.error) {
  2035. v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
  2036. ctx->ctrls.error);
  2037. return -EINVAL;
  2038. }
  2039. return v4l2_ctrl_handler_setup(&ctx->ctrls);
  2040. }
  2041. static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
  2042. struct vb2_queue *dst_vq)
  2043. {
  2044. struct coda_ctx *ctx = priv;
  2045. int ret;
  2046. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  2047. src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
  2048. src_vq->drv_priv = ctx;
  2049. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  2050. src_vq->ops = &coda_qops;
  2051. src_vq->mem_ops = &vb2_dma_contig_memops;
  2052. src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  2053. ret = vb2_queue_init(src_vq);
  2054. if (ret)
  2055. return ret;
  2056. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  2057. dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
  2058. dst_vq->drv_priv = ctx;
  2059. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  2060. dst_vq->ops = &coda_qops;
  2061. dst_vq->mem_ops = &vb2_dma_contig_memops;
  2062. dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  2063. return vb2_queue_init(dst_vq);
  2064. }
  2065. static int coda_next_free_instance(struct coda_dev *dev)
  2066. {
  2067. int idx = ffz(dev->instance_mask);
  2068. if ((idx < 0) ||
  2069. (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
  2070. return -EBUSY;
  2071. return idx;
  2072. }
  2073. static int coda_open(struct file *file)
  2074. {
  2075. struct coda_dev *dev = video_drvdata(file);
  2076. struct coda_ctx *ctx = NULL;
  2077. int ret;
  2078. int idx;
  2079. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  2080. if (!ctx)
  2081. return -ENOMEM;
  2082. idx = coda_next_free_instance(dev);
  2083. if (idx < 0) {
  2084. ret = idx;
  2085. goto err_coda_max;
  2086. }
  2087. set_bit(idx, &dev->instance_mask);
  2088. INIT_WORK(&ctx->skip_run, coda_skip_run);
  2089. v4l2_fh_init(&ctx->fh, video_devdata(file));
  2090. file->private_data = &ctx->fh;
  2091. v4l2_fh_add(&ctx->fh);
  2092. ctx->dev = dev;
  2093. ctx->idx = idx;
  2094. switch (dev->devtype->product) {
  2095. case CODA_7541:
  2096. ctx->reg_idx = 0;
  2097. break;
  2098. default:
  2099. ctx->reg_idx = idx;
  2100. }
  2101. ret = clk_prepare_enable(dev->clk_per);
  2102. if (ret)
  2103. goto err_clk_per;
  2104. ret = clk_prepare_enable(dev->clk_ahb);
  2105. if (ret)
  2106. goto err_clk_ahb;
  2107. set_default_params(ctx);
  2108. ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
  2109. &coda_queue_init);
  2110. if (IS_ERR(ctx->m2m_ctx)) {
  2111. ret = PTR_ERR(ctx->m2m_ctx);
  2112. v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
  2113. __func__, ret);
  2114. goto err_ctx_init;
  2115. }
  2116. ret = coda_ctrls_setup(ctx);
  2117. if (ret) {
  2118. v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
  2119. goto err_ctrls_setup;
  2120. }
  2121. ctx->fh.ctrl_handler = &ctx->ctrls;
  2122. ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE);
  2123. if (ret < 0) {
  2124. v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
  2125. goto err_dma_alloc;
  2126. }
  2127. ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
  2128. ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
  2129. ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
  2130. if (!ctx->bitstream.vaddr) {
  2131. v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
  2132. ret = -ENOMEM;
  2133. goto err_dma_writecombine;
  2134. }
  2135. kfifo_init(&ctx->bitstream_fifo,
  2136. ctx->bitstream.vaddr, ctx->bitstream.size);
  2137. mutex_init(&ctx->bitstream_mutex);
  2138. mutex_init(&ctx->buffer_mutex);
  2139. coda_lock(ctx);
  2140. list_add(&ctx->list, &dev->instances);
  2141. coda_unlock(ctx);
  2142. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
  2143. ctx->idx, ctx);
  2144. return 0;
  2145. err_dma_writecombine:
  2146. coda_free_context_buffers(ctx);
  2147. if (ctx->dev->devtype->product == CODA_DX6)
  2148. coda_free_aux_buf(dev, &ctx->workbuf);
  2149. coda_free_aux_buf(dev, &ctx->parabuf);
  2150. err_dma_alloc:
  2151. v4l2_ctrl_handler_free(&ctx->ctrls);
  2152. err_ctrls_setup:
  2153. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  2154. err_ctx_init:
  2155. clk_disable_unprepare(dev->clk_ahb);
  2156. err_clk_ahb:
  2157. clk_disable_unprepare(dev->clk_per);
  2158. err_clk_per:
  2159. v4l2_fh_del(&ctx->fh);
  2160. v4l2_fh_exit(&ctx->fh);
  2161. clear_bit(ctx->idx, &dev->instance_mask);
  2162. err_coda_max:
  2163. kfree(ctx);
  2164. return ret;
  2165. }
  2166. static int coda_release(struct file *file)
  2167. {
  2168. struct coda_dev *dev = video_drvdata(file);
  2169. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  2170. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
  2171. ctx);
  2172. /* If this instance is running, call .job_abort and wait for it to end */
  2173. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  2174. /* In case the instance was not running, we still need to call SEQ_END */
  2175. mutex_lock(&dev->coda_mutex);
  2176. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2177. "%s: sent command 'SEQ_END' to coda\n", __func__);
  2178. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
  2179. v4l2_err(&dev->v4l2_dev,
  2180. "CODA_COMMAND_SEQ_END failed\n");
  2181. mutex_unlock(&dev->coda_mutex);
  2182. return -ETIMEDOUT;
  2183. }
  2184. mutex_unlock(&dev->coda_mutex);
  2185. coda_free_framebuffers(ctx);
  2186. coda_lock(ctx);
  2187. list_del(&ctx->list);
  2188. coda_unlock(ctx);
  2189. dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
  2190. ctx->bitstream.vaddr, ctx->bitstream.paddr);
  2191. coda_free_context_buffers(ctx);
  2192. if (ctx->dev->devtype->product == CODA_DX6)
  2193. coda_free_aux_buf(dev, &ctx->workbuf);
  2194. coda_free_aux_buf(dev, &ctx->parabuf);
  2195. v4l2_ctrl_handler_free(&ctx->ctrls);
  2196. clk_disable_unprepare(dev->clk_ahb);
  2197. clk_disable_unprepare(dev->clk_per);
  2198. v4l2_fh_del(&ctx->fh);
  2199. v4l2_fh_exit(&ctx->fh);
  2200. clear_bit(ctx->idx, &dev->instance_mask);
  2201. kfree(ctx);
  2202. return 0;
  2203. }
  2204. static unsigned int coda_poll(struct file *file,
  2205. struct poll_table_struct *wait)
  2206. {
  2207. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  2208. int ret;
  2209. coda_lock(ctx);
  2210. ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
  2211. coda_unlock(ctx);
  2212. return ret;
  2213. }
  2214. static int coda_mmap(struct file *file, struct vm_area_struct *vma)
  2215. {
  2216. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  2217. return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
  2218. }
  2219. static const struct v4l2_file_operations coda_fops = {
  2220. .owner = THIS_MODULE,
  2221. .open = coda_open,
  2222. .release = coda_release,
  2223. .poll = coda_poll,
  2224. .unlocked_ioctl = video_ioctl2,
  2225. .mmap = coda_mmap,
  2226. };
  2227. static void coda_finish_decode(struct coda_ctx *ctx)
  2228. {
  2229. struct coda_dev *dev = ctx->dev;
  2230. struct coda_q_data *q_data_src;
  2231. struct coda_q_data *q_data_dst;
  2232. struct vb2_buffer *dst_buf;
  2233. int width, height;
  2234. int decoded_idx;
  2235. int display_idx;
  2236. u32 src_fourcc;
  2237. int success;
  2238. u32 val;
  2239. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  2240. /* Update kfifo out pointer from coda bitstream read pointer */
  2241. coda_kfifo_sync_from_device(ctx);
  2242. /*
  2243. * in stream-end mode, the read pointer can overshoot the write pointer
  2244. * by up to 512 bytes
  2245. */
  2246. if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
  2247. if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
  2248. kfifo_init(&ctx->bitstream_fifo,
  2249. ctx->bitstream.vaddr, ctx->bitstream.size);
  2250. }
  2251. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  2252. src_fourcc = q_data_src->fourcc;
  2253. val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
  2254. if (val != 1)
  2255. pr_err("DEC_PIC_SUCCESS = %d\n", val);
  2256. success = val & 0x1;
  2257. if (!success)
  2258. v4l2_err(&dev->v4l2_dev, "decode failed\n");
  2259. if (src_fourcc == V4L2_PIX_FMT_H264) {
  2260. if (val & (1 << 3))
  2261. v4l2_err(&dev->v4l2_dev,
  2262. "insufficient PS buffer space (%d bytes)\n",
  2263. ctx->psbuf.size);
  2264. if (val & (1 << 2))
  2265. v4l2_err(&dev->v4l2_dev,
  2266. "insufficient slice buffer space (%d bytes)\n",
  2267. ctx->slicebuf.size);
  2268. }
  2269. val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
  2270. width = (val >> 16) & 0xffff;
  2271. height = val & 0xffff;
  2272. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  2273. val = coda_read(dev, CODA_RET_DEC_PIC_TYPE);
  2274. if ((val & 0x7) == 0) {
  2275. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  2276. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  2277. } else {
  2278. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  2279. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  2280. }
  2281. val = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
  2282. if (val > 0)
  2283. v4l2_err(&dev->v4l2_dev,
  2284. "errors in %d macroblocks\n", val);
  2285. if (dev->devtype->product == CODA_7541) {
  2286. val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
  2287. if (val == 0) {
  2288. /* not enough bitstream data */
  2289. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2290. "prescan failed: %d\n", val);
  2291. ctx->prescan_failed = true;
  2292. return;
  2293. }
  2294. }
  2295. ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  2296. /*
  2297. * The previous display frame was copied out by the rotator,
  2298. * now it can be overwritten again
  2299. */
  2300. if (ctx->display_idx >= 0 &&
  2301. ctx->display_idx < ctx->num_internal_frames) {
  2302. ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
  2303. coda_write(dev, ctx->frm_dis_flg,
  2304. CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  2305. }
  2306. /*
  2307. * The index of the last decoded frame, not necessarily in
  2308. * display order, and the index of the next display frame.
  2309. * The latter could have been decoded in a previous run.
  2310. */
  2311. decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
  2312. display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
  2313. if (decoded_idx == -1) {
  2314. /* no frame was decoded, but we might have a display frame */
  2315. if (display_idx < 0 && ctx->display_idx < 0)
  2316. ctx->prescan_failed = true;
  2317. } else if (decoded_idx == -2) {
  2318. /* no frame was decoded, we still return the remaining buffers */
  2319. } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
  2320. v4l2_err(&dev->v4l2_dev,
  2321. "decoded frame index out of range: %d\n", decoded_idx);
  2322. }
  2323. if (display_idx == -1) {
  2324. /*
  2325. * no more frames to be decoded, but there could still
  2326. * be rotator output to dequeue
  2327. */
  2328. ctx->prescan_failed = true;
  2329. } else if (display_idx == -3) {
  2330. /* possibly prescan failure */
  2331. } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
  2332. v4l2_err(&dev->v4l2_dev,
  2333. "presentation frame index out of range: %d\n",
  2334. display_idx);
  2335. }
  2336. /* If a frame was copied out, return it */
  2337. if (ctx->display_idx >= 0 &&
  2338. ctx->display_idx < ctx->num_internal_frames) {
  2339. dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
  2340. dst_buf->v4l2_buf.sequence = ctx->osequence++;
  2341. vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
  2342. v4l2_m2m_buf_done(dst_buf, success ? VB2_BUF_STATE_DONE :
  2343. VB2_BUF_STATE_ERROR);
  2344. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2345. "job finished: decoding frame (%d) (%s)\n",
  2346. dst_buf->v4l2_buf.sequence,
  2347. (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
  2348. "KEYFRAME" : "PFRAME");
  2349. } else {
  2350. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2351. "job finished: no frame decoded\n");
  2352. }
  2353. /* The rotator will copy the current display frame next time */
  2354. ctx->display_idx = display_idx;
  2355. }
  2356. static void coda_finish_encode(struct coda_ctx *ctx)
  2357. {
  2358. struct vb2_buffer *src_buf, *dst_buf;
  2359. struct coda_dev *dev = ctx->dev;
  2360. u32 wr_ptr, start_ptr;
  2361. src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
  2362. dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
  2363. /* Get results from the coda */
  2364. start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
  2365. wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  2366. /* Calculate bytesused field */
  2367. if (dst_buf->v4l2_buf.sequence == 0) {
  2368. vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
  2369. ctx->vpu_header_size[0] +
  2370. ctx->vpu_header_size[1] +
  2371. ctx->vpu_header_size[2]);
  2372. } else {
  2373. vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
  2374. }
  2375. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
  2376. wr_ptr - start_ptr);
  2377. coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
  2378. coda_read(dev, CODA_RET_ENC_PIC_FLAG);
  2379. if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
  2380. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  2381. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  2382. } else {
  2383. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  2384. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  2385. }
  2386. dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
  2387. dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
  2388. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  2389. v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
  2390. ctx->gopcounter--;
  2391. if (ctx->gopcounter < 0)
  2392. ctx->gopcounter = ctx->params.gop_size - 1;
  2393. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2394. "job finished: encoding frame (%d) (%s)\n",
  2395. dst_buf->v4l2_buf.sequence,
  2396. (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
  2397. "KEYFRAME" : "PFRAME");
  2398. }
  2399. static irqreturn_t coda_irq_handler(int irq, void *data)
  2400. {
  2401. struct coda_dev *dev = data;
  2402. struct coda_ctx *ctx;
  2403. cancel_delayed_work(&dev->timeout);
  2404. /* read status register to attend the IRQ */
  2405. coda_read(dev, CODA_REG_BIT_INT_STATUS);
  2406. coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
  2407. CODA_REG_BIT_INT_CLEAR);
  2408. ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
  2409. if (ctx == NULL) {
  2410. v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
  2411. mutex_unlock(&dev->coda_mutex);
  2412. return IRQ_HANDLED;
  2413. }
  2414. if (ctx->aborting) {
  2415. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  2416. "task has been aborted\n");
  2417. goto out;
  2418. }
  2419. if (coda_isbusy(ctx->dev)) {
  2420. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  2421. "coda is still busy!!!!\n");
  2422. return IRQ_NONE;
  2423. }
  2424. if (ctx->inst_type == CODA_INST_DECODER)
  2425. coda_finish_decode(ctx);
  2426. else
  2427. coda_finish_encode(ctx);
  2428. out:
  2429. if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out)) {
  2430. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2431. "%s: sent command 'SEQ_END' to coda\n", __func__);
  2432. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
  2433. v4l2_err(&dev->v4l2_dev,
  2434. "CODA_COMMAND_SEQ_END failed\n");
  2435. }
  2436. kfifo_init(&ctx->bitstream_fifo,
  2437. ctx->bitstream.vaddr, ctx->bitstream.size);
  2438. coda_free_framebuffers(ctx);
  2439. coda_free_context_buffers(ctx);
  2440. }
  2441. mutex_unlock(&dev->coda_mutex);
  2442. mutex_unlock(&ctx->buffer_mutex);
  2443. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  2444. return IRQ_HANDLED;
  2445. }
  2446. static void coda_timeout(struct work_struct *work)
  2447. {
  2448. struct coda_ctx *ctx;
  2449. struct coda_dev *dev = container_of(to_delayed_work(work),
  2450. struct coda_dev, timeout);
  2451. dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
  2452. mutex_lock(&dev->dev_mutex);
  2453. list_for_each_entry(ctx, &dev->instances, list) {
  2454. if (mutex_is_locked(&ctx->buffer_mutex))
  2455. mutex_unlock(&ctx->buffer_mutex);
  2456. v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  2457. v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  2458. }
  2459. mutex_unlock(&dev->dev_mutex);
  2460. mutex_unlock(&dev->coda_mutex);
  2461. ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
  2462. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  2463. }
  2464. static u32 coda_supported_firmwares[] = {
  2465. CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
  2466. CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
  2467. };
  2468. static bool coda_firmware_supported(u32 vernum)
  2469. {
  2470. int i;
  2471. for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
  2472. if (vernum == coda_supported_firmwares[i])
  2473. return true;
  2474. return false;
  2475. }
  2476. static int coda_hw_init(struct coda_dev *dev)
  2477. {
  2478. u16 product, major, minor, release;
  2479. u32 data;
  2480. u16 *p;
  2481. int i, ret;
  2482. ret = clk_prepare_enable(dev->clk_per);
  2483. if (ret)
  2484. return ret;
  2485. ret = clk_prepare_enable(dev->clk_ahb);
  2486. if (ret)
  2487. goto err_clk_ahb;
  2488. /*
  2489. * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
  2490. * The 16-bit chars in the code buffer are in memory access
  2491. * order, re-sort them to CODA order for register download.
  2492. * Data in this SRAM survives a reboot.
  2493. */
  2494. p = (u16 *)dev->codebuf.vaddr;
  2495. if (dev->devtype->product == CODA_DX6) {
  2496. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  2497. data = CODA_DOWN_ADDRESS_SET(i) |
  2498. CODA_DOWN_DATA_SET(p[i ^ 1]);
  2499. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  2500. }
  2501. } else {
  2502. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  2503. data = CODA_DOWN_ADDRESS_SET(i) |
  2504. CODA_DOWN_DATA_SET(p[round_down(i, 4) +
  2505. 3 - (i % 4)]);
  2506. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  2507. }
  2508. }
  2509. /* Clear registers */
  2510. for (i = 0; i < 64; i++)
  2511. coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
  2512. /* Tell the BIT where to find everything it needs */
  2513. if (dev->devtype->product == CODA_7541) {
  2514. coda_write(dev, dev->tempbuf.paddr,
  2515. CODA_REG_BIT_TEMP_BUF_ADDR);
  2516. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  2517. } else {
  2518. coda_write(dev, dev->workbuf.paddr,
  2519. CODA_REG_BIT_WORK_BUF_ADDR);
  2520. }
  2521. coda_write(dev, dev->codebuf.paddr,
  2522. CODA_REG_BIT_CODE_BUF_ADDR);
  2523. coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
  2524. /* Set default values */
  2525. switch (dev->devtype->product) {
  2526. case CODA_DX6:
  2527. coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  2528. break;
  2529. default:
  2530. coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  2531. }
  2532. coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
  2533. if (dev->devtype->product != CODA_DX6)
  2534. coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
  2535. coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
  2536. CODA_REG_BIT_INT_ENABLE);
  2537. /* Reset VPU and start processor */
  2538. data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
  2539. data |= CODA_REG_RESET_ENABLE;
  2540. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  2541. udelay(10);
  2542. data &= ~CODA_REG_RESET_ENABLE;
  2543. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  2544. coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
  2545. /* Load firmware */
  2546. coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
  2547. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  2548. coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
  2549. coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
  2550. coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
  2551. if (coda_wait_timeout(dev)) {
  2552. clk_disable_unprepare(dev->clk_per);
  2553. clk_disable_unprepare(dev->clk_ahb);
  2554. v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
  2555. return -EIO;
  2556. }
  2557. /* Check we are compatible with the loaded firmware */
  2558. data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
  2559. product = CODA_FIRMWARE_PRODUCT(data);
  2560. major = CODA_FIRMWARE_MAJOR(data);
  2561. minor = CODA_FIRMWARE_MINOR(data);
  2562. release = CODA_FIRMWARE_RELEASE(data);
  2563. clk_disable_unprepare(dev->clk_per);
  2564. clk_disable_unprepare(dev->clk_ahb);
  2565. if (product != dev->devtype->product) {
  2566. v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
  2567. " Version: %u.%u.%u\n",
  2568. coda_product_name(dev->devtype->product),
  2569. coda_product_name(product), major, minor, release);
  2570. return -EINVAL;
  2571. }
  2572. v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
  2573. coda_product_name(product));
  2574. if (coda_firmware_supported(data)) {
  2575. v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
  2576. major, minor, release);
  2577. } else {
  2578. v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
  2579. "%u.%u.%u\n", major, minor, release);
  2580. }
  2581. return 0;
  2582. err_clk_ahb:
  2583. clk_disable_unprepare(dev->clk_per);
  2584. return ret;
  2585. }
  2586. static void coda_fw_callback(const struct firmware *fw, void *context)
  2587. {
  2588. struct coda_dev *dev = context;
  2589. struct platform_device *pdev = dev->plat_dev;
  2590. int ret;
  2591. if (!fw) {
  2592. v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
  2593. return;
  2594. }
  2595. /* allocate auxiliary per-device code buffer for the BIT processor */
  2596. ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size);
  2597. if (ret < 0) {
  2598. dev_err(&pdev->dev, "failed to allocate code buffer\n");
  2599. return;
  2600. }
  2601. /* Copy the whole firmware image to the code buffer */
  2602. memcpy(dev->codebuf.vaddr, fw->data, fw->size);
  2603. release_firmware(fw);
  2604. ret = coda_hw_init(dev);
  2605. if (ret) {
  2606. v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
  2607. return;
  2608. }
  2609. dev->vfd.fops = &coda_fops,
  2610. dev->vfd.ioctl_ops = &coda_ioctl_ops;
  2611. dev->vfd.release = video_device_release_empty,
  2612. dev->vfd.lock = &dev->dev_mutex;
  2613. dev->vfd.v4l2_dev = &dev->v4l2_dev;
  2614. dev->vfd.vfl_dir = VFL_DIR_M2M;
  2615. snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
  2616. video_set_drvdata(&dev->vfd, dev);
  2617. dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  2618. if (IS_ERR(dev->alloc_ctx)) {
  2619. v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
  2620. return;
  2621. }
  2622. dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
  2623. if (IS_ERR(dev->m2m_dev)) {
  2624. v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
  2625. goto rel_ctx;
  2626. }
  2627. ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
  2628. if (ret) {
  2629. v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
  2630. goto rel_m2m;
  2631. }
  2632. v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
  2633. dev->vfd.num);
  2634. return;
  2635. rel_m2m:
  2636. v4l2_m2m_release(dev->m2m_dev);
  2637. rel_ctx:
  2638. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  2639. }
  2640. static int coda_firmware_request(struct coda_dev *dev)
  2641. {
  2642. char *fw = dev->devtype->firmware;
  2643. dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
  2644. coda_product_name(dev->devtype->product));
  2645. return request_firmware_nowait(THIS_MODULE, true,
  2646. fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
  2647. }
  2648. enum coda_platform {
  2649. CODA_IMX27,
  2650. CODA_IMX53,
  2651. };
  2652. static const struct coda_devtype coda_devdata[] = {
  2653. [CODA_IMX27] = {
  2654. .firmware = "v4l-codadx6-imx27.bin",
  2655. .product = CODA_DX6,
  2656. .codecs = codadx6_codecs,
  2657. .num_codecs = ARRAY_SIZE(codadx6_codecs),
  2658. },
  2659. [CODA_IMX53] = {
  2660. .firmware = "v4l-coda7541-imx53.bin",
  2661. .product = CODA_7541,
  2662. .codecs = coda7_codecs,
  2663. .num_codecs = ARRAY_SIZE(coda7_codecs),
  2664. },
  2665. };
  2666. static struct platform_device_id coda_platform_ids[] = {
  2667. { .name = "coda-imx27", .driver_data = CODA_IMX27 },
  2668. { .name = "coda-imx53", .driver_data = CODA_IMX53 },
  2669. { /* sentinel */ }
  2670. };
  2671. MODULE_DEVICE_TABLE(platform, coda_platform_ids);
  2672. #ifdef CONFIG_OF
  2673. static const struct of_device_id coda_dt_ids[] = {
  2674. { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
  2675. { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
  2676. { /* sentinel */ }
  2677. };
  2678. MODULE_DEVICE_TABLE(of, coda_dt_ids);
  2679. #endif
  2680. static int coda_probe(struct platform_device *pdev)
  2681. {
  2682. const struct of_device_id *of_id =
  2683. of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
  2684. const struct platform_device_id *pdev_id;
  2685. struct coda_platform_data *pdata = pdev->dev.platform_data;
  2686. struct device_node *np = pdev->dev.of_node;
  2687. struct gen_pool *pool;
  2688. struct coda_dev *dev;
  2689. struct resource *res;
  2690. int ret, irq;
  2691. dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
  2692. if (!dev) {
  2693. dev_err(&pdev->dev, "Not enough memory for %s\n",
  2694. CODA_NAME);
  2695. return -ENOMEM;
  2696. }
  2697. spin_lock_init(&dev->irqlock);
  2698. INIT_LIST_HEAD(&dev->instances);
  2699. INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
  2700. dev->plat_dev = pdev;
  2701. dev->clk_per = devm_clk_get(&pdev->dev, "per");
  2702. if (IS_ERR(dev->clk_per)) {
  2703. dev_err(&pdev->dev, "Could not get per clock\n");
  2704. return PTR_ERR(dev->clk_per);
  2705. }
  2706. dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
  2707. if (IS_ERR(dev->clk_ahb)) {
  2708. dev_err(&pdev->dev, "Could not get ahb clock\n");
  2709. return PTR_ERR(dev->clk_ahb);
  2710. }
  2711. /* Get memory for physical registers */
  2712. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  2713. dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
  2714. if (IS_ERR(dev->regs_base))
  2715. return PTR_ERR(dev->regs_base);
  2716. /* IRQ */
  2717. irq = platform_get_irq(pdev, 0);
  2718. if (irq < 0) {
  2719. dev_err(&pdev->dev, "failed to get irq resource\n");
  2720. return -ENOENT;
  2721. }
  2722. if (devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
  2723. IRQF_ONESHOT, CODA_NAME, dev) < 0) {
  2724. dev_err(&pdev->dev, "failed to request irq\n");
  2725. return -ENOENT;
  2726. }
  2727. /* Get IRAM pool from device tree or platform data */
  2728. pool = of_get_named_gen_pool(np, "iram", 0);
  2729. if (!pool && pdata)
  2730. pool = dev_get_gen_pool(pdata->iram_dev);
  2731. if (!pool) {
  2732. dev_err(&pdev->dev, "iram pool not available\n");
  2733. return -ENOMEM;
  2734. }
  2735. dev->iram_pool = pool;
  2736. ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
  2737. if (ret)
  2738. return ret;
  2739. mutex_init(&dev->dev_mutex);
  2740. mutex_init(&dev->coda_mutex);
  2741. pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
  2742. if (of_id) {
  2743. dev->devtype = of_id->data;
  2744. } else if (pdev_id) {
  2745. dev->devtype = &coda_devdata[pdev_id->driver_data];
  2746. } else {
  2747. v4l2_device_unregister(&dev->v4l2_dev);
  2748. return -EINVAL;
  2749. }
  2750. /* allocate auxiliary per-device buffers for the BIT processor */
  2751. switch (dev->devtype->product) {
  2752. case CODA_DX6:
  2753. ret = coda_alloc_aux_buf(dev, &dev->workbuf,
  2754. CODADX6_WORK_BUF_SIZE);
  2755. if (ret < 0) {
  2756. dev_err(&pdev->dev, "failed to allocate work buffer\n");
  2757. v4l2_device_unregister(&dev->v4l2_dev);
  2758. return ret;
  2759. }
  2760. break;
  2761. case CODA_7541:
  2762. dev->tempbuf.size = CODA7_TEMP_BUF_SIZE;
  2763. break;
  2764. }
  2765. if (dev->tempbuf.size) {
  2766. ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
  2767. dev->tempbuf.size);
  2768. if (ret < 0) {
  2769. dev_err(&pdev->dev, "failed to allocate temp buffer\n");
  2770. v4l2_device_unregister(&dev->v4l2_dev);
  2771. return ret;
  2772. }
  2773. }
  2774. switch (dev->devtype->product) {
  2775. case CODA_DX6:
  2776. dev->iram_size = CODADX6_IRAM_SIZE;
  2777. break;
  2778. case CODA_7541:
  2779. dev->iram_size = CODA7_IRAM_SIZE;
  2780. break;
  2781. }
  2782. dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
  2783. if (!dev->iram_vaddr) {
  2784. dev_err(&pdev->dev, "unable to alloc iram\n");
  2785. return -ENOMEM;
  2786. }
  2787. dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
  2788. dev->iram_vaddr);
  2789. platform_set_drvdata(pdev, dev);
  2790. return coda_firmware_request(dev);
  2791. }
  2792. static int coda_remove(struct platform_device *pdev)
  2793. {
  2794. struct coda_dev *dev = platform_get_drvdata(pdev);
  2795. video_unregister_device(&dev->vfd);
  2796. if (dev->m2m_dev)
  2797. v4l2_m2m_release(dev->m2m_dev);
  2798. if (dev->alloc_ctx)
  2799. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  2800. v4l2_device_unregister(&dev->v4l2_dev);
  2801. if (dev->iram_vaddr)
  2802. gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
  2803. coda_free_aux_buf(dev, &dev->codebuf);
  2804. coda_free_aux_buf(dev, &dev->tempbuf);
  2805. coda_free_aux_buf(dev, &dev->workbuf);
  2806. return 0;
  2807. }
  2808. static struct platform_driver coda_driver = {
  2809. .probe = coda_probe,
  2810. .remove = coda_remove,
  2811. .driver = {
  2812. .name = CODA_NAME,
  2813. .owner = THIS_MODULE,
  2814. .of_match_table = of_match_ptr(coda_dt_ids),
  2815. },
  2816. .id_table = coda_platform_ids,
  2817. };
  2818. module_platform_driver(coda_driver);
  2819. MODULE_LICENSE("GPL");
  2820. MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
  2821. MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");