pxa2xx_base.c 6.7 KB

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  1. /*======================================================================
  2. Device driver for the PCMCIA control functionality of PXA2xx
  3. microprocessors.
  4. The contents of this file may be used under the
  5. terms of the GNU Public License version 2 (the "GPL")
  6. (c) Ian Molton (spyro@f2s.com) 2003
  7. (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
  8. derived from sa11xx_base.c
  9. Portions created by John G. Dorsey are
  10. Copyright (C) 1999 John G. Dorsey.
  11. ======================================================================*/
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/cpufreq.h>
  15. #include <linux/ioport.h>
  16. #include <linux/kernel.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/platform_device.h>
  19. #include <mach/hardware.h>
  20. #include <asm/io.h>
  21. #include <asm/irq.h>
  22. #include <asm/system.h>
  23. #include <mach/pxa2xx-regs.h>
  24. #include <asm/mach-types.h>
  25. #include <pcmcia/cs_types.h>
  26. #include <pcmcia/ss.h>
  27. #include <pcmcia/cistpl.h>
  28. #include "soc_common.h"
  29. #include "pxa2xx_base.h"
  30. #define MCXX_SETUP_MASK (0x7f)
  31. #define MCXX_ASST_MASK (0x1f)
  32. #define MCXX_HOLD_MASK (0x3f)
  33. #define MCXX_SETUP_SHIFT (0)
  34. #define MCXX_ASST_SHIFT (7)
  35. #define MCXX_HOLD_SHIFT (14)
  36. static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
  37. u_int mem_clk_10khz)
  38. {
  39. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  40. return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
  41. }
  42. static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
  43. u_int mem_clk_10khz)
  44. {
  45. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  46. return (code / 300000) + ((code % 300000) ? 1 : 0) + 1;
  47. }
  48. static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
  49. u_int mem_clk_10khz)
  50. {
  51. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  52. return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
  53. }
  54. /* This function returns the (approximate) command assertion period, in
  55. * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
  56. */
  57. static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
  58. u_int pcmcia_mcxx_asst)
  59. {
  60. return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
  61. }
  62. static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
  63. {
  64. MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  65. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  66. | ((pxa2xx_mcxx_asst(speed, clock)
  67. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  68. | ((pxa2xx_mcxx_hold(speed, clock)
  69. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  70. return 0;
  71. }
  72. static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
  73. {
  74. MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  75. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  76. | ((pxa2xx_mcxx_asst(speed, clock)
  77. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  78. | ((pxa2xx_mcxx_hold(speed, clock)
  79. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  80. return 0;
  81. }
  82. static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
  83. {
  84. MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  85. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  86. | ((pxa2xx_mcxx_asst(speed, clock)
  87. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  88. | ((pxa2xx_mcxx_hold(speed, clock)
  89. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  90. return 0;
  91. }
  92. static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
  93. {
  94. struct soc_pcmcia_timing timing;
  95. int sock = skt->nr;
  96. soc_common_pcmcia_get_timing(skt, &timing);
  97. pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
  98. pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
  99. pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
  100. return 0;
  101. }
  102. static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
  103. {
  104. unsigned int clk = get_memclk_frequency_10khz();
  105. return pxa2xx_pcmcia_set_mcxx(skt, clk);
  106. }
  107. #ifdef CONFIG_CPU_FREQ
  108. static int
  109. pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
  110. unsigned long val,
  111. struct cpufreq_freqs *freqs)
  112. {
  113. #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
  114. switch (val) {
  115. case CPUFREQ_PRECHANGE:
  116. if (freqs->new > freqs->old) {
  117. debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
  118. "pre-updating\n",
  119. freqs->new / 1000, (freqs->new / 100) % 10,
  120. freqs->old / 1000, (freqs->old / 100) % 10);
  121. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  122. }
  123. break;
  124. case CPUFREQ_POSTCHANGE:
  125. if (freqs->new < freqs->old) {
  126. debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
  127. "post-updating\n",
  128. freqs->new / 1000, (freqs->new / 100) % 10,
  129. freqs->old / 1000, (freqs->old / 100) % 10);
  130. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  131. }
  132. break;
  133. }
  134. return 0;
  135. }
  136. #endif
  137. static void pxa2xx_configure_sockets(struct device *dev)
  138. {
  139. struct pcmcia_low_level *ops = dev->platform_data;
  140. /*
  141. * We have at least one socket, so set MECR:CIT
  142. * (Card Is There)
  143. */
  144. MECR |= MECR_CIT;
  145. /* Set MECR:NOS (Number Of Sockets) */
  146. if (ops->nr > 1 || machine_is_viper())
  147. MECR |= MECR_NOS;
  148. else
  149. MECR &= ~MECR_NOS;
  150. }
  151. int __pxa2xx_drv_pcmcia_probe(struct device *dev)
  152. {
  153. int ret;
  154. struct pcmcia_low_level *ops;
  155. if (!dev || !dev->platform_data)
  156. return -ENODEV;
  157. ops = (struct pcmcia_low_level *)dev->platform_data;
  158. /* Provide our PXA2xx specific timing routines. */
  159. ops->set_timing = pxa2xx_pcmcia_set_timing;
  160. #ifdef CONFIG_CPU_FREQ
  161. ops->frequency_change = pxa2xx_pcmcia_frequency_change;
  162. #endif
  163. ret = soc_common_drv_pcmcia_probe(dev, ops, ops->first, ops->nr);
  164. if (!ret)
  165. pxa2xx_configure_sockets(dev);
  166. return ret;
  167. }
  168. EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe);
  169. static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
  170. {
  171. return __pxa2xx_drv_pcmcia_probe(&dev->dev);
  172. }
  173. static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
  174. {
  175. return soc_common_drv_pcmcia_remove(&dev->dev);
  176. }
  177. static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state)
  178. {
  179. return pcmcia_socket_dev_suspend(&dev->dev, state);
  180. }
  181. static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev)
  182. {
  183. pxa2xx_configure_sockets(&dev->dev);
  184. return pcmcia_socket_dev_resume(&dev->dev);
  185. }
  186. static struct platform_driver pxa2xx_pcmcia_driver = {
  187. .probe = pxa2xx_drv_pcmcia_probe,
  188. .remove = pxa2xx_drv_pcmcia_remove,
  189. .suspend = pxa2xx_drv_pcmcia_suspend,
  190. .resume = pxa2xx_drv_pcmcia_resume,
  191. .driver = {
  192. .name = "pxa2xx-pcmcia",
  193. .owner = THIS_MODULE,
  194. },
  195. };
  196. static int __init pxa2xx_pcmcia_init(void)
  197. {
  198. return platform_driver_register(&pxa2xx_pcmcia_driver);
  199. }
  200. static void __exit pxa2xx_pcmcia_exit(void)
  201. {
  202. platform_driver_unregister(&pxa2xx_pcmcia_driver);
  203. }
  204. fs_initcall(pxa2xx_pcmcia_init);
  205. module_exit(pxa2xx_pcmcia_exit);
  206. MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
  207. MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
  208. MODULE_LICENSE("GPL");
  209. MODULE_ALIAS("platform:pxa2xx-pcmcia");