esp.c 121 KB

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  1. /* esp.c: ESP Sun SCSI driver.
  2. *
  3. * Copyright (C) 1995, 1998, 2006 David S. Miller (davem@davemloft.net)
  4. */
  5. /* TODO:
  6. *
  7. * 1) Maybe disable parity checking in config register one for SCSI1
  8. * targets. (Gilmore says parity error on the SBus can lock up
  9. * old sun4c's)
  10. * 2) Add support for DMA2 pipelining.
  11. * 3) Add tagged queueing.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/delay.h>
  15. #include <linux/types.h>
  16. #include <linux/string.h>
  17. #include <linux/slab.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/proc_fs.h>
  20. #include <linux/stat.h>
  21. #include <linux/init.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/module.h>
  25. #include "esp.h"
  26. #include <asm/sbus.h>
  27. #include <asm/dma.h>
  28. #include <asm/system.h>
  29. #include <asm/ptrace.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/oplib.h>
  32. #include <asm/io.h>
  33. #include <asm/irq.h>
  34. #ifndef __sparc_v9__
  35. #include <asm/machines.h>
  36. #include <asm/idprom.h>
  37. #endif
  38. #include <scsi/scsi.h>
  39. #include <scsi/scsi_cmnd.h>
  40. #include <scsi/scsi_device.h>
  41. #include <scsi/scsi_eh.h>
  42. #include <scsi/scsi_host.h>
  43. #include <scsi/scsi_tcq.h>
  44. #define DRV_VERSION "1.101"
  45. #define DEBUG_ESP
  46. /* #define DEBUG_ESP_HME */
  47. /* #define DEBUG_ESP_DATA */
  48. /* #define DEBUG_ESP_QUEUE */
  49. /* #define DEBUG_ESP_DISCONNECT */
  50. /* #define DEBUG_ESP_STATUS */
  51. /* #define DEBUG_ESP_PHASES */
  52. /* #define DEBUG_ESP_WORKBUS */
  53. /* #define DEBUG_STATE_MACHINE */
  54. /* #define DEBUG_ESP_CMDS */
  55. /* #define DEBUG_ESP_IRQS */
  56. /* #define DEBUG_SDTR */
  57. /* #define DEBUG_ESP_SG */
  58. /* Use the following to sprinkle debugging messages in a way which
  59. * suits you if combinations of the above become too verbose when
  60. * trying to track down a specific problem.
  61. */
  62. /* #define DEBUG_ESP_MISC */
  63. #if defined(DEBUG_ESP)
  64. #define ESPLOG(foo) printk foo
  65. #else
  66. #define ESPLOG(foo)
  67. #endif /* (DEBUG_ESP) */
  68. #if defined(DEBUG_ESP_HME)
  69. #define ESPHME(foo) printk foo
  70. #else
  71. #define ESPHME(foo)
  72. #endif
  73. #if defined(DEBUG_ESP_DATA)
  74. #define ESPDATA(foo) printk foo
  75. #else
  76. #define ESPDATA(foo)
  77. #endif
  78. #if defined(DEBUG_ESP_QUEUE)
  79. #define ESPQUEUE(foo) printk foo
  80. #else
  81. #define ESPQUEUE(foo)
  82. #endif
  83. #if defined(DEBUG_ESP_DISCONNECT)
  84. #define ESPDISC(foo) printk foo
  85. #else
  86. #define ESPDISC(foo)
  87. #endif
  88. #if defined(DEBUG_ESP_STATUS)
  89. #define ESPSTAT(foo) printk foo
  90. #else
  91. #define ESPSTAT(foo)
  92. #endif
  93. #if defined(DEBUG_ESP_PHASES)
  94. #define ESPPHASE(foo) printk foo
  95. #else
  96. #define ESPPHASE(foo)
  97. #endif
  98. #if defined(DEBUG_ESP_WORKBUS)
  99. #define ESPBUS(foo) printk foo
  100. #else
  101. #define ESPBUS(foo)
  102. #endif
  103. #if defined(DEBUG_ESP_IRQS)
  104. #define ESPIRQ(foo) printk foo
  105. #else
  106. #define ESPIRQ(foo)
  107. #endif
  108. #if defined(DEBUG_SDTR)
  109. #define ESPSDTR(foo) printk foo
  110. #else
  111. #define ESPSDTR(foo)
  112. #endif
  113. #if defined(DEBUG_ESP_MISC)
  114. #define ESPMISC(foo) printk foo
  115. #else
  116. #define ESPMISC(foo)
  117. #endif
  118. /* Command phase enumeration. */
  119. enum {
  120. not_issued = 0x00, /* Still in the issue_SC queue. */
  121. /* Various forms of selecting a target. */
  122. #define in_slct_mask 0x10
  123. in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */
  124. in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */
  125. in_slct_msg = 0x12, /* select, then send a message */
  126. in_slct_tag = 0x13, /* select and send tagged queue msg */
  127. in_slct_sneg = 0x14, /* select and acquire sync capabilities */
  128. /* Any post selection activity. */
  129. #define in_phases_mask 0x20
  130. in_datain = 0x20, /* Data is transferring from the bus */
  131. in_dataout = 0x21, /* Data is transferring to the bus */
  132. in_data_done = 0x22, /* Last DMA data operation done (maybe) */
  133. in_msgin = 0x23, /* Eating message from target */
  134. in_msgincont = 0x24, /* Eating more msg bytes from target */
  135. in_msgindone = 0x25, /* Decide what to do with what we got */
  136. in_msgout = 0x26, /* Sending message to target */
  137. in_msgoutdone = 0x27, /* Done sending msg out */
  138. in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */
  139. in_cmdend = 0x29, /* Done sending slow cmd */
  140. in_status = 0x2a, /* Was in status phase, finishing cmd */
  141. in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */
  142. in_the_dark = 0x2c, /* Don't know what bus phase we are in */
  143. /* Special states, ie. not normal bus transitions... */
  144. #define in_spec_mask 0x80
  145. in_abortone = 0x80, /* Aborting one command currently */
  146. in_abortall = 0x81, /* Blowing away all commands we have */
  147. in_resetdev = 0x82, /* SCSI target reset in progress */
  148. in_resetbus = 0x83, /* SCSI bus reset in progress */
  149. in_tgterror = 0x84, /* Target did something stupid */
  150. };
  151. enum {
  152. /* Zero has special meaning, see skipahead[12]. */
  153. /*0*/ do_never,
  154. /*1*/ do_phase_determine,
  155. /*2*/ do_reset_bus,
  156. /*3*/ do_reset_complete,
  157. /*4*/ do_work_bus,
  158. /*5*/ do_intr_end
  159. };
  160. /* Forward declarations. */
  161. static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs);
  162. /* Debugging routines */
  163. struct esp_cmdstrings {
  164. u8 cmdchar;
  165. char *text;
  166. } esp_cmd_strings[] = {
  167. /* Miscellaneous */
  168. { ESP_CMD_NULL, "ESP_NOP", },
  169. { ESP_CMD_FLUSH, "FIFO_FLUSH", },
  170. { ESP_CMD_RC, "RSTESP", },
  171. { ESP_CMD_RS, "RSTSCSI", },
  172. /* Disconnected State Group */
  173. { ESP_CMD_RSEL, "RESLCTSEQ", },
  174. { ESP_CMD_SEL, "SLCTNATN", },
  175. { ESP_CMD_SELA, "SLCTATN", },
  176. { ESP_CMD_SELAS, "SLCTATNSTOP", },
  177. { ESP_CMD_ESEL, "ENSLCTRESEL", },
  178. { ESP_CMD_DSEL, "DISSELRESEL", },
  179. { ESP_CMD_SA3, "SLCTATN3", },
  180. { ESP_CMD_RSEL3, "RESLCTSEQ", },
  181. /* Target State Group */
  182. { ESP_CMD_SMSG, "SNDMSG", },
  183. { ESP_CMD_SSTAT, "SNDSTATUS", },
  184. { ESP_CMD_SDATA, "SNDDATA", },
  185. { ESP_CMD_DSEQ, "DISCSEQ", },
  186. { ESP_CMD_TSEQ, "TERMSEQ", },
  187. { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
  188. { ESP_CMD_DCNCT, "DISC", },
  189. { ESP_CMD_RMSG, "RCVMSG", },
  190. { ESP_CMD_RCMD, "RCVCMD", },
  191. { ESP_CMD_RDATA, "RCVDATA", },
  192. { ESP_CMD_RCSEQ, "RCVCMDSEQ", },
  193. /* Initiator State Group */
  194. { ESP_CMD_TI, "TRANSINFO", },
  195. { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
  196. { ESP_CMD_MOK, "MSGACCEPTED", },
  197. { ESP_CMD_TPAD, "TPAD", },
  198. { ESP_CMD_SATN, "SATN", },
  199. { ESP_CMD_RATN, "RATN", },
  200. };
  201. #define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
  202. /* Print textual representation of an ESP command */
  203. static inline void esp_print_cmd(u8 espcmd)
  204. {
  205. u8 dma_bit = espcmd & ESP_CMD_DMA;
  206. int i;
  207. espcmd &= ~dma_bit;
  208. for (i = 0; i < NUM_ESP_COMMANDS; i++)
  209. if (esp_cmd_strings[i].cmdchar == espcmd)
  210. break;
  211. if (i == NUM_ESP_COMMANDS)
  212. printk("ESP_Unknown");
  213. else
  214. printk("%s%s", esp_cmd_strings[i].text,
  215. ((dma_bit) ? "+DMA" : ""));
  216. }
  217. /* Print the status register's value */
  218. static inline void esp_print_statreg(u8 statreg)
  219. {
  220. u8 phase;
  221. printk("STATUS<");
  222. phase = statreg & ESP_STAT_PMASK;
  223. printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
  224. (phase == ESP_DIP ? "DATA-IN" :
  225. (phase == ESP_CMDP ? "COMMAND" :
  226. (phase == ESP_STATP ? "STATUS" :
  227. (phase == ESP_MOP ? "MSG-OUT" :
  228. (phase == ESP_MIP ? "MSG_IN" :
  229. "unknown")))))));
  230. if (statreg & ESP_STAT_TDONE)
  231. printk("TRANS_DONE,");
  232. if (statreg & ESP_STAT_TCNT)
  233. printk("TCOUNT_ZERO,");
  234. if (statreg & ESP_STAT_PERR)
  235. printk("P_ERROR,");
  236. if (statreg & ESP_STAT_SPAM)
  237. printk("SPAM,");
  238. if (statreg & ESP_STAT_INTR)
  239. printk("IRQ,");
  240. printk(">");
  241. }
  242. /* Print the interrupt register's value */
  243. static inline void esp_print_ireg(u8 intreg)
  244. {
  245. printk("INTREG< ");
  246. if (intreg & ESP_INTR_S)
  247. printk("SLCT_NATN ");
  248. if (intreg & ESP_INTR_SATN)
  249. printk("SLCT_ATN ");
  250. if (intreg & ESP_INTR_RSEL)
  251. printk("RSLCT ");
  252. if (intreg & ESP_INTR_FDONE)
  253. printk("FDONE ");
  254. if (intreg & ESP_INTR_BSERV)
  255. printk("BSERV ");
  256. if (intreg & ESP_INTR_DC)
  257. printk("DISCNCT ");
  258. if (intreg & ESP_INTR_IC)
  259. printk("ILL_CMD ");
  260. if (intreg & ESP_INTR_SR)
  261. printk("SCSI_BUS_RESET ");
  262. printk(">");
  263. }
  264. /* Print the sequence step registers contents */
  265. static inline void esp_print_seqreg(u8 stepreg)
  266. {
  267. stepreg &= ESP_STEP_VBITS;
  268. printk("STEP<%s>",
  269. (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
  270. (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
  271. (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
  272. (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
  273. (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
  274. "UNKNOWN"))))));
  275. }
  276. static char *phase_string(int phase)
  277. {
  278. switch (phase) {
  279. case not_issued:
  280. return "UNISSUED";
  281. case in_slct_norm:
  282. return "SLCTNORM";
  283. case in_slct_stop:
  284. return "SLCTSTOP";
  285. case in_slct_msg:
  286. return "SLCTMSG";
  287. case in_slct_tag:
  288. return "SLCTTAG";
  289. case in_slct_sneg:
  290. return "SLCTSNEG";
  291. case in_datain:
  292. return "DATAIN";
  293. case in_dataout:
  294. return "DATAOUT";
  295. case in_data_done:
  296. return "DATADONE";
  297. case in_msgin:
  298. return "MSGIN";
  299. case in_msgincont:
  300. return "MSGINCONT";
  301. case in_msgindone:
  302. return "MSGINDONE";
  303. case in_msgout:
  304. return "MSGOUT";
  305. case in_msgoutdone:
  306. return "MSGOUTDONE";
  307. case in_cmdbegin:
  308. return "CMDBEGIN";
  309. case in_cmdend:
  310. return "CMDEND";
  311. case in_status:
  312. return "STATUS";
  313. case in_freeing:
  314. return "FREEING";
  315. case in_the_dark:
  316. return "CLUELESS";
  317. case in_abortone:
  318. return "ABORTONE";
  319. case in_abortall:
  320. return "ABORTALL";
  321. case in_resetdev:
  322. return "RESETDEV";
  323. case in_resetbus:
  324. return "RESETBUS";
  325. case in_tgterror:
  326. return "TGTERROR";
  327. default:
  328. return "UNKNOWN";
  329. };
  330. }
  331. #ifdef DEBUG_STATE_MACHINE
  332. static inline void esp_advance_phase(struct scsi_cmnd *s, int newphase)
  333. {
  334. ESPLOG(("<%s>", phase_string(newphase)));
  335. s->SCp.sent_command = s->SCp.phase;
  336. s->SCp.phase = newphase;
  337. }
  338. #else
  339. #define esp_advance_phase(__s, __newphase) \
  340. (__s)->SCp.sent_command = (__s)->SCp.phase; \
  341. (__s)->SCp.phase = (__newphase);
  342. #endif
  343. #ifdef DEBUG_ESP_CMDS
  344. static inline void esp_cmd(struct esp *esp, u8 cmd)
  345. {
  346. esp->espcmdlog[esp->espcmdent] = cmd;
  347. esp->espcmdent = (esp->espcmdent + 1) & 31;
  348. sbus_writeb(cmd, esp->eregs + ESP_CMD);
  349. }
  350. #else
  351. #define esp_cmd(__esp, __cmd) \
  352. sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD)
  353. #endif
  354. #define ESP_INTSOFF(__dregs) \
  355. sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR)
  356. #define ESP_INTSON(__dregs) \
  357. sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR)
  358. #define ESP_IRQ_P(__dregs) \
  359. (sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR))
  360. /* How we use the various Linux SCSI data structures for operation.
  361. *
  362. * struct scsi_cmnd:
  363. *
  364. * We keep track of the synchronous capabilities of a target
  365. * in the device member, using sync_min_period and
  366. * sync_max_offset. These are the values we directly write
  367. * into the ESP registers while running a command. If offset
  368. * is zero the ESP will use asynchronous transfers.
  369. * If the borken flag is set we assume we shouldn't even bother
  370. * trying to negotiate for synchronous transfer as this target
  371. * is really stupid. If we notice the target is dropping the
  372. * bus, and we have been allowing it to disconnect, we clear
  373. * the disconnect flag.
  374. */
  375. /* Manipulation of the ESP command queues. Thanks to the aha152x driver
  376. * and its author, Juergen E. Fischer, for the methods used here.
  377. * Note that these are per-ESP queues, not global queues like
  378. * the aha152x driver uses.
  379. */
  380. static inline void append_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
  381. {
  382. struct scsi_cmnd *end;
  383. new_SC->host_scribble = (unsigned char *) NULL;
  384. if (!*SC)
  385. *SC = new_SC;
  386. else {
  387. for (end=*SC;end->host_scribble;end=(struct scsi_cmnd *)end->host_scribble)
  388. ;
  389. end->host_scribble = (unsigned char *) new_SC;
  390. }
  391. }
  392. static inline void prepend_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
  393. {
  394. new_SC->host_scribble = (unsigned char *) *SC;
  395. *SC = new_SC;
  396. }
  397. static inline struct scsi_cmnd *remove_first_SC(struct scsi_cmnd **SC)
  398. {
  399. struct scsi_cmnd *ptr;
  400. ptr = *SC;
  401. if (ptr)
  402. *SC = (struct scsi_cmnd *) (*SC)->host_scribble;
  403. return ptr;
  404. }
  405. static inline struct scsi_cmnd *remove_SC(struct scsi_cmnd **SC, int target, int lun)
  406. {
  407. struct scsi_cmnd *ptr, *prev;
  408. for (ptr = *SC, prev = NULL;
  409. ptr && ((ptr->device->id != target) || (ptr->device->lun != lun));
  410. prev = ptr, ptr = (struct scsi_cmnd *) ptr->host_scribble)
  411. ;
  412. if (ptr) {
  413. if (prev)
  414. prev->host_scribble=ptr->host_scribble;
  415. else
  416. *SC=(struct scsi_cmnd *)ptr->host_scribble;
  417. }
  418. return ptr;
  419. }
  420. /* Resetting various pieces of the ESP scsi driver chipset/buses. */
  421. static void esp_reset_dma(struct esp *esp)
  422. {
  423. int can_do_burst16, can_do_burst32, can_do_burst64;
  424. int can_do_sbus64;
  425. u32 tmp;
  426. can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
  427. can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
  428. can_do_burst64 = 0;
  429. can_do_sbus64 = 0;
  430. if (sbus_can_dma_64bit(esp->sdev))
  431. can_do_sbus64 = 1;
  432. if (sbus_can_burst64(esp->sdev))
  433. can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
  434. /* Punt the DVMA into a known state. */
  435. if (esp->dma->revision != dvmahme) {
  436. tmp = sbus_readl(esp->dregs + DMA_CSR);
  437. sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR);
  438. sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR);
  439. }
  440. switch (esp->dma->revision) {
  441. case dvmahme:
  442. /* This is the HME DVMA gate array. */
  443. sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR);
  444. sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
  445. esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB);
  446. esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ);
  447. if (can_do_burst64)
  448. esp->prev_hme_dmacsr |= DMA_BRST64;
  449. else if (can_do_burst32)
  450. esp->prev_hme_dmacsr |= DMA_BRST32;
  451. if (can_do_sbus64) {
  452. esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
  453. sbus_set_sbus64(esp->sdev, esp->bursts);
  454. }
  455. /* This chip is horrible. */
  456. while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ)
  457. udelay(1);
  458. sbus_writel(0, esp->dregs + DMA_CSR);
  459. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  460. /* This is necessary to avoid having the SCSI channel
  461. * engine lock up on us.
  462. */
  463. sbus_writel(0, esp->dregs + DMA_ADDR);
  464. break;
  465. case dvmarev2:
  466. /* This is the gate array found in the sun4m
  467. * NCR SBUS I/O subsystem.
  468. */
  469. if (esp->erev != esp100) {
  470. tmp = sbus_readl(esp->dregs + DMA_CSR);
  471. sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR);
  472. }
  473. break;
  474. case dvmarev3:
  475. tmp = sbus_readl(esp->dregs + DMA_CSR);
  476. tmp &= ~DMA_3CLKS;
  477. tmp |= DMA_2CLKS;
  478. if (can_do_burst32) {
  479. tmp &= ~DMA_BRST_SZ;
  480. tmp |= DMA_BRST32;
  481. }
  482. sbus_writel(tmp, esp->dregs + DMA_CSR);
  483. break;
  484. case dvmaesc1:
  485. /* This is the DMA unit found on SCSI/Ether cards. */
  486. tmp = sbus_readl(esp->dregs + DMA_CSR);
  487. tmp |= DMA_ADD_ENABLE;
  488. tmp &= ~DMA_BCNT_ENAB;
  489. if (!can_do_burst32 && can_do_burst16) {
  490. tmp |= DMA_ESC_BURST;
  491. } else {
  492. tmp &= ~(DMA_ESC_BURST);
  493. }
  494. sbus_writel(tmp, esp->dregs + DMA_CSR);
  495. break;
  496. default:
  497. break;
  498. };
  499. ESP_INTSON(esp->dregs);
  500. }
  501. /* Reset the ESP chip, _not_ the SCSI bus. */
  502. static void __init esp_reset_esp(struct esp *esp)
  503. {
  504. u8 family_code, version;
  505. int i;
  506. /* Now reset the ESP chip */
  507. esp_cmd(esp, ESP_CMD_RC);
  508. esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  509. esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  510. /* Reload the configuration registers */
  511. sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT);
  512. esp->prev_stp = 0;
  513. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  514. esp->prev_soff = 0;
  515. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  516. sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO);
  517. /* This is the only point at which it is reliable to read
  518. * the ID-code for a fast ESP chip variants.
  519. */
  520. esp->max_period = ((35 * esp->ccycle) / 1000);
  521. if (esp->erev == fast) {
  522. version = sbus_readb(esp->eregs + ESP_UID);
  523. family_code = (version & 0xf8) >> 3;
  524. if (family_code == 0x02)
  525. esp->erev = fas236;
  526. else if (family_code == 0x0a)
  527. esp->erev = fashme; /* Version is usually '5'. */
  528. else
  529. esp->erev = fas100a;
  530. ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
  531. esp->esp_id,
  532. (esp->erev == fas236) ? "fas236" :
  533. ((esp->erev == fas100a) ? "fas100a" :
  534. "fasHME"), family_code, (version & 7)));
  535. esp->min_period = ((4 * esp->ccycle) / 1000);
  536. } else {
  537. esp->min_period = ((5 * esp->ccycle) / 1000);
  538. }
  539. esp->max_period = (esp->max_period + 3)>>2;
  540. esp->min_period = (esp->min_period + 3)>>2;
  541. sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
  542. switch (esp->erev) {
  543. case esp100:
  544. /* nothing to do */
  545. break;
  546. case esp100a:
  547. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  548. break;
  549. case esp236:
  550. /* Slow 236 */
  551. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  552. esp->prev_cfg3 = esp->config3[0];
  553. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  554. break;
  555. case fashme:
  556. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  557. /* fallthrough... */
  558. case fas236:
  559. /* Fast 236 or HME */
  560. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  561. for (i = 0; i < 16; i++) {
  562. if (esp->erev == fashme) {
  563. u8 cfg3;
  564. cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  565. if (esp->scsi_id >= 8)
  566. cfg3 |= ESP_CONFIG3_IDBIT3;
  567. esp->config3[i] |= cfg3;
  568. } else {
  569. esp->config3[i] |= ESP_CONFIG3_FCLK;
  570. }
  571. }
  572. esp->prev_cfg3 = esp->config3[0];
  573. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  574. if (esp->erev == fashme) {
  575. esp->radelay = 80;
  576. } else {
  577. if (esp->diff)
  578. esp->radelay = 0;
  579. else
  580. esp->radelay = 96;
  581. }
  582. break;
  583. case fas100a:
  584. /* Fast 100a */
  585. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  586. for (i = 0; i < 16; i++)
  587. esp->config3[i] |= ESP_CONFIG3_FCLOCK;
  588. esp->prev_cfg3 = esp->config3[0];
  589. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  590. esp->radelay = 32;
  591. break;
  592. default:
  593. panic("esp: what could it be... I wonder...");
  594. break;
  595. };
  596. /* Eat any bitrot in the chip */
  597. sbus_readb(esp->eregs + ESP_INTRPT);
  598. udelay(100);
  599. }
  600. /* This places the ESP into a known state at boot time. */
  601. static void __init esp_bootup_reset(struct esp *esp)
  602. {
  603. u8 tmp;
  604. /* Reset the DMA */
  605. esp_reset_dma(esp);
  606. /* Reset the ESP */
  607. esp_reset_esp(esp);
  608. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  609. tmp = sbus_readb(esp->eregs + ESP_CFG1);
  610. tmp |= ESP_CONFIG1_SRRDISAB;
  611. sbus_writeb(tmp, esp->eregs + ESP_CFG1);
  612. esp_cmd(esp, ESP_CMD_RS);
  613. udelay(400);
  614. sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
  615. /* Eat any bitrot in the chip and we are done... */
  616. sbus_readb(esp->eregs + ESP_INTRPT);
  617. }
  618. static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev)
  619. {
  620. struct sbus_dev *sdev = esp->sdev;
  621. struct sbus_dma *dma;
  622. if (dma_sdev != NULL) {
  623. for_each_dvma(dma) {
  624. if (dma->sdev == dma_sdev)
  625. break;
  626. }
  627. } else {
  628. for_each_dvma(dma) {
  629. /* If allocated already, can't use it. */
  630. if (dma->allocated)
  631. continue;
  632. if (dma->sdev == NULL)
  633. break;
  634. /* If bus + slot are the same and it has the
  635. * correct OBP name, it's ours.
  636. */
  637. if (sdev->bus == dma->sdev->bus &&
  638. sdev->slot == dma->sdev->slot &&
  639. (!strcmp(dma->sdev->prom_name, "dma") ||
  640. !strcmp(dma->sdev->prom_name, "espdma")))
  641. break;
  642. }
  643. }
  644. /* If we don't know how to handle the dvma,
  645. * do not use this device.
  646. */
  647. if (dma == NULL) {
  648. printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id);
  649. return -1;
  650. }
  651. if (dma->allocated) {
  652. printk("esp%d: can't use my espdma\n", esp->esp_id);
  653. return -1;
  654. }
  655. dma->allocated = 1;
  656. esp->dma = dma;
  657. esp->dregs = dma->regs;
  658. return 0;
  659. }
  660. static int __init esp_map_regs(struct esp *esp, int hme)
  661. {
  662. struct sbus_dev *sdev = esp->sdev;
  663. struct resource *res;
  664. /* On HME, two reg sets exist, first is DVMA,
  665. * second is ESP registers.
  666. */
  667. if (hme)
  668. res = &sdev->resource[1];
  669. else
  670. res = &sdev->resource[0];
  671. esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers");
  672. if (esp->eregs == 0)
  673. return -1;
  674. return 0;
  675. }
  676. static int __init esp_map_cmdarea(struct esp *esp)
  677. {
  678. struct sbus_dev *sdev = esp->sdev;
  679. esp->esp_command = sbus_alloc_consistent(sdev, 16,
  680. &esp->esp_command_dvma);
  681. if (esp->esp_command == NULL ||
  682. esp->esp_command_dvma == 0)
  683. return -1;
  684. return 0;
  685. }
  686. static int __init esp_register_irq(struct esp *esp)
  687. {
  688. esp->ehost->irq = esp->irq = esp->sdev->irqs[0];
  689. /* We used to try various overly-clever things to
  690. * reduce the interrupt processing overhead on
  691. * sun4c/sun4m when multiple ESP's shared the
  692. * same IRQ. It was too complex and messy to
  693. * sanely maintain.
  694. */
  695. if (request_irq(esp->ehost->irq, esp_intr,
  696. IRQF_SHARED, "ESP SCSI", esp)) {
  697. printk("esp%d: Cannot acquire irq line\n",
  698. esp->esp_id);
  699. return -1;
  700. }
  701. printk("esp%d: IRQ %d ", esp->esp_id,
  702. esp->ehost->irq);
  703. return 0;
  704. }
  705. static void __init esp_get_scsi_id(struct esp *esp)
  706. {
  707. struct sbus_dev *sdev = esp->sdev;
  708. struct device_node *dp = sdev->ofdev.node;
  709. esp->scsi_id = of_getintprop_default(dp,
  710. "initiator-id",
  711. -1);
  712. if (esp->scsi_id == -1)
  713. esp->scsi_id = of_getintprop_default(dp,
  714. "scsi-initiator-id",
  715. -1);
  716. if (esp->scsi_id == -1)
  717. esp->scsi_id = (sdev->bus == NULL) ? 7 :
  718. of_getintprop_default(sdev->bus->ofdev.node,
  719. "scsi-initiator-id",
  720. 7);
  721. esp->ehost->this_id = esp->scsi_id;
  722. esp->scsi_id_mask = (1 << esp->scsi_id);
  723. }
  724. static void __init esp_get_clock_params(struct esp *esp)
  725. {
  726. struct sbus_dev *sdev = esp->sdev;
  727. int prom_node = esp->prom_node;
  728. int sbus_prom_node;
  729. unsigned int fmhz;
  730. u8 ccf;
  731. if (sdev != NULL && sdev->bus != NULL)
  732. sbus_prom_node = sdev->bus->prom_node;
  733. else
  734. sbus_prom_node = 0;
  735. /* This is getting messy but it has to be done
  736. * correctly or else you get weird behavior all
  737. * over the place. We are trying to basically
  738. * figure out three pieces of information.
  739. *
  740. * a) Clock Conversion Factor
  741. *
  742. * This is a representation of the input
  743. * crystal clock frequency going into the
  744. * ESP on this machine. Any operation whose
  745. * timing is longer than 400ns depends on this
  746. * value being correct. For example, you'll
  747. * get blips for arbitration/selection during
  748. * high load or with multiple targets if this
  749. * is not set correctly.
  750. *
  751. * b) Selection Time-Out
  752. *
  753. * The ESP isn't very bright and will arbitrate
  754. * for the bus and try to select a target
  755. * forever if you let it. This value tells
  756. * the ESP when it has taken too long to
  757. * negotiate and that it should interrupt
  758. * the CPU so we can see what happened.
  759. * The value is computed as follows (from
  760. * NCR/Symbios chip docs).
  761. *
  762. * (Time Out Period) * (Input Clock)
  763. * STO = ----------------------------------
  764. * (8192) * (Clock Conversion Factor)
  765. *
  766. * You usually want the time out period to be
  767. * around 250ms, I think we'll set it a little
  768. * bit higher to account for fully loaded SCSI
  769. * bus's and slow devices that don't respond so
  770. * quickly to selection attempts. (yeah, I know
  771. * this is out of spec. but there is a lot of
  772. * buggy pieces of firmware out there so bite me)
  773. *
  774. * c) Imperical constants for synchronous offset
  775. * and transfer period register values
  776. *
  777. * This entails the smallest and largest sync
  778. * period we could ever handle on this ESP.
  779. */
  780. fmhz = prom_getintdefault(prom_node, "clock-frequency", -1);
  781. if (fmhz == -1)
  782. fmhz = (!sbus_prom_node) ? 0 :
  783. prom_getintdefault(sbus_prom_node, "clock-frequency", -1);
  784. if (fmhz <= (5000000))
  785. ccf = 0;
  786. else
  787. ccf = (((5000000 - 1) + (fmhz))/(5000000));
  788. if (!ccf || ccf > 8) {
  789. /* If we can't find anything reasonable,
  790. * just assume 20MHZ. This is the clock
  791. * frequency of the older sun4c's where I've
  792. * been unable to find the clock-frequency
  793. * PROM property. All other machines provide
  794. * useful values it seems.
  795. */
  796. ccf = ESP_CCF_F4;
  797. fmhz = (20000000);
  798. }
  799. if (ccf == (ESP_CCF_F7 + 1))
  800. esp->cfact = ESP_CCF_F0;
  801. else if (ccf == ESP_CCF_NEVER)
  802. esp->cfact = ESP_CCF_F2;
  803. else
  804. esp->cfact = ccf;
  805. esp->raw_cfact = ccf;
  806. esp->cfreq = fmhz;
  807. esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
  808. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  809. esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
  810. esp->sync_defp = SYNC_DEFP_SLOW;
  811. printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ",
  812. esp->scsi_id, (fmhz / 1000000),
  813. (int)esp->ccycle, (int)ccf, (int) esp->neg_defp);
  814. }
  815. static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma)
  816. {
  817. struct sbus_dev *sdev = esp->sdev;
  818. u8 bursts;
  819. bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff);
  820. if (dma) {
  821. u8 tmp = prom_getintdefault(dma->prom_node,
  822. "burst-sizes", 0xff);
  823. if (tmp != 0xff)
  824. bursts &= tmp;
  825. }
  826. if (sdev->bus) {
  827. u8 tmp = prom_getintdefault(sdev->bus->prom_node,
  828. "burst-sizes", 0xff);
  829. if (tmp != 0xff)
  830. bursts &= tmp;
  831. }
  832. if (bursts == 0xff ||
  833. (bursts & DMA_BURST16) == 0 ||
  834. (bursts & DMA_BURST32) == 0)
  835. bursts = (DMA_BURST32 - 1);
  836. esp->bursts = bursts;
  837. }
  838. static void __init esp_get_revision(struct esp *esp)
  839. {
  840. u8 tmp;
  841. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  842. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  843. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  844. tmp = sbus_readb(esp->eregs + ESP_CFG2);
  845. tmp &= ~ESP_CONFIG2_MAGIC;
  846. if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  847. /* If what we write to cfg2 does not come back, cfg2
  848. * is not implemented, therefore this must be a plain
  849. * esp100.
  850. */
  851. esp->erev = esp100;
  852. printk("NCR53C90(esp100)\n");
  853. } else {
  854. esp->config2 = 0;
  855. esp->prev_cfg3 = esp->config3[0] = 5;
  856. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  857. sbus_writeb(0, esp->eregs + ESP_CFG3);
  858. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  859. tmp = sbus_readb(esp->eregs + ESP_CFG3);
  860. if (tmp != 5) {
  861. /* The cfg2 register is implemented, however
  862. * cfg3 is not, must be esp100a.
  863. */
  864. esp->erev = esp100a;
  865. printk("NCR53C90A(esp100a)\n");
  866. } else {
  867. int target;
  868. for (target = 0; target < 16; target++)
  869. esp->config3[target] = 0;
  870. esp->prev_cfg3 = 0;
  871. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  872. /* All of cfg{1,2,3} implemented, must be one of
  873. * the fas variants, figure out which one.
  874. */
  875. if (esp->raw_cfact > ESP_CCF_F5) {
  876. esp->erev = fast;
  877. esp->sync_defp = SYNC_DEFP_FAST;
  878. printk("NCR53C9XF(espfast)\n");
  879. } else {
  880. esp->erev = esp236;
  881. printk("NCR53C9x(esp236)\n");
  882. }
  883. esp->config2 = 0;
  884. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  885. }
  886. }
  887. }
  888. static void __init esp_init_swstate(struct esp *esp)
  889. {
  890. int i;
  891. /* Command queues... */
  892. esp->current_SC = NULL;
  893. esp->disconnected_SC = NULL;
  894. esp->issue_SC = NULL;
  895. /* Target and current command state... */
  896. esp->targets_present = 0;
  897. esp->resetting_bus = 0;
  898. esp->snip = 0;
  899. init_waitqueue_head(&esp->reset_queue);
  900. /* Debugging... */
  901. for(i = 0; i < 32; i++)
  902. esp->espcmdlog[i] = 0;
  903. esp->espcmdent = 0;
  904. /* MSG phase state... */
  905. for(i = 0; i < 16; i++) {
  906. esp->cur_msgout[i] = 0;
  907. esp->cur_msgin[i] = 0;
  908. }
  909. esp->prevmsgout = esp->prevmsgin = 0;
  910. esp->msgout_len = esp->msgin_len = 0;
  911. /* Clear the one behind caches to hold unmatchable values. */
  912. esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff;
  913. esp->prev_hme_dmacsr = 0xffffffff;
  914. }
  915. static int __init detect_one_esp(struct scsi_host_template *tpnt,
  916. struct device *dev,
  917. struct sbus_dev *esp_dev,
  918. struct sbus_dev *espdma,
  919. struct sbus_bus *sbus,
  920. int hme)
  921. {
  922. static int instance;
  923. struct Scsi_Host *esp_host = scsi_host_alloc(tpnt, sizeof(struct esp));
  924. struct esp *esp;
  925. if (!esp_host)
  926. return -ENOMEM;
  927. if (hme)
  928. esp_host->max_id = 16;
  929. esp = (struct esp *) esp_host->hostdata;
  930. esp->ehost = esp_host;
  931. esp->sdev = esp_dev;
  932. esp->esp_id = instance;
  933. esp->prom_node = esp_dev->prom_node;
  934. prom_getstring(esp->prom_node, "name", esp->prom_name,
  935. sizeof(esp->prom_name));
  936. if (esp_find_dvma(esp, espdma) < 0)
  937. goto fail_unlink;
  938. if (esp_map_regs(esp, hme) < 0) {
  939. printk("ESP registers unmappable");
  940. goto fail_dvma_release;
  941. }
  942. if (esp_map_cmdarea(esp) < 0) {
  943. printk("ESP DVMA transport area unmappable");
  944. goto fail_unmap_regs;
  945. }
  946. if (esp_register_irq(esp) < 0)
  947. goto fail_unmap_cmdarea;
  948. esp_get_scsi_id(esp);
  949. esp->diff = prom_getbool(esp->prom_node, "differential");
  950. if (esp->diff)
  951. printk("Differential ");
  952. esp_get_clock_params(esp);
  953. esp_get_bursts(esp, espdma);
  954. esp_get_revision(esp);
  955. esp_init_swstate(esp);
  956. esp_bootup_reset(esp);
  957. if (scsi_add_host(esp_host, dev))
  958. goto fail_free_irq;
  959. dev_set_drvdata(&esp_dev->ofdev.dev, esp);
  960. scsi_scan_host(esp_host);
  961. instance++;
  962. return 0;
  963. fail_free_irq:
  964. free_irq(esp->ehost->irq, esp);
  965. fail_unmap_cmdarea:
  966. sbus_free_consistent(esp->sdev, 16,
  967. (void *) esp->esp_command,
  968. esp->esp_command_dvma);
  969. fail_unmap_regs:
  970. sbus_iounmap(esp->eregs, ESP_REG_SIZE);
  971. fail_dvma_release:
  972. esp->dma->allocated = 0;
  973. fail_unlink:
  974. scsi_host_put(esp_host);
  975. return -1;
  976. }
  977. /* Detecting ESP chips on the machine. This is the simple and easy
  978. * version.
  979. */
  980. static int __devexit esp_remove_common(struct esp *esp)
  981. {
  982. unsigned int irq = esp->ehost->irq;
  983. scsi_remove_host(esp->ehost);
  984. ESP_INTSOFF(esp->dregs);
  985. #if 0
  986. esp_reset_dma(esp);
  987. esp_reset_esp(esp);
  988. #endif
  989. free_irq(irq, esp);
  990. sbus_free_consistent(esp->sdev, 16,
  991. (void *) esp->esp_command, esp->esp_command_dvma);
  992. sbus_iounmap(esp->eregs, ESP_REG_SIZE);
  993. esp->dma->allocated = 0;
  994. scsi_host_put(esp->ehost);
  995. return 0;
  996. }
  997. #ifdef CONFIG_SUN4
  998. #include <asm/sun4paddr.h>
  999. static struct sbus_dev sun4_esp_dev;
  1000. static int __init esp_sun4_probe(struct scsi_host_template *tpnt)
  1001. {
  1002. if (sun4_esp_physaddr) {
  1003. memset(&sun4_esp_dev, 0, sizeof(esp_dev));
  1004. sun4_esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr;
  1005. sun4_esp_dev.irqs[0] = 4;
  1006. sun4_esp_dev.resource[0].start = sun4_esp_physaddr;
  1007. sun4_esp_dev.resource[0].end =
  1008. sun4_esp_physaddr + ESP_REG_SIZE - 1;
  1009. sun4_esp_dev.resource[0].flags = IORESOURCE_IO;
  1010. return detect_one_esp(tpnt, NULL,
  1011. &sun4_esp_dev, NULL, NULL, 0);
  1012. }
  1013. return 0;
  1014. }
  1015. static int __devexit esp_sun4_remove(void)
  1016. {
  1017. struct esp *esp = dev_get_drvdata(&dev->dev);
  1018. return esp_remove_common(esp);
  1019. }
  1020. #else /* !CONFIG_SUN4 */
  1021. static int __devinit esp_sbus_probe(struct of_device *dev, const struct of_device_id *match)
  1022. {
  1023. struct sbus_dev *sdev = to_sbus_device(&dev->dev);
  1024. struct device_node *dp = dev->node;
  1025. struct sbus_dev *dma_sdev = NULL;
  1026. int hme = 0;
  1027. if (dp->parent &&
  1028. (!strcmp(dp->parent->name, "espdma") ||
  1029. !strcmp(dp->parent->name, "dma")))
  1030. dma_sdev = sdev->parent;
  1031. else if (!strcmp(dp->name, "SUNW,fas")) {
  1032. dma_sdev = sdev;
  1033. hme = 1;
  1034. }
  1035. return detect_one_esp(match->data, &dev->dev,
  1036. sdev, dma_sdev, sdev->bus, hme);
  1037. }
  1038. static int __devexit esp_sbus_remove(struct of_device *dev)
  1039. {
  1040. struct esp *esp = dev_get_drvdata(&dev->dev);
  1041. return esp_remove_common(esp);
  1042. }
  1043. #endif /* !CONFIG_SUN4 */
  1044. /* The info function will return whatever useful
  1045. * information the developer sees fit. If not provided, then
  1046. * the name field will be used instead.
  1047. */
  1048. static const char *esp_info(struct Scsi_Host *host)
  1049. {
  1050. struct esp *esp;
  1051. esp = (struct esp *) host->hostdata;
  1052. switch (esp->erev) {
  1053. case esp100:
  1054. return "Sparc ESP100 (NCR53C90)";
  1055. case esp100a:
  1056. return "Sparc ESP100A (NCR53C90A)";
  1057. case esp236:
  1058. return "Sparc ESP236";
  1059. case fas236:
  1060. return "Sparc ESP236-FAST";
  1061. case fashme:
  1062. return "Sparc ESP366-HME";
  1063. case fas100a:
  1064. return "Sparc ESP100A-FAST";
  1065. default:
  1066. return "Bogon ESP revision";
  1067. };
  1068. }
  1069. /* From Wolfgang Stanglmeier's NCR scsi driver. */
  1070. struct info_str
  1071. {
  1072. char *buffer;
  1073. int length;
  1074. int offset;
  1075. int pos;
  1076. };
  1077. static void copy_mem_info(struct info_str *info, char *data, int len)
  1078. {
  1079. if (info->pos + len > info->length)
  1080. len = info->length - info->pos;
  1081. if (info->pos + len < info->offset) {
  1082. info->pos += len;
  1083. return;
  1084. }
  1085. if (info->pos < info->offset) {
  1086. data += (info->offset - info->pos);
  1087. len -= (info->offset - info->pos);
  1088. }
  1089. if (len > 0) {
  1090. memcpy(info->buffer + info->pos, data, len);
  1091. info->pos += len;
  1092. }
  1093. }
  1094. static int copy_info(struct info_str *info, char *fmt, ...)
  1095. {
  1096. va_list args;
  1097. char buf[81];
  1098. int len;
  1099. va_start(args, fmt);
  1100. len = vsprintf(buf, fmt, args);
  1101. va_end(args);
  1102. copy_mem_info(info, buf, len);
  1103. return len;
  1104. }
  1105. static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len)
  1106. {
  1107. struct scsi_device *sdev;
  1108. struct info_str info;
  1109. int i;
  1110. info.buffer = ptr;
  1111. info.length = len;
  1112. info.offset = offset;
  1113. info.pos = 0;
  1114. copy_info(&info, "Sparc ESP Host Adapter:\n");
  1115. copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node);
  1116. copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name);
  1117. copy_info(&info, "\tESP Model\t\t");
  1118. switch (esp->erev) {
  1119. case esp100:
  1120. copy_info(&info, "ESP100\n");
  1121. break;
  1122. case esp100a:
  1123. copy_info(&info, "ESP100A\n");
  1124. break;
  1125. case esp236:
  1126. copy_info(&info, "ESP236\n");
  1127. break;
  1128. case fas236:
  1129. copy_info(&info, "FAS236\n");
  1130. break;
  1131. case fas100a:
  1132. copy_info(&info, "FAS100A\n");
  1133. break;
  1134. case fast:
  1135. copy_info(&info, "FAST\n");
  1136. break;
  1137. case fashme:
  1138. copy_info(&info, "Happy Meal FAS\n");
  1139. break;
  1140. case espunknown:
  1141. default:
  1142. copy_info(&info, "Unknown!\n");
  1143. break;
  1144. };
  1145. copy_info(&info, "\tDMA Revision\t\t");
  1146. switch (esp->dma->revision) {
  1147. case dvmarev0:
  1148. copy_info(&info, "Rev 0\n");
  1149. break;
  1150. case dvmaesc1:
  1151. copy_info(&info, "ESC Rev 1\n");
  1152. break;
  1153. case dvmarev1:
  1154. copy_info(&info, "Rev 1\n");
  1155. break;
  1156. case dvmarev2:
  1157. copy_info(&info, "Rev 2\n");
  1158. break;
  1159. case dvmarev3:
  1160. copy_info(&info, "Rev 3\n");
  1161. break;
  1162. case dvmarevplus:
  1163. copy_info(&info, "Rev 1+\n");
  1164. break;
  1165. case dvmahme:
  1166. copy_info(&info, "Rev HME/FAS\n");
  1167. break;
  1168. default:
  1169. copy_info(&info, "Unknown!\n");
  1170. break;
  1171. };
  1172. copy_info(&info, "\tLive Targets\t\t[ ");
  1173. for (i = 0; i < 15; i++) {
  1174. if (esp->targets_present & (1 << i))
  1175. copy_info(&info, "%d ", i);
  1176. }
  1177. copy_info(&info, "]\n\n");
  1178. /* Now describe the state of each existing target. */
  1179. copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
  1180. shost_for_each_device(sdev, esp->ehost) {
  1181. struct esp_device *esp_dev = sdev->hostdata;
  1182. uint id = sdev->id;
  1183. if (!(esp->targets_present & (1 << id)))
  1184. continue;
  1185. copy_info(&info, "%d\t\t", id);
  1186. copy_info(&info, "%08lx\t", esp->config3[id]);
  1187. copy_info(&info, "[%02lx,%02lx]\t\t\t",
  1188. esp_dev->sync_max_offset,
  1189. esp_dev->sync_min_period);
  1190. copy_info(&info, "%s\t\t",
  1191. esp_dev->disconnect ? "yes" : "no");
  1192. copy_info(&info, "%s\n",
  1193. (esp->config3[id] & ESP_CONFIG3_EWIDE) ? "yes" : "no");
  1194. }
  1195. return info.pos > info.offset? info.pos - info.offset : 0;
  1196. }
  1197. /* ESP proc filesystem code. */
  1198. static int esp_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
  1199. int length, int inout)
  1200. {
  1201. struct esp *esp = (struct esp *) host->hostdata;
  1202. if (inout)
  1203. return -EINVAL; /* not yet */
  1204. if (start)
  1205. *start = buffer;
  1206. return esp_host_info(esp, buffer, offset, length);
  1207. }
  1208. static void esp_get_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
  1209. {
  1210. if (sp->use_sg == 0) {
  1211. sp->SCp.this_residual = sp->request_bufflen;
  1212. sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
  1213. sp->SCp.buffers_residual = 0;
  1214. if (sp->request_bufflen) {
  1215. sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer,
  1216. sp->SCp.this_residual,
  1217. sp->sc_data_direction);
  1218. sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in);
  1219. } else {
  1220. sp->SCp.ptr = NULL;
  1221. }
  1222. } else {
  1223. sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
  1224. sp->SCp.buffers_residual = sbus_map_sg(esp->sdev,
  1225. sp->SCp.buffer,
  1226. sp->use_sg,
  1227. sp->sc_data_direction);
  1228. sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
  1229. sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer));
  1230. }
  1231. }
  1232. static void esp_release_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
  1233. {
  1234. if (sp->use_sg) {
  1235. sbus_unmap_sg(esp->sdev, sp->request_buffer, sp->use_sg,
  1236. sp->sc_data_direction);
  1237. } else if (sp->request_bufflen) {
  1238. sbus_unmap_single(esp->sdev,
  1239. sp->SCp.have_data_in,
  1240. sp->request_bufflen,
  1241. sp->sc_data_direction);
  1242. }
  1243. }
  1244. static void esp_restore_pointers(struct esp *esp, struct scsi_cmnd *sp)
  1245. {
  1246. struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
  1247. sp->SCp.ptr = ep->saved_ptr;
  1248. sp->SCp.buffer = ep->saved_buffer;
  1249. sp->SCp.this_residual = ep->saved_this_residual;
  1250. sp->SCp.buffers_residual = ep->saved_buffers_residual;
  1251. }
  1252. static void esp_save_pointers(struct esp *esp, struct scsi_cmnd *sp)
  1253. {
  1254. struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
  1255. ep->saved_ptr = sp->SCp.ptr;
  1256. ep->saved_buffer = sp->SCp.buffer;
  1257. ep->saved_this_residual = sp->SCp.this_residual;
  1258. ep->saved_buffers_residual = sp->SCp.buffers_residual;
  1259. }
  1260. /* Some rules:
  1261. *
  1262. * 1) Never ever panic while something is live on the bus.
  1263. * If there is to be any chance of syncing the disks this
  1264. * rule is to be obeyed.
  1265. *
  1266. * 2) Any target that causes a foul condition will no longer
  1267. * have synchronous transfers done to it, no questions
  1268. * asked.
  1269. *
  1270. * 3) Keep register accesses to a minimum. Think about some
  1271. * day when we have Xbus machines this is running on and
  1272. * the ESP chip is on the other end of the machine on a
  1273. * different board from the cpu where this is running.
  1274. */
  1275. /* Fire off a command. We assume the bus is free and that the only
  1276. * case where we could see an interrupt is where we have disconnected
  1277. * commands active and they are trying to reselect us.
  1278. */
  1279. static inline void esp_check_cmd(struct esp *esp, struct scsi_cmnd *sp)
  1280. {
  1281. switch (sp->cmd_len) {
  1282. case 6:
  1283. case 10:
  1284. case 12:
  1285. esp->esp_slowcmd = 0;
  1286. break;
  1287. default:
  1288. esp->esp_slowcmd = 1;
  1289. esp->esp_scmdleft = sp->cmd_len;
  1290. esp->esp_scmdp = &sp->cmnd[0];
  1291. break;
  1292. };
  1293. }
  1294. static inline void build_sync_nego_msg(struct esp *esp, int period, int offset)
  1295. {
  1296. esp->cur_msgout[0] = EXTENDED_MESSAGE;
  1297. esp->cur_msgout[1] = 3;
  1298. esp->cur_msgout[2] = EXTENDED_SDTR;
  1299. esp->cur_msgout[3] = period;
  1300. esp->cur_msgout[4] = offset;
  1301. esp->msgout_len = 5;
  1302. }
  1303. /* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
  1304. static inline void build_wide_nego_msg(struct esp *esp, int size)
  1305. {
  1306. esp->cur_msgout[0] = EXTENDED_MESSAGE;
  1307. esp->cur_msgout[1] = 2;
  1308. esp->cur_msgout[2] = EXTENDED_WDTR;
  1309. switch (size) {
  1310. case 32:
  1311. esp->cur_msgout[3] = 2;
  1312. break;
  1313. case 16:
  1314. esp->cur_msgout[3] = 1;
  1315. break;
  1316. case 8:
  1317. default:
  1318. esp->cur_msgout[3] = 0;
  1319. break;
  1320. };
  1321. esp->msgout_len = 4;
  1322. }
  1323. static void esp_exec_cmd(struct esp *esp)
  1324. {
  1325. struct scsi_cmnd *SCptr;
  1326. struct scsi_device *SDptr;
  1327. struct esp_device *esp_dev;
  1328. volatile u8 *cmdp = esp->esp_command;
  1329. u8 the_esp_command;
  1330. int lun, target;
  1331. int i;
  1332. /* Hold off if we have disconnected commands and
  1333. * an IRQ is showing...
  1334. */
  1335. if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs))
  1336. return;
  1337. /* Grab first member of the issue queue. */
  1338. SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);
  1339. /* Safe to panic here because current_SC is null. */
  1340. if (!SCptr)
  1341. panic("esp: esp_exec_cmd and issue queue is NULL");
  1342. SDptr = SCptr->device;
  1343. esp_dev = SDptr->hostdata;
  1344. lun = SCptr->device->lun;
  1345. target = SCptr->device->id;
  1346. esp->snip = 0;
  1347. esp->msgout_len = 0;
  1348. /* Send it out whole, or piece by piece? The ESP
  1349. * only knows how to automatically send out 6, 10,
  1350. * and 12 byte commands. I used to think that the
  1351. * Linux SCSI code would never throw anything other
  1352. * than that to us, but then again there is the
  1353. * SCSI generic driver which can send us anything.
  1354. */
  1355. esp_check_cmd(esp, SCptr);
  1356. /* If arbitration/selection is successful, the ESP will leave
  1357. * ATN asserted, causing the target to go into message out
  1358. * phase. The ESP will feed the target the identify and then
  1359. * the target can only legally go to one of command,
  1360. * datain/out, status, or message in phase, or stay in message
  1361. * out phase (should we be trying to send a sync negotiation
  1362. * message after the identify). It is not allowed to drop
  1363. * BSY, but some buggy targets do and we check for this
  1364. * condition in the selection complete code. Most of the time
  1365. * we'll make the command bytes available to the ESP and it
  1366. * will not interrupt us until it finishes command phase, we
  1367. * cannot do this for command sizes the ESP does not
  1368. * understand and in this case we'll get interrupted right
  1369. * when the target goes into command phase.
  1370. *
  1371. * It is absolutely _illegal_ in the presence of SCSI-2 devices
  1372. * to use the ESP select w/o ATN command. When SCSI-2 devices are
  1373. * present on the bus we _must_ always go straight to message out
  1374. * phase with an identify message for the target. Being that
  1375. * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
  1376. * selections should not confuse SCSI-1 we hope.
  1377. */
  1378. if (esp_dev->sync) {
  1379. /* this targets sync is known */
  1380. #ifndef __sparc_v9__
  1381. do_sync_known:
  1382. #endif
  1383. if (esp_dev->disconnect)
  1384. *cmdp++ = IDENTIFY(1, lun);
  1385. else
  1386. *cmdp++ = IDENTIFY(0, lun);
  1387. if (esp->esp_slowcmd) {
  1388. the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
  1389. esp_advance_phase(SCptr, in_slct_stop);
  1390. } else {
  1391. the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
  1392. esp_advance_phase(SCptr, in_slct_norm);
  1393. }
  1394. } else if (!(esp->targets_present & (1<<target)) || !(esp_dev->disconnect)) {
  1395. /* After the bootup SCSI code sends both the
  1396. * TEST_UNIT_READY and INQUIRY commands we want
  1397. * to at least attempt allowing the device to
  1398. * disconnect.
  1399. */
  1400. ESPMISC(("esp: Selecting device for first time. target=%d "
  1401. "lun=%d\n", target, SCptr->device->lun));
  1402. if (!SDptr->borken && !esp_dev->disconnect)
  1403. esp_dev->disconnect = 1;
  1404. *cmdp++ = IDENTIFY(0, lun);
  1405. esp->prevmsgout = NOP;
  1406. esp_advance_phase(SCptr, in_slct_norm);
  1407. the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
  1408. /* Take no chances... */
  1409. esp_dev->sync_max_offset = 0;
  1410. esp_dev->sync_min_period = 0;
  1411. } else {
  1412. /* Sorry, I have had way too many problems with
  1413. * various CDROM devices on ESP. -DaveM
  1414. */
  1415. int cdrom_hwbug_wkaround = 0;
  1416. #ifndef __sparc_v9__
  1417. /* Never allow disconnects or synchronous transfers on
  1418. * SparcStation1 and SparcStation1+. Allowing those
  1419. * to be enabled seems to lockup the machine completely.
  1420. */
  1421. if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) ||
  1422. (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {
  1423. /* But we are nice and allow tapes and removable
  1424. * disks (but not CDROMs) to disconnect.
  1425. */
  1426. if(SDptr->type == TYPE_TAPE ||
  1427. (SDptr->type != TYPE_ROM && SDptr->removable))
  1428. esp_dev->disconnect = 1;
  1429. else
  1430. esp_dev->disconnect = 0;
  1431. esp_dev->sync_max_offset = 0;
  1432. esp_dev->sync_min_period = 0;
  1433. esp_dev->sync = 1;
  1434. esp->snip = 0;
  1435. goto do_sync_known;
  1436. }
  1437. #endif /* !(__sparc_v9__) */
  1438. /* We've talked to this guy before,
  1439. * but never negotiated. Let's try,
  1440. * need to attempt WIDE first, before
  1441. * sync nego, as per SCSI 2 standard.
  1442. */
  1443. if (esp->erev == fashme && !esp_dev->wide) {
  1444. if (!SDptr->borken &&
  1445. SDptr->type != TYPE_ROM &&
  1446. SDptr->removable == 0) {
  1447. build_wide_nego_msg(esp, 16);
  1448. esp_dev->wide = 1;
  1449. esp->wnip = 1;
  1450. goto after_nego_msg_built;
  1451. } else {
  1452. esp_dev->wide = 1;
  1453. /* Fall through and try sync. */
  1454. }
  1455. }
  1456. if (!SDptr->borken) {
  1457. if ((SDptr->type == TYPE_ROM)) {
  1458. /* Nice try sucker... */
  1459. ESPMISC(("esp%d: Disabling sync for buggy "
  1460. "CDROM.\n", esp->esp_id));
  1461. cdrom_hwbug_wkaround = 1;
  1462. build_sync_nego_msg(esp, 0, 0);
  1463. } else if (SDptr->removable != 0) {
  1464. ESPMISC(("esp%d: Not negotiating sync/wide but "
  1465. "allowing disconnect for removable media.\n",
  1466. esp->esp_id));
  1467. build_sync_nego_msg(esp, 0, 0);
  1468. } else {
  1469. build_sync_nego_msg(esp, esp->sync_defp, 15);
  1470. }
  1471. } else {
  1472. build_sync_nego_msg(esp, 0, 0);
  1473. }
  1474. esp_dev->sync = 1;
  1475. esp->snip = 1;
  1476. after_nego_msg_built:
  1477. /* A fix for broken SCSI1 targets, when they disconnect
  1478. * they lock up the bus and confuse ESP. So disallow
  1479. * disconnects for SCSI1 targets for now until we
  1480. * find a better fix.
  1481. *
  1482. * Addendum: This is funny, I figured out what was going
  1483. * on. The blotzed SCSI1 target would disconnect,
  1484. * one of the other SCSI2 targets or both would be
  1485. * disconnected as well. The SCSI1 target would
  1486. * stay disconnected long enough that we start
  1487. * up a command on one of the SCSI2 targets. As
  1488. * the ESP is arbitrating for the bus the SCSI1
  1489. * target begins to arbitrate as well to reselect
  1490. * the ESP. The SCSI1 target refuses to drop it's
  1491. * ID bit on the data bus even though the ESP is
  1492. * at ID 7 and is the obvious winner for any
  1493. * arbitration. The ESP is a poor sport and refuses
  1494. * to lose arbitration, it will continue indefinitely
  1495. * trying to arbitrate for the bus and can only be
  1496. * stopped via a chip reset or SCSI bus reset.
  1497. * Therefore _no_ disconnects for SCSI1 targets
  1498. * thank you very much. ;-)
  1499. */
  1500. if(((SDptr->scsi_level < 3) &&
  1501. (SDptr->type != TYPE_TAPE) &&
  1502. SDptr->removable == 0) ||
  1503. cdrom_hwbug_wkaround || SDptr->borken) {
  1504. ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
  1505. "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
  1506. esp_dev->disconnect = 0;
  1507. *cmdp++ = IDENTIFY(0, lun);
  1508. } else {
  1509. *cmdp++ = IDENTIFY(1, lun);
  1510. }
  1511. /* ESP fifo is only so big...
  1512. * Make this look like a slow command.
  1513. */
  1514. esp->esp_slowcmd = 1;
  1515. esp->esp_scmdleft = SCptr->cmd_len;
  1516. esp->esp_scmdp = &SCptr->cmnd[0];
  1517. the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
  1518. esp_advance_phase(SCptr, in_slct_msg);
  1519. }
  1520. if (!esp->esp_slowcmd)
  1521. for (i = 0; i < SCptr->cmd_len; i++)
  1522. *cmdp++ = SCptr->cmnd[i];
  1523. /* HME sucks... */
  1524. if (esp->erev == fashme)
  1525. sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT),
  1526. esp->eregs + ESP_BUSID);
  1527. else
  1528. sbus_writeb(target & 7, esp->eregs + ESP_BUSID);
  1529. if (esp->prev_soff != esp_dev->sync_max_offset ||
  1530. esp->prev_stp != esp_dev->sync_min_period ||
  1531. (esp->erev > esp100a &&
  1532. esp->prev_cfg3 != esp->config3[target])) {
  1533. esp->prev_soff = esp_dev->sync_max_offset;
  1534. esp->prev_stp = esp_dev->sync_min_period;
  1535. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  1536. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  1537. if (esp->erev > esp100a) {
  1538. esp->prev_cfg3 = esp->config3[target];
  1539. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  1540. }
  1541. }
  1542. i = (cmdp - esp->esp_command);
  1543. if (esp->erev == fashme) {
  1544. esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */
  1545. /* Set up the DMA and HME counters */
  1546. sbus_writeb(i, esp->eregs + ESP_TCLOW);
  1547. sbus_writeb(0, esp->eregs + ESP_TCMED);
  1548. sbus_writeb(0, esp->eregs + FAS_RLO);
  1549. sbus_writeb(0, esp->eregs + FAS_RHI);
  1550. esp_cmd(esp, the_esp_command);
  1551. /* Talk about touchy hardware... */
  1552. esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
  1553. (DMA_SCSI_DISAB | DMA_ENABLE)) &
  1554. ~(DMA_ST_WRITE));
  1555. sbus_writel(16, esp->dregs + DMA_COUNT);
  1556. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  1557. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  1558. } else {
  1559. u32 tmp;
  1560. /* Set up the DMA and ESP counters */
  1561. sbus_writeb(i, esp->eregs + ESP_TCLOW);
  1562. sbus_writeb(0, esp->eregs + ESP_TCMED);
  1563. tmp = sbus_readl(esp->dregs + DMA_CSR);
  1564. tmp &= ~DMA_ST_WRITE;
  1565. tmp |= DMA_ENABLE;
  1566. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1567. if (esp->dma->revision == dvmaesc1) {
  1568. if (i) /* Workaround ESC gate array SBUS rerun bug. */
  1569. sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT);
  1570. }
  1571. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  1572. /* Tell ESP to "go". */
  1573. esp_cmd(esp, the_esp_command);
  1574. }
  1575. }
  1576. /* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
  1577. static int esp_queue(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  1578. {
  1579. struct esp *esp;
  1580. /* Set up func ptr and initial driver cmd-phase. */
  1581. SCpnt->scsi_done = done;
  1582. SCpnt->SCp.phase = not_issued;
  1583. /* We use the scratch area. */
  1584. ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->device->id, SCpnt->device->lun));
  1585. ESPDISC(("N<%02x,%02x>", SCpnt->device->id, SCpnt->device->lun));
  1586. esp = (struct esp *) SCpnt->device->host->hostdata;
  1587. esp_get_dmabufs(esp, SCpnt);
  1588. esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */
  1589. SCpnt->SCp.Status = CHECK_CONDITION;
  1590. SCpnt->SCp.Message = 0xff;
  1591. SCpnt->SCp.sent_command = 0;
  1592. /* Place into our queue. */
  1593. if (SCpnt->cmnd[0] == REQUEST_SENSE) {
  1594. ESPQUEUE(("RQSENSE\n"));
  1595. prepend_SC(&esp->issue_SC, SCpnt);
  1596. } else {
  1597. ESPQUEUE(("\n"));
  1598. append_SC(&esp->issue_SC, SCpnt);
  1599. }
  1600. /* Run it now if we can. */
  1601. if (!esp->current_SC && !esp->resetting_bus)
  1602. esp_exec_cmd(esp);
  1603. return 0;
  1604. }
  1605. /* Dump driver state. */
  1606. static void esp_dump_cmd(struct scsi_cmnd *SCptr)
  1607. {
  1608. ESPLOG(("[tgt<%02x> lun<%02x> "
  1609. "pphase<%s> cphase<%s>]",
  1610. SCptr->device->id, SCptr->device->lun,
  1611. phase_string(SCptr->SCp.sent_command),
  1612. phase_string(SCptr->SCp.phase)));
  1613. }
  1614. static void esp_dump_state(struct esp *esp)
  1615. {
  1616. struct scsi_cmnd *SCptr = esp->current_SC;
  1617. #ifdef DEBUG_ESP_CMDS
  1618. int i;
  1619. #endif
  1620. ESPLOG(("esp%d: dumping state\n", esp->esp_id));
  1621. ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
  1622. esp->esp_id,
  1623. sbus_readl(esp->dregs + DMA_CSR),
  1624. sbus_readl(esp->dregs + DMA_ADDR)));
  1625. ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
  1626. esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
  1627. ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
  1628. esp->esp_id,
  1629. sbus_readb(esp->eregs + ESP_STATUS),
  1630. sbus_readb(esp->eregs + ESP_SSTEP),
  1631. sbus_readb(esp->eregs + ESP_INTRPT)));
  1632. #ifdef DEBUG_ESP_CMDS
  1633. printk("esp%d: last ESP cmds [", esp->esp_id);
  1634. i = (esp->espcmdent - 1) & 31;
  1635. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1636. i = (i - 1) & 31;
  1637. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1638. i = (i - 1) & 31;
  1639. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1640. i = (i - 1) & 31;
  1641. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1642. printk("]\n");
  1643. #endif /* (DEBUG_ESP_CMDS) */
  1644. if (SCptr) {
  1645. ESPLOG(("esp%d: current command ", esp->esp_id));
  1646. esp_dump_cmd(SCptr);
  1647. }
  1648. ESPLOG(("\n"));
  1649. SCptr = esp->disconnected_SC;
  1650. ESPLOG(("esp%d: disconnected ", esp->esp_id));
  1651. while (SCptr) {
  1652. esp_dump_cmd(SCptr);
  1653. SCptr = (struct scsi_cmnd *) SCptr->host_scribble;
  1654. }
  1655. ESPLOG(("\n"));
  1656. }
  1657. /* Abort a command. The host_lock is acquired by caller. */
  1658. static int esp_abort(struct scsi_cmnd *SCptr)
  1659. {
  1660. struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
  1661. int don;
  1662. ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
  1663. esp_dump_state(esp);
  1664. /* Wheee, if this is the current command on the bus, the
  1665. * best we can do is assert ATN and wait for msgout phase.
  1666. * This should even fix a hung SCSI bus when we lose state
  1667. * in the driver and timeout because the eventual phase change
  1668. * will cause the ESP to (eventually) give an interrupt.
  1669. */
  1670. if (esp->current_SC == SCptr) {
  1671. esp->cur_msgout[0] = ABORT;
  1672. esp->msgout_len = 1;
  1673. esp->msgout_ctr = 0;
  1674. esp_cmd(esp, ESP_CMD_SATN);
  1675. return SUCCESS;
  1676. }
  1677. /* If it is still in the issue queue then we can safely
  1678. * call the completion routine and report abort success.
  1679. */
  1680. don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB);
  1681. if (don) {
  1682. ESP_INTSOFF(esp->dregs);
  1683. }
  1684. if (esp->issue_SC) {
  1685. struct scsi_cmnd **prev, *this;
  1686. for (prev = (&esp->issue_SC), this = esp->issue_SC;
  1687. this != NULL;
  1688. prev = (struct scsi_cmnd **) &(this->host_scribble),
  1689. this = (struct scsi_cmnd *) this->host_scribble) {
  1690. if (this == SCptr) {
  1691. *prev = (struct scsi_cmnd *) this->host_scribble;
  1692. this->host_scribble = NULL;
  1693. esp_release_dmabufs(esp, this);
  1694. this->result = DID_ABORT << 16;
  1695. this->scsi_done(this);
  1696. if (don)
  1697. ESP_INTSON(esp->dregs);
  1698. return SUCCESS;
  1699. }
  1700. }
  1701. }
  1702. /* Yuck, the command to abort is disconnected, it is not
  1703. * worth trying to abort it now if something else is live
  1704. * on the bus at this time. So, we let the SCSI code wait
  1705. * a little bit and try again later.
  1706. */
  1707. if (esp->current_SC) {
  1708. if (don)
  1709. ESP_INTSON(esp->dregs);
  1710. return FAILED;
  1711. }
  1712. /* It's disconnected, we have to reconnect to re-establish
  1713. * the nexus and tell the device to abort. However, we really
  1714. * cannot 'reconnect' per se. Don't try to be fancy, just
  1715. * indicate failure, which causes our caller to reset the whole
  1716. * bus.
  1717. */
  1718. if (don)
  1719. ESP_INTSON(esp->dregs);
  1720. return FAILED;
  1721. }
  1722. /* We've sent ESP_CMD_RS to the ESP, the interrupt had just
  1723. * arrived indicating the end of the SCSI bus reset. Our job
  1724. * is to clean out the command queues and begin re-execution
  1725. * of SCSI commands once more.
  1726. */
  1727. static int esp_finish_reset(struct esp *esp)
  1728. {
  1729. struct scsi_cmnd *sp = esp->current_SC;
  1730. /* Clean up currently executing command, if any. */
  1731. if (sp != NULL) {
  1732. esp->current_SC = NULL;
  1733. esp_release_dmabufs(esp, sp);
  1734. sp->result = (DID_RESET << 16);
  1735. sp->scsi_done(sp);
  1736. }
  1737. /* Clean up disconnected queue, they have been invalidated
  1738. * by the bus reset.
  1739. */
  1740. if (esp->disconnected_SC) {
  1741. while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) {
  1742. esp_release_dmabufs(esp, sp);
  1743. sp->result = (DID_RESET << 16);
  1744. sp->scsi_done(sp);
  1745. }
  1746. }
  1747. /* SCSI bus reset is complete. */
  1748. esp->resetting_bus = 0;
  1749. wake_up(&esp->reset_queue);
  1750. /* Ok, now it is safe to get commands going once more. */
  1751. if (esp->issue_SC)
  1752. esp_exec_cmd(esp);
  1753. return do_intr_end;
  1754. }
  1755. static int esp_do_resetbus(struct esp *esp)
  1756. {
  1757. ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
  1758. esp->resetting_bus = 1;
  1759. esp_cmd(esp, ESP_CMD_RS);
  1760. return do_intr_end;
  1761. }
  1762. /* Reset ESP chip, reset hanging bus, then kill active and
  1763. * disconnected commands for targets without soft reset.
  1764. *
  1765. * The host_lock is acquired by caller.
  1766. */
  1767. static int esp_reset(struct scsi_cmnd *SCptr)
  1768. {
  1769. struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
  1770. spin_lock_irq(esp->ehost->host_lock);
  1771. (void) esp_do_resetbus(esp);
  1772. spin_unlock_irq(esp->ehost->host_lock);
  1773. wait_event(esp->reset_queue, (esp->resetting_bus == 0));
  1774. return SUCCESS;
  1775. }
  1776. /* Internal ESP done function. */
  1777. static void esp_done(struct esp *esp, int error)
  1778. {
  1779. struct scsi_cmnd *done_SC = esp->current_SC;
  1780. esp->current_SC = NULL;
  1781. esp_release_dmabufs(esp, done_SC);
  1782. done_SC->result = error;
  1783. done_SC->scsi_done(done_SC);
  1784. /* Bus is free, issue any commands in the queue. */
  1785. if (esp->issue_SC && !esp->current_SC)
  1786. esp_exec_cmd(esp);
  1787. }
  1788. /* Wheee, ESP interrupt engine. */
  1789. /* Forward declarations. */
  1790. static int esp_do_phase_determine(struct esp *esp);
  1791. static int esp_do_data_finale(struct esp *esp);
  1792. static int esp_select_complete(struct esp *esp);
  1793. static int esp_do_status(struct esp *esp);
  1794. static int esp_do_msgin(struct esp *esp);
  1795. static int esp_do_msgindone(struct esp *esp);
  1796. static int esp_do_msgout(struct esp *esp);
  1797. static int esp_do_cmdbegin(struct esp *esp);
  1798. #define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
  1799. #define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
  1800. /* Read any bytes found in the FAS366 fifo, storing them into
  1801. * the ESP driver software state structure.
  1802. */
  1803. static void hme_fifo_read(struct esp *esp)
  1804. {
  1805. u8 count = 0;
  1806. u8 status = esp->sreg;
  1807. /* Cannot safely frob the fifo for these following cases, but
  1808. * we must always read the fifo when the reselect interrupt
  1809. * is pending.
  1810. */
  1811. if (((esp->ireg & ESP_INTR_RSEL) == 0) &&
  1812. (sreg_datainp(status) ||
  1813. sreg_dataoutp(status) ||
  1814. (esp->current_SC &&
  1815. esp->current_SC->SCp.phase == in_data_done))) {
  1816. ESPHME(("<wkaround_skipped>"));
  1817. } else {
  1818. unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES;
  1819. /* The HME stores bytes in multiples of 2 in the fifo. */
  1820. ESPHME(("hme_fifo[fcnt=%d", (int)fcnt));
  1821. while (fcnt) {
  1822. esp->hme_fifo_workaround_buffer[count++] =
  1823. sbus_readb(esp->eregs + ESP_FDATA);
  1824. esp->hme_fifo_workaround_buffer[count++] =
  1825. sbus_readb(esp->eregs + ESP_FDATA);
  1826. ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1]));
  1827. fcnt--;
  1828. }
  1829. if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) {
  1830. ESPHME(("<poke_byte>"));
  1831. sbus_writeb(0, esp->eregs + ESP_FDATA);
  1832. esp->hme_fifo_workaround_buffer[count++] =
  1833. sbus_readb(esp->eregs + ESP_FDATA);
  1834. ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1]));
  1835. ESPHME(("CMD_FLUSH"));
  1836. esp_cmd(esp, ESP_CMD_FLUSH);
  1837. } else {
  1838. ESPHME(("no_xtra_byte"));
  1839. }
  1840. }
  1841. ESPHME(("wkarnd_cnt=%d]", (int)count));
  1842. esp->hme_fifo_workaround_count = count;
  1843. }
  1844. static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count)
  1845. {
  1846. esp_cmd(esp, ESP_CMD_FLUSH);
  1847. while (count) {
  1848. u8 tmp = *bytes++;
  1849. sbus_writeb(tmp, esp->eregs + ESP_FDATA);
  1850. sbus_writeb(0, esp->eregs + ESP_FDATA);
  1851. count--;
  1852. }
  1853. }
  1854. /* We try to avoid some interrupts by jumping ahead and see if the ESP
  1855. * has gotten far enough yet. Hence the following.
  1856. */
  1857. static inline int skipahead1(struct esp *esp, struct scsi_cmnd *scp,
  1858. int prev_phase, int new_phase)
  1859. {
  1860. if (scp->SCp.sent_command != prev_phase)
  1861. return 0;
  1862. if (ESP_IRQ_P(esp->dregs)) {
  1863. /* Yes, we are able to save an interrupt. */
  1864. if (esp->erev == fashme)
  1865. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  1866. esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
  1867. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  1868. if (esp->erev == fashme) {
  1869. /* This chip is really losing. */
  1870. ESPHME(("HME["));
  1871. /* Must latch fifo before reading the interrupt
  1872. * register else garbage ends up in the FIFO
  1873. * which confuses the driver utterly.
  1874. * Happy Meal indeed....
  1875. */
  1876. ESPHME(("fifo_workaround]"));
  1877. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1878. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1879. hme_fifo_read(esp);
  1880. }
  1881. if (!(esp->ireg & ESP_INTR_SR))
  1882. return 0;
  1883. else
  1884. return do_reset_complete;
  1885. }
  1886. /* Ho hum, target is taking forever... */
  1887. scp->SCp.sent_command = new_phase; /* so we don't recurse... */
  1888. return do_intr_end;
  1889. }
  1890. static inline int skipahead2(struct esp *esp, struct scsi_cmnd *scp,
  1891. int prev_phase1, int prev_phase2, int new_phase)
  1892. {
  1893. if (scp->SCp.sent_command != prev_phase1 &&
  1894. scp->SCp.sent_command != prev_phase2)
  1895. return 0;
  1896. if (ESP_IRQ_P(esp->dregs)) {
  1897. /* Yes, we are able to save an interrupt. */
  1898. if (esp->erev == fashme)
  1899. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  1900. esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
  1901. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  1902. if (esp->erev == fashme) {
  1903. /* This chip is really losing. */
  1904. ESPHME(("HME["));
  1905. /* Must latch fifo before reading the interrupt
  1906. * register else garbage ends up in the FIFO
  1907. * which confuses the driver utterly.
  1908. * Happy Meal indeed....
  1909. */
  1910. ESPHME(("fifo_workaround]"));
  1911. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1912. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1913. hme_fifo_read(esp);
  1914. }
  1915. if (!(esp->ireg & ESP_INTR_SR))
  1916. return 0;
  1917. else
  1918. return do_reset_complete;
  1919. }
  1920. /* Ho hum, target is taking forever... */
  1921. scp->SCp.sent_command = new_phase; /* so we don't recurse... */
  1922. return do_intr_end;
  1923. }
  1924. /* Now some dma helpers. */
  1925. static void dma_setup(struct esp *esp, __u32 addr, int count, int write)
  1926. {
  1927. u32 nreg = sbus_readl(esp->dregs + DMA_CSR);
  1928. if (write)
  1929. nreg |= DMA_ST_WRITE;
  1930. else
  1931. nreg &= ~(DMA_ST_WRITE);
  1932. nreg |= DMA_ENABLE;
  1933. sbus_writel(nreg, esp->dregs + DMA_CSR);
  1934. if (esp->dma->revision == dvmaesc1) {
  1935. /* This ESC gate array sucks! */
  1936. __u32 src = addr;
  1937. __u32 dest = src + count;
  1938. if (dest & (PAGE_SIZE - 1))
  1939. count = PAGE_ALIGN(count);
  1940. sbus_writel(count, esp->dregs + DMA_COUNT);
  1941. }
  1942. sbus_writel(addr, esp->dregs + DMA_ADDR);
  1943. }
  1944. static void dma_drain(struct esp *esp)
  1945. {
  1946. u32 tmp;
  1947. if (esp->dma->revision == dvmahme)
  1948. return;
  1949. if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) {
  1950. switch (esp->dma->revision) {
  1951. default:
  1952. tmp |= DMA_FIFO_STDRAIN;
  1953. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1954. case dvmarev3:
  1955. case dvmaesc1:
  1956. while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  1957. udelay(1);
  1958. };
  1959. }
  1960. }
  1961. static void dma_invalidate(struct esp *esp)
  1962. {
  1963. u32 tmp;
  1964. if (esp->dma->revision == dvmahme) {
  1965. sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
  1966. esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
  1967. (DMA_PARITY_OFF | DMA_2CLKS |
  1968. DMA_SCSI_DISAB | DMA_INT_ENAB)) &
  1969. ~(DMA_ST_WRITE | DMA_ENABLE));
  1970. sbus_writel(0, esp->dregs + DMA_CSR);
  1971. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  1972. /* This is necessary to avoid having the SCSI channel
  1973. * engine lock up on us.
  1974. */
  1975. sbus_writel(0, esp->dregs + DMA_ADDR);
  1976. } else {
  1977. while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
  1978. udelay(1);
  1979. tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
  1980. tmp |= DMA_FIFO_INV;
  1981. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1982. tmp &= ~DMA_FIFO_INV;
  1983. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1984. }
  1985. }
  1986. static inline void dma_flashclear(struct esp *esp)
  1987. {
  1988. dma_drain(esp);
  1989. dma_invalidate(esp);
  1990. }
  1991. static int dma_can_transfer(struct esp *esp, struct scsi_cmnd *sp)
  1992. {
  1993. __u32 base, end, sz;
  1994. if (esp->dma->revision == dvmarev3) {
  1995. sz = sp->SCp.this_residual;
  1996. if (sz > 0x1000000)
  1997. sz = 0x1000000;
  1998. } else {
  1999. base = ((__u32)((unsigned long)sp->SCp.ptr));
  2000. base &= (0x1000000 - 1);
  2001. end = (base + sp->SCp.this_residual);
  2002. if (end > 0x1000000)
  2003. end = 0x1000000;
  2004. sz = (end - base);
  2005. }
  2006. return sz;
  2007. }
  2008. /* Misc. esp helper macros. */
  2009. #define esp_setcount(__eregs, __cnt, __hme) \
  2010. sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \
  2011. sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \
  2012. if (__hme) { \
  2013. sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \
  2014. sbus_writeb(0, (__eregs) + FAS_RHI); \
  2015. }
  2016. #define esp_getcount(__eregs, __hme) \
  2017. ((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \
  2018. ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \
  2019. ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0))
  2020. #define fcount(__esp) \
  2021. (((__esp)->erev == fashme) ? \
  2022. (__esp)->hme_fifo_workaround_count : \
  2023. sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES)
  2024. #define fnzero(__esp) \
  2025. (((__esp)->erev == fashme) ? 0 : \
  2026. sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO)
  2027. /* XXX speculative nops unnecessary when continuing amidst a data phase
  2028. * XXX even on esp100!!! another case of flooding the bus with I/O reg
  2029. * XXX writes...
  2030. */
  2031. #define esp_maybe_nop(__esp) \
  2032. if ((__esp)->erev == esp100) \
  2033. esp_cmd((__esp), ESP_CMD_NULL)
  2034. #define sreg_to_dataphase(__sreg) \
  2035. ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
  2036. /* The ESP100 when in synchronous data phase, can mistake a long final
  2037. * REQ pulse from the target as an extra byte, it places whatever is on
  2038. * the data lines into the fifo. For now, we will assume when this
  2039. * happens that the target is a bit quirky and we don't want to
  2040. * be talking synchronously to it anyways. Regardless, we need to
  2041. * tell the ESP to eat the extraneous byte so that we can proceed
  2042. * to the next phase.
  2043. */
  2044. static int esp100_sync_hwbug(struct esp *esp, struct scsi_cmnd *sp, int fifocnt)
  2045. {
  2046. /* Do not touch this piece of code. */
  2047. if ((!(esp->erev == esp100)) ||
  2048. (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) &&
  2049. !fifocnt) &&
  2050. !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) {
  2051. if (sp->SCp.phase == in_dataout)
  2052. esp_cmd(esp, ESP_CMD_FLUSH);
  2053. return 0;
  2054. } else {
  2055. /* Async mode for this guy. */
  2056. build_sync_nego_msg(esp, 0, 0);
  2057. /* Ack the bogus byte, but set ATN first. */
  2058. esp_cmd(esp, ESP_CMD_SATN);
  2059. esp_cmd(esp, ESP_CMD_MOK);
  2060. return 1;
  2061. }
  2062. }
  2063. /* This closes the window during a selection with a reselect pending, because
  2064. * we use DMA for the selection process the FIFO should hold the correct
  2065. * contents if we get reselected during this process. So we just need to
  2066. * ack the possible illegal cmd interrupt pending on the esp100.
  2067. */
  2068. static inline int esp100_reconnect_hwbug(struct esp *esp)
  2069. {
  2070. u8 tmp;
  2071. if (esp->erev != esp100)
  2072. return 0;
  2073. tmp = sbus_readb(esp->eregs + ESP_INTRPT);
  2074. if (tmp & ESP_INTR_SR)
  2075. return 1;
  2076. return 0;
  2077. }
  2078. /* This verifies the BUSID bits during a reselection so that we know which
  2079. * target is talking to us.
  2080. */
  2081. static inline int reconnect_target(struct esp *esp)
  2082. {
  2083. int it, me = esp->scsi_id_mask, targ = 0;
  2084. if (2 != fcount(esp))
  2085. return -1;
  2086. if (esp->erev == fashme) {
  2087. /* HME does not latch it's own BUS ID bits during
  2088. * a reselection. Also the target number is given
  2089. * as an unsigned char, not as a sole bit number
  2090. * like the other ESP's do.
  2091. * Happy Meal indeed....
  2092. */
  2093. targ = esp->hme_fifo_workaround_buffer[0];
  2094. } else {
  2095. it = sbus_readb(esp->eregs + ESP_FDATA);
  2096. if (!(it & me))
  2097. return -1;
  2098. it &= ~me;
  2099. if (it & (it - 1))
  2100. return -1;
  2101. while (!(it & 1))
  2102. targ++, it >>= 1;
  2103. }
  2104. return targ;
  2105. }
  2106. /* This verifies the identify from the target so that we know which lun is
  2107. * being reconnected.
  2108. */
  2109. static inline int reconnect_lun(struct esp *esp)
  2110. {
  2111. int lun;
  2112. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
  2113. return -1;
  2114. if (esp->erev == fashme)
  2115. lun = esp->hme_fifo_workaround_buffer[1];
  2116. else
  2117. lun = sbus_readb(esp->eregs + ESP_FDATA);
  2118. /* Yes, you read this correctly. We report lun of zero
  2119. * if we see parity error. ESP reports parity error for
  2120. * the lun byte, and this is the only way to hope to recover
  2121. * because the target is connected.
  2122. */
  2123. if (esp->sreg & ESP_STAT_PERR)
  2124. return 0;
  2125. /* Check for illegal bits being set in the lun. */
  2126. if ((lun & 0x40) || !(lun & 0x80))
  2127. return -1;
  2128. return lun & 7;
  2129. }
  2130. /* This puts the driver in a state where it can revitalize a command that
  2131. * is being continued due to reselection.
  2132. */
  2133. static inline void esp_connect(struct esp *esp, struct scsi_cmnd *sp)
  2134. {
  2135. struct esp_device *esp_dev = sp->device->hostdata;
  2136. if (esp->prev_soff != esp_dev->sync_max_offset ||
  2137. esp->prev_stp != esp_dev->sync_min_period ||
  2138. (esp->erev > esp100a &&
  2139. esp->prev_cfg3 != esp->config3[sp->device->id])) {
  2140. esp->prev_soff = esp_dev->sync_max_offset;
  2141. esp->prev_stp = esp_dev->sync_min_period;
  2142. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  2143. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  2144. if (esp->erev > esp100a) {
  2145. esp->prev_cfg3 = esp->config3[sp->device->id];
  2146. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  2147. }
  2148. }
  2149. esp->current_SC = sp;
  2150. }
  2151. /* This will place the current working command back into the issue queue
  2152. * if we are to receive a reselection amidst a selection attempt.
  2153. */
  2154. static inline void esp_reconnect(struct esp *esp, struct scsi_cmnd *sp)
  2155. {
  2156. if (!esp->disconnected_SC)
  2157. ESPLOG(("esp%d: Weird, being reselected but disconnected "
  2158. "command queue is empty.\n", esp->esp_id));
  2159. esp->snip = 0;
  2160. esp->current_SC = NULL;
  2161. sp->SCp.phase = not_issued;
  2162. append_SC(&esp->issue_SC, sp);
  2163. }
  2164. /* Begin message in phase. */
  2165. static int esp_do_msgin(struct esp *esp)
  2166. {
  2167. /* Must be very careful with the fifo on the HME */
  2168. if ((esp->erev != fashme) ||
  2169. !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY))
  2170. esp_cmd(esp, ESP_CMD_FLUSH);
  2171. esp_maybe_nop(esp);
  2172. esp_cmd(esp, ESP_CMD_TI);
  2173. esp->msgin_len = 1;
  2174. esp->msgin_ctr = 0;
  2175. esp_advance_phase(esp->current_SC, in_msgindone);
  2176. return do_work_bus;
  2177. }
  2178. /* This uses various DMA csr fields and the fifo flags count value to
  2179. * determine how many bytes were successfully sent/received by the ESP.
  2180. */
  2181. static inline int esp_bytes_sent(struct esp *esp, int fifo_count)
  2182. {
  2183. int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma;
  2184. if (esp->dma->revision == dvmarev1)
  2185. rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11));
  2186. return rval - fifo_count;
  2187. }
  2188. static inline void advance_sg(struct scsi_cmnd *sp)
  2189. {
  2190. ++sp->SCp.buffer;
  2191. --sp->SCp.buffers_residual;
  2192. sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
  2193. sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer));
  2194. }
  2195. /* Please note that the way I've coded these routines is that I _always_
  2196. * check for a disconnect during any and all information transfer
  2197. * phases. The SCSI standard states that the target _can_ cause a BUS
  2198. * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note
  2199. * that during information transfer phases the target controls every
  2200. * change in phase, the only thing the initiator can do is "ask" for
  2201. * a message out phase by driving ATN true. The target can, and sometimes
  2202. * will, completely ignore this request so we cannot assume anything when
  2203. * we try to force a message out phase to abort/reset a target. Most of
  2204. * the time the target will eventually be nice and go to message out, so
  2205. * we may have to hold on to our state about what we want to tell the target
  2206. * for some period of time.
  2207. */
  2208. /* I think I have things working here correctly. Even partial transfers
  2209. * within a buffer or sub-buffer should not upset us at all no matter
  2210. * how bad the target and/or ESP fucks things up.
  2211. */
  2212. static int esp_do_data(struct esp *esp)
  2213. {
  2214. struct scsi_cmnd *SCptr = esp->current_SC;
  2215. int thisphase, hmuch;
  2216. ESPDATA(("esp_do_data: "));
  2217. esp_maybe_nop(esp);
  2218. thisphase = sreg_to_dataphase(esp->sreg);
  2219. esp_advance_phase(SCptr, thisphase);
  2220. ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
  2221. hmuch = dma_can_transfer(esp, SCptr);
  2222. if (hmuch > (64 * 1024) && (esp->erev != fashme))
  2223. hmuch = (64 * 1024);
  2224. ESPDATA(("hmuch<%d> ", hmuch));
  2225. esp->current_transfer_size = hmuch;
  2226. if (esp->erev == fashme) {
  2227. u32 tmp = esp->prev_hme_dmacsr;
  2228. /* Always set the ESP count registers first. */
  2229. esp_setcount(esp->eregs, hmuch, 1);
  2230. /* Get the DMA csr computed. */
  2231. tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
  2232. if (thisphase == in_datain)
  2233. tmp |= DMA_ST_WRITE;
  2234. else
  2235. tmp &= ~(DMA_ST_WRITE);
  2236. esp->prev_hme_dmacsr = tmp;
  2237. ESPDATA(("DMA|TI --> do_intr_end\n"));
  2238. if (thisphase == in_datain) {
  2239. sbus_writel(hmuch, esp->dregs + DMA_COUNT);
  2240. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2241. } else {
  2242. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2243. sbus_writel(hmuch, esp->dregs + DMA_COUNT);
  2244. }
  2245. sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR);
  2246. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  2247. } else {
  2248. esp_setcount(esp->eregs, hmuch, 0);
  2249. dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)),
  2250. hmuch, (thisphase == in_datain));
  2251. ESPDATA(("DMA|TI --> do_intr_end\n"));
  2252. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2253. }
  2254. return do_intr_end;
  2255. }
  2256. /* See how successful the data transfer was. */
  2257. static int esp_do_data_finale(struct esp *esp)
  2258. {
  2259. struct scsi_cmnd *SCptr = esp->current_SC;
  2260. struct esp_device *esp_dev = SCptr->device->hostdata;
  2261. int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;
  2262. ESPDATA(("esp_do_data_finale: "));
  2263. if (SCptr->SCp.phase == in_datain) {
  2264. if (esp->sreg & ESP_STAT_PERR) {
  2265. /* Yuck, parity error. The ESP asserts ATN
  2266. * so that we can go to message out phase
  2267. * immediately and inform the target that
  2268. * something bad happened.
  2269. */
  2270. ESPLOG(("esp%d: data bad parity detected.\n",
  2271. esp->esp_id));
  2272. esp->cur_msgout[0] = INITIATOR_ERROR;
  2273. esp->msgout_len = 1;
  2274. }
  2275. dma_drain(esp);
  2276. }
  2277. dma_invalidate(esp);
  2278. /* This could happen for the above parity error case. */
  2279. if (esp->ireg != ESP_INTR_BSERV) {
  2280. /* Please go to msgout phase, please please please... */
  2281. ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
  2282. esp->esp_id));
  2283. return esp_do_phase_determine(esp);
  2284. }
  2285. /* Check for partial transfers and other horrible events.
  2286. * Note, here we read the real fifo flags register even
  2287. * on HME broken adapters because we skip the HME fifo
  2288. * workaround code in esp_handle() if we are doing data
  2289. * phase things. We don't want to fuck directly with
  2290. * the fifo like that, especially if doing synchronous
  2291. * transfers! Also, will need to double the count on
  2292. * HME if we are doing wide transfers, as the HME fifo
  2293. * will move and count 16-bit quantities during wide data.
  2294. * SMCC _and_ Qlogic can both bite me.
  2295. */
  2296. fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
  2297. if (esp->erev != fashme)
  2298. ecount = esp_getcount(esp->eregs, 0);
  2299. bytes_sent = esp->current_transfer_size;
  2300. ESPDATA(("trans_sz(%d), ", bytes_sent));
  2301. if (esp->erev == fashme) {
  2302. if (!(esp->sreg & ESP_STAT_TCNT)) {
  2303. ecount = esp_getcount(esp->eregs, 1);
  2304. bytes_sent -= ecount;
  2305. }
  2306. /* Always subtract any cruft remaining in the FIFO. */
  2307. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  2308. fifocnt <<= 1;
  2309. if (SCptr->SCp.phase == in_dataout)
  2310. bytes_sent -= fifocnt;
  2311. /* I have an IBM disk which exhibits the following
  2312. * behavior during writes to it. It disconnects in
  2313. * the middle of a partial transfer, the current sglist
  2314. * buffer is 1024 bytes, the disk stops data transfer
  2315. * at 512 bytes.
  2316. *
  2317. * However the FAS366 reports that 32 more bytes were
  2318. * transferred than really were. This is precisely
  2319. * the size of a fully loaded FIFO in wide scsi mode.
  2320. * The FIFO state recorded indicates that it is empty.
  2321. *
  2322. * I have no idea if this is a bug in the FAS366 chip
  2323. * or a bug in the firmware on this IBM disk. In any
  2324. * event the following seems to be a good workaround. -DaveM
  2325. */
  2326. if (bytes_sent != esp->current_transfer_size &&
  2327. SCptr->SCp.phase == in_dataout) {
  2328. int mask = (64 - 1);
  2329. if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0)
  2330. mask >>= 1;
  2331. if (bytes_sent & mask)
  2332. bytes_sent -= (bytes_sent & mask);
  2333. }
  2334. } else {
  2335. if (!(esp->sreg & ESP_STAT_TCNT))
  2336. bytes_sent -= ecount;
  2337. if (SCptr->SCp.phase == in_dataout)
  2338. bytes_sent -= fifocnt;
  2339. }
  2340. ESPDATA(("bytes_sent(%d), ", bytes_sent));
  2341. /* If we were in synchronous mode, check for peculiarities. */
  2342. if (esp->erev == fashme) {
  2343. if (esp_dev->sync_max_offset) {
  2344. if (SCptr->SCp.phase == in_dataout)
  2345. esp_cmd(esp, ESP_CMD_FLUSH);
  2346. } else {
  2347. esp_cmd(esp, ESP_CMD_FLUSH);
  2348. }
  2349. } else {
  2350. if (esp_dev->sync_max_offset)
  2351. bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt);
  2352. else
  2353. esp_cmd(esp, ESP_CMD_FLUSH);
  2354. }
  2355. /* Until we are sure of what has happened, we are certainly
  2356. * in the dark.
  2357. */
  2358. esp_advance_phase(SCptr, in_the_dark);
  2359. if (bytes_sent < 0) {
  2360. /* I've seen this happen due to lost state in this
  2361. * driver. No idea why it happened, but allowing
  2362. * this value to be negative caused things to
  2363. * lock up. This allows greater chance of recovery.
  2364. * In fact every time I've seen this, it has been
  2365. * a driver bug without question.
  2366. */
  2367. ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
  2368. ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
  2369. esp->esp_id,
  2370. esp->current_transfer_size, fifocnt, ecount));
  2371. ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
  2372. esp->esp_id,
  2373. SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
  2374. ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id,
  2375. SCptr->device->id));
  2376. SCptr->device->borken = 1;
  2377. esp_dev->sync = 0;
  2378. bytes_sent = 0;
  2379. }
  2380. /* Update the state of our transfer. */
  2381. SCptr->SCp.ptr += bytes_sent;
  2382. SCptr->SCp.this_residual -= bytes_sent;
  2383. if (SCptr->SCp.this_residual < 0) {
  2384. /* shit */
  2385. ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id));
  2386. SCptr->SCp.this_residual = 0;
  2387. }
  2388. /* Maybe continue. */
  2389. if (!bogus_data) {
  2390. ESPDATA(("!bogus_data, "));
  2391. /* NO MATTER WHAT, we advance the scatterlist,
  2392. * if the target should decide to disconnect
  2393. * in between scatter chunks (which is common)
  2394. * we could die horribly! I used to have the sg
  2395. * advance occur only if we are going back into
  2396. * (or are staying in) a data phase, you can
  2397. * imagine the hell I went through trying to
  2398. * figure this out.
  2399. */
  2400. if (SCptr->use_sg && !SCptr->SCp.this_residual)
  2401. advance_sg(SCptr);
  2402. if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
  2403. ESPDATA(("to more data\n"));
  2404. return esp_do_data(esp);
  2405. }
  2406. ESPDATA(("to new phase\n"));
  2407. return esp_do_phase_determine(esp);
  2408. }
  2409. /* Bogus data, just wait for next interrupt. */
  2410. ESPLOG(("esp%d: bogus_data during end of data phase\n",
  2411. esp->esp_id));
  2412. return do_intr_end;
  2413. }
  2414. /* We received a non-good status return at the end of
  2415. * running a SCSI command. This is used to decide if
  2416. * we should clear our synchronous transfer state for
  2417. * such a device when that happens.
  2418. *
  2419. * The idea is that when spinning up a disk or rewinding
  2420. * a tape, we don't want to go into a loop re-negotiating
  2421. * synchronous capabilities over and over.
  2422. */
  2423. static int esp_should_clear_sync(struct scsi_cmnd *sp)
  2424. {
  2425. u8 cmd = sp->cmnd[0];
  2426. /* These cases are for spinning up a disk and
  2427. * waiting for that spinup to complete.
  2428. */
  2429. if (cmd == START_STOP)
  2430. return 0;
  2431. if (cmd == TEST_UNIT_READY)
  2432. return 0;
  2433. /* One more special case for SCSI tape drives,
  2434. * this is what is used to probe the device for
  2435. * completion of a rewind or tape load operation.
  2436. */
  2437. if (sp->device->type == TYPE_TAPE) {
  2438. if (cmd == MODE_SENSE)
  2439. return 0;
  2440. }
  2441. return 1;
  2442. }
  2443. /* Either a command is completing or a target is dropping off the bus
  2444. * to continue the command in the background so we can do other work.
  2445. */
  2446. static int esp_do_freebus(struct esp *esp)
  2447. {
  2448. struct scsi_cmnd *SCptr = esp->current_SC;
  2449. struct esp_device *esp_dev = SCptr->device->hostdata;
  2450. int rval;
  2451. rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing);
  2452. if (rval)
  2453. return rval;
  2454. if (esp->ireg != ESP_INTR_DC) {
  2455. ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
  2456. return do_reset_bus; /* target will not drop BSY... */
  2457. }
  2458. esp->msgout_len = 0;
  2459. esp->prevmsgout = NOP;
  2460. if (esp->prevmsgin == COMMAND_COMPLETE) {
  2461. /* Normal end of nexus. */
  2462. if (esp->disconnected_SC || (esp->erev == fashme))
  2463. esp_cmd(esp, ESP_CMD_ESEL);
  2464. if (SCptr->SCp.Status != GOOD &&
  2465. SCptr->SCp.Status != CONDITION_GOOD &&
  2466. ((1<<SCptr->device->id) & esp->targets_present) &&
  2467. esp_dev->sync &&
  2468. esp_dev->sync_max_offset) {
  2469. /* SCSI standard says that the synchronous capabilities
  2470. * should be renegotiated at this point. Most likely
  2471. * we are about to request sense from this target
  2472. * in which case we want to avoid using sync
  2473. * transfers until we are sure of the current target
  2474. * state.
  2475. */
  2476. ESPMISC(("esp: Status <%d> for target %d lun %d\n",
  2477. SCptr->SCp.Status, SCptr->device->id, SCptr->device->lun));
  2478. /* But don't do this when spinning up a disk at
  2479. * boot time while we poll for completion as it
  2480. * fills up the console with messages. Also, tapes
  2481. * can report not ready many times right after
  2482. * loading up a tape.
  2483. */
  2484. if (esp_should_clear_sync(SCptr) != 0)
  2485. esp_dev->sync = 0;
  2486. }
  2487. ESPDISC(("F<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
  2488. esp_done(esp, ((SCptr->SCp.Status & 0xff) |
  2489. ((SCptr->SCp.Message & 0xff)<<8) |
  2490. (DID_OK << 16)));
  2491. } else if (esp->prevmsgin == DISCONNECT) {
  2492. /* Normal disconnect. */
  2493. esp_cmd(esp, ESP_CMD_ESEL);
  2494. ESPDISC(("D<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
  2495. append_SC(&esp->disconnected_SC, SCptr);
  2496. esp->current_SC = NULL;
  2497. if (esp->issue_SC)
  2498. esp_exec_cmd(esp);
  2499. } else {
  2500. /* Driver bug, we do not expect a disconnect here
  2501. * and should not have advanced the state engine
  2502. * to in_freeing.
  2503. */
  2504. ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
  2505. esp->esp_id));
  2506. return do_reset_bus;
  2507. }
  2508. return do_intr_end;
  2509. }
  2510. /* When a reselect occurs, and we cannot find the command to
  2511. * reconnect to in our queues, we do this.
  2512. */
  2513. static int esp_bad_reconnect(struct esp *esp)
  2514. {
  2515. struct scsi_cmnd *sp;
  2516. ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
  2517. esp->esp_id));
  2518. ESPLOG(("QUEUE DUMP\n"));
  2519. sp = esp->issue_SC;
  2520. ESPLOG(("esp%d: issue_SC[", esp->esp_id));
  2521. while (sp) {
  2522. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2523. sp = (struct scsi_cmnd *) sp->host_scribble;
  2524. }
  2525. ESPLOG(("]\n"));
  2526. sp = esp->current_SC;
  2527. ESPLOG(("esp%d: current_SC[", esp->esp_id));
  2528. if (sp)
  2529. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2530. else
  2531. ESPLOG(("<NULL>"));
  2532. ESPLOG(("]\n"));
  2533. sp = esp->disconnected_SC;
  2534. ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
  2535. while (sp) {
  2536. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2537. sp = (struct scsi_cmnd *) sp->host_scribble;
  2538. }
  2539. ESPLOG(("]\n"));
  2540. return do_reset_bus;
  2541. }
  2542. /* Do the needy when a target tries to reconnect to us. */
  2543. static int esp_do_reconnect(struct esp *esp)
  2544. {
  2545. int lun, target;
  2546. struct scsi_cmnd *SCptr;
  2547. /* Check for all bogus conditions first. */
  2548. target = reconnect_target(esp);
  2549. if (target < 0) {
  2550. ESPDISC(("bad bus bits\n"));
  2551. return do_reset_bus;
  2552. }
  2553. lun = reconnect_lun(esp);
  2554. if (lun < 0) {
  2555. ESPDISC(("target=%2x, bad identify msg\n", target));
  2556. return do_reset_bus;
  2557. }
  2558. /* Things look ok... */
  2559. ESPDISC(("R<%02x,%02x>", target, lun));
  2560. /* Must not flush FIFO or DVMA on HME. */
  2561. if (esp->erev != fashme) {
  2562. esp_cmd(esp, ESP_CMD_FLUSH);
  2563. if (esp100_reconnect_hwbug(esp))
  2564. return do_reset_bus;
  2565. esp_cmd(esp, ESP_CMD_NULL);
  2566. }
  2567. SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun);
  2568. if (!SCptr)
  2569. return esp_bad_reconnect(esp);
  2570. esp_connect(esp, SCptr);
  2571. esp_cmd(esp, ESP_CMD_MOK);
  2572. if (esp->erev == fashme)
  2573. sbus_writeb(((SCptr->device->id & 0xf) |
  2574. (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)),
  2575. esp->eregs + ESP_BUSID);
  2576. /* Reconnect implies a restore pointers operation. */
  2577. esp_restore_pointers(esp, SCptr);
  2578. esp->snip = 0;
  2579. esp_advance_phase(SCptr, in_the_dark);
  2580. return do_intr_end;
  2581. }
  2582. /* End of NEXUS (hopefully), pick up status + message byte then leave if
  2583. * all goes well.
  2584. */
  2585. static int esp_do_status(struct esp *esp)
  2586. {
  2587. struct scsi_cmnd *SCptr = esp->current_SC;
  2588. int intr, rval;
  2589. rval = skipahead1(esp, SCptr, in_the_dark, in_status);
  2590. if (rval)
  2591. return rval;
  2592. intr = esp->ireg;
  2593. ESPSTAT(("esp_do_status: "));
  2594. if (intr != ESP_INTR_DC) {
  2595. int message_out = 0; /* for parity problems */
  2596. /* Ack the message. */
  2597. ESPSTAT(("ack msg, "));
  2598. esp_cmd(esp, ESP_CMD_MOK);
  2599. if (esp->erev != fashme) {
  2600. dma_flashclear(esp);
  2601. /* Wait till the first bits settle. */
  2602. while (esp->esp_command[0] == 0xff)
  2603. udelay(1);
  2604. } else {
  2605. esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0];
  2606. esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1];
  2607. }
  2608. ESPSTAT(("got something, "));
  2609. /* ESP chimes in with one of
  2610. *
  2611. * 1) function done interrupt:
  2612. * both status and message in bytes
  2613. * are available
  2614. *
  2615. * 2) bus service interrupt:
  2616. * only status byte was acquired
  2617. *
  2618. * 3) Anything else:
  2619. * can't happen, but we test for it
  2620. * anyways
  2621. *
  2622. * ALSO: If bad parity was detected on either
  2623. * the status _or_ the message byte then
  2624. * the ESP has asserted ATN on the bus
  2625. * and we must therefore wait for the
  2626. * next phase change.
  2627. */
  2628. if (intr & ESP_INTR_FDONE) {
  2629. /* We got it all, hallejulia. */
  2630. ESPSTAT(("got both, "));
  2631. SCptr->SCp.Status = esp->esp_command[0];
  2632. SCptr->SCp.Message = esp->esp_command[1];
  2633. esp->prevmsgin = SCptr->SCp.Message;
  2634. esp->cur_msgin[0] = SCptr->SCp.Message;
  2635. if (esp->sreg & ESP_STAT_PERR) {
  2636. /* There was bad parity for the
  2637. * message byte, the status byte
  2638. * was ok.
  2639. */
  2640. message_out = MSG_PARITY_ERROR;
  2641. }
  2642. } else if (intr == ESP_INTR_BSERV) {
  2643. /* Only got status byte. */
  2644. ESPLOG(("esp%d: got status only, ", esp->esp_id));
  2645. if (!(esp->sreg & ESP_STAT_PERR)) {
  2646. SCptr->SCp.Status = esp->esp_command[0];
  2647. SCptr->SCp.Message = 0xff;
  2648. } else {
  2649. /* The status byte had bad parity.
  2650. * we leave the scsi_pointer Status
  2651. * field alone as we set it to a default
  2652. * of CHECK_CONDITION in esp_queue.
  2653. */
  2654. message_out = INITIATOR_ERROR;
  2655. }
  2656. } else {
  2657. /* This shouldn't happen ever. */
  2658. ESPSTAT(("got bolixed\n"));
  2659. esp_advance_phase(SCptr, in_the_dark);
  2660. return esp_do_phase_determine(esp);
  2661. }
  2662. if (!message_out) {
  2663. ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
  2664. SCptr->SCp.Message));
  2665. if (SCptr->SCp.Message == COMMAND_COMPLETE) {
  2666. ESPSTAT(("and was COMMAND_COMPLETE\n"));
  2667. esp_advance_phase(SCptr, in_freeing);
  2668. return esp_do_freebus(esp);
  2669. } else {
  2670. ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
  2671. esp->esp_id));
  2672. esp->msgin_len = esp->msgin_ctr = 1;
  2673. esp_advance_phase(SCptr, in_msgindone);
  2674. return esp_do_msgindone(esp);
  2675. }
  2676. } else {
  2677. /* With luck we'll be able to let the target
  2678. * know that bad parity happened, it will know
  2679. * which byte caused the problems and send it
  2680. * again. For the case where the status byte
  2681. * receives bad parity, I do not believe most
  2682. * targets recover very well. We'll see.
  2683. */
  2684. ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
  2685. esp->esp_id, message_out));
  2686. esp->cur_msgout[0] = message_out;
  2687. esp->msgout_len = esp->msgout_ctr = 1;
  2688. esp_advance_phase(SCptr, in_the_dark);
  2689. return esp_do_phase_determine(esp);
  2690. }
  2691. } else {
  2692. /* If we disconnect now, all hell breaks loose. */
  2693. ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
  2694. esp_advance_phase(SCptr, in_the_dark);
  2695. return esp_do_phase_determine(esp);
  2696. }
  2697. }
  2698. static int esp_enter_status(struct esp *esp)
  2699. {
  2700. u8 thecmd = ESP_CMD_ICCSEQ;
  2701. esp_cmd(esp, ESP_CMD_FLUSH);
  2702. if (esp->erev != fashme) {
  2703. u32 tmp;
  2704. esp->esp_command[0] = esp->esp_command[1] = 0xff;
  2705. sbus_writeb(2, esp->eregs + ESP_TCLOW);
  2706. sbus_writeb(0, esp->eregs + ESP_TCMED);
  2707. tmp = sbus_readl(esp->dregs + DMA_CSR);
  2708. tmp |= (DMA_ST_WRITE | DMA_ENABLE);
  2709. sbus_writel(tmp, esp->dregs + DMA_CSR);
  2710. if (esp->dma->revision == dvmaesc1)
  2711. sbus_writel(0x100, esp->dregs + DMA_COUNT);
  2712. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  2713. thecmd |= ESP_CMD_DMA;
  2714. }
  2715. esp_cmd(esp, thecmd);
  2716. esp_advance_phase(esp->current_SC, in_status);
  2717. return esp_do_status(esp);
  2718. }
  2719. static int esp_disconnect_amidst_phases(struct esp *esp)
  2720. {
  2721. struct scsi_cmnd *sp = esp->current_SC;
  2722. struct esp_device *esp_dev = sp->device->hostdata;
  2723. /* This means real problems if we see this
  2724. * here. Unless we were actually trying
  2725. * to force the device to abort/reset.
  2726. */
  2727. ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id));
  2728. ESPLOG(("pphase<%s> cphase<%s>, ",
  2729. phase_string(sp->SCp.phase),
  2730. phase_string(sp->SCp.sent_command)));
  2731. if (esp->disconnected_SC != NULL || (esp->erev == fashme))
  2732. esp_cmd(esp, ESP_CMD_ESEL);
  2733. switch (esp->cur_msgout[0]) {
  2734. default:
  2735. /* We didn't expect this to happen at all. */
  2736. ESPLOG(("device is bolixed\n"));
  2737. esp_advance_phase(sp, in_tgterror);
  2738. esp_done(esp, (DID_ERROR << 16));
  2739. break;
  2740. case BUS_DEVICE_RESET:
  2741. ESPLOG(("device reset successful\n"));
  2742. esp_dev->sync_max_offset = 0;
  2743. esp_dev->sync_min_period = 0;
  2744. esp_dev->sync = 0;
  2745. esp_advance_phase(sp, in_resetdev);
  2746. esp_done(esp, (DID_RESET << 16));
  2747. break;
  2748. case ABORT:
  2749. ESPLOG(("device abort successful\n"));
  2750. esp_advance_phase(sp, in_abortone);
  2751. esp_done(esp, (DID_ABORT << 16));
  2752. break;
  2753. };
  2754. return do_intr_end;
  2755. }
  2756. static int esp_enter_msgout(struct esp *esp)
  2757. {
  2758. esp_advance_phase(esp->current_SC, in_msgout);
  2759. return esp_do_msgout(esp);
  2760. }
  2761. static int esp_enter_msgin(struct esp *esp)
  2762. {
  2763. esp_advance_phase(esp->current_SC, in_msgin);
  2764. return esp_do_msgin(esp);
  2765. }
  2766. static int esp_enter_cmd(struct esp *esp)
  2767. {
  2768. esp_advance_phase(esp->current_SC, in_cmdbegin);
  2769. return esp_do_cmdbegin(esp);
  2770. }
  2771. static int esp_enter_badphase(struct esp *esp)
  2772. {
  2773. ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
  2774. esp->sreg & ESP_STAT_PMASK));
  2775. return do_reset_bus;
  2776. }
  2777. typedef int (*espfunc_t)(struct esp *);
  2778. static espfunc_t phase_vector[] = {
  2779. esp_do_data, /* ESP_DOP */
  2780. esp_do_data, /* ESP_DIP */
  2781. esp_enter_cmd, /* ESP_CMDP */
  2782. esp_enter_status, /* ESP_STATP */
  2783. esp_enter_badphase, /* ESP_STAT_PMSG */
  2784. esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */
  2785. esp_enter_msgout, /* ESP_MOP */
  2786. esp_enter_msgin, /* ESP_MIP */
  2787. };
  2788. /* The target has control of the bus and we have to see where it has
  2789. * taken us.
  2790. */
  2791. static int esp_do_phase_determine(struct esp *esp)
  2792. {
  2793. if ((esp->ireg & ESP_INTR_DC) != 0)
  2794. return esp_disconnect_amidst_phases(esp);
  2795. return phase_vector[esp->sreg & ESP_STAT_PMASK](esp);
  2796. }
  2797. /* First interrupt after exec'ing a cmd comes here. */
  2798. static int esp_select_complete(struct esp *esp)
  2799. {
  2800. struct scsi_cmnd *SCptr = esp->current_SC;
  2801. struct esp_device *esp_dev = SCptr->device->hostdata;
  2802. int cmd_bytes_sent, fcnt;
  2803. if (esp->erev != fashme)
  2804. esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
  2805. if (esp->erev == fashme)
  2806. fcnt = esp->hme_fifo_workaround_count;
  2807. else
  2808. fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
  2809. cmd_bytes_sent = esp_bytes_sent(esp, fcnt);
  2810. dma_invalidate(esp);
  2811. /* Let's check to see if a reselect happened
  2812. * while we we're trying to select. This must
  2813. * be checked first.
  2814. */
  2815. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  2816. esp_reconnect(esp, SCptr);
  2817. return esp_do_reconnect(esp);
  2818. }
  2819. /* Looks like things worked, we should see a bus service &
  2820. * a function complete interrupt at this point. Note we
  2821. * are doing a direct comparison because we don't want to
  2822. * be fooled into thinking selection was successful if
  2823. * ESP_INTR_DC is set, see below.
  2824. */
  2825. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  2826. /* target speaks... */
  2827. esp->targets_present |= (1<<SCptr->device->id);
  2828. /* What if the target ignores the sdtr? */
  2829. if (esp->snip)
  2830. esp_dev->sync = 1;
  2831. /* See how far, if at all, we got in getting
  2832. * the information out to the target.
  2833. */
  2834. switch (esp->seqreg) {
  2835. default:
  2836. case ESP_STEP_ASEL:
  2837. /* Arbitration won, target selected, but
  2838. * we are in some phase which is not command
  2839. * phase nor is it message out phase.
  2840. *
  2841. * XXX We've confused the target, obviously.
  2842. * XXX So clear it's state, but we also end
  2843. * XXX up clearing everyone elses. That isn't
  2844. * XXX so nice. I'd like to just reset this
  2845. * XXX target, but if I cannot even get it's
  2846. * XXX attention and finish selection to talk
  2847. * XXX to it, there is not much more I can do.
  2848. * XXX If we have a loaded bus we're going to
  2849. * XXX spend the next second or so renegotiating
  2850. * XXX for synchronous transfers.
  2851. */
  2852. ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
  2853. esp->esp_id, SCptr->device->id));
  2854. case ESP_STEP_SID:
  2855. /* Arbitration won, target selected, went
  2856. * to message out phase, sent one message
  2857. * byte, then we stopped. ATN is asserted
  2858. * on the SCSI bus and the target is still
  2859. * there hanging on. This is a legal
  2860. * sequence step if we gave the ESP a select
  2861. * and stop command.
  2862. *
  2863. * XXX See above, I could set the borken flag
  2864. * XXX in the device struct and retry the
  2865. * XXX command. But would that help for
  2866. * XXX tagged capable targets?
  2867. */
  2868. case ESP_STEP_NCMD:
  2869. /* Arbitration won, target selected, maybe
  2870. * sent the one message byte in message out
  2871. * phase, but we did not go to command phase
  2872. * in the end. Actually, we could have sent
  2873. * only some of the message bytes if we tried
  2874. * to send out the entire identify and tag
  2875. * message using ESP_CMD_SA3.
  2876. */
  2877. cmd_bytes_sent = 0;
  2878. break;
  2879. case ESP_STEP_PPC:
  2880. /* No, not the powerPC pinhead. Arbitration
  2881. * won, all message bytes sent if we went to
  2882. * message out phase, went to command phase
  2883. * but only part of the command was sent.
  2884. *
  2885. * XXX I've seen this, but usually in conjunction
  2886. * XXX with a gross error which appears to have
  2887. * XXX occurred between the time I told the
  2888. * XXX ESP to arbitrate and when I got the
  2889. * XXX interrupt. Could I have misloaded the
  2890. * XXX command bytes into the fifo? Actually,
  2891. * XXX I most likely missed a phase, and therefore
  2892. * XXX went into never never land and didn't even
  2893. * XXX know it. That was the old driver though.
  2894. * XXX What is even more peculiar is that the ESP
  2895. * XXX showed the proper function complete and
  2896. * XXX bus service bits in the interrupt register.
  2897. */
  2898. case ESP_STEP_FINI4:
  2899. case ESP_STEP_FINI5:
  2900. case ESP_STEP_FINI6:
  2901. case ESP_STEP_FINI7:
  2902. /* Account for the identify message */
  2903. if (SCptr->SCp.phase == in_slct_norm)
  2904. cmd_bytes_sent -= 1;
  2905. };
  2906. if (esp->erev != fashme)
  2907. esp_cmd(esp, ESP_CMD_NULL);
  2908. /* Be careful, we could really get fucked during synchronous
  2909. * data transfers if we try to flush the fifo now.
  2910. */
  2911. if ((esp->erev != fashme) && /* not a Happy Meal and... */
  2912. !fcnt && /* Fifo is empty and... */
  2913. /* either we are not doing synchronous transfers or... */
  2914. (!esp_dev->sync_max_offset ||
  2915. /* We are not going into data in phase. */
  2916. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  2917. esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */
  2918. /* See how far we got if this is not a slow command. */
  2919. if (!esp->esp_slowcmd) {
  2920. if (cmd_bytes_sent < 0)
  2921. cmd_bytes_sent = 0;
  2922. if (cmd_bytes_sent != SCptr->cmd_len) {
  2923. /* Crapola, mark it as a slowcmd
  2924. * so that we have some chance of
  2925. * keeping the command alive with
  2926. * good luck.
  2927. *
  2928. * XXX Actually, if we didn't send it all
  2929. * XXX this means either we didn't set things
  2930. * XXX up properly (driver bug) or the target
  2931. * XXX or the ESP detected parity on one of
  2932. * XXX the command bytes. This makes much
  2933. * XXX more sense, and therefore this code
  2934. * XXX should be changed to send out a
  2935. * XXX parity error message or if the status
  2936. * XXX register shows no parity error then
  2937. * XXX just expect the target to bring the
  2938. * XXX bus into message in phase so that it
  2939. * XXX can send us the parity error message.
  2940. * XXX SCSI sucks...
  2941. */
  2942. esp->esp_slowcmd = 1;
  2943. esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
  2944. esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
  2945. }
  2946. }
  2947. /* Now figure out where we went. */
  2948. esp_advance_phase(SCptr, in_the_dark);
  2949. return esp_do_phase_determine(esp);
  2950. }
  2951. /* Did the target even make it? */
  2952. if (esp->ireg == ESP_INTR_DC) {
  2953. /* wheee... nobody there or they didn't like
  2954. * what we told it to do, clean up.
  2955. */
  2956. /* If anyone is off the bus, but working on
  2957. * a command in the background for us, tell
  2958. * the ESP to listen for them.
  2959. */
  2960. if (esp->disconnected_SC)
  2961. esp_cmd(esp, ESP_CMD_ESEL);
  2962. if (((1<<SCptr->device->id) & esp->targets_present) &&
  2963. esp->seqreg != 0 &&
  2964. (esp->cur_msgout[0] == EXTENDED_MESSAGE) &&
  2965. (SCptr->SCp.phase == in_slct_msg ||
  2966. SCptr->SCp.phase == in_slct_stop)) {
  2967. /* shit */
  2968. esp->snip = 0;
  2969. ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
  2970. "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
  2971. esp_dev->sync_max_offset = 0;
  2972. esp_dev->sync_min_period = 0;
  2973. esp_dev->sync = 1; /* so we don't negotiate again */
  2974. /* Run the command again, this time though we
  2975. * won't try to negotiate for synchronous transfers.
  2976. *
  2977. * XXX I'd like to do something like send an
  2978. * XXX INITIATOR_ERROR or ABORT message to the
  2979. * XXX target to tell it, "Sorry I confused you,
  2980. * XXX please come back and I will be nicer next
  2981. * XXX time". But that requires having the target
  2982. * XXX on the bus, and it has dropped BSY on us.
  2983. */
  2984. esp->current_SC = NULL;
  2985. esp_advance_phase(SCptr, not_issued);
  2986. prepend_SC(&esp->issue_SC, SCptr);
  2987. esp_exec_cmd(esp);
  2988. return do_intr_end;
  2989. }
  2990. /* Ok, this is normal, this is what we see during boot
  2991. * or whenever when we are scanning the bus for targets.
  2992. * But first make sure that is really what is happening.
  2993. */
  2994. if (((1<<SCptr->device->id) & esp->targets_present)) {
  2995. ESPLOG(("esp%d: Warning, live target %d not responding to "
  2996. "selection.\n", esp->esp_id, SCptr->device->id));
  2997. /* This _CAN_ happen. The SCSI standard states that
  2998. * the target is to _not_ respond to selection if
  2999. * _it_ detects bad parity on the bus for any reason.
  3000. * Therefore, we assume that if we've talked successfully
  3001. * to this target before, bad parity is the problem.
  3002. */
  3003. esp_done(esp, (DID_PARITY << 16));
  3004. } else {
  3005. /* Else, there really isn't anyone there. */
  3006. ESPMISC(("esp: selection failure, maybe nobody there?\n"));
  3007. ESPMISC(("esp: target %d lun %d\n",
  3008. SCptr->device->id, SCptr->device->lun));
  3009. esp_done(esp, (DID_BAD_TARGET << 16));
  3010. }
  3011. return do_intr_end;
  3012. }
  3013. ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
  3014. printk("esp%d: Currently -- ", esp->esp_id);
  3015. esp_print_ireg(esp->ireg); printk(" ");
  3016. esp_print_statreg(esp->sreg); printk(" ");
  3017. esp_print_seqreg(esp->seqreg); printk("\n");
  3018. printk("esp%d: New -- ", esp->esp_id);
  3019. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3020. esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP);
  3021. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  3022. esp_print_ireg(esp->ireg); printk(" ");
  3023. esp_print_statreg(esp->sreg); printk(" ");
  3024. esp_print_seqreg(esp->seqreg); printk("\n");
  3025. ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
  3026. return do_reset_bus; /* ugh... */
  3027. }
  3028. /* Continue reading bytes for msgin phase. */
  3029. static int esp_do_msgincont(struct esp *esp)
  3030. {
  3031. if (esp->ireg & ESP_INTR_BSERV) {
  3032. /* in the right phase too? */
  3033. if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
  3034. /* phew... */
  3035. esp_cmd(esp, ESP_CMD_TI);
  3036. esp_advance_phase(esp->current_SC, in_msgindone);
  3037. return do_intr_end;
  3038. }
  3039. /* We changed phase but ESP shows bus service,
  3040. * in this case it is most likely that we, the
  3041. * hacker who has been up for 20hrs straight
  3042. * staring at the screen, drowned in coffee
  3043. * smelling like retched cigarette ashes
  3044. * have miscoded something..... so, try to
  3045. * recover as best we can.
  3046. */
  3047. ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id));
  3048. }
  3049. esp_advance_phase(esp->current_SC, in_the_dark);
  3050. return do_phase_determine;
  3051. }
  3052. static int check_singlebyte_msg(struct esp *esp)
  3053. {
  3054. esp->prevmsgin = esp->cur_msgin[0];
  3055. if (esp->cur_msgin[0] & 0x80) {
  3056. /* wheee... */
  3057. ESPLOG(("esp%d: target sends identify amidst phases\n",
  3058. esp->esp_id));
  3059. esp_advance_phase(esp->current_SC, in_the_dark);
  3060. return 0;
  3061. } else if (((esp->cur_msgin[0] & 0xf0) == 0x20) ||
  3062. (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
  3063. esp->msgin_len = 2;
  3064. esp_advance_phase(esp->current_SC, in_msgincont);
  3065. return 0;
  3066. }
  3067. esp_advance_phase(esp->current_SC, in_the_dark);
  3068. switch (esp->cur_msgin[0]) {
  3069. default:
  3070. /* We don't want to hear about it. */
  3071. ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
  3072. esp->cur_msgin[0]));
  3073. return MESSAGE_REJECT;
  3074. case NOP:
  3075. ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
  3076. esp->current_SC->device->id));
  3077. return 0;
  3078. case RESTORE_POINTERS:
  3079. /* In this case we might also have to backup the
  3080. * "slow command" pointer. It is rare to get such
  3081. * a save/restore pointer sequence so early in the
  3082. * bus transition sequences, but cover it.
  3083. */
  3084. if (esp->esp_slowcmd) {
  3085. esp->esp_scmdleft = esp->current_SC->cmd_len;
  3086. esp->esp_scmdp = &esp->current_SC->cmnd[0];
  3087. }
  3088. esp_restore_pointers(esp, esp->current_SC);
  3089. return 0;
  3090. case SAVE_POINTERS:
  3091. esp_save_pointers(esp, esp->current_SC);
  3092. return 0;
  3093. case COMMAND_COMPLETE:
  3094. case DISCONNECT:
  3095. /* Freeing the bus, let it go. */
  3096. esp->current_SC->SCp.phase = in_freeing;
  3097. return 0;
  3098. case MESSAGE_REJECT:
  3099. ESPMISC(("msg reject, "));
  3100. if (esp->prevmsgout == EXTENDED_MESSAGE) {
  3101. struct esp_device *esp_dev = esp->current_SC->device->hostdata;
  3102. /* Doesn't look like this target can
  3103. * do synchronous or WIDE transfers.
  3104. */
  3105. ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
  3106. esp_dev->sync = 1;
  3107. esp_dev->wide = 1;
  3108. esp_dev->sync_min_period = 0;
  3109. esp_dev->sync_max_offset = 0;
  3110. return 0;
  3111. } else {
  3112. ESPMISC(("not sync nego, sending ABORT\n"));
  3113. return ABORT;
  3114. }
  3115. };
  3116. }
  3117. /* Target negotiates for synchronous transfers before we do, this
  3118. * is legal although very strange. What is even funnier is that
  3119. * the SCSI2 standard specifically recommends against targets doing
  3120. * this because so many initiators cannot cope with this occurring.
  3121. */
  3122. static int target_with_ants_in_pants(struct esp *esp,
  3123. struct scsi_cmnd *SCptr,
  3124. struct esp_device *esp_dev)
  3125. {
  3126. if (esp_dev->sync || SCptr->device->borken) {
  3127. /* sorry, no can do */
  3128. ESPSDTR(("forcing to async, "));
  3129. build_sync_nego_msg(esp, 0, 0);
  3130. esp_dev->sync = 1;
  3131. esp->snip = 1;
  3132. ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
  3133. esp_advance_phase(SCptr, in_the_dark);
  3134. return EXTENDED_MESSAGE;
  3135. }
  3136. /* Ok, we'll check them out... */
  3137. return 0;
  3138. }
  3139. static void sync_report(struct esp *esp)
  3140. {
  3141. int msg3, msg4;
  3142. char *type;
  3143. msg3 = esp->cur_msgin[3];
  3144. msg4 = esp->cur_msgin[4];
  3145. if (msg4) {
  3146. int hz = 1000000000 / (msg3 * 4);
  3147. int integer = hz / 1000000;
  3148. int fraction = (hz - (integer * 1000000)) / 10000;
  3149. if ((esp->erev == fashme) &&
  3150. (esp->config3[esp->current_SC->device->id] & ESP_CONFIG3_EWIDE)) {
  3151. type = "FAST-WIDE";
  3152. integer <<= 1;
  3153. fraction <<= 1;
  3154. } else if ((msg3 * 4) < 200) {
  3155. type = "FAST";
  3156. } else {
  3157. type = "synchronous";
  3158. }
  3159. /* Do not transform this back into one big printk
  3160. * again, it triggers a bug in our sparc64-gcc272
  3161. * sibling call optimization. -DaveM
  3162. */
  3163. ESPLOG((KERN_INFO "esp%d: target %d ",
  3164. esp->esp_id, esp->current_SC->device->id));
  3165. ESPLOG(("[period %dns offset %d %d.%02dMHz ",
  3166. (int) msg3 * 4, (int) msg4,
  3167. integer, fraction));
  3168. ESPLOG(("%s SCSI%s]\n", type,
  3169. (((msg3 * 4) < 200) ? "-II" : "")));
  3170. } else {
  3171. ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n",
  3172. esp->esp_id, esp->current_SC->device->id));
  3173. }
  3174. }
  3175. static int check_multibyte_msg(struct esp *esp)
  3176. {
  3177. struct scsi_cmnd *SCptr = esp->current_SC;
  3178. struct esp_device *esp_dev = SCptr->device->hostdata;
  3179. u8 regval = 0;
  3180. int message_out = 0;
  3181. ESPSDTR(("chk multibyte msg: "));
  3182. if (esp->cur_msgin[2] == EXTENDED_SDTR) {
  3183. int period = esp->cur_msgin[3];
  3184. int offset = esp->cur_msgin[4];
  3185. ESPSDTR(("is sync nego response, "));
  3186. if (!esp->snip) {
  3187. int rval;
  3188. /* Target negotiates first! */
  3189. ESPSDTR(("target jumps the gun, "));
  3190. message_out = EXTENDED_MESSAGE; /* we must respond */
  3191. rval = target_with_ants_in_pants(esp, SCptr, esp_dev);
  3192. if (rval)
  3193. return rval;
  3194. }
  3195. ESPSDTR(("examining sdtr, "));
  3196. /* Offset cannot be larger than ESP fifo size. */
  3197. if (offset > 15) {
  3198. ESPSDTR(("offset too big %2x, ", offset));
  3199. offset = 15;
  3200. ESPSDTR(("sending back new offset\n"));
  3201. build_sync_nego_msg(esp, period, offset);
  3202. return EXTENDED_MESSAGE;
  3203. }
  3204. if (offset && period > esp->max_period) {
  3205. /* Yeee, async for this slow device. */
  3206. ESPSDTR(("period too long %2x, ", period));
  3207. build_sync_nego_msg(esp, 0, 0);
  3208. ESPSDTR(("hoping for msgout\n"));
  3209. esp_advance_phase(esp->current_SC, in_the_dark);
  3210. return EXTENDED_MESSAGE;
  3211. } else if (offset && period < esp->min_period) {
  3212. ESPSDTR(("period too short %2x, ", period));
  3213. period = esp->min_period;
  3214. if (esp->erev > esp236)
  3215. regval = 4;
  3216. else
  3217. regval = 5;
  3218. } else if (offset) {
  3219. int tmp;
  3220. ESPSDTR(("period is ok, "));
  3221. tmp = esp->ccycle / 1000;
  3222. regval = (((period << 2) + tmp - 1) / tmp);
  3223. if (regval && ((esp->erev == fas100a ||
  3224. esp->erev == fas236 ||
  3225. esp->erev == fashme))) {
  3226. if (period >= 50)
  3227. regval--;
  3228. }
  3229. }
  3230. if (offset) {
  3231. u8 bit;
  3232. esp_dev->sync_min_period = (regval & 0x1f);
  3233. esp_dev->sync_max_offset = (offset | esp->radelay);
  3234. if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
  3235. if ((esp->erev == fas100a) || (esp->erev == fashme))
  3236. bit = ESP_CONFIG3_FAST;
  3237. else
  3238. bit = ESP_CONFIG3_FSCSI;
  3239. if (period < 50) {
  3240. /* On FAS366, if using fast-20 synchronous transfers
  3241. * we need to make sure the REQ/ACK assert/deassert
  3242. * control bits are clear.
  3243. */
  3244. if (esp->erev == fashme)
  3245. esp_dev->sync_max_offset &= ~esp->radelay;
  3246. esp->config3[SCptr->device->id] |= bit;
  3247. } else {
  3248. esp->config3[SCptr->device->id] &= ~bit;
  3249. }
  3250. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3251. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3252. }
  3253. esp->prev_soff = esp_dev->sync_max_offset;
  3254. esp->prev_stp = esp_dev->sync_min_period;
  3255. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  3256. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  3257. ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
  3258. esp_dev->sync_max_offset,
  3259. esp_dev->sync_min_period,
  3260. esp->config3[SCptr->device->id]));
  3261. esp->snip = 0;
  3262. } else if (esp_dev->sync_max_offset) {
  3263. u8 bit;
  3264. /* back to async mode */
  3265. ESPSDTR(("unaccaptable sync nego, forcing async\n"));
  3266. esp_dev->sync_max_offset = 0;
  3267. esp_dev->sync_min_period = 0;
  3268. esp->prev_soff = 0;
  3269. esp->prev_stp = 0;
  3270. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  3271. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  3272. if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
  3273. if ((esp->erev == fas100a) || (esp->erev == fashme))
  3274. bit = ESP_CONFIG3_FAST;
  3275. else
  3276. bit = ESP_CONFIG3_FSCSI;
  3277. esp->config3[SCptr->device->id] &= ~bit;
  3278. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3279. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3280. }
  3281. }
  3282. sync_report(esp);
  3283. ESPSDTR(("chk multibyte msg: sync is known, "));
  3284. esp_dev->sync = 1;
  3285. if (message_out) {
  3286. ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
  3287. esp->esp_id));
  3288. build_sync_nego_msg(esp, period, offset);
  3289. esp_advance_phase(SCptr, in_the_dark);
  3290. return EXTENDED_MESSAGE;
  3291. }
  3292. ESPSDTR(("returning zero\n"));
  3293. esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
  3294. return 0;
  3295. } else if (esp->cur_msgin[2] == EXTENDED_WDTR) {
  3296. int size = 8 << esp->cur_msgin[3];
  3297. esp->wnip = 0;
  3298. if (esp->erev != fashme) {
  3299. ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n",
  3300. esp->esp_id));
  3301. message_out = MESSAGE_REJECT;
  3302. } else if (size > 16) {
  3303. ESPLOG(("esp%d: AIEEE wide transfer for %d size "
  3304. "not supported.\n", esp->esp_id, size));
  3305. message_out = MESSAGE_REJECT;
  3306. } else {
  3307. /* Things look good; let's see what we got. */
  3308. if (size == 16) {
  3309. /* Set config 3 register for this target. */
  3310. esp->config3[SCptr->device->id] |= ESP_CONFIG3_EWIDE;
  3311. } else {
  3312. /* Just make sure it was one byte sized. */
  3313. if (size != 8) {
  3314. ESPLOG(("esp%d: Aieee, wide nego of %d size.\n",
  3315. esp->esp_id, size));
  3316. message_out = MESSAGE_REJECT;
  3317. goto finish;
  3318. }
  3319. /* Pure paranoia. */
  3320. esp->config3[SCptr->device->id] &= ~(ESP_CONFIG3_EWIDE);
  3321. }
  3322. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3323. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3324. /* Regardless, next try for sync transfers. */
  3325. build_sync_nego_msg(esp, esp->sync_defp, 15);
  3326. esp_dev->sync = 1;
  3327. esp->snip = 1;
  3328. message_out = EXTENDED_MESSAGE;
  3329. }
  3330. } else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
  3331. ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
  3332. message_out = MESSAGE_REJECT;
  3333. }
  3334. finish:
  3335. esp_advance_phase(SCptr, in_the_dark);
  3336. return message_out;
  3337. }
  3338. static int esp_do_msgindone(struct esp *esp)
  3339. {
  3340. struct scsi_cmnd *SCptr = esp->current_SC;
  3341. int message_out = 0, it = 0, rval;
  3342. rval = skipahead1(esp, SCptr, in_msgin, in_msgindone);
  3343. if (rval)
  3344. return rval;
  3345. if (SCptr->SCp.sent_command != in_status) {
  3346. if (!(esp->ireg & ESP_INTR_DC)) {
  3347. if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
  3348. message_out = MSG_PARITY_ERROR;
  3349. esp_cmd(esp, ESP_CMD_FLUSH);
  3350. } else if (esp->erev != fashme &&
  3351. (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) {
  3352. /* We certainly dropped the ball somewhere. */
  3353. message_out = INITIATOR_ERROR;
  3354. esp_cmd(esp, ESP_CMD_FLUSH);
  3355. } else if (!esp->msgin_len) {
  3356. if (esp->erev == fashme)
  3357. it = esp->hme_fifo_workaround_buffer[0];
  3358. else
  3359. it = sbus_readb(esp->eregs + ESP_FDATA);
  3360. esp_advance_phase(SCptr, in_msgincont);
  3361. } else {
  3362. /* it is ok and we want it */
  3363. if (esp->erev == fashme)
  3364. it = esp->cur_msgin[esp->msgin_ctr] =
  3365. esp->hme_fifo_workaround_buffer[0];
  3366. else
  3367. it = esp->cur_msgin[esp->msgin_ctr] =
  3368. sbus_readb(esp->eregs + ESP_FDATA);
  3369. esp->msgin_ctr++;
  3370. }
  3371. } else {
  3372. esp_advance_phase(SCptr, in_the_dark);
  3373. return do_work_bus;
  3374. }
  3375. } else {
  3376. it = esp->cur_msgin[0];
  3377. }
  3378. if (!message_out && esp->msgin_len) {
  3379. if (esp->msgin_ctr < esp->msgin_len) {
  3380. esp_advance_phase(SCptr, in_msgincont);
  3381. } else if (esp->msgin_len == 1) {
  3382. message_out = check_singlebyte_msg(esp);
  3383. } else if (esp->msgin_len == 2) {
  3384. if (esp->cur_msgin[0] == EXTENDED_MESSAGE) {
  3385. if ((it + 2) >= 15) {
  3386. message_out = MESSAGE_REJECT;
  3387. } else {
  3388. esp->msgin_len = (it + 2);
  3389. esp_advance_phase(SCptr, in_msgincont);
  3390. }
  3391. } else {
  3392. message_out = MESSAGE_REJECT; /* foo on you */
  3393. }
  3394. } else {
  3395. message_out = check_multibyte_msg(esp);
  3396. }
  3397. }
  3398. if (message_out < 0) {
  3399. return -message_out;
  3400. } else if (message_out) {
  3401. if (((message_out != 1) &&
  3402. ((message_out < 0x20) || (message_out & 0x80))))
  3403. esp->msgout_len = 1;
  3404. esp->cur_msgout[0] = message_out;
  3405. esp_cmd(esp, ESP_CMD_SATN);
  3406. esp_advance_phase(SCptr, in_the_dark);
  3407. esp->msgin_len = 0;
  3408. }
  3409. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3410. esp->sreg &= ~(ESP_STAT_INTR);
  3411. if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
  3412. esp_cmd(esp, ESP_CMD_MOK);
  3413. if ((SCptr->SCp.sent_command == in_msgindone) &&
  3414. (SCptr->SCp.phase == in_freeing))
  3415. return esp_do_freebus(esp);
  3416. return do_intr_end;
  3417. }
  3418. static int esp_do_cmdbegin(struct esp *esp)
  3419. {
  3420. struct scsi_cmnd *SCptr = esp->current_SC;
  3421. esp_advance_phase(SCptr, in_cmdend);
  3422. if (esp->erev == fashme) {
  3423. u32 tmp = sbus_readl(esp->dregs + DMA_CSR);
  3424. int i;
  3425. for (i = 0; i < esp->esp_scmdleft; i++)
  3426. esp->esp_command[i] = *esp->esp_scmdp++;
  3427. esp->esp_scmdleft = 0;
  3428. esp_cmd(esp, ESP_CMD_FLUSH);
  3429. esp_setcount(esp->eregs, i, 1);
  3430. esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI));
  3431. tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
  3432. tmp &= ~(DMA_ST_WRITE);
  3433. sbus_writel(i, esp->dregs + DMA_COUNT);
  3434. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  3435. sbus_writel(tmp, esp->dregs + DMA_CSR);
  3436. } else {
  3437. u8 tmp;
  3438. esp_cmd(esp, ESP_CMD_FLUSH);
  3439. tmp = *esp->esp_scmdp++;
  3440. esp->esp_scmdleft--;
  3441. sbus_writeb(tmp, esp->eregs + ESP_FDATA);
  3442. esp_cmd(esp, ESP_CMD_TI);
  3443. }
  3444. return do_intr_end;
  3445. }
  3446. static int esp_do_cmddone(struct esp *esp)
  3447. {
  3448. if (esp->erev == fashme)
  3449. dma_invalidate(esp);
  3450. else
  3451. esp_cmd(esp, ESP_CMD_NULL);
  3452. if (esp->ireg & ESP_INTR_BSERV) {
  3453. esp_advance_phase(esp->current_SC, in_the_dark);
  3454. return esp_do_phase_determine(esp);
  3455. }
  3456. ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
  3457. esp->esp_id));
  3458. return do_reset_bus;
  3459. }
  3460. static int esp_do_msgout(struct esp *esp)
  3461. {
  3462. esp_cmd(esp, ESP_CMD_FLUSH);
  3463. switch (esp->msgout_len) {
  3464. case 1:
  3465. if (esp->erev == fashme)
  3466. hme_fifo_push(esp, &esp->cur_msgout[0], 1);
  3467. else
  3468. sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
  3469. esp_cmd(esp, ESP_CMD_TI);
  3470. break;
  3471. case 2:
  3472. esp->esp_command[0] = esp->cur_msgout[0];
  3473. esp->esp_command[1] = esp->cur_msgout[1];
  3474. if (esp->erev == fashme) {
  3475. hme_fifo_push(esp, &esp->cur_msgout[0], 2);
  3476. esp_cmd(esp, ESP_CMD_TI);
  3477. } else {
  3478. dma_setup(esp, esp->esp_command_dvma, 2, 0);
  3479. esp_setcount(esp->eregs, 2, 0);
  3480. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3481. }
  3482. break;
  3483. case 4:
  3484. esp->esp_command[0] = esp->cur_msgout[0];
  3485. esp->esp_command[1] = esp->cur_msgout[1];
  3486. esp->esp_command[2] = esp->cur_msgout[2];
  3487. esp->esp_command[3] = esp->cur_msgout[3];
  3488. esp->snip = 1;
  3489. if (esp->erev == fashme) {
  3490. hme_fifo_push(esp, &esp->cur_msgout[0], 4);
  3491. esp_cmd(esp, ESP_CMD_TI);
  3492. } else {
  3493. dma_setup(esp, esp->esp_command_dvma, 4, 0);
  3494. esp_setcount(esp->eregs, 4, 0);
  3495. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3496. }
  3497. break;
  3498. case 5:
  3499. esp->esp_command[0] = esp->cur_msgout[0];
  3500. esp->esp_command[1] = esp->cur_msgout[1];
  3501. esp->esp_command[2] = esp->cur_msgout[2];
  3502. esp->esp_command[3] = esp->cur_msgout[3];
  3503. esp->esp_command[4] = esp->cur_msgout[4];
  3504. esp->snip = 1;
  3505. if (esp->erev == fashme) {
  3506. hme_fifo_push(esp, &esp->cur_msgout[0], 5);
  3507. esp_cmd(esp, ESP_CMD_TI);
  3508. } else {
  3509. dma_setup(esp, esp->esp_command_dvma, 5, 0);
  3510. esp_setcount(esp->eregs, 5, 0);
  3511. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3512. }
  3513. break;
  3514. default:
  3515. /* whoops */
  3516. ESPMISC(("bogus msgout sending NOP\n"));
  3517. esp->cur_msgout[0] = NOP;
  3518. if (esp->erev == fashme) {
  3519. hme_fifo_push(esp, &esp->cur_msgout[0], 1);
  3520. } else {
  3521. sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
  3522. }
  3523. esp->msgout_len = 1;
  3524. esp_cmd(esp, ESP_CMD_TI);
  3525. break;
  3526. };
  3527. esp_advance_phase(esp->current_SC, in_msgoutdone);
  3528. return do_intr_end;
  3529. }
  3530. static int esp_do_msgoutdone(struct esp *esp)
  3531. {
  3532. if (esp->msgout_len > 1) {
  3533. /* XXX HME/FAS ATN deassert workaround required,
  3534. * XXX no DMA flushing, only possible ESP_CMD_FLUSH
  3535. * XXX to kill the fifo.
  3536. */
  3537. if (esp->erev != fashme) {
  3538. u32 tmp;
  3539. while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
  3540. udelay(1);
  3541. tmp &= ~DMA_ENABLE;
  3542. sbus_writel(tmp, esp->dregs + DMA_CSR);
  3543. dma_invalidate(esp);
  3544. } else {
  3545. esp_cmd(esp, ESP_CMD_FLUSH);
  3546. }
  3547. }
  3548. if (!(esp->ireg & ESP_INTR_DC)) {
  3549. if (esp->erev != fashme)
  3550. esp_cmd(esp, ESP_CMD_NULL);
  3551. switch (esp->sreg & ESP_STAT_PMASK) {
  3552. case ESP_MOP:
  3553. /* whoops, parity error */
  3554. ESPLOG(("esp%d: still in msgout, parity error assumed\n",
  3555. esp->esp_id));
  3556. if (esp->msgout_len > 1)
  3557. esp_cmd(esp, ESP_CMD_SATN);
  3558. esp_advance_phase(esp->current_SC, in_msgout);
  3559. return do_work_bus;
  3560. case ESP_DIP:
  3561. break;
  3562. default:
  3563. /* Happy Meal fifo is touchy... */
  3564. if ((esp->erev != fashme) &&
  3565. !fcount(esp) &&
  3566. !(((struct esp_device *)esp->current_SC->device->hostdata)->sync_max_offset))
  3567. esp_cmd(esp, ESP_CMD_FLUSH);
  3568. break;
  3569. };
  3570. } else {
  3571. ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id));
  3572. return do_reset_bus;
  3573. }
  3574. /* If we sent out a synchronous negotiation message, update
  3575. * our state.
  3576. */
  3577. if (esp->cur_msgout[2] == EXTENDED_MESSAGE &&
  3578. esp->cur_msgout[4] == EXTENDED_SDTR) {
  3579. esp->snip = 1; /* anal retentiveness... */
  3580. }
  3581. esp->prevmsgout = esp->cur_msgout[0];
  3582. esp->msgout_len = 0;
  3583. esp_advance_phase(esp->current_SC, in_the_dark);
  3584. return esp_do_phase_determine(esp);
  3585. }
  3586. static int esp_bus_unexpected(struct esp *esp)
  3587. {
  3588. ESPLOG(("esp%d: command in weird state %2x\n",
  3589. esp->esp_id, esp->current_SC->SCp.phase));
  3590. return do_reset_bus;
  3591. }
  3592. static espfunc_t bus_vector[] = {
  3593. esp_do_data_finale,
  3594. esp_do_data_finale,
  3595. esp_bus_unexpected,
  3596. esp_do_msgin,
  3597. esp_do_msgincont,
  3598. esp_do_msgindone,
  3599. esp_do_msgout,
  3600. esp_do_msgoutdone,
  3601. esp_do_cmdbegin,
  3602. esp_do_cmddone,
  3603. esp_do_status,
  3604. esp_do_freebus,
  3605. esp_do_phase_determine,
  3606. esp_bus_unexpected,
  3607. esp_bus_unexpected,
  3608. esp_bus_unexpected,
  3609. };
  3610. /* This is the second tier in our dual-level SCSI state machine. */
  3611. static int esp_work_bus(struct esp *esp)
  3612. {
  3613. struct scsi_cmnd *SCptr = esp->current_SC;
  3614. unsigned int phase;
  3615. ESPBUS(("esp_work_bus: "));
  3616. if (!SCptr) {
  3617. ESPBUS(("reconnect\n"));
  3618. return esp_do_reconnect(esp);
  3619. }
  3620. phase = SCptr->SCp.phase;
  3621. if ((phase & 0xf0) == in_phases_mask)
  3622. return bus_vector[(phase & 0x0f)](esp);
  3623. else if ((phase & 0xf0) == in_slct_mask)
  3624. return esp_select_complete(esp);
  3625. else
  3626. return esp_bus_unexpected(esp);
  3627. }
  3628. static espfunc_t isvc_vector[] = {
  3629. NULL,
  3630. esp_do_phase_determine,
  3631. esp_do_resetbus,
  3632. esp_finish_reset,
  3633. esp_work_bus
  3634. };
  3635. /* Main interrupt handler for an esp adapter. */
  3636. static void esp_handle(struct esp *esp)
  3637. {
  3638. struct scsi_cmnd *SCptr;
  3639. int what_next = do_intr_end;
  3640. SCptr = esp->current_SC;
  3641. /* Check for errors. */
  3642. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3643. esp->sreg &= (~ESP_STAT_INTR);
  3644. if (esp->erev == fashme) {
  3645. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  3646. esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
  3647. }
  3648. if (esp->sreg & (ESP_STAT_SPAM)) {
  3649. /* Gross error, could be due to one of:
  3650. *
  3651. * - top of fifo overwritten, could be because
  3652. * we tried to do a synchronous transfer with
  3653. * an offset greater than ESP fifo size
  3654. *
  3655. * - top of command register overwritten
  3656. *
  3657. * - DMA setup to go in one direction, SCSI
  3658. * bus points in the other, whoops
  3659. *
  3660. * - weird phase change during asynchronous
  3661. * data phase while we are initiator
  3662. */
  3663. ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg));
  3664. /* If a command is live on the bus we cannot safely
  3665. * reset the bus, so we'll just let the pieces fall
  3666. * where they may. Here we are hoping that the
  3667. * target will be able to cleanly go away soon
  3668. * so we can safely reset things.
  3669. */
  3670. if (!SCptr) {
  3671. ESPLOG(("esp%d: No current cmd during gross error, "
  3672. "resetting bus\n", esp->esp_id));
  3673. what_next = do_reset_bus;
  3674. goto state_machine;
  3675. }
  3676. }
  3677. if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) {
  3678. /* A DMA gate array error. Here we must
  3679. * be seeing one of two things. Either the
  3680. * virtual to physical address translation
  3681. * on the SBUS could not occur, else the
  3682. * translation it did get pointed to a bogus
  3683. * page. Ho hum...
  3684. */
  3685. ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id,
  3686. sbus_readl(esp->dregs + DMA_CSR)));
  3687. /* DMA gate array itself must be reset to clear the
  3688. * error condition.
  3689. */
  3690. esp_reset_dma(esp);
  3691. what_next = do_reset_bus;
  3692. goto state_machine;
  3693. }
  3694. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); /* Unlatch intr reg */
  3695. if (esp->erev == fashme) {
  3696. /* This chip is really losing. */
  3697. ESPHME(("HME["));
  3698. ESPHME(("sreg2=%02x,", esp->sreg2));
  3699. /* Must latch fifo before reading the interrupt
  3700. * register else garbage ends up in the FIFO
  3701. * which confuses the driver utterly.
  3702. */
  3703. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  3704. (esp->sreg2 & ESP_STAT2_F1BYTE)) {
  3705. ESPHME(("fifo_workaround]"));
  3706. hme_fifo_read(esp);
  3707. } else {
  3708. ESPHME(("no_fifo_workaround]"));
  3709. }
  3710. }
  3711. /* No current cmd is only valid at this point when there are
  3712. * commands off the bus or we are trying a reset.
  3713. */
  3714. if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) {
  3715. /* Panic is safe, since current_SC is null. */
  3716. ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id));
  3717. panic("esp_handle: current_SC == penguin within interrupt!");
  3718. }
  3719. if (esp->ireg & (ESP_INTR_IC)) {
  3720. /* Illegal command fed to ESP. Outside of obvious
  3721. * software bugs that could cause this, there is
  3722. * a condition with esp100 where we can confuse the
  3723. * ESP into an erroneous illegal command interrupt
  3724. * because it does not scrape the FIFO properly
  3725. * for reselection. See esp100_reconnect_hwbug()
  3726. * to see how we try very hard to avoid this.
  3727. */
  3728. ESPLOG(("esp%d: invalid command\n", esp->esp_id));
  3729. esp_dump_state(esp);
  3730. if (SCptr != NULL) {
  3731. /* Devices with very buggy firmware can drop BSY
  3732. * during a scatter list interrupt when using sync
  3733. * mode transfers. We continue the transfer as
  3734. * expected, the target drops the bus, the ESP
  3735. * gets confused, and we get a illegal command
  3736. * interrupt because the bus is in the disconnected
  3737. * state now and ESP_CMD_TI is only allowed when
  3738. * a nexus is alive on the bus.
  3739. */
  3740. ESPLOG(("esp%d: Forcing async and disabling disconnect for "
  3741. "target %d\n", esp->esp_id, SCptr->device->id));
  3742. SCptr->device->borken = 1; /* foo on you */
  3743. }
  3744. what_next = do_reset_bus;
  3745. } else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) {
  3746. if (SCptr) {
  3747. unsigned int phase = SCptr->SCp.phase;
  3748. if (phase & in_phases_mask) {
  3749. what_next = esp_work_bus(esp);
  3750. } else if (phase & in_slct_mask) {
  3751. what_next = esp_select_complete(esp);
  3752. } else {
  3753. ESPLOG(("esp%d: interrupt for no good reason...\n",
  3754. esp->esp_id));
  3755. what_next = do_intr_end;
  3756. }
  3757. } else {
  3758. ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
  3759. esp->esp_id));
  3760. what_next = do_reset_bus;
  3761. }
  3762. } else if (esp->ireg & ESP_INTR_SR) {
  3763. ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id));
  3764. what_next = do_reset_complete;
  3765. } else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) {
  3766. ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
  3767. esp->esp_id));
  3768. what_next = do_reset_bus;
  3769. } else if (esp->ireg & ESP_INTR_RSEL) {
  3770. if (SCptr == NULL) {
  3771. /* This is ok. */
  3772. what_next = esp_do_reconnect(esp);
  3773. } else if (SCptr->SCp.phase & in_slct_mask) {
  3774. /* Only selection code knows how to clean
  3775. * up properly.
  3776. */
  3777. ESPDISC(("Reselected during selection attempt\n"));
  3778. what_next = esp_select_complete(esp);
  3779. } else {
  3780. ESPLOG(("esp%d: Reselected while bus is busy\n",
  3781. esp->esp_id));
  3782. what_next = do_reset_bus;
  3783. }
  3784. }
  3785. /* This is tier-one in our dual level SCSI state machine. */
  3786. state_machine:
  3787. while (what_next != do_intr_end) {
  3788. if (what_next >= do_phase_determine &&
  3789. what_next < do_intr_end) {
  3790. what_next = isvc_vector[what_next](esp);
  3791. } else {
  3792. /* state is completely lost ;-( */
  3793. ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
  3794. esp->esp_id));
  3795. what_next = do_reset_bus;
  3796. }
  3797. }
  3798. }
  3799. /* Service only the ESP described by dev_id. */
  3800. static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs)
  3801. {
  3802. struct esp *esp = dev_id;
  3803. unsigned long flags;
  3804. spin_lock_irqsave(esp->ehost->host_lock, flags);
  3805. if (ESP_IRQ_P(esp->dregs)) {
  3806. ESP_INTSOFF(esp->dregs);
  3807. ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id));
  3808. esp_handle(esp);
  3809. ESPIRQ((")"));
  3810. ESP_INTSON(esp->dregs);
  3811. }
  3812. spin_unlock_irqrestore(esp->ehost->host_lock, flags);
  3813. return IRQ_HANDLED;
  3814. }
  3815. static int esp_slave_alloc(struct scsi_device *SDptr)
  3816. {
  3817. struct esp_device *esp_dev =
  3818. kmalloc(sizeof(struct esp_device), GFP_ATOMIC);
  3819. if (!esp_dev)
  3820. return -ENOMEM;
  3821. memset(esp_dev, 0, sizeof(struct esp_device));
  3822. SDptr->hostdata = esp_dev;
  3823. return 0;
  3824. }
  3825. static void esp_slave_destroy(struct scsi_device *SDptr)
  3826. {
  3827. struct esp *esp = (struct esp *) SDptr->host->hostdata;
  3828. esp->targets_present &= ~(1 << SDptr->id);
  3829. kfree(SDptr->hostdata);
  3830. SDptr->hostdata = NULL;
  3831. }
  3832. static struct scsi_host_template esp_template = {
  3833. .module = THIS_MODULE,
  3834. .name = "esp",
  3835. .info = esp_info,
  3836. .slave_alloc = esp_slave_alloc,
  3837. .slave_destroy = esp_slave_destroy,
  3838. .queuecommand = esp_queue,
  3839. .eh_abort_handler = esp_abort,
  3840. .eh_bus_reset_handler = esp_reset,
  3841. .can_queue = 7,
  3842. .this_id = 7,
  3843. .sg_tablesize = SG_ALL,
  3844. .cmd_per_lun = 1,
  3845. .use_clustering = ENABLE_CLUSTERING,
  3846. .proc_name = "esp",
  3847. .proc_info = esp_proc_info,
  3848. };
  3849. #ifndef CONFIG_SUN4
  3850. static struct of_device_id esp_match[] = {
  3851. {
  3852. .name = "SUNW,esp",
  3853. .data = &esp_template,
  3854. },
  3855. {
  3856. .name = "SUNW,fas",
  3857. .data = &esp_template,
  3858. },
  3859. {
  3860. .name = "esp",
  3861. .data = &esp_template,
  3862. },
  3863. {},
  3864. };
  3865. MODULE_DEVICE_TABLE(of, esp_match);
  3866. static struct of_platform_driver esp_sbus_driver = {
  3867. .name = "esp",
  3868. .match_table = esp_match,
  3869. .probe = esp_sbus_probe,
  3870. .remove = __devexit_p(esp_sbus_remove),
  3871. };
  3872. #endif
  3873. static int __init esp_init(void)
  3874. {
  3875. #ifdef CONFIG_SUN4
  3876. return esp_sun4_probe(&esp_template);
  3877. #else
  3878. return of_register_driver(&esp_sbus_driver, &sbus_bus_type);
  3879. #endif
  3880. }
  3881. static void __exit esp_exit(void)
  3882. {
  3883. #ifdef CONFIG_SUN4
  3884. esp_sun4_remove();
  3885. #else
  3886. of_unregister_driver(&esp_sbus_driver);
  3887. #endif
  3888. }
  3889. MODULE_DESCRIPTION("ESP Sun SCSI driver");
  3890. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  3891. MODULE_LICENSE("GPL");
  3892. MODULE_VERSION(DRV_VERSION);
  3893. module_init(esp_init);
  3894. module_exit(esp_exit);