x86.c 76 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include <linux/kvm_host.h>
  17. #include "segment_descriptor.h"
  18. #include "irq.h"
  19. #include "mmu.h"
  20. #include <linux/kvm.h>
  21. #include <linux/fs.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/module.h>
  24. #include <linux/mman.h>
  25. #include <linux/highmem.h>
  26. #include <asm/uaccess.h>
  27. #include <asm/msr.h>
  28. #define MAX_IO_MSRS 256
  29. #define CR0_RESERVED_BITS \
  30. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  31. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  32. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  33. #define CR4_RESERVED_BITS \
  34. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  35. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  36. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  37. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  38. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  39. #define EFER_RESERVED_BITS 0xfffffffffffff2fe
  40. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  41. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  42. struct kvm_x86_ops *kvm_x86_ops;
  43. struct kvm_stats_debugfs_item debugfs_entries[] = {
  44. { "pf_fixed", VCPU_STAT(pf_fixed) },
  45. { "pf_guest", VCPU_STAT(pf_guest) },
  46. { "tlb_flush", VCPU_STAT(tlb_flush) },
  47. { "invlpg", VCPU_STAT(invlpg) },
  48. { "exits", VCPU_STAT(exits) },
  49. { "io_exits", VCPU_STAT(io_exits) },
  50. { "mmio_exits", VCPU_STAT(mmio_exits) },
  51. { "signal_exits", VCPU_STAT(signal_exits) },
  52. { "irq_window", VCPU_STAT(irq_window_exits) },
  53. { "halt_exits", VCPU_STAT(halt_exits) },
  54. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  55. { "request_irq", VCPU_STAT(request_irq_exits) },
  56. { "irq_exits", VCPU_STAT(irq_exits) },
  57. { "host_state_reload", VCPU_STAT(host_state_reload) },
  58. { "efer_reload", VCPU_STAT(efer_reload) },
  59. { "fpu_reload", VCPU_STAT(fpu_reload) },
  60. { "insn_emulation", VCPU_STAT(insn_emulation) },
  61. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  62. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  63. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  64. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  65. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  66. { "mmu_flooded", VM_STAT(mmu_flooded) },
  67. { "mmu_recycled", VM_STAT(mmu_recycled) },
  68. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  69. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  70. { NULL }
  71. };
  72. unsigned long segment_base(u16 selector)
  73. {
  74. struct descriptor_table gdt;
  75. struct segment_descriptor *d;
  76. unsigned long table_base;
  77. unsigned long v;
  78. if (selector == 0)
  79. return 0;
  80. asm("sgdt %0" : "=m"(gdt));
  81. table_base = gdt.base;
  82. if (selector & 4) { /* from ldt */
  83. u16 ldt_selector;
  84. asm("sldt %0" : "=g"(ldt_selector));
  85. table_base = segment_base(ldt_selector);
  86. }
  87. d = (struct segment_descriptor *)(table_base + (selector & ~7));
  88. v = d->base_low | ((unsigned long)d->base_mid << 16) |
  89. ((unsigned long)d->base_high << 24);
  90. #ifdef CONFIG_X86_64
  91. if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  92. v |= ((unsigned long) \
  93. ((struct segment_descriptor_64 *)d)->base_higher) << 32;
  94. #endif
  95. return v;
  96. }
  97. EXPORT_SYMBOL_GPL(segment_base);
  98. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  99. {
  100. if (irqchip_in_kernel(vcpu->kvm))
  101. return vcpu->arch.apic_base;
  102. else
  103. return vcpu->arch.apic_base;
  104. }
  105. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  106. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  107. {
  108. /* TODO: reserve bits check */
  109. if (irqchip_in_kernel(vcpu->kvm))
  110. kvm_lapic_set_base(vcpu, data);
  111. else
  112. vcpu->arch.apic_base = data;
  113. }
  114. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  115. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  116. {
  117. WARN_ON(vcpu->arch.exception.pending);
  118. vcpu->arch.exception.pending = true;
  119. vcpu->arch.exception.has_error_code = false;
  120. vcpu->arch.exception.nr = nr;
  121. }
  122. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  123. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  124. u32 error_code)
  125. {
  126. ++vcpu->stat.pf_guest;
  127. if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
  128. printk(KERN_DEBUG "kvm: inject_page_fault:"
  129. " double fault 0x%lx\n", addr);
  130. vcpu->arch.exception.nr = DF_VECTOR;
  131. vcpu->arch.exception.error_code = 0;
  132. return;
  133. }
  134. vcpu->arch.cr2 = addr;
  135. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  136. }
  137. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  138. {
  139. WARN_ON(vcpu->arch.exception.pending);
  140. vcpu->arch.exception.pending = true;
  141. vcpu->arch.exception.has_error_code = true;
  142. vcpu->arch.exception.nr = nr;
  143. vcpu->arch.exception.error_code = error_code;
  144. }
  145. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  146. static void __queue_exception(struct kvm_vcpu *vcpu)
  147. {
  148. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  149. vcpu->arch.exception.has_error_code,
  150. vcpu->arch.exception.error_code);
  151. }
  152. /*
  153. * Load the pae pdptrs. Return true is they are all valid.
  154. */
  155. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  156. {
  157. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  158. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  159. int i;
  160. int ret;
  161. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  162. down_read(&current->mm->mmap_sem);
  163. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  164. offset * sizeof(u64), sizeof(pdpte));
  165. if (ret < 0) {
  166. ret = 0;
  167. goto out;
  168. }
  169. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  170. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  171. ret = 0;
  172. goto out;
  173. }
  174. }
  175. ret = 1;
  176. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  177. out:
  178. up_read(&current->mm->mmap_sem);
  179. return ret;
  180. }
  181. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  182. {
  183. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  184. bool changed = true;
  185. int r;
  186. if (is_long_mode(vcpu) || !is_pae(vcpu))
  187. return false;
  188. down_read(&current->mm->mmap_sem);
  189. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  190. if (r < 0)
  191. goto out;
  192. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  193. out:
  194. up_read(&current->mm->mmap_sem);
  195. return changed;
  196. }
  197. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  198. {
  199. if (cr0 & CR0_RESERVED_BITS) {
  200. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  201. cr0, vcpu->arch.cr0);
  202. kvm_inject_gp(vcpu, 0);
  203. return;
  204. }
  205. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  206. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  207. kvm_inject_gp(vcpu, 0);
  208. return;
  209. }
  210. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  211. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  212. "and a clear PE flag\n");
  213. kvm_inject_gp(vcpu, 0);
  214. return;
  215. }
  216. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  217. #ifdef CONFIG_X86_64
  218. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  219. int cs_db, cs_l;
  220. if (!is_pae(vcpu)) {
  221. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  222. "in long mode while PAE is disabled\n");
  223. kvm_inject_gp(vcpu, 0);
  224. return;
  225. }
  226. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  227. if (cs_l) {
  228. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  229. "in long mode while CS.L == 1\n");
  230. kvm_inject_gp(vcpu, 0);
  231. return;
  232. }
  233. } else
  234. #endif
  235. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  236. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  237. "reserved bits\n");
  238. kvm_inject_gp(vcpu, 0);
  239. return;
  240. }
  241. }
  242. kvm_x86_ops->set_cr0(vcpu, cr0);
  243. vcpu->arch.cr0 = cr0;
  244. kvm_mmu_reset_context(vcpu);
  245. return;
  246. }
  247. EXPORT_SYMBOL_GPL(set_cr0);
  248. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  249. {
  250. set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  251. }
  252. EXPORT_SYMBOL_GPL(lmsw);
  253. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  254. {
  255. if (cr4 & CR4_RESERVED_BITS) {
  256. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  257. kvm_inject_gp(vcpu, 0);
  258. return;
  259. }
  260. if (is_long_mode(vcpu)) {
  261. if (!(cr4 & X86_CR4_PAE)) {
  262. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  263. "in long mode\n");
  264. kvm_inject_gp(vcpu, 0);
  265. return;
  266. }
  267. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  268. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  269. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  270. kvm_inject_gp(vcpu, 0);
  271. return;
  272. }
  273. if (cr4 & X86_CR4_VMXE) {
  274. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  275. kvm_inject_gp(vcpu, 0);
  276. return;
  277. }
  278. kvm_x86_ops->set_cr4(vcpu, cr4);
  279. vcpu->arch.cr4 = cr4;
  280. kvm_mmu_reset_context(vcpu);
  281. }
  282. EXPORT_SYMBOL_GPL(set_cr4);
  283. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  284. {
  285. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  286. kvm_mmu_flush_tlb(vcpu);
  287. return;
  288. }
  289. if (is_long_mode(vcpu)) {
  290. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  291. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  292. kvm_inject_gp(vcpu, 0);
  293. return;
  294. }
  295. } else {
  296. if (is_pae(vcpu)) {
  297. if (cr3 & CR3_PAE_RESERVED_BITS) {
  298. printk(KERN_DEBUG
  299. "set_cr3: #GP, reserved bits\n");
  300. kvm_inject_gp(vcpu, 0);
  301. return;
  302. }
  303. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  304. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  305. "reserved bits\n");
  306. kvm_inject_gp(vcpu, 0);
  307. return;
  308. }
  309. }
  310. /*
  311. * We don't check reserved bits in nonpae mode, because
  312. * this isn't enforced, and VMware depends on this.
  313. */
  314. }
  315. down_read(&current->mm->mmap_sem);
  316. /*
  317. * Does the new cr3 value map to physical memory? (Note, we
  318. * catch an invalid cr3 even in real-mode, because it would
  319. * cause trouble later on when we turn on paging anyway.)
  320. *
  321. * A real CPU would silently accept an invalid cr3 and would
  322. * attempt to use it - with largely undefined (and often hard
  323. * to debug) behavior on the guest side.
  324. */
  325. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  326. kvm_inject_gp(vcpu, 0);
  327. else {
  328. vcpu->arch.cr3 = cr3;
  329. vcpu->arch.mmu.new_cr3(vcpu);
  330. }
  331. up_read(&current->mm->mmap_sem);
  332. }
  333. EXPORT_SYMBOL_GPL(set_cr3);
  334. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  335. {
  336. if (cr8 & CR8_RESERVED_BITS) {
  337. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  338. kvm_inject_gp(vcpu, 0);
  339. return;
  340. }
  341. if (irqchip_in_kernel(vcpu->kvm))
  342. kvm_lapic_set_tpr(vcpu, cr8);
  343. else
  344. vcpu->arch.cr8 = cr8;
  345. }
  346. EXPORT_SYMBOL_GPL(set_cr8);
  347. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  348. {
  349. if (irqchip_in_kernel(vcpu->kvm))
  350. return kvm_lapic_get_cr8(vcpu);
  351. else
  352. return vcpu->arch.cr8;
  353. }
  354. EXPORT_SYMBOL_GPL(get_cr8);
  355. /*
  356. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  357. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  358. *
  359. * This list is modified at module load time to reflect the
  360. * capabilities of the host cpu.
  361. */
  362. static u32 msrs_to_save[] = {
  363. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  364. MSR_K6_STAR,
  365. #ifdef CONFIG_X86_64
  366. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  367. #endif
  368. MSR_IA32_TIME_STAMP_COUNTER,
  369. };
  370. static unsigned num_msrs_to_save;
  371. static u32 emulated_msrs[] = {
  372. MSR_IA32_MISC_ENABLE,
  373. };
  374. #ifdef CONFIG_X86_64
  375. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  376. {
  377. if (efer & EFER_RESERVED_BITS) {
  378. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  379. efer);
  380. kvm_inject_gp(vcpu, 0);
  381. return;
  382. }
  383. if (is_paging(vcpu)
  384. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  385. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  386. kvm_inject_gp(vcpu, 0);
  387. return;
  388. }
  389. kvm_x86_ops->set_efer(vcpu, efer);
  390. efer &= ~EFER_LMA;
  391. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  392. vcpu->arch.shadow_efer = efer;
  393. }
  394. #endif
  395. /*
  396. * Writes msr value into into the appropriate "register".
  397. * Returns 0 on success, non-0 otherwise.
  398. * Assumes vcpu_load() was already called.
  399. */
  400. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  401. {
  402. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  403. }
  404. /*
  405. * Adapt set_msr() to msr_io()'s calling convention
  406. */
  407. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  408. {
  409. return kvm_set_msr(vcpu, index, *data);
  410. }
  411. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  412. {
  413. switch (msr) {
  414. #ifdef CONFIG_X86_64
  415. case MSR_EFER:
  416. set_efer(vcpu, data);
  417. break;
  418. #endif
  419. case MSR_IA32_MC0_STATUS:
  420. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  421. __FUNCTION__, data);
  422. break;
  423. case MSR_IA32_MCG_STATUS:
  424. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  425. __FUNCTION__, data);
  426. break;
  427. case MSR_IA32_UCODE_REV:
  428. case MSR_IA32_UCODE_WRITE:
  429. case 0x200 ... 0x2ff: /* MTRRs */
  430. break;
  431. case MSR_IA32_APICBASE:
  432. kvm_set_apic_base(vcpu, data);
  433. break;
  434. case MSR_IA32_MISC_ENABLE:
  435. vcpu->arch.ia32_misc_enable_msr = data;
  436. break;
  437. default:
  438. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  439. return 1;
  440. }
  441. return 0;
  442. }
  443. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  444. /*
  445. * Reads an msr value (of 'msr_index') into 'pdata'.
  446. * Returns 0 on success, non-0 otherwise.
  447. * Assumes vcpu_load() was already called.
  448. */
  449. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  450. {
  451. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  452. }
  453. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  454. {
  455. u64 data;
  456. switch (msr) {
  457. case 0xc0010010: /* SYSCFG */
  458. case 0xc0010015: /* HWCR */
  459. case MSR_IA32_PLATFORM_ID:
  460. case MSR_IA32_P5_MC_ADDR:
  461. case MSR_IA32_P5_MC_TYPE:
  462. case MSR_IA32_MC0_CTL:
  463. case MSR_IA32_MCG_STATUS:
  464. case MSR_IA32_MCG_CAP:
  465. case MSR_IA32_MC0_MISC:
  466. case MSR_IA32_MC0_MISC+4:
  467. case MSR_IA32_MC0_MISC+8:
  468. case MSR_IA32_MC0_MISC+12:
  469. case MSR_IA32_MC0_MISC+16:
  470. case MSR_IA32_UCODE_REV:
  471. case MSR_IA32_PERF_STATUS:
  472. case MSR_IA32_EBL_CR_POWERON:
  473. /* MTRR registers */
  474. case 0xfe:
  475. case 0x200 ... 0x2ff:
  476. data = 0;
  477. break;
  478. case 0xcd: /* fsb frequency */
  479. data = 3;
  480. break;
  481. case MSR_IA32_APICBASE:
  482. data = kvm_get_apic_base(vcpu);
  483. break;
  484. case MSR_IA32_MISC_ENABLE:
  485. data = vcpu->arch.ia32_misc_enable_msr;
  486. break;
  487. #ifdef CONFIG_X86_64
  488. case MSR_EFER:
  489. data = vcpu->arch.shadow_efer;
  490. break;
  491. #endif
  492. default:
  493. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  494. return 1;
  495. }
  496. *pdata = data;
  497. return 0;
  498. }
  499. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  500. /*
  501. * Read or write a bunch of msrs. All parameters are kernel addresses.
  502. *
  503. * @return number of msrs set successfully.
  504. */
  505. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  506. struct kvm_msr_entry *entries,
  507. int (*do_msr)(struct kvm_vcpu *vcpu,
  508. unsigned index, u64 *data))
  509. {
  510. int i;
  511. vcpu_load(vcpu);
  512. for (i = 0; i < msrs->nmsrs; ++i)
  513. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  514. break;
  515. vcpu_put(vcpu);
  516. return i;
  517. }
  518. /*
  519. * Read or write a bunch of msrs. Parameters are user addresses.
  520. *
  521. * @return number of msrs set successfully.
  522. */
  523. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  524. int (*do_msr)(struct kvm_vcpu *vcpu,
  525. unsigned index, u64 *data),
  526. int writeback)
  527. {
  528. struct kvm_msrs msrs;
  529. struct kvm_msr_entry *entries;
  530. int r, n;
  531. unsigned size;
  532. r = -EFAULT;
  533. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  534. goto out;
  535. r = -E2BIG;
  536. if (msrs.nmsrs >= MAX_IO_MSRS)
  537. goto out;
  538. r = -ENOMEM;
  539. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  540. entries = vmalloc(size);
  541. if (!entries)
  542. goto out;
  543. r = -EFAULT;
  544. if (copy_from_user(entries, user_msrs->entries, size))
  545. goto out_free;
  546. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  547. if (r < 0)
  548. goto out_free;
  549. r = -EFAULT;
  550. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  551. goto out_free;
  552. r = n;
  553. out_free:
  554. vfree(entries);
  555. out:
  556. return r;
  557. }
  558. /*
  559. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  560. * cached on it.
  561. */
  562. void decache_vcpus_on_cpu(int cpu)
  563. {
  564. struct kvm *vm;
  565. struct kvm_vcpu *vcpu;
  566. int i;
  567. spin_lock(&kvm_lock);
  568. list_for_each_entry(vm, &vm_list, vm_list)
  569. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  570. vcpu = vm->vcpus[i];
  571. if (!vcpu)
  572. continue;
  573. /*
  574. * If the vcpu is locked, then it is running on some
  575. * other cpu and therefore it is not cached on the
  576. * cpu in question.
  577. *
  578. * If it's not locked, check the last cpu it executed
  579. * on.
  580. */
  581. if (mutex_trylock(&vcpu->mutex)) {
  582. if (vcpu->cpu == cpu) {
  583. kvm_x86_ops->vcpu_decache(vcpu);
  584. vcpu->cpu = -1;
  585. }
  586. mutex_unlock(&vcpu->mutex);
  587. }
  588. }
  589. spin_unlock(&kvm_lock);
  590. }
  591. int kvm_dev_ioctl_check_extension(long ext)
  592. {
  593. int r;
  594. switch (ext) {
  595. case KVM_CAP_IRQCHIP:
  596. case KVM_CAP_HLT:
  597. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  598. case KVM_CAP_USER_MEMORY:
  599. case KVM_CAP_SET_TSS_ADDR:
  600. case KVM_CAP_EXT_CPUID:
  601. r = 1;
  602. break;
  603. case KVM_CAP_VAPIC:
  604. r = !kvm_x86_ops->cpu_has_accelerated_tpr();
  605. break;
  606. default:
  607. r = 0;
  608. break;
  609. }
  610. return r;
  611. }
  612. long kvm_arch_dev_ioctl(struct file *filp,
  613. unsigned int ioctl, unsigned long arg)
  614. {
  615. void __user *argp = (void __user *)arg;
  616. long r;
  617. switch (ioctl) {
  618. case KVM_GET_MSR_INDEX_LIST: {
  619. struct kvm_msr_list __user *user_msr_list = argp;
  620. struct kvm_msr_list msr_list;
  621. unsigned n;
  622. r = -EFAULT;
  623. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  624. goto out;
  625. n = msr_list.nmsrs;
  626. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  627. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  628. goto out;
  629. r = -E2BIG;
  630. if (n < num_msrs_to_save)
  631. goto out;
  632. r = -EFAULT;
  633. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  634. num_msrs_to_save * sizeof(u32)))
  635. goto out;
  636. if (copy_to_user(user_msr_list->indices
  637. + num_msrs_to_save * sizeof(u32),
  638. &emulated_msrs,
  639. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  640. goto out;
  641. r = 0;
  642. break;
  643. }
  644. default:
  645. r = -EINVAL;
  646. }
  647. out:
  648. return r;
  649. }
  650. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  651. {
  652. kvm_x86_ops->vcpu_load(vcpu, cpu);
  653. }
  654. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  655. {
  656. kvm_x86_ops->vcpu_put(vcpu);
  657. kvm_put_guest_fpu(vcpu);
  658. }
  659. static int is_efer_nx(void)
  660. {
  661. u64 efer;
  662. rdmsrl(MSR_EFER, efer);
  663. return efer & EFER_NX;
  664. }
  665. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  666. {
  667. int i;
  668. struct kvm_cpuid_entry2 *e, *entry;
  669. entry = NULL;
  670. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  671. e = &vcpu->arch.cpuid_entries[i];
  672. if (e->function == 0x80000001) {
  673. entry = e;
  674. break;
  675. }
  676. }
  677. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  678. entry->edx &= ~(1 << 20);
  679. printk(KERN_INFO "kvm: guest NX capability removed\n");
  680. }
  681. }
  682. /* when an old userspace process fills a new kernel module */
  683. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  684. struct kvm_cpuid *cpuid,
  685. struct kvm_cpuid_entry __user *entries)
  686. {
  687. int r, i;
  688. struct kvm_cpuid_entry *cpuid_entries;
  689. r = -E2BIG;
  690. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  691. goto out;
  692. r = -ENOMEM;
  693. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  694. if (!cpuid_entries)
  695. goto out;
  696. r = -EFAULT;
  697. if (copy_from_user(cpuid_entries, entries,
  698. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  699. goto out_free;
  700. for (i = 0; i < cpuid->nent; i++) {
  701. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  702. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  703. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  704. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  705. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  706. vcpu->arch.cpuid_entries[i].index = 0;
  707. vcpu->arch.cpuid_entries[i].flags = 0;
  708. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  709. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  710. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  711. }
  712. vcpu->arch.cpuid_nent = cpuid->nent;
  713. cpuid_fix_nx_cap(vcpu);
  714. r = 0;
  715. out_free:
  716. vfree(cpuid_entries);
  717. out:
  718. return r;
  719. }
  720. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  721. struct kvm_cpuid2 *cpuid,
  722. struct kvm_cpuid_entry2 __user *entries)
  723. {
  724. int r;
  725. r = -E2BIG;
  726. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  727. goto out;
  728. r = -EFAULT;
  729. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  730. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  731. goto out;
  732. vcpu->arch.cpuid_nent = cpuid->nent;
  733. return 0;
  734. out:
  735. return r;
  736. }
  737. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  738. struct kvm_cpuid2 *cpuid,
  739. struct kvm_cpuid_entry2 __user *entries)
  740. {
  741. int r;
  742. r = -E2BIG;
  743. if (cpuid->nent < vcpu->arch.cpuid_nent)
  744. goto out;
  745. r = -EFAULT;
  746. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  747. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  748. goto out;
  749. return 0;
  750. out:
  751. cpuid->nent = vcpu->arch.cpuid_nent;
  752. return r;
  753. }
  754. static inline u32 bit(int bitno)
  755. {
  756. return 1 << (bitno & 31);
  757. }
  758. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  759. u32 index)
  760. {
  761. entry->function = function;
  762. entry->index = index;
  763. cpuid_count(entry->function, entry->index,
  764. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  765. entry->flags = 0;
  766. }
  767. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  768. u32 index, int *nent, int maxnent)
  769. {
  770. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  771. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  772. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  773. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  774. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  775. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  776. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  777. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  778. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  779. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  780. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  781. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  782. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  783. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  784. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  785. bit(X86_FEATURE_PGE) |
  786. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  787. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  788. bit(X86_FEATURE_SYSCALL) |
  789. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  790. #ifdef CONFIG_X86_64
  791. bit(X86_FEATURE_LM) |
  792. #endif
  793. bit(X86_FEATURE_MMXEXT) |
  794. bit(X86_FEATURE_3DNOWEXT) |
  795. bit(X86_FEATURE_3DNOW);
  796. const u32 kvm_supported_word3_x86_features =
  797. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  798. const u32 kvm_supported_word6_x86_features =
  799. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  800. /* all func 2 cpuid_count() should be called on the same cpu */
  801. get_cpu();
  802. do_cpuid_1_ent(entry, function, index);
  803. ++*nent;
  804. switch (function) {
  805. case 0:
  806. entry->eax = min(entry->eax, (u32)0xb);
  807. break;
  808. case 1:
  809. entry->edx &= kvm_supported_word0_x86_features;
  810. entry->ecx &= kvm_supported_word3_x86_features;
  811. break;
  812. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  813. * may return different values. This forces us to get_cpu() before
  814. * issuing the first command, and also to emulate this annoying behavior
  815. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  816. case 2: {
  817. int t, times = entry->eax & 0xff;
  818. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  819. for (t = 1; t < times && *nent < maxnent; ++t) {
  820. do_cpuid_1_ent(&entry[t], function, 0);
  821. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  822. ++*nent;
  823. }
  824. break;
  825. }
  826. /* function 4 and 0xb have additional index. */
  827. case 4: {
  828. int index, cache_type;
  829. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  830. /* read more entries until cache_type is zero */
  831. for (index = 1; *nent < maxnent; ++index) {
  832. cache_type = entry[index - 1].eax & 0x1f;
  833. if (!cache_type)
  834. break;
  835. do_cpuid_1_ent(&entry[index], function, index);
  836. entry[index].flags |=
  837. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  838. ++*nent;
  839. }
  840. break;
  841. }
  842. case 0xb: {
  843. int index, level_type;
  844. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  845. /* read more entries until level_type is zero */
  846. for (index = 1; *nent < maxnent; ++index) {
  847. level_type = entry[index - 1].ecx & 0xff;
  848. if (!level_type)
  849. break;
  850. do_cpuid_1_ent(&entry[index], function, index);
  851. entry[index].flags |=
  852. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  853. ++*nent;
  854. }
  855. break;
  856. }
  857. case 0x80000000:
  858. entry->eax = min(entry->eax, 0x8000001a);
  859. break;
  860. case 0x80000001:
  861. entry->edx &= kvm_supported_word1_x86_features;
  862. entry->ecx &= kvm_supported_word6_x86_features;
  863. break;
  864. }
  865. put_cpu();
  866. }
  867. static int kvm_vm_ioctl_get_supported_cpuid(struct kvm *kvm,
  868. struct kvm_cpuid2 *cpuid,
  869. struct kvm_cpuid_entry2 __user *entries)
  870. {
  871. struct kvm_cpuid_entry2 *cpuid_entries;
  872. int limit, nent = 0, r = -E2BIG;
  873. u32 func;
  874. if (cpuid->nent < 1)
  875. goto out;
  876. r = -ENOMEM;
  877. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  878. if (!cpuid_entries)
  879. goto out;
  880. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  881. limit = cpuid_entries[0].eax;
  882. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  883. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  884. &nent, cpuid->nent);
  885. r = -E2BIG;
  886. if (nent >= cpuid->nent)
  887. goto out_free;
  888. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  889. limit = cpuid_entries[nent - 1].eax;
  890. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  891. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  892. &nent, cpuid->nent);
  893. r = -EFAULT;
  894. if (copy_to_user(entries, cpuid_entries,
  895. nent * sizeof(struct kvm_cpuid_entry2)))
  896. goto out_free;
  897. cpuid->nent = nent;
  898. r = 0;
  899. out_free:
  900. vfree(cpuid_entries);
  901. out:
  902. return r;
  903. }
  904. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  905. struct kvm_lapic_state *s)
  906. {
  907. vcpu_load(vcpu);
  908. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  909. vcpu_put(vcpu);
  910. return 0;
  911. }
  912. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  913. struct kvm_lapic_state *s)
  914. {
  915. vcpu_load(vcpu);
  916. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  917. kvm_apic_post_state_restore(vcpu);
  918. vcpu_put(vcpu);
  919. return 0;
  920. }
  921. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  922. struct kvm_interrupt *irq)
  923. {
  924. if (irq->irq < 0 || irq->irq >= 256)
  925. return -EINVAL;
  926. if (irqchip_in_kernel(vcpu->kvm))
  927. return -ENXIO;
  928. vcpu_load(vcpu);
  929. set_bit(irq->irq, vcpu->arch.irq_pending);
  930. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  931. vcpu_put(vcpu);
  932. return 0;
  933. }
  934. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  935. struct kvm_tpr_access_ctl *tac)
  936. {
  937. if (tac->flags)
  938. return -EINVAL;
  939. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  940. return 0;
  941. }
  942. long kvm_arch_vcpu_ioctl(struct file *filp,
  943. unsigned int ioctl, unsigned long arg)
  944. {
  945. struct kvm_vcpu *vcpu = filp->private_data;
  946. void __user *argp = (void __user *)arg;
  947. int r;
  948. switch (ioctl) {
  949. case KVM_GET_LAPIC: {
  950. struct kvm_lapic_state lapic;
  951. memset(&lapic, 0, sizeof lapic);
  952. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  953. if (r)
  954. goto out;
  955. r = -EFAULT;
  956. if (copy_to_user(argp, &lapic, sizeof lapic))
  957. goto out;
  958. r = 0;
  959. break;
  960. }
  961. case KVM_SET_LAPIC: {
  962. struct kvm_lapic_state lapic;
  963. r = -EFAULT;
  964. if (copy_from_user(&lapic, argp, sizeof lapic))
  965. goto out;
  966. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  967. if (r)
  968. goto out;
  969. r = 0;
  970. break;
  971. }
  972. case KVM_INTERRUPT: {
  973. struct kvm_interrupt irq;
  974. r = -EFAULT;
  975. if (copy_from_user(&irq, argp, sizeof irq))
  976. goto out;
  977. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  978. if (r)
  979. goto out;
  980. r = 0;
  981. break;
  982. }
  983. case KVM_SET_CPUID: {
  984. struct kvm_cpuid __user *cpuid_arg = argp;
  985. struct kvm_cpuid cpuid;
  986. r = -EFAULT;
  987. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  988. goto out;
  989. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  990. if (r)
  991. goto out;
  992. break;
  993. }
  994. case KVM_SET_CPUID2: {
  995. struct kvm_cpuid2 __user *cpuid_arg = argp;
  996. struct kvm_cpuid2 cpuid;
  997. r = -EFAULT;
  998. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  999. goto out;
  1000. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1001. cpuid_arg->entries);
  1002. if (r)
  1003. goto out;
  1004. break;
  1005. }
  1006. case KVM_GET_CPUID2: {
  1007. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1008. struct kvm_cpuid2 cpuid;
  1009. r = -EFAULT;
  1010. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1011. goto out;
  1012. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1013. cpuid_arg->entries);
  1014. if (r)
  1015. goto out;
  1016. r = -EFAULT;
  1017. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1018. goto out;
  1019. r = 0;
  1020. break;
  1021. }
  1022. case KVM_GET_MSRS:
  1023. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1024. break;
  1025. case KVM_SET_MSRS:
  1026. r = msr_io(vcpu, argp, do_set_msr, 0);
  1027. break;
  1028. case KVM_TPR_ACCESS_REPORTING: {
  1029. struct kvm_tpr_access_ctl tac;
  1030. r = -EFAULT;
  1031. if (copy_from_user(&tac, argp, sizeof tac))
  1032. goto out;
  1033. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1034. if (r)
  1035. goto out;
  1036. r = -EFAULT;
  1037. if (copy_to_user(argp, &tac, sizeof tac))
  1038. goto out;
  1039. r = 0;
  1040. break;
  1041. };
  1042. case KVM_SET_VAPIC_ADDR: {
  1043. struct kvm_vapic_addr va;
  1044. r = -EINVAL;
  1045. if (!irqchip_in_kernel(vcpu->kvm))
  1046. goto out;
  1047. r = -EFAULT;
  1048. if (copy_from_user(&va, argp, sizeof va))
  1049. goto out;
  1050. r = 0;
  1051. kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
  1052. break;
  1053. }
  1054. default:
  1055. r = -EINVAL;
  1056. }
  1057. out:
  1058. return r;
  1059. }
  1060. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1061. {
  1062. int ret;
  1063. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1064. return -1;
  1065. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1066. return ret;
  1067. }
  1068. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1069. u32 kvm_nr_mmu_pages)
  1070. {
  1071. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1072. return -EINVAL;
  1073. down_write(&current->mm->mmap_sem);
  1074. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1075. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1076. up_write(&current->mm->mmap_sem);
  1077. return 0;
  1078. }
  1079. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1080. {
  1081. return kvm->arch.n_alloc_mmu_pages;
  1082. }
  1083. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1084. {
  1085. int i;
  1086. struct kvm_mem_alias *alias;
  1087. for (i = 0; i < kvm->arch.naliases; ++i) {
  1088. alias = &kvm->arch.aliases[i];
  1089. if (gfn >= alias->base_gfn
  1090. && gfn < alias->base_gfn + alias->npages)
  1091. return alias->target_gfn + gfn - alias->base_gfn;
  1092. }
  1093. return gfn;
  1094. }
  1095. /*
  1096. * Set a new alias region. Aliases map a portion of physical memory into
  1097. * another portion. This is useful for memory windows, for example the PC
  1098. * VGA region.
  1099. */
  1100. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1101. struct kvm_memory_alias *alias)
  1102. {
  1103. int r, n;
  1104. struct kvm_mem_alias *p;
  1105. r = -EINVAL;
  1106. /* General sanity checks */
  1107. if (alias->memory_size & (PAGE_SIZE - 1))
  1108. goto out;
  1109. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1110. goto out;
  1111. if (alias->slot >= KVM_ALIAS_SLOTS)
  1112. goto out;
  1113. if (alias->guest_phys_addr + alias->memory_size
  1114. < alias->guest_phys_addr)
  1115. goto out;
  1116. if (alias->target_phys_addr + alias->memory_size
  1117. < alias->target_phys_addr)
  1118. goto out;
  1119. down_write(&current->mm->mmap_sem);
  1120. p = &kvm->arch.aliases[alias->slot];
  1121. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1122. p->npages = alias->memory_size >> PAGE_SHIFT;
  1123. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1124. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1125. if (kvm->arch.aliases[n - 1].npages)
  1126. break;
  1127. kvm->arch.naliases = n;
  1128. kvm_mmu_zap_all(kvm);
  1129. up_write(&current->mm->mmap_sem);
  1130. return 0;
  1131. out:
  1132. return r;
  1133. }
  1134. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1135. {
  1136. int r;
  1137. r = 0;
  1138. switch (chip->chip_id) {
  1139. case KVM_IRQCHIP_PIC_MASTER:
  1140. memcpy(&chip->chip.pic,
  1141. &pic_irqchip(kvm)->pics[0],
  1142. sizeof(struct kvm_pic_state));
  1143. break;
  1144. case KVM_IRQCHIP_PIC_SLAVE:
  1145. memcpy(&chip->chip.pic,
  1146. &pic_irqchip(kvm)->pics[1],
  1147. sizeof(struct kvm_pic_state));
  1148. break;
  1149. case KVM_IRQCHIP_IOAPIC:
  1150. memcpy(&chip->chip.ioapic,
  1151. ioapic_irqchip(kvm),
  1152. sizeof(struct kvm_ioapic_state));
  1153. break;
  1154. default:
  1155. r = -EINVAL;
  1156. break;
  1157. }
  1158. return r;
  1159. }
  1160. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1161. {
  1162. int r;
  1163. r = 0;
  1164. switch (chip->chip_id) {
  1165. case KVM_IRQCHIP_PIC_MASTER:
  1166. memcpy(&pic_irqchip(kvm)->pics[0],
  1167. &chip->chip.pic,
  1168. sizeof(struct kvm_pic_state));
  1169. break;
  1170. case KVM_IRQCHIP_PIC_SLAVE:
  1171. memcpy(&pic_irqchip(kvm)->pics[1],
  1172. &chip->chip.pic,
  1173. sizeof(struct kvm_pic_state));
  1174. break;
  1175. case KVM_IRQCHIP_IOAPIC:
  1176. memcpy(ioapic_irqchip(kvm),
  1177. &chip->chip.ioapic,
  1178. sizeof(struct kvm_ioapic_state));
  1179. break;
  1180. default:
  1181. r = -EINVAL;
  1182. break;
  1183. }
  1184. kvm_pic_update_irq(pic_irqchip(kvm));
  1185. return r;
  1186. }
  1187. /*
  1188. * Get (and clear) the dirty memory log for a memory slot.
  1189. */
  1190. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1191. struct kvm_dirty_log *log)
  1192. {
  1193. int r;
  1194. int n;
  1195. struct kvm_memory_slot *memslot;
  1196. int is_dirty = 0;
  1197. down_write(&current->mm->mmap_sem);
  1198. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1199. if (r)
  1200. goto out;
  1201. /* If nothing is dirty, don't bother messing with page tables. */
  1202. if (is_dirty) {
  1203. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1204. kvm_flush_remote_tlbs(kvm);
  1205. memslot = &kvm->memslots[log->slot];
  1206. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1207. memset(memslot->dirty_bitmap, 0, n);
  1208. }
  1209. r = 0;
  1210. out:
  1211. up_write(&current->mm->mmap_sem);
  1212. return r;
  1213. }
  1214. long kvm_arch_vm_ioctl(struct file *filp,
  1215. unsigned int ioctl, unsigned long arg)
  1216. {
  1217. struct kvm *kvm = filp->private_data;
  1218. void __user *argp = (void __user *)arg;
  1219. int r = -EINVAL;
  1220. switch (ioctl) {
  1221. case KVM_SET_TSS_ADDR:
  1222. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1223. if (r < 0)
  1224. goto out;
  1225. break;
  1226. case KVM_SET_MEMORY_REGION: {
  1227. struct kvm_memory_region kvm_mem;
  1228. struct kvm_userspace_memory_region kvm_userspace_mem;
  1229. r = -EFAULT;
  1230. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1231. goto out;
  1232. kvm_userspace_mem.slot = kvm_mem.slot;
  1233. kvm_userspace_mem.flags = kvm_mem.flags;
  1234. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1235. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1236. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1237. if (r)
  1238. goto out;
  1239. break;
  1240. }
  1241. case KVM_SET_NR_MMU_PAGES:
  1242. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1243. if (r)
  1244. goto out;
  1245. break;
  1246. case KVM_GET_NR_MMU_PAGES:
  1247. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1248. break;
  1249. case KVM_SET_MEMORY_ALIAS: {
  1250. struct kvm_memory_alias alias;
  1251. r = -EFAULT;
  1252. if (copy_from_user(&alias, argp, sizeof alias))
  1253. goto out;
  1254. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  1255. if (r)
  1256. goto out;
  1257. break;
  1258. }
  1259. case KVM_CREATE_IRQCHIP:
  1260. r = -ENOMEM;
  1261. kvm->arch.vpic = kvm_create_pic(kvm);
  1262. if (kvm->arch.vpic) {
  1263. r = kvm_ioapic_init(kvm);
  1264. if (r) {
  1265. kfree(kvm->arch.vpic);
  1266. kvm->arch.vpic = NULL;
  1267. goto out;
  1268. }
  1269. } else
  1270. goto out;
  1271. break;
  1272. case KVM_IRQ_LINE: {
  1273. struct kvm_irq_level irq_event;
  1274. r = -EFAULT;
  1275. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1276. goto out;
  1277. if (irqchip_in_kernel(kvm)) {
  1278. mutex_lock(&kvm->lock);
  1279. if (irq_event.irq < 16)
  1280. kvm_pic_set_irq(pic_irqchip(kvm),
  1281. irq_event.irq,
  1282. irq_event.level);
  1283. kvm_ioapic_set_irq(kvm->arch.vioapic,
  1284. irq_event.irq,
  1285. irq_event.level);
  1286. mutex_unlock(&kvm->lock);
  1287. r = 0;
  1288. }
  1289. break;
  1290. }
  1291. case KVM_GET_IRQCHIP: {
  1292. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1293. struct kvm_irqchip chip;
  1294. r = -EFAULT;
  1295. if (copy_from_user(&chip, argp, sizeof chip))
  1296. goto out;
  1297. r = -ENXIO;
  1298. if (!irqchip_in_kernel(kvm))
  1299. goto out;
  1300. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  1301. if (r)
  1302. goto out;
  1303. r = -EFAULT;
  1304. if (copy_to_user(argp, &chip, sizeof chip))
  1305. goto out;
  1306. r = 0;
  1307. break;
  1308. }
  1309. case KVM_SET_IRQCHIP: {
  1310. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1311. struct kvm_irqchip chip;
  1312. r = -EFAULT;
  1313. if (copy_from_user(&chip, argp, sizeof chip))
  1314. goto out;
  1315. r = -ENXIO;
  1316. if (!irqchip_in_kernel(kvm))
  1317. goto out;
  1318. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  1319. if (r)
  1320. goto out;
  1321. r = 0;
  1322. break;
  1323. }
  1324. case KVM_GET_SUPPORTED_CPUID: {
  1325. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1326. struct kvm_cpuid2 cpuid;
  1327. r = -EFAULT;
  1328. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1329. goto out;
  1330. r = kvm_vm_ioctl_get_supported_cpuid(kvm, &cpuid,
  1331. cpuid_arg->entries);
  1332. if (r)
  1333. goto out;
  1334. r = -EFAULT;
  1335. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1336. goto out;
  1337. r = 0;
  1338. break;
  1339. }
  1340. default:
  1341. ;
  1342. }
  1343. out:
  1344. return r;
  1345. }
  1346. static void kvm_init_msr_list(void)
  1347. {
  1348. u32 dummy[2];
  1349. unsigned i, j;
  1350. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1351. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1352. continue;
  1353. if (j < i)
  1354. msrs_to_save[j] = msrs_to_save[i];
  1355. j++;
  1356. }
  1357. num_msrs_to_save = j;
  1358. }
  1359. /*
  1360. * Only apic need an MMIO device hook, so shortcut now..
  1361. */
  1362. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1363. gpa_t addr)
  1364. {
  1365. struct kvm_io_device *dev;
  1366. if (vcpu->arch.apic) {
  1367. dev = &vcpu->arch.apic->dev;
  1368. if (dev->in_range(dev, addr))
  1369. return dev;
  1370. }
  1371. return NULL;
  1372. }
  1373. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1374. gpa_t addr)
  1375. {
  1376. struct kvm_io_device *dev;
  1377. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  1378. if (dev == NULL)
  1379. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  1380. return dev;
  1381. }
  1382. int emulator_read_std(unsigned long addr,
  1383. void *val,
  1384. unsigned int bytes,
  1385. struct kvm_vcpu *vcpu)
  1386. {
  1387. void *data = val;
  1388. int r = X86EMUL_CONTINUE;
  1389. down_read(&current->mm->mmap_sem);
  1390. while (bytes) {
  1391. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1392. unsigned offset = addr & (PAGE_SIZE-1);
  1393. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1394. int ret;
  1395. if (gpa == UNMAPPED_GVA) {
  1396. r = X86EMUL_PROPAGATE_FAULT;
  1397. goto out;
  1398. }
  1399. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1400. if (ret < 0) {
  1401. r = X86EMUL_UNHANDLEABLE;
  1402. goto out;
  1403. }
  1404. bytes -= tocopy;
  1405. data += tocopy;
  1406. addr += tocopy;
  1407. }
  1408. out:
  1409. up_read(&current->mm->mmap_sem);
  1410. return r;
  1411. }
  1412. EXPORT_SYMBOL_GPL(emulator_read_std);
  1413. static int emulator_read_emulated(unsigned long addr,
  1414. void *val,
  1415. unsigned int bytes,
  1416. struct kvm_vcpu *vcpu)
  1417. {
  1418. struct kvm_io_device *mmio_dev;
  1419. gpa_t gpa;
  1420. if (vcpu->mmio_read_completed) {
  1421. memcpy(val, vcpu->mmio_data, bytes);
  1422. vcpu->mmio_read_completed = 0;
  1423. return X86EMUL_CONTINUE;
  1424. }
  1425. down_read(&current->mm->mmap_sem);
  1426. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1427. up_read(&current->mm->mmap_sem);
  1428. /* For APIC access vmexit */
  1429. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1430. goto mmio;
  1431. if (emulator_read_std(addr, val, bytes, vcpu)
  1432. == X86EMUL_CONTINUE)
  1433. return X86EMUL_CONTINUE;
  1434. if (gpa == UNMAPPED_GVA)
  1435. return X86EMUL_PROPAGATE_FAULT;
  1436. mmio:
  1437. /*
  1438. * Is this MMIO handled locally?
  1439. */
  1440. mutex_lock(&vcpu->kvm->lock);
  1441. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1442. if (mmio_dev) {
  1443. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1444. mutex_unlock(&vcpu->kvm->lock);
  1445. return X86EMUL_CONTINUE;
  1446. }
  1447. mutex_unlock(&vcpu->kvm->lock);
  1448. vcpu->mmio_needed = 1;
  1449. vcpu->mmio_phys_addr = gpa;
  1450. vcpu->mmio_size = bytes;
  1451. vcpu->mmio_is_write = 0;
  1452. return X86EMUL_UNHANDLEABLE;
  1453. }
  1454. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1455. const void *val, int bytes)
  1456. {
  1457. int ret;
  1458. down_read(&current->mm->mmap_sem);
  1459. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1460. if (ret < 0) {
  1461. up_read(&current->mm->mmap_sem);
  1462. return 0;
  1463. }
  1464. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1465. up_read(&current->mm->mmap_sem);
  1466. return 1;
  1467. }
  1468. static int emulator_write_emulated_onepage(unsigned long addr,
  1469. const void *val,
  1470. unsigned int bytes,
  1471. struct kvm_vcpu *vcpu)
  1472. {
  1473. struct kvm_io_device *mmio_dev;
  1474. gpa_t gpa;
  1475. down_read(&current->mm->mmap_sem);
  1476. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1477. up_read(&current->mm->mmap_sem);
  1478. if (gpa == UNMAPPED_GVA) {
  1479. kvm_inject_page_fault(vcpu, addr, 2);
  1480. return X86EMUL_PROPAGATE_FAULT;
  1481. }
  1482. /* For APIC access vmexit */
  1483. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1484. goto mmio;
  1485. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1486. return X86EMUL_CONTINUE;
  1487. mmio:
  1488. /*
  1489. * Is this MMIO handled locally?
  1490. */
  1491. mutex_lock(&vcpu->kvm->lock);
  1492. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1493. if (mmio_dev) {
  1494. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1495. mutex_unlock(&vcpu->kvm->lock);
  1496. return X86EMUL_CONTINUE;
  1497. }
  1498. mutex_unlock(&vcpu->kvm->lock);
  1499. vcpu->mmio_needed = 1;
  1500. vcpu->mmio_phys_addr = gpa;
  1501. vcpu->mmio_size = bytes;
  1502. vcpu->mmio_is_write = 1;
  1503. memcpy(vcpu->mmio_data, val, bytes);
  1504. return X86EMUL_CONTINUE;
  1505. }
  1506. int emulator_write_emulated(unsigned long addr,
  1507. const void *val,
  1508. unsigned int bytes,
  1509. struct kvm_vcpu *vcpu)
  1510. {
  1511. /* Crossing a page boundary? */
  1512. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1513. int rc, now;
  1514. now = -addr & ~PAGE_MASK;
  1515. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1516. if (rc != X86EMUL_CONTINUE)
  1517. return rc;
  1518. addr += now;
  1519. val += now;
  1520. bytes -= now;
  1521. }
  1522. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1523. }
  1524. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1525. static int emulator_cmpxchg_emulated(unsigned long addr,
  1526. const void *old,
  1527. const void *new,
  1528. unsigned int bytes,
  1529. struct kvm_vcpu *vcpu)
  1530. {
  1531. static int reported;
  1532. if (!reported) {
  1533. reported = 1;
  1534. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1535. }
  1536. #ifndef CONFIG_X86_64
  1537. /* guests cmpxchg8b have to be emulated atomically */
  1538. if (bytes == 8) {
  1539. gpa_t gpa;
  1540. struct page *page;
  1541. char *addr;
  1542. u64 val;
  1543. down_read(&current->mm->mmap_sem);
  1544. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1545. if (gpa == UNMAPPED_GVA ||
  1546. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1547. goto emul_write;
  1548. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  1549. goto emul_write;
  1550. val = *(u64 *)new;
  1551. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1552. addr = kmap_atomic(page, KM_USER0);
  1553. set_64bit((u64 *)(addr + offset_in_page(gpa)), val);
  1554. kunmap_atomic(addr, KM_USER0);
  1555. kvm_release_page_dirty(page);
  1556. emul_write:
  1557. up_read(&current->mm->mmap_sem);
  1558. }
  1559. #endif
  1560. return emulator_write_emulated(addr, new, bytes, vcpu);
  1561. }
  1562. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1563. {
  1564. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1565. }
  1566. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1567. {
  1568. return X86EMUL_CONTINUE;
  1569. }
  1570. int emulate_clts(struct kvm_vcpu *vcpu)
  1571. {
  1572. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  1573. return X86EMUL_CONTINUE;
  1574. }
  1575. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1576. {
  1577. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1578. switch (dr) {
  1579. case 0 ... 3:
  1580. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1581. return X86EMUL_CONTINUE;
  1582. default:
  1583. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1584. return X86EMUL_UNHANDLEABLE;
  1585. }
  1586. }
  1587. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1588. {
  1589. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1590. int exception;
  1591. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1592. if (exception) {
  1593. /* FIXME: better handling */
  1594. return X86EMUL_UNHANDLEABLE;
  1595. }
  1596. return X86EMUL_CONTINUE;
  1597. }
  1598. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1599. {
  1600. static int reported;
  1601. u8 opcodes[4];
  1602. unsigned long rip = vcpu->arch.rip;
  1603. unsigned long rip_linear;
  1604. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1605. if (reported)
  1606. return;
  1607. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1608. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1609. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1610. reported = 1;
  1611. }
  1612. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1613. struct x86_emulate_ops emulate_ops = {
  1614. .read_std = emulator_read_std,
  1615. .read_emulated = emulator_read_emulated,
  1616. .write_emulated = emulator_write_emulated,
  1617. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1618. };
  1619. int emulate_instruction(struct kvm_vcpu *vcpu,
  1620. struct kvm_run *run,
  1621. unsigned long cr2,
  1622. u16 error_code,
  1623. int emulation_type)
  1624. {
  1625. int r;
  1626. struct decode_cache *c;
  1627. vcpu->arch.mmio_fault_cr2 = cr2;
  1628. kvm_x86_ops->cache_regs(vcpu);
  1629. vcpu->mmio_is_write = 0;
  1630. vcpu->arch.pio.string = 0;
  1631. if (!(emulation_type & EMULTYPE_NO_DECODE)) {
  1632. int cs_db, cs_l;
  1633. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1634. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  1635. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1636. vcpu->arch.emulate_ctxt.mode =
  1637. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  1638. ? X86EMUL_MODE_REAL : cs_l
  1639. ? X86EMUL_MODE_PROT64 : cs_db
  1640. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1641. if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1642. vcpu->arch.emulate_ctxt.cs_base = 0;
  1643. vcpu->arch.emulate_ctxt.ds_base = 0;
  1644. vcpu->arch.emulate_ctxt.es_base = 0;
  1645. vcpu->arch.emulate_ctxt.ss_base = 0;
  1646. } else {
  1647. vcpu->arch.emulate_ctxt.cs_base =
  1648. get_segment_base(vcpu, VCPU_SREG_CS);
  1649. vcpu->arch.emulate_ctxt.ds_base =
  1650. get_segment_base(vcpu, VCPU_SREG_DS);
  1651. vcpu->arch.emulate_ctxt.es_base =
  1652. get_segment_base(vcpu, VCPU_SREG_ES);
  1653. vcpu->arch.emulate_ctxt.ss_base =
  1654. get_segment_base(vcpu, VCPU_SREG_SS);
  1655. }
  1656. vcpu->arch.emulate_ctxt.gs_base =
  1657. get_segment_base(vcpu, VCPU_SREG_GS);
  1658. vcpu->arch.emulate_ctxt.fs_base =
  1659. get_segment_base(vcpu, VCPU_SREG_FS);
  1660. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1661. /* Reject the instructions other than VMCALL/VMMCALL when
  1662. * try to emulate invalid opcode */
  1663. c = &vcpu->arch.emulate_ctxt.decode;
  1664. if ((emulation_type & EMULTYPE_TRAP_UD) &&
  1665. (!(c->twobyte && c->b == 0x01 &&
  1666. (c->modrm_reg == 0 || c->modrm_reg == 3) &&
  1667. c->modrm_mod == 3 && c->modrm_rm == 1)))
  1668. return EMULATE_FAIL;
  1669. ++vcpu->stat.insn_emulation;
  1670. if (r) {
  1671. ++vcpu->stat.insn_emulation_fail;
  1672. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1673. return EMULATE_DONE;
  1674. return EMULATE_FAIL;
  1675. }
  1676. }
  1677. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1678. if (vcpu->arch.pio.string)
  1679. return EMULATE_DO_MMIO;
  1680. if ((r || vcpu->mmio_is_write) && run) {
  1681. run->exit_reason = KVM_EXIT_MMIO;
  1682. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1683. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1684. run->mmio.len = vcpu->mmio_size;
  1685. run->mmio.is_write = vcpu->mmio_is_write;
  1686. }
  1687. if (r) {
  1688. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1689. return EMULATE_DONE;
  1690. if (!vcpu->mmio_needed) {
  1691. kvm_report_emulation_failure(vcpu, "mmio");
  1692. return EMULATE_FAIL;
  1693. }
  1694. return EMULATE_DO_MMIO;
  1695. }
  1696. kvm_x86_ops->decache_regs(vcpu);
  1697. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  1698. if (vcpu->mmio_is_write) {
  1699. vcpu->mmio_needed = 0;
  1700. return EMULATE_DO_MMIO;
  1701. }
  1702. return EMULATE_DONE;
  1703. }
  1704. EXPORT_SYMBOL_GPL(emulate_instruction);
  1705. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1706. {
  1707. int i;
  1708. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  1709. if (vcpu->arch.pio.guest_pages[i]) {
  1710. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  1711. vcpu->arch.pio.guest_pages[i] = NULL;
  1712. }
  1713. }
  1714. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1715. {
  1716. void *p = vcpu->arch.pio_data;
  1717. void *q;
  1718. unsigned bytes;
  1719. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  1720. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1721. PAGE_KERNEL);
  1722. if (!q) {
  1723. free_pio_guest_pages(vcpu);
  1724. return -ENOMEM;
  1725. }
  1726. q += vcpu->arch.pio.guest_page_offset;
  1727. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  1728. if (vcpu->arch.pio.in)
  1729. memcpy(q, p, bytes);
  1730. else
  1731. memcpy(p, q, bytes);
  1732. q -= vcpu->arch.pio.guest_page_offset;
  1733. vunmap(q);
  1734. free_pio_guest_pages(vcpu);
  1735. return 0;
  1736. }
  1737. int complete_pio(struct kvm_vcpu *vcpu)
  1738. {
  1739. struct kvm_pio_request *io = &vcpu->arch.pio;
  1740. long delta;
  1741. int r;
  1742. kvm_x86_ops->cache_regs(vcpu);
  1743. if (!io->string) {
  1744. if (io->in)
  1745. memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
  1746. io->size);
  1747. } else {
  1748. if (io->in) {
  1749. r = pio_copy_data(vcpu);
  1750. if (r) {
  1751. kvm_x86_ops->cache_regs(vcpu);
  1752. return r;
  1753. }
  1754. }
  1755. delta = 1;
  1756. if (io->rep) {
  1757. delta *= io->cur_count;
  1758. /*
  1759. * The size of the register should really depend on
  1760. * current address size.
  1761. */
  1762. vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
  1763. }
  1764. if (io->down)
  1765. delta = -delta;
  1766. delta *= io->size;
  1767. if (io->in)
  1768. vcpu->arch.regs[VCPU_REGS_RDI] += delta;
  1769. else
  1770. vcpu->arch.regs[VCPU_REGS_RSI] += delta;
  1771. }
  1772. kvm_x86_ops->decache_regs(vcpu);
  1773. io->count -= io->cur_count;
  1774. io->cur_count = 0;
  1775. return 0;
  1776. }
  1777. static void kernel_pio(struct kvm_io_device *pio_dev,
  1778. struct kvm_vcpu *vcpu,
  1779. void *pd)
  1780. {
  1781. /* TODO: String I/O for in kernel device */
  1782. mutex_lock(&vcpu->kvm->lock);
  1783. if (vcpu->arch.pio.in)
  1784. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  1785. vcpu->arch.pio.size,
  1786. pd);
  1787. else
  1788. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  1789. vcpu->arch.pio.size,
  1790. pd);
  1791. mutex_unlock(&vcpu->kvm->lock);
  1792. }
  1793. static void pio_string_write(struct kvm_io_device *pio_dev,
  1794. struct kvm_vcpu *vcpu)
  1795. {
  1796. struct kvm_pio_request *io = &vcpu->arch.pio;
  1797. void *pd = vcpu->arch.pio_data;
  1798. int i;
  1799. mutex_lock(&vcpu->kvm->lock);
  1800. for (i = 0; i < io->cur_count; i++) {
  1801. kvm_iodevice_write(pio_dev, io->port,
  1802. io->size,
  1803. pd);
  1804. pd += io->size;
  1805. }
  1806. mutex_unlock(&vcpu->kvm->lock);
  1807. }
  1808. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1809. gpa_t addr)
  1810. {
  1811. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1812. }
  1813. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1814. int size, unsigned port)
  1815. {
  1816. struct kvm_io_device *pio_dev;
  1817. vcpu->run->exit_reason = KVM_EXIT_IO;
  1818. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1819. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1820. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1821. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  1822. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1823. vcpu->arch.pio.in = in;
  1824. vcpu->arch.pio.string = 0;
  1825. vcpu->arch.pio.down = 0;
  1826. vcpu->arch.pio.guest_page_offset = 0;
  1827. vcpu->arch.pio.rep = 0;
  1828. kvm_x86_ops->cache_regs(vcpu);
  1829. memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
  1830. kvm_x86_ops->decache_regs(vcpu);
  1831. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1832. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1833. if (pio_dev) {
  1834. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  1835. complete_pio(vcpu);
  1836. return 1;
  1837. }
  1838. return 0;
  1839. }
  1840. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1841. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1842. int size, unsigned long count, int down,
  1843. gva_t address, int rep, unsigned port)
  1844. {
  1845. unsigned now, in_page;
  1846. int i, ret = 0;
  1847. int nr_pages = 1;
  1848. struct page *page;
  1849. struct kvm_io_device *pio_dev;
  1850. vcpu->run->exit_reason = KVM_EXIT_IO;
  1851. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1852. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1853. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1854. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  1855. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1856. vcpu->arch.pio.in = in;
  1857. vcpu->arch.pio.string = 1;
  1858. vcpu->arch.pio.down = down;
  1859. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  1860. vcpu->arch.pio.rep = rep;
  1861. if (!count) {
  1862. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1863. return 1;
  1864. }
  1865. if (!down)
  1866. in_page = PAGE_SIZE - offset_in_page(address);
  1867. else
  1868. in_page = offset_in_page(address) + size;
  1869. now = min(count, (unsigned long)in_page / size);
  1870. if (!now) {
  1871. /*
  1872. * String I/O straddles page boundary. Pin two guest pages
  1873. * so that we satisfy atomicity constraints. Do just one
  1874. * transaction to avoid complexity.
  1875. */
  1876. nr_pages = 2;
  1877. now = 1;
  1878. }
  1879. if (down) {
  1880. /*
  1881. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1882. */
  1883. pr_unimpl(vcpu, "guest string pio down\n");
  1884. kvm_inject_gp(vcpu, 0);
  1885. return 1;
  1886. }
  1887. vcpu->run->io.count = now;
  1888. vcpu->arch.pio.cur_count = now;
  1889. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  1890. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1891. for (i = 0; i < nr_pages; ++i) {
  1892. down_read(&current->mm->mmap_sem);
  1893. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  1894. vcpu->arch.pio.guest_pages[i] = page;
  1895. up_read(&current->mm->mmap_sem);
  1896. if (!page) {
  1897. kvm_inject_gp(vcpu, 0);
  1898. free_pio_guest_pages(vcpu);
  1899. return 1;
  1900. }
  1901. }
  1902. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1903. if (!vcpu->arch.pio.in) {
  1904. /* string PIO write */
  1905. ret = pio_copy_data(vcpu);
  1906. if (ret >= 0 && pio_dev) {
  1907. pio_string_write(pio_dev, vcpu);
  1908. complete_pio(vcpu);
  1909. if (vcpu->arch.pio.count == 0)
  1910. ret = 1;
  1911. }
  1912. } else if (pio_dev)
  1913. pr_unimpl(vcpu, "no string pio read support yet, "
  1914. "port %x size %d count %ld\n",
  1915. port, size, count);
  1916. return ret;
  1917. }
  1918. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  1919. int kvm_arch_init(void *opaque)
  1920. {
  1921. int r;
  1922. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  1923. r = kvm_mmu_module_init();
  1924. if (r)
  1925. goto out_fail;
  1926. kvm_init_msr_list();
  1927. if (kvm_x86_ops) {
  1928. printk(KERN_ERR "kvm: already loaded the other module\n");
  1929. r = -EEXIST;
  1930. goto out;
  1931. }
  1932. if (!ops->cpu_has_kvm_support()) {
  1933. printk(KERN_ERR "kvm: no hardware support\n");
  1934. r = -EOPNOTSUPP;
  1935. goto out;
  1936. }
  1937. if (ops->disabled_by_bios()) {
  1938. printk(KERN_ERR "kvm: disabled by bios\n");
  1939. r = -EOPNOTSUPP;
  1940. goto out;
  1941. }
  1942. kvm_x86_ops = ops;
  1943. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  1944. return 0;
  1945. out:
  1946. kvm_mmu_module_exit();
  1947. out_fail:
  1948. return r;
  1949. }
  1950. void kvm_arch_exit(void)
  1951. {
  1952. kvm_x86_ops = NULL;
  1953. kvm_mmu_module_exit();
  1954. }
  1955. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  1956. {
  1957. ++vcpu->stat.halt_exits;
  1958. if (irqchip_in_kernel(vcpu->kvm)) {
  1959. vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
  1960. kvm_vcpu_block(vcpu);
  1961. if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
  1962. return -EINTR;
  1963. return 1;
  1964. } else {
  1965. vcpu->run->exit_reason = KVM_EXIT_HLT;
  1966. return 0;
  1967. }
  1968. }
  1969. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  1970. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  1971. {
  1972. unsigned long nr, a0, a1, a2, a3, ret;
  1973. kvm_x86_ops->cache_regs(vcpu);
  1974. nr = vcpu->arch.regs[VCPU_REGS_RAX];
  1975. a0 = vcpu->arch.regs[VCPU_REGS_RBX];
  1976. a1 = vcpu->arch.regs[VCPU_REGS_RCX];
  1977. a2 = vcpu->arch.regs[VCPU_REGS_RDX];
  1978. a3 = vcpu->arch.regs[VCPU_REGS_RSI];
  1979. if (!is_long_mode(vcpu)) {
  1980. nr &= 0xFFFFFFFF;
  1981. a0 &= 0xFFFFFFFF;
  1982. a1 &= 0xFFFFFFFF;
  1983. a2 &= 0xFFFFFFFF;
  1984. a3 &= 0xFFFFFFFF;
  1985. }
  1986. switch (nr) {
  1987. case KVM_HC_VAPIC_POLL_IRQ:
  1988. ret = 0;
  1989. break;
  1990. default:
  1991. ret = -KVM_ENOSYS;
  1992. break;
  1993. }
  1994. vcpu->arch.regs[VCPU_REGS_RAX] = ret;
  1995. kvm_x86_ops->decache_regs(vcpu);
  1996. return 0;
  1997. }
  1998. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  1999. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  2000. {
  2001. char instruction[3];
  2002. int ret = 0;
  2003. /*
  2004. * Blow out the MMU to ensure that no other VCPU has an active mapping
  2005. * to ensure that the updated hypercall appears atomically across all
  2006. * VCPUs.
  2007. */
  2008. kvm_mmu_zap_all(vcpu->kvm);
  2009. kvm_x86_ops->cache_regs(vcpu);
  2010. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  2011. if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
  2012. != X86EMUL_CONTINUE)
  2013. ret = -EFAULT;
  2014. return ret;
  2015. }
  2016. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  2017. {
  2018. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  2019. }
  2020. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2021. {
  2022. struct descriptor_table dt = { limit, base };
  2023. kvm_x86_ops->set_gdt(vcpu, &dt);
  2024. }
  2025. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2026. {
  2027. struct descriptor_table dt = { limit, base };
  2028. kvm_x86_ops->set_idt(vcpu, &dt);
  2029. }
  2030. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  2031. unsigned long *rflags)
  2032. {
  2033. lmsw(vcpu, msw);
  2034. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2035. }
  2036. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  2037. {
  2038. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2039. switch (cr) {
  2040. case 0:
  2041. return vcpu->arch.cr0;
  2042. case 2:
  2043. return vcpu->arch.cr2;
  2044. case 3:
  2045. return vcpu->arch.cr3;
  2046. case 4:
  2047. return vcpu->arch.cr4;
  2048. case 8:
  2049. return get_cr8(vcpu);
  2050. default:
  2051. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2052. return 0;
  2053. }
  2054. }
  2055. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2056. unsigned long *rflags)
  2057. {
  2058. switch (cr) {
  2059. case 0:
  2060. set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2061. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2062. break;
  2063. case 2:
  2064. vcpu->arch.cr2 = val;
  2065. break;
  2066. case 3:
  2067. set_cr3(vcpu, val);
  2068. break;
  2069. case 4:
  2070. set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2071. break;
  2072. case 8:
  2073. set_cr8(vcpu, val & 0xfUL);
  2074. break;
  2075. default:
  2076. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2077. }
  2078. }
  2079. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2080. {
  2081. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2082. int j, nent = vcpu->arch.cpuid_nent;
  2083. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2084. /* when no next entry is found, the current entry[i] is reselected */
  2085. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2086. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2087. if (ej->function == e->function) {
  2088. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2089. return j;
  2090. }
  2091. }
  2092. return 0; /* silence gcc, even though control never reaches here */
  2093. }
  2094. /* find an entry with matching function, matching index (if needed), and that
  2095. * should be read next (if it's stateful) */
  2096. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2097. u32 function, u32 index)
  2098. {
  2099. if (e->function != function)
  2100. return 0;
  2101. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2102. return 0;
  2103. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2104. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2105. return 0;
  2106. return 1;
  2107. }
  2108. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2109. {
  2110. int i;
  2111. u32 function, index;
  2112. struct kvm_cpuid_entry2 *e, *best;
  2113. kvm_x86_ops->cache_regs(vcpu);
  2114. function = vcpu->arch.regs[VCPU_REGS_RAX];
  2115. index = vcpu->arch.regs[VCPU_REGS_RCX];
  2116. vcpu->arch.regs[VCPU_REGS_RAX] = 0;
  2117. vcpu->arch.regs[VCPU_REGS_RBX] = 0;
  2118. vcpu->arch.regs[VCPU_REGS_RCX] = 0;
  2119. vcpu->arch.regs[VCPU_REGS_RDX] = 0;
  2120. best = NULL;
  2121. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2122. e = &vcpu->arch.cpuid_entries[i];
  2123. if (is_matching_cpuid_entry(e, function, index)) {
  2124. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2125. move_to_next_stateful_cpuid_entry(vcpu, i);
  2126. best = e;
  2127. break;
  2128. }
  2129. /*
  2130. * Both basic or both extended?
  2131. */
  2132. if (((e->function ^ function) & 0x80000000) == 0)
  2133. if (!best || e->function > best->function)
  2134. best = e;
  2135. }
  2136. if (best) {
  2137. vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
  2138. vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
  2139. vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
  2140. vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
  2141. }
  2142. kvm_x86_ops->decache_regs(vcpu);
  2143. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2144. }
  2145. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2146. /*
  2147. * Check if userspace requested an interrupt window, and that the
  2148. * interrupt window is open.
  2149. *
  2150. * No need to exit to userspace if we already have an interrupt queued.
  2151. */
  2152. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2153. struct kvm_run *kvm_run)
  2154. {
  2155. return (!vcpu->arch.irq_summary &&
  2156. kvm_run->request_interrupt_window &&
  2157. vcpu->arch.interrupt_window_open &&
  2158. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2159. }
  2160. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2161. struct kvm_run *kvm_run)
  2162. {
  2163. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2164. kvm_run->cr8 = get_cr8(vcpu);
  2165. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2166. if (irqchip_in_kernel(vcpu->kvm))
  2167. kvm_run->ready_for_interrupt_injection = 1;
  2168. else
  2169. kvm_run->ready_for_interrupt_injection =
  2170. (vcpu->arch.interrupt_window_open &&
  2171. vcpu->arch.irq_summary == 0);
  2172. }
  2173. static void vapic_enter(struct kvm_vcpu *vcpu)
  2174. {
  2175. struct kvm_lapic *apic = vcpu->arch.apic;
  2176. struct page *page;
  2177. if (!apic || !apic->vapic_addr)
  2178. return;
  2179. down_read(&current->mm->mmap_sem);
  2180. page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2181. vcpu->arch.apic->vapic_page = page;
  2182. up_read(&current->mm->mmap_sem);
  2183. }
  2184. static void vapic_exit(struct kvm_vcpu *vcpu)
  2185. {
  2186. struct kvm_lapic *apic = vcpu->arch.apic;
  2187. if (!apic || !apic->vapic_addr)
  2188. return;
  2189. kvm_release_page_dirty(apic->vapic_page);
  2190. mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2191. }
  2192. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2193. {
  2194. int r;
  2195. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  2196. pr_debug("vcpu %d received sipi with vector # %x\n",
  2197. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2198. kvm_lapic_reset(vcpu);
  2199. r = kvm_x86_ops->vcpu_reset(vcpu);
  2200. if (r)
  2201. return r;
  2202. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2203. }
  2204. vapic_enter(vcpu);
  2205. preempted:
  2206. if (vcpu->guest_debug.enabled)
  2207. kvm_x86_ops->guest_debug_pre(vcpu);
  2208. again:
  2209. r = kvm_mmu_reload(vcpu);
  2210. if (unlikely(r))
  2211. goto out;
  2212. if (vcpu->requests)
  2213. if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
  2214. &vcpu->requests)) {
  2215. kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
  2216. r = 0;
  2217. goto out;
  2218. }
  2219. kvm_inject_pending_timer_irqs(vcpu);
  2220. preempt_disable();
  2221. kvm_x86_ops->prepare_guest_switch(vcpu);
  2222. kvm_load_guest_fpu(vcpu);
  2223. local_irq_disable();
  2224. if (signal_pending(current)) {
  2225. local_irq_enable();
  2226. preempt_enable();
  2227. r = -EINTR;
  2228. kvm_run->exit_reason = KVM_EXIT_INTR;
  2229. ++vcpu->stat.signal_exits;
  2230. goto out;
  2231. }
  2232. if (vcpu->arch.exception.pending)
  2233. __queue_exception(vcpu);
  2234. else if (irqchip_in_kernel(vcpu->kvm))
  2235. kvm_x86_ops->inject_pending_irq(vcpu);
  2236. else
  2237. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2238. kvm_lapic_sync_to_vapic(vcpu);
  2239. vcpu->guest_mode = 1;
  2240. kvm_guest_enter();
  2241. if (vcpu->requests)
  2242. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2243. kvm_x86_ops->tlb_flush(vcpu);
  2244. kvm_x86_ops->run(vcpu, kvm_run);
  2245. vcpu->guest_mode = 0;
  2246. local_irq_enable();
  2247. ++vcpu->stat.exits;
  2248. /*
  2249. * We must have an instruction between local_irq_enable() and
  2250. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2251. * the interrupt shadow. The stat.exits increment will do nicely.
  2252. * But we need to prevent reordering, hence this barrier():
  2253. */
  2254. barrier();
  2255. kvm_guest_exit();
  2256. preempt_enable();
  2257. /*
  2258. * Profile KVM exit RIPs:
  2259. */
  2260. if (unlikely(prof_on == KVM_PROFILING)) {
  2261. kvm_x86_ops->cache_regs(vcpu);
  2262. profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
  2263. }
  2264. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2265. vcpu->arch.exception.pending = false;
  2266. kvm_lapic_sync_from_vapic(vcpu);
  2267. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2268. if (r > 0) {
  2269. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2270. r = -EINTR;
  2271. kvm_run->exit_reason = KVM_EXIT_INTR;
  2272. ++vcpu->stat.request_irq_exits;
  2273. goto out;
  2274. }
  2275. if (!need_resched())
  2276. goto again;
  2277. }
  2278. out:
  2279. if (r > 0) {
  2280. kvm_resched(vcpu);
  2281. goto preempted;
  2282. }
  2283. post_kvm_run_save(vcpu, kvm_run);
  2284. vapic_exit(vcpu);
  2285. return r;
  2286. }
  2287. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2288. {
  2289. int r;
  2290. sigset_t sigsaved;
  2291. vcpu_load(vcpu);
  2292. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  2293. kvm_vcpu_block(vcpu);
  2294. vcpu_put(vcpu);
  2295. return -EAGAIN;
  2296. }
  2297. if (vcpu->sigset_active)
  2298. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2299. /* re-sync apic's tpr */
  2300. if (!irqchip_in_kernel(vcpu->kvm))
  2301. set_cr8(vcpu, kvm_run->cr8);
  2302. if (vcpu->arch.pio.cur_count) {
  2303. r = complete_pio(vcpu);
  2304. if (r)
  2305. goto out;
  2306. }
  2307. #if CONFIG_HAS_IOMEM
  2308. if (vcpu->mmio_needed) {
  2309. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2310. vcpu->mmio_read_completed = 1;
  2311. vcpu->mmio_needed = 0;
  2312. r = emulate_instruction(vcpu, kvm_run,
  2313. vcpu->arch.mmio_fault_cr2, 0,
  2314. EMULTYPE_NO_DECODE);
  2315. if (r == EMULATE_DO_MMIO) {
  2316. /*
  2317. * Read-modify-write. Back to userspace.
  2318. */
  2319. r = 0;
  2320. goto out;
  2321. }
  2322. }
  2323. #endif
  2324. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  2325. kvm_x86_ops->cache_regs(vcpu);
  2326. vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  2327. kvm_x86_ops->decache_regs(vcpu);
  2328. }
  2329. r = __vcpu_run(vcpu, kvm_run);
  2330. out:
  2331. if (vcpu->sigset_active)
  2332. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2333. vcpu_put(vcpu);
  2334. return r;
  2335. }
  2336. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2337. {
  2338. vcpu_load(vcpu);
  2339. kvm_x86_ops->cache_regs(vcpu);
  2340. regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
  2341. regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
  2342. regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
  2343. regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
  2344. regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
  2345. regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
  2346. regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
  2347. regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
  2348. #ifdef CONFIG_X86_64
  2349. regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
  2350. regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
  2351. regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
  2352. regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
  2353. regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
  2354. regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
  2355. regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
  2356. regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
  2357. #endif
  2358. regs->rip = vcpu->arch.rip;
  2359. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2360. /*
  2361. * Don't leak debug flags in case they were set for guest debugging
  2362. */
  2363. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2364. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2365. vcpu_put(vcpu);
  2366. return 0;
  2367. }
  2368. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2369. {
  2370. vcpu_load(vcpu);
  2371. vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
  2372. vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
  2373. vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
  2374. vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
  2375. vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
  2376. vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
  2377. vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
  2378. vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
  2379. #ifdef CONFIG_X86_64
  2380. vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
  2381. vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
  2382. vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
  2383. vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
  2384. vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
  2385. vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
  2386. vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
  2387. vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
  2388. #endif
  2389. vcpu->arch.rip = regs->rip;
  2390. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2391. kvm_x86_ops->decache_regs(vcpu);
  2392. vcpu_put(vcpu);
  2393. return 0;
  2394. }
  2395. static void get_segment(struct kvm_vcpu *vcpu,
  2396. struct kvm_segment *var, int seg)
  2397. {
  2398. return kvm_x86_ops->get_segment(vcpu, var, seg);
  2399. }
  2400. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2401. {
  2402. struct kvm_segment cs;
  2403. get_segment(vcpu, &cs, VCPU_SREG_CS);
  2404. *db = cs.db;
  2405. *l = cs.l;
  2406. }
  2407. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2408. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2409. struct kvm_sregs *sregs)
  2410. {
  2411. struct descriptor_table dt;
  2412. int pending_vec;
  2413. vcpu_load(vcpu);
  2414. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2415. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2416. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2417. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2418. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2419. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2420. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2421. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2422. kvm_x86_ops->get_idt(vcpu, &dt);
  2423. sregs->idt.limit = dt.limit;
  2424. sregs->idt.base = dt.base;
  2425. kvm_x86_ops->get_gdt(vcpu, &dt);
  2426. sregs->gdt.limit = dt.limit;
  2427. sregs->gdt.base = dt.base;
  2428. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2429. sregs->cr0 = vcpu->arch.cr0;
  2430. sregs->cr2 = vcpu->arch.cr2;
  2431. sregs->cr3 = vcpu->arch.cr3;
  2432. sregs->cr4 = vcpu->arch.cr4;
  2433. sregs->cr8 = get_cr8(vcpu);
  2434. sregs->efer = vcpu->arch.shadow_efer;
  2435. sregs->apic_base = kvm_get_apic_base(vcpu);
  2436. if (irqchip_in_kernel(vcpu->kvm)) {
  2437. memset(sregs->interrupt_bitmap, 0,
  2438. sizeof sregs->interrupt_bitmap);
  2439. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2440. if (pending_vec >= 0)
  2441. set_bit(pending_vec,
  2442. (unsigned long *)sregs->interrupt_bitmap);
  2443. } else
  2444. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  2445. sizeof sregs->interrupt_bitmap);
  2446. vcpu_put(vcpu);
  2447. return 0;
  2448. }
  2449. static void set_segment(struct kvm_vcpu *vcpu,
  2450. struct kvm_segment *var, int seg)
  2451. {
  2452. return kvm_x86_ops->set_segment(vcpu, var, seg);
  2453. }
  2454. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  2455. struct kvm_sregs *sregs)
  2456. {
  2457. int mmu_reset_needed = 0;
  2458. int i, pending_vec, max_bits;
  2459. struct descriptor_table dt;
  2460. vcpu_load(vcpu);
  2461. dt.limit = sregs->idt.limit;
  2462. dt.base = sregs->idt.base;
  2463. kvm_x86_ops->set_idt(vcpu, &dt);
  2464. dt.limit = sregs->gdt.limit;
  2465. dt.base = sregs->gdt.base;
  2466. kvm_x86_ops->set_gdt(vcpu, &dt);
  2467. vcpu->arch.cr2 = sregs->cr2;
  2468. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  2469. vcpu->arch.cr3 = sregs->cr3;
  2470. set_cr8(vcpu, sregs->cr8);
  2471. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  2472. #ifdef CONFIG_X86_64
  2473. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  2474. #endif
  2475. kvm_set_apic_base(vcpu, sregs->apic_base);
  2476. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2477. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  2478. vcpu->arch.cr0 = sregs->cr0;
  2479. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  2480. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  2481. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  2482. if (!is_long_mode(vcpu) && is_pae(vcpu))
  2483. load_pdptrs(vcpu, vcpu->arch.cr3);
  2484. if (mmu_reset_needed)
  2485. kvm_mmu_reset_context(vcpu);
  2486. if (!irqchip_in_kernel(vcpu->kvm)) {
  2487. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  2488. sizeof vcpu->arch.irq_pending);
  2489. vcpu->arch.irq_summary = 0;
  2490. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  2491. if (vcpu->arch.irq_pending[i])
  2492. __set_bit(i, &vcpu->arch.irq_summary);
  2493. } else {
  2494. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  2495. pending_vec = find_first_bit(
  2496. (const unsigned long *)sregs->interrupt_bitmap,
  2497. max_bits);
  2498. /* Only pending external irq is handled here */
  2499. if (pending_vec < max_bits) {
  2500. kvm_x86_ops->set_irq(vcpu, pending_vec);
  2501. pr_debug("Set back pending irq %d\n",
  2502. pending_vec);
  2503. }
  2504. }
  2505. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2506. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2507. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2508. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2509. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2510. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2511. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2512. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2513. vcpu_put(vcpu);
  2514. return 0;
  2515. }
  2516. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  2517. struct kvm_debug_guest *dbg)
  2518. {
  2519. int r;
  2520. vcpu_load(vcpu);
  2521. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  2522. vcpu_put(vcpu);
  2523. return r;
  2524. }
  2525. /*
  2526. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  2527. * we have asm/x86/processor.h
  2528. */
  2529. struct fxsave {
  2530. u16 cwd;
  2531. u16 swd;
  2532. u16 twd;
  2533. u16 fop;
  2534. u64 rip;
  2535. u64 rdp;
  2536. u32 mxcsr;
  2537. u32 mxcsr_mask;
  2538. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  2539. #ifdef CONFIG_X86_64
  2540. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  2541. #else
  2542. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  2543. #endif
  2544. };
  2545. /*
  2546. * Translate a guest virtual address to a guest physical address.
  2547. */
  2548. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  2549. struct kvm_translation *tr)
  2550. {
  2551. unsigned long vaddr = tr->linear_address;
  2552. gpa_t gpa;
  2553. vcpu_load(vcpu);
  2554. down_read(&current->mm->mmap_sem);
  2555. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  2556. up_read(&current->mm->mmap_sem);
  2557. tr->physical_address = gpa;
  2558. tr->valid = gpa != UNMAPPED_GVA;
  2559. tr->writeable = 1;
  2560. tr->usermode = 0;
  2561. vcpu_put(vcpu);
  2562. return 0;
  2563. }
  2564. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2565. {
  2566. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2567. vcpu_load(vcpu);
  2568. memcpy(fpu->fpr, fxsave->st_space, 128);
  2569. fpu->fcw = fxsave->cwd;
  2570. fpu->fsw = fxsave->swd;
  2571. fpu->ftwx = fxsave->twd;
  2572. fpu->last_opcode = fxsave->fop;
  2573. fpu->last_ip = fxsave->rip;
  2574. fpu->last_dp = fxsave->rdp;
  2575. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2576. vcpu_put(vcpu);
  2577. return 0;
  2578. }
  2579. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2580. {
  2581. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2582. vcpu_load(vcpu);
  2583. memcpy(fxsave->st_space, fpu->fpr, 128);
  2584. fxsave->cwd = fpu->fcw;
  2585. fxsave->swd = fpu->fsw;
  2586. fxsave->twd = fpu->ftwx;
  2587. fxsave->fop = fpu->last_opcode;
  2588. fxsave->rip = fpu->last_ip;
  2589. fxsave->rdp = fpu->last_dp;
  2590. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2591. vcpu_put(vcpu);
  2592. return 0;
  2593. }
  2594. void fx_init(struct kvm_vcpu *vcpu)
  2595. {
  2596. unsigned after_mxcsr_mask;
  2597. /* Initialize guest FPU by resetting ours and saving into guest's */
  2598. preempt_disable();
  2599. fx_save(&vcpu->arch.host_fx_image);
  2600. fpu_init();
  2601. fx_save(&vcpu->arch.guest_fx_image);
  2602. fx_restore(&vcpu->arch.host_fx_image);
  2603. preempt_enable();
  2604. vcpu->arch.cr0 |= X86_CR0_ET;
  2605. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2606. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  2607. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  2608. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2609. }
  2610. EXPORT_SYMBOL_GPL(fx_init);
  2611. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2612. {
  2613. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2614. return;
  2615. vcpu->guest_fpu_loaded = 1;
  2616. fx_save(&vcpu->arch.host_fx_image);
  2617. fx_restore(&vcpu->arch.guest_fx_image);
  2618. }
  2619. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2620. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2621. {
  2622. if (!vcpu->guest_fpu_loaded)
  2623. return;
  2624. vcpu->guest_fpu_loaded = 0;
  2625. fx_save(&vcpu->arch.guest_fx_image);
  2626. fx_restore(&vcpu->arch.host_fx_image);
  2627. ++vcpu->stat.fpu_reload;
  2628. }
  2629. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2630. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2631. {
  2632. kvm_x86_ops->vcpu_free(vcpu);
  2633. }
  2634. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2635. unsigned int id)
  2636. {
  2637. return kvm_x86_ops->vcpu_create(kvm, id);
  2638. }
  2639. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  2640. {
  2641. int r;
  2642. /* We do fxsave: this must be aligned. */
  2643. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  2644. vcpu_load(vcpu);
  2645. r = kvm_arch_vcpu_reset(vcpu);
  2646. if (r == 0)
  2647. r = kvm_mmu_setup(vcpu);
  2648. vcpu_put(vcpu);
  2649. if (r < 0)
  2650. goto free_vcpu;
  2651. return 0;
  2652. free_vcpu:
  2653. kvm_x86_ops->vcpu_free(vcpu);
  2654. return r;
  2655. }
  2656. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  2657. {
  2658. vcpu_load(vcpu);
  2659. kvm_mmu_unload(vcpu);
  2660. vcpu_put(vcpu);
  2661. kvm_x86_ops->vcpu_free(vcpu);
  2662. }
  2663. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2664. {
  2665. return kvm_x86_ops->vcpu_reset(vcpu);
  2666. }
  2667. void kvm_arch_hardware_enable(void *garbage)
  2668. {
  2669. kvm_x86_ops->hardware_enable(garbage);
  2670. }
  2671. void kvm_arch_hardware_disable(void *garbage)
  2672. {
  2673. kvm_x86_ops->hardware_disable(garbage);
  2674. }
  2675. int kvm_arch_hardware_setup(void)
  2676. {
  2677. return kvm_x86_ops->hardware_setup();
  2678. }
  2679. void kvm_arch_hardware_unsetup(void)
  2680. {
  2681. kvm_x86_ops->hardware_unsetup();
  2682. }
  2683. void kvm_arch_check_processor_compat(void *rtn)
  2684. {
  2685. kvm_x86_ops->check_processor_compatibility(rtn);
  2686. }
  2687. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2688. {
  2689. struct page *page;
  2690. struct kvm *kvm;
  2691. int r;
  2692. BUG_ON(vcpu->kvm == NULL);
  2693. kvm = vcpu->kvm;
  2694. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  2695. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2696. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2697. else
  2698. vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2699. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2700. if (!page) {
  2701. r = -ENOMEM;
  2702. goto fail;
  2703. }
  2704. vcpu->arch.pio_data = page_address(page);
  2705. r = kvm_mmu_create(vcpu);
  2706. if (r < 0)
  2707. goto fail_free_pio_data;
  2708. if (irqchip_in_kernel(kvm)) {
  2709. r = kvm_create_lapic(vcpu);
  2710. if (r < 0)
  2711. goto fail_mmu_destroy;
  2712. }
  2713. return 0;
  2714. fail_mmu_destroy:
  2715. kvm_mmu_destroy(vcpu);
  2716. fail_free_pio_data:
  2717. free_page((unsigned long)vcpu->arch.pio_data);
  2718. fail:
  2719. return r;
  2720. }
  2721. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2722. {
  2723. kvm_free_lapic(vcpu);
  2724. kvm_mmu_destroy(vcpu);
  2725. free_page((unsigned long)vcpu->arch.pio_data);
  2726. }
  2727. struct kvm *kvm_arch_create_vm(void)
  2728. {
  2729. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  2730. if (!kvm)
  2731. return ERR_PTR(-ENOMEM);
  2732. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  2733. return kvm;
  2734. }
  2735. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  2736. {
  2737. vcpu_load(vcpu);
  2738. kvm_mmu_unload(vcpu);
  2739. vcpu_put(vcpu);
  2740. }
  2741. static void kvm_free_vcpus(struct kvm *kvm)
  2742. {
  2743. unsigned int i;
  2744. /*
  2745. * Unpin any mmu pages first.
  2746. */
  2747. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  2748. if (kvm->vcpus[i])
  2749. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  2750. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  2751. if (kvm->vcpus[i]) {
  2752. kvm_arch_vcpu_free(kvm->vcpus[i]);
  2753. kvm->vcpus[i] = NULL;
  2754. }
  2755. }
  2756. }
  2757. void kvm_arch_destroy_vm(struct kvm *kvm)
  2758. {
  2759. kfree(kvm->arch.vpic);
  2760. kfree(kvm->arch.vioapic);
  2761. kvm_free_vcpus(kvm);
  2762. kvm_free_physmem(kvm);
  2763. kfree(kvm);
  2764. }
  2765. int kvm_arch_set_memory_region(struct kvm *kvm,
  2766. struct kvm_userspace_memory_region *mem,
  2767. struct kvm_memory_slot old,
  2768. int user_alloc)
  2769. {
  2770. int npages = mem->memory_size >> PAGE_SHIFT;
  2771. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  2772. /*To keep backward compatibility with older userspace,
  2773. *x86 needs to hanlde !user_alloc case.
  2774. */
  2775. if (!user_alloc) {
  2776. if (npages && !old.rmap) {
  2777. memslot->userspace_addr = do_mmap(NULL, 0,
  2778. npages * PAGE_SIZE,
  2779. PROT_READ | PROT_WRITE,
  2780. MAP_SHARED | MAP_ANONYMOUS,
  2781. 0);
  2782. if (IS_ERR((void *)memslot->userspace_addr))
  2783. return PTR_ERR((void *)memslot->userspace_addr);
  2784. } else {
  2785. if (!old.user_alloc && old.rmap) {
  2786. int ret;
  2787. ret = do_munmap(current->mm, old.userspace_addr,
  2788. old.npages * PAGE_SIZE);
  2789. if (ret < 0)
  2790. printk(KERN_WARNING
  2791. "kvm_vm_ioctl_set_memory_region: "
  2792. "failed to munmap memory\n");
  2793. }
  2794. }
  2795. }
  2796. if (!kvm->arch.n_requested_mmu_pages) {
  2797. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  2798. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  2799. }
  2800. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  2801. kvm_flush_remote_tlbs(kvm);
  2802. return 0;
  2803. }
  2804. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  2805. {
  2806. return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
  2807. || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
  2808. }
  2809. static void vcpu_kick_intr(void *info)
  2810. {
  2811. #ifdef DEBUG
  2812. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  2813. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  2814. #endif
  2815. }
  2816. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  2817. {
  2818. int ipi_pcpu = vcpu->cpu;
  2819. if (waitqueue_active(&vcpu->wq)) {
  2820. wake_up_interruptible(&vcpu->wq);
  2821. ++vcpu->stat.halt_wakeup;
  2822. }
  2823. if (vcpu->guest_mode)
  2824. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
  2825. }