e500_tlb.c 36 KB

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  1. /*
  2. * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
  3. *
  4. * Author: Yu Liu, yu.liu@freescale.com
  5. *
  6. * Description:
  7. * This file is based on arch/powerpc/kvm/44x_tlb.c,
  8. * by Hollis Blanchard <hollisb@us.ibm.com>.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/slab.h>
  17. #include <linux/string.h>
  18. #include <linux/kvm.h>
  19. #include <linux/kvm_host.h>
  20. #include <linux/highmem.h>
  21. #include <linux/log2.h>
  22. #include <linux/uaccess.h>
  23. #include <linux/sched.h>
  24. #include <linux/rwsem.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/hugetlb.h>
  27. #include <asm/kvm_ppc.h>
  28. #include <asm/kvm_e500.h>
  29. #include "../mm/mmu_decl.h"
  30. #include "e500_tlb.h"
  31. #include "trace.h"
  32. #include "timing.h"
  33. #define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
  34. struct id {
  35. unsigned long val;
  36. struct id **pentry;
  37. };
  38. #define NUM_TIDS 256
  39. /*
  40. * This table provide mappings from:
  41. * (guestAS,guestTID,guestPR) --> ID of physical cpu
  42. * guestAS [0..1]
  43. * guestTID [0..255]
  44. * guestPR [0..1]
  45. * ID [1..255]
  46. * Each vcpu keeps one vcpu_id_table.
  47. */
  48. struct vcpu_id_table {
  49. struct id id[2][NUM_TIDS][2];
  50. };
  51. /*
  52. * This table provide reversed mappings of vcpu_id_table:
  53. * ID --> address of vcpu_id_table item.
  54. * Each physical core has one pcpu_id_table.
  55. */
  56. struct pcpu_id_table {
  57. struct id *entry[NUM_TIDS];
  58. };
  59. static DEFINE_PER_CPU(struct pcpu_id_table, pcpu_sids);
  60. /* This variable keeps last used shadow ID on local core.
  61. * The valid range of shadow ID is [1..255] */
  62. static DEFINE_PER_CPU(unsigned long, pcpu_last_used_sid);
  63. static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
  64. static struct kvm_book3e_206_tlb_entry *get_entry(
  65. struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, int entry)
  66. {
  67. int offset = vcpu_e500->gtlb_offset[tlbsel];
  68. return &vcpu_e500->gtlb_arch[offset + entry];
  69. }
  70. /*
  71. * Allocate a free shadow id and setup a valid sid mapping in given entry.
  72. * A mapping is only valid when vcpu_id_table and pcpu_id_table are match.
  73. *
  74. * The caller must have preemption disabled, and keep it that way until
  75. * it has finished with the returned shadow id (either written into the
  76. * TLB or arch.shadow_pid, or discarded).
  77. */
  78. static inline int local_sid_setup_one(struct id *entry)
  79. {
  80. unsigned long sid;
  81. int ret = -1;
  82. sid = ++(__get_cpu_var(pcpu_last_used_sid));
  83. if (sid < NUM_TIDS) {
  84. __get_cpu_var(pcpu_sids).entry[sid] = entry;
  85. entry->val = sid;
  86. entry->pentry = &__get_cpu_var(pcpu_sids).entry[sid];
  87. ret = sid;
  88. }
  89. /*
  90. * If sid == NUM_TIDS, we've run out of sids. We return -1, and
  91. * the caller will invalidate everything and start over.
  92. *
  93. * sid > NUM_TIDS indicates a race, which we disable preemption to
  94. * avoid.
  95. */
  96. WARN_ON(sid > NUM_TIDS);
  97. return ret;
  98. }
  99. /*
  100. * Check if given entry contain a valid shadow id mapping.
  101. * An ID mapping is considered valid only if
  102. * both vcpu and pcpu know this mapping.
  103. *
  104. * The caller must have preemption disabled, and keep it that way until
  105. * it has finished with the returned shadow id (either written into the
  106. * TLB or arch.shadow_pid, or discarded).
  107. */
  108. static inline int local_sid_lookup(struct id *entry)
  109. {
  110. if (entry && entry->val != 0 &&
  111. __get_cpu_var(pcpu_sids).entry[entry->val] == entry &&
  112. entry->pentry == &__get_cpu_var(pcpu_sids).entry[entry->val])
  113. return entry->val;
  114. return -1;
  115. }
  116. /* Invalidate all id mappings on local core -- call with preempt disabled */
  117. static inline void local_sid_destroy_all(void)
  118. {
  119. __get_cpu_var(pcpu_last_used_sid) = 0;
  120. memset(&__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids)));
  121. }
  122. static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)
  123. {
  124. vcpu_e500->idt = kzalloc(sizeof(struct vcpu_id_table), GFP_KERNEL);
  125. return vcpu_e500->idt;
  126. }
  127. static void kvmppc_e500_id_table_free(struct kvmppc_vcpu_e500 *vcpu_e500)
  128. {
  129. kfree(vcpu_e500->idt);
  130. }
  131. /* Invalidate all mappings on vcpu */
  132. static void kvmppc_e500_id_table_reset_all(struct kvmppc_vcpu_e500 *vcpu_e500)
  133. {
  134. memset(vcpu_e500->idt, 0, sizeof(struct vcpu_id_table));
  135. /* Update shadow pid when mappings are changed */
  136. kvmppc_e500_recalc_shadow_pid(vcpu_e500);
  137. }
  138. /* Invalidate one ID mapping on vcpu */
  139. static inline void kvmppc_e500_id_table_reset_one(
  140. struct kvmppc_vcpu_e500 *vcpu_e500,
  141. int as, int pid, int pr)
  142. {
  143. struct vcpu_id_table *idt = vcpu_e500->idt;
  144. BUG_ON(as >= 2);
  145. BUG_ON(pid >= NUM_TIDS);
  146. BUG_ON(pr >= 2);
  147. idt->id[as][pid][pr].val = 0;
  148. idt->id[as][pid][pr].pentry = NULL;
  149. /* Update shadow pid when mappings are changed */
  150. kvmppc_e500_recalc_shadow_pid(vcpu_e500);
  151. }
  152. /*
  153. * Map guest (vcpu,AS,ID,PR) to physical core shadow id.
  154. * This function first lookup if a valid mapping exists,
  155. * if not, then creates a new one.
  156. *
  157. * The caller must have preemption disabled, and keep it that way until
  158. * it has finished with the returned shadow id (either written into the
  159. * TLB or arch.shadow_pid, or discarded).
  160. */
  161. static unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,
  162. unsigned int as, unsigned int gid,
  163. unsigned int pr, int avoid_recursion)
  164. {
  165. struct vcpu_id_table *idt = vcpu_e500->idt;
  166. int sid;
  167. BUG_ON(as >= 2);
  168. BUG_ON(gid >= NUM_TIDS);
  169. BUG_ON(pr >= 2);
  170. sid = local_sid_lookup(&idt->id[as][gid][pr]);
  171. while (sid <= 0) {
  172. /* No mapping yet */
  173. sid = local_sid_setup_one(&idt->id[as][gid][pr]);
  174. if (sid <= 0) {
  175. _tlbil_all();
  176. local_sid_destroy_all();
  177. }
  178. /* Update shadow pid when mappings are changed */
  179. if (!avoid_recursion)
  180. kvmppc_e500_recalc_shadow_pid(vcpu_e500);
  181. }
  182. return sid;
  183. }
  184. /* Map guest pid to shadow.
  185. * We use PID to keep shadow of current guest non-zero PID,
  186. * and use PID1 to keep shadow of guest zero PID.
  187. * So that guest tlbe with TID=0 can be accessed at any time */
  188. void kvmppc_e500_recalc_shadow_pid(struct kvmppc_vcpu_e500 *vcpu_e500)
  189. {
  190. preempt_disable();
  191. vcpu_e500->vcpu.arch.shadow_pid = kvmppc_e500_get_sid(vcpu_e500,
  192. get_cur_as(&vcpu_e500->vcpu),
  193. get_cur_pid(&vcpu_e500->vcpu),
  194. get_cur_pr(&vcpu_e500->vcpu), 1);
  195. vcpu_e500->vcpu.arch.shadow_pid1 = kvmppc_e500_get_sid(vcpu_e500,
  196. get_cur_as(&vcpu_e500->vcpu), 0,
  197. get_cur_pr(&vcpu_e500->vcpu), 1);
  198. preempt_enable();
  199. }
  200. static inline unsigned int gtlb0_get_next_victim(
  201. struct kvmppc_vcpu_e500 *vcpu_e500)
  202. {
  203. unsigned int victim;
  204. victim = vcpu_e500->gtlb_nv[0]++;
  205. if (unlikely(vcpu_e500->gtlb_nv[0] >= vcpu_e500->gtlb_params[0].ways))
  206. vcpu_e500->gtlb_nv[0] = 0;
  207. return victim;
  208. }
  209. static inline unsigned int tlb1_max_shadow_size(void)
  210. {
  211. /* reserve one entry for magic page */
  212. return host_tlb_params[1].entries - tlbcam_index - 1;
  213. }
  214. static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
  215. {
  216. return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
  217. }
  218. static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
  219. {
  220. /* Mask off reserved bits. */
  221. mas3 &= MAS3_ATTRIB_MASK;
  222. if (!usermode) {
  223. /* Guest is in supervisor mode,
  224. * so we need to translate guest
  225. * supervisor permissions into user permissions. */
  226. mas3 &= ~E500_TLB_USER_PERM_MASK;
  227. mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
  228. }
  229. return mas3 | E500_TLB_SUPER_PERM_MASK;
  230. }
  231. static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
  232. {
  233. #ifdef CONFIG_SMP
  234. return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
  235. #else
  236. return mas2 & MAS2_ATTRIB_MASK;
  237. #endif
  238. }
  239. /*
  240. * writing shadow tlb entry to host TLB
  241. */
  242. static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
  243. uint32_t mas0)
  244. {
  245. unsigned long flags;
  246. local_irq_save(flags);
  247. mtspr(SPRN_MAS0, mas0);
  248. mtspr(SPRN_MAS1, stlbe->mas1);
  249. mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
  250. mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
  251. mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
  252. asm volatile("isync; tlbwe" : : : "memory");
  253. local_irq_restore(flags);
  254. }
  255. /*
  256. * Acquire a mas0 with victim hint, as if we just took a TLB miss.
  257. *
  258. * We don't care about the address we're searching for, other than that it's
  259. * in the right set and is not present in the TLB. Using a zero PID and a
  260. * userspace address means we don't have to set and then restore MAS5, or
  261. * calculate a proper MAS6 value.
  262. */
  263. static u32 get_host_mas0(unsigned long eaddr)
  264. {
  265. unsigned long flags;
  266. u32 mas0;
  267. local_irq_save(flags);
  268. mtspr(SPRN_MAS6, 0);
  269. asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET));
  270. mas0 = mfspr(SPRN_MAS0);
  271. local_irq_restore(flags);
  272. return mas0;
  273. }
  274. /* sesel is for tlb1 only */
  275. static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
  276. int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe)
  277. {
  278. u32 mas0;
  279. if (tlbsel == 0) {
  280. mas0 = get_host_mas0(stlbe->mas2);
  281. __write_host_tlbe(stlbe, mas0);
  282. } else {
  283. __write_host_tlbe(stlbe,
  284. MAS0_TLBSEL(1) |
  285. MAS0_ESEL(to_htlb1_esel(sesel)));
  286. }
  287. trace_kvm_stlb_write(index_of(tlbsel, esel), stlbe->mas1, stlbe->mas2,
  288. (u32)stlbe->mas7_3, (u32)(stlbe->mas7_3 >> 32));
  289. }
  290. void kvmppc_map_magic(struct kvm_vcpu *vcpu)
  291. {
  292. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  293. struct kvm_book3e_206_tlb_entry magic;
  294. ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
  295. unsigned int stid;
  296. pfn_t pfn;
  297. pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
  298. get_page(pfn_to_page(pfn));
  299. preempt_disable();
  300. stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
  301. magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
  302. MAS1_TSIZE(BOOK3E_PAGESZ_4K);
  303. magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
  304. magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
  305. MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
  306. __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
  307. preempt_enable();
  308. }
  309. void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)
  310. {
  311. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  312. /* Shadow PID may be expired on local core */
  313. kvmppc_e500_recalc_shadow_pid(vcpu_e500);
  314. }
  315. void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)
  316. {
  317. }
  318. static void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500,
  319. int tlbsel, int esel)
  320. {
  321. struct kvm_book3e_206_tlb_entry *gtlbe =
  322. get_entry(vcpu_e500, tlbsel, esel);
  323. struct vcpu_id_table *idt = vcpu_e500->idt;
  324. unsigned int pr, tid, ts, pid;
  325. u32 val, eaddr;
  326. unsigned long flags;
  327. ts = get_tlb_ts(gtlbe);
  328. tid = get_tlb_tid(gtlbe);
  329. preempt_disable();
  330. /* One guest ID may be mapped to two shadow IDs */
  331. for (pr = 0; pr < 2; pr++) {
  332. /*
  333. * The shadow PID can have a valid mapping on at most one
  334. * host CPU. In the common case, it will be valid on this
  335. * CPU, in which case (for TLB0) we do a local invalidation
  336. * of the specific address.
  337. *
  338. * If the shadow PID is not valid on the current host CPU, or
  339. * if we're invalidating a TLB1 entry, we invalidate the
  340. * entire shadow PID.
  341. */
  342. if (tlbsel == 1 ||
  343. (pid = local_sid_lookup(&idt->id[ts][tid][pr])) <= 0) {
  344. kvmppc_e500_id_table_reset_one(vcpu_e500, ts, tid, pr);
  345. continue;
  346. }
  347. /*
  348. * The guest is invalidating a TLB0 entry which is in a PID
  349. * that has a valid shadow mapping on this host CPU. We
  350. * search host TLB0 to invalidate it's shadow TLB entry,
  351. * similar to __tlbil_va except that we need to look in AS1.
  352. */
  353. val = (pid << MAS6_SPID_SHIFT) | MAS6_SAS;
  354. eaddr = get_tlb_eaddr(gtlbe);
  355. local_irq_save(flags);
  356. mtspr(SPRN_MAS6, val);
  357. asm volatile("tlbsx 0, %[eaddr]" : : [eaddr] "r" (eaddr));
  358. val = mfspr(SPRN_MAS1);
  359. if (val & MAS1_VALID) {
  360. mtspr(SPRN_MAS1, val & ~MAS1_VALID);
  361. asm volatile("tlbwe");
  362. }
  363. local_irq_restore(flags);
  364. }
  365. preempt_enable();
  366. }
  367. static int tlb0_set_base(gva_t addr, int sets, int ways)
  368. {
  369. int set_base;
  370. set_base = (addr >> PAGE_SHIFT) & (sets - 1);
  371. set_base *= ways;
  372. return set_base;
  373. }
  374. static int gtlb0_set_base(struct kvmppc_vcpu_e500 *vcpu_e500, gva_t addr)
  375. {
  376. return tlb0_set_base(addr, vcpu_e500->gtlb_params[0].sets,
  377. vcpu_e500->gtlb_params[0].ways);
  378. }
  379. static unsigned int get_tlb_esel(struct kvm_vcpu *vcpu, int tlbsel)
  380. {
  381. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  382. int esel = get_tlb_esel_bit(vcpu);
  383. if (tlbsel == 0) {
  384. esel &= vcpu_e500->gtlb_params[0].ways - 1;
  385. esel += gtlb0_set_base(vcpu_e500, vcpu->arch.shared->mas2);
  386. } else {
  387. esel &= vcpu_e500->gtlb_params[tlbsel].entries - 1;
  388. }
  389. return esel;
  390. }
  391. /* Search the guest TLB for a matching entry. */
  392. static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
  393. gva_t eaddr, int tlbsel, unsigned int pid, int as)
  394. {
  395. int size = vcpu_e500->gtlb_params[tlbsel].entries;
  396. unsigned int set_base, offset;
  397. int i;
  398. if (tlbsel == 0) {
  399. set_base = gtlb0_set_base(vcpu_e500, eaddr);
  400. size = vcpu_e500->gtlb_params[0].ways;
  401. } else {
  402. set_base = 0;
  403. }
  404. offset = vcpu_e500->gtlb_offset[tlbsel];
  405. for (i = 0; i < size; i++) {
  406. struct kvm_book3e_206_tlb_entry *tlbe =
  407. &vcpu_e500->gtlb_arch[offset + set_base + i];
  408. unsigned int tid;
  409. if (eaddr < get_tlb_eaddr(tlbe))
  410. continue;
  411. if (eaddr > get_tlb_end(tlbe))
  412. continue;
  413. tid = get_tlb_tid(tlbe);
  414. if (tid && (tid != pid))
  415. continue;
  416. if (!get_tlb_v(tlbe))
  417. continue;
  418. if (get_tlb_ts(tlbe) != as && as != -1)
  419. continue;
  420. return set_base + i;
  421. }
  422. return -1;
  423. }
  424. static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
  425. struct kvm_book3e_206_tlb_entry *gtlbe,
  426. pfn_t pfn)
  427. {
  428. ref->pfn = pfn;
  429. ref->flags = E500_TLB_VALID;
  430. if (tlbe_is_writable(gtlbe))
  431. ref->flags |= E500_TLB_DIRTY;
  432. }
  433. static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
  434. {
  435. if (ref->flags & E500_TLB_VALID) {
  436. if (ref->flags & E500_TLB_DIRTY)
  437. kvm_release_pfn_dirty(ref->pfn);
  438. else
  439. kvm_release_pfn_clean(ref->pfn);
  440. ref->flags = 0;
  441. }
  442. }
  443. static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
  444. {
  445. int tlbsel = 0;
  446. int i;
  447. for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
  448. struct tlbe_ref *ref =
  449. &vcpu_e500->gtlb_priv[tlbsel][i].ref;
  450. kvmppc_e500_ref_release(ref);
  451. }
  452. }
  453. static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
  454. {
  455. int stlbsel = 1;
  456. int i;
  457. kvmppc_e500_id_table_reset_all(vcpu_e500);
  458. for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
  459. struct tlbe_ref *ref =
  460. &vcpu_e500->tlb_refs[stlbsel][i];
  461. kvmppc_e500_ref_release(ref);
  462. }
  463. clear_tlb_privs(vcpu_e500);
  464. }
  465. static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
  466. unsigned int eaddr, int as)
  467. {
  468. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  469. unsigned int victim, pidsel, tsized;
  470. int tlbsel;
  471. /* since we only have two TLBs, only lower bit is used. */
  472. tlbsel = (vcpu->arch.shared->mas4 >> 28) & 0x1;
  473. victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
  474. pidsel = (vcpu->arch.shared->mas4 >> 16) & 0xf;
  475. tsized = (vcpu->arch.shared->mas4 >> 7) & 0x1f;
  476. vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
  477. | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
  478. vcpu->arch.shared->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
  479. | MAS1_TID(vcpu_e500->pid[pidsel])
  480. | MAS1_TSIZE(tsized);
  481. vcpu->arch.shared->mas2 = (eaddr & MAS2_EPN)
  482. | (vcpu->arch.shared->mas4 & MAS2_ATTRIB_MASK);
  483. vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
  484. vcpu->arch.shared->mas6 = (vcpu->arch.shared->mas6 & MAS6_SPID1)
  485. | (get_cur_pid(vcpu) << 16)
  486. | (as ? MAS6_SAS : 0);
  487. }
  488. /* TID must be supplied by the caller */
  489. static inline void kvmppc_e500_setup_stlbe(
  490. struct kvmppc_vcpu_e500 *vcpu_e500,
  491. struct kvm_book3e_206_tlb_entry *gtlbe,
  492. int tsize, struct tlbe_ref *ref, u64 gvaddr,
  493. struct kvm_book3e_206_tlb_entry *stlbe)
  494. {
  495. pfn_t pfn = ref->pfn;
  496. BUG_ON(!(ref->flags & E500_TLB_VALID));
  497. /* Force TS=1 IPROT=0 for all guest mappings. */
  498. stlbe->mas1 = MAS1_TSIZE(tsize) | MAS1_TS | MAS1_VALID;
  499. stlbe->mas2 = (gvaddr & MAS2_EPN)
  500. | e500_shadow_mas2_attrib(gtlbe->mas2,
  501. vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
  502. stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT)
  503. | e500_shadow_mas3_attrib(gtlbe->mas7_3,
  504. vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
  505. }
  506. static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
  507. u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
  508. int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
  509. struct tlbe_ref *ref)
  510. {
  511. struct kvm_memory_slot *slot;
  512. unsigned long pfn, hva;
  513. int pfnmap = 0;
  514. int tsize = BOOK3E_PAGESZ_4K;
  515. /*
  516. * Translate guest physical to true physical, acquiring
  517. * a page reference if it is normal, non-reserved memory.
  518. *
  519. * gfn_to_memslot() must succeed because otherwise we wouldn't
  520. * have gotten this far. Eventually we should just pass the slot
  521. * pointer through from the first lookup.
  522. */
  523. slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
  524. hva = gfn_to_hva_memslot(slot, gfn);
  525. if (tlbsel == 1) {
  526. struct vm_area_struct *vma;
  527. down_read(&current->mm->mmap_sem);
  528. vma = find_vma(current->mm, hva);
  529. if (vma && hva >= vma->vm_start &&
  530. (vma->vm_flags & VM_PFNMAP)) {
  531. /*
  532. * This VMA is a physically contiguous region (e.g.
  533. * /dev/mem) that bypasses normal Linux page
  534. * management. Find the overlap between the
  535. * vma and the memslot.
  536. */
  537. unsigned long start, end;
  538. unsigned long slot_start, slot_end;
  539. pfnmap = 1;
  540. start = vma->vm_pgoff;
  541. end = start +
  542. ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
  543. pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
  544. slot_start = pfn - (gfn - slot->base_gfn);
  545. slot_end = slot_start + slot->npages;
  546. if (start < slot_start)
  547. start = slot_start;
  548. if (end > slot_end)
  549. end = slot_end;
  550. tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
  551. MAS1_TSIZE_SHIFT;
  552. /*
  553. * e500 doesn't implement the lowest tsize bit,
  554. * or 1K pages.
  555. */
  556. tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
  557. /*
  558. * Now find the largest tsize (up to what the guest
  559. * requested) that will cover gfn, stay within the
  560. * range, and for which gfn and pfn are mutually
  561. * aligned.
  562. */
  563. for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
  564. unsigned long gfn_start, gfn_end, tsize_pages;
  565. tsize_pages = 1 << (tsize - 2);
  566. gfn_start = gfn & ~(tsize_pages - 1);
  567. gfn_end = gfn_start + tsize_pages;
  568. if (gfn_start + pfn - gfn < start)
  569. continue;
  570. if (gfn_end + pfn - gfn > end)
  571. continue;
  572. if ((gfn & (tsize_pages - 1)) !=
  573. (pfn & (tsize_pages - 1)))
  574. continue;
  575. gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
  576. pfn &= ~(tsize_pages - 1);
  577. break;
  578. }
  579. } else if (vma && hva >= vma->vm_start &&
  580. (vma->vm_flags & VM_HUGETLB)) {
  581. unsigned long psize = vma_kernel_pagesize(vma);
  582. tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
  583. MAS1_TSIZE_SHIFT;
  584. /*
  585. * Take the largest page size that satisfies both host
  586. * and guest mapping
  587. */
  588. tsize = min(__ilog2(psize) - 10, tsize);
  589. /*
  590. * e500 doesn't implement the lowest tsize bit,
  591. * or 1K pages.
  592. */
  593. tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
  594. }
  595. up_read(&current->mm->mmap_sem);
  596. }
  597. if (likely(!pfnmap)) {
  598. unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
  599. pfn = gfn_to_pfn_memslot(vcpu_e500->vcpu.kvm, slot, gfn);
  600. if (is_error_pfn(pfn)) {
  601. printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
  602. (long)gfn);
  603. kvm_release_pfn_clean(pfn);
  604. return;
  605. }
  606. /* Align guest and physical address to page map boundaries */
  607. pfn &= ~(tsize_pages - 1);
  608. gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
  609. }
  610. /* Drop old ref and setup new one. */
  611. kvmppc_e500_ref_release(ref);
  612. kvmppc_e500_ref_setup(ref, gtlbe, pfn);
  613. kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, tsize, ref, gvaddr, stlbe);
  614. }
  615. /* XXX only map the one-one case, for now use TLB0 */
  616. static void kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500,
  617. int esel,
  618. struct kvm_book3e_206_tlb_entry *stlbe)
  619. {
  620. struct kvm_book3e_206_tlb_entry *gtlbe;
  621. struct tlbe_ref *ref;
  622. gtlbe = get_entry(vcpu_e500, 0, esel);
  623. ref = &vcpu_e500->gtlb_priv[0][esel].ref;
  624. kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
  625. get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
  626. gtlbe, 0, stlbe, ref);
  627. }
  628. /* Caller must ensure that the specified guest TLB entry is safe to insert into
  629. * the shadow TLB. */
  630. /* XXX for both one-one and one-to-many , for now use TLB1 */
  631. static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
  632. u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
  633. struct kvm_book3e_206_tlb_entry *stlbe)
  634. {
  635. struct tlbe_ref *ref;
  636. unsigned int victim;
  637. victim = vcpu_e500->host_tlb1_nv++;
  638. if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
  639. vcpu_e500->host_tlb1_nv = 0;
  640. ref = &vcpu_e500->tlb_refs[1][victim];
  641. kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe, ref);
  642. return victim;
  643. }
  644. void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
  645. {
  646. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  647. /* Recalc shadow pid since MSR changes */
  648. kvmppc_e500_recalc_shadow_pid(vcpu_e500);
  649. }
  650. static inline int kvmppc_e500_gtlbe_invalidate(
  651. struct kvmppc_vcpu_e500 *vcpu_e500,
  652. int tlbsel, int esel)
  653. {
  654. struct kvm_book3e_206_tlb_entry *gtlbe =
  655. get_entry(vcpu_e500, tlbsel, esel);
  656. if (unlikely(get_tlb_iprot(gtlbe)))
  657. return -1;
  658. gtlbe->mas1 = 0;
  659. return 0;
  660. }
  661. int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
  662. {
  663. int esel;
  664. if (value & MMUCSR0_TLB0FI)
  665. for (esel = 0; esel < vcpu_e500->gtlb_params[0].entries; esel++)
  666. kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
  667. if (value & MMUCSR0_TLB1FI)
  668. for (esel = 0; esel < vcpu_e500->gtlb_params[1].entries; esel++)
  669. kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
  670. /* Invalidate all vcpu id mappings */
  671. kvmppc_e500_id_table_reset_all(vcpu_e500);
  672. return EMULATE_DONE;
  673. }
  674. int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
  675. {
  676. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  677. unsigned int ia;
  678. int esel, tlbsel;
  679. gva_t ea;
  680. ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
  681. ia = (ea >> 2) & 0x1;
  682. /* since we only have two TLBs, only lower bit is used. */
  683. tlbsel = (ea >> 3) & 0x1;
  684. if (ia) {
  685. /* invalidate all entries */
  686. for (esel = 0; esel < vcpu_e500->gtlb_params[tlbsel].entries;
  687. esel++)
  688. kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
  689. } else {
  690. ea &= 0xfffff000;
  691. esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
  692. get_cur_pid(vcpu), -1);
  693. if (esel >= 0)
  694. kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
  695. }
  696. /* Invalidate all vcpu id mappings */
  697. kvmppc_e500_id_table_reset_all(vcpu_e500);
  698. return EMULATE_DONE;
  699. }
  700. int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
  701. {
  702. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  703. int tlbsel, esel;
  704. struct kvm_book3e_206_tlb_entry *gtlbe;
  705. tlbsel = get_tlb_tlbsel(vcpu);
  706. esel = get_tlb_esel(vcpu, tlbsel);
  707. gtlbe = get_entry(vcpu_e500, tlbsel, esel);
  708. vcpu->arch.shared->mas0 &= ~MAS0_NV(~0);
  709. vcpu->arch.shared->mas0 |= MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
  710. vcpu->arch.shared->mas1 = gtlbe->mas1;
  711. vcpu->arch.shared->mas2 = gtlbe->mas2;
  712. vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
  713. return EMULATE_DONE;
  714. }
  715. int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
  716. {
  717. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  718. int as = !!get_cur_sas(vcpu);
  719. unsigned int pid = get_cur_spid(vcpu);
  720. int esel, tlbsel;
  721. struct kvm_book3e_206_tlb_entry *gtlbe = NULL;
  722. gva_t ea;
  723. ea = kvmppc_get_gpr(vcpu, rb);
  724. for (tlbsel = 0; tlbsel < 2; tlbsel++) {
  725. esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
  726. if (esel >= 0) {
  727. gtlbe = get_entry(vcpu_e500, tlbsel, esel);
  728. break;
  729. }
  730. }
  731. if (gtlbe) {
  732. esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1;
  733. vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
  734. | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
  735. vcpu->arch.shared->mas1 = gtlbe->mas1;
  736. vcpu->arch.shared->mas2 = gtlbe->mas2;
  737. vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
  738. } else {
  739. int victim;
  740. /* since we only have two TLBs, only lower bit is used. */
  741. tlbsel = vcpu->arch.shared->mas4 >> 28 & 0x1;
  742. victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
  743. vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel)
  744. | MAS0_ESEL(victim)
  745. | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
  746. vcpu->arch.shared->mas1 =
  747. (vcpu->arch.shared->mas6 & MAS6_SPID0)
  748. | (vcpu->arch.shared->mas6 & (MAS6_SAS ? MAS1_TS : 0))
  749. | (vcpu->arch.shared->mas4 & MAS4_TSIZED(~0));
  750. vcpu->arch.shared->mas2 &= MAS2_EPN;
  751. vcpu->arch.shared->mas2 |= vcpu->arch.shared->mas4 &
  752. MAS2_ATTRIB_MASK;
  753. vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 |
  754. MAS3_U2 | MAS3_U3;
  755. }
  756. kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
  757. return EMULATE_DONE;
  758. }
  759. /* sesel is for tlb1 only */
  760. static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
  761. struct kvm_book3e_206_tlb_entry *gtlbe,
  762. struct kvm_book3e_206_tlb_entry *stlbe,
  763. int stlbsel, int sesel)
  764. {
  765. int stid;
  766. preempt_disable();
  767. stid = kvmppc_e500_get_sid(vcpu_e500, get_tlb_ts(gtlbe),
  768. get_tlb_tid(gtlbe),
  769. get_cur_pr(&vcpu_e500->vcpu), 0);
  770. stlbe->mas1 |= MAS1_TID(stid);
  771. write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
  772. preempt_enable();
  773. }
  774. int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
  775. {
  776. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  777. struct kvm_book3e_206_tlb_entry *gtlbe;
  778. int tlbsel, esel;
  779. tlbsel = get_tlb_tlbsel(vcpu);
  780. esel = get_tlb_esel(vcpu, tlbsel);
  781. gtlbe = get_entry(vcpu_e500, tlbsel, esel);
  782. if (get_tlb_v(gtlbe))
  783. inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
  784. gtlbe->mas1 = vcpu->arch.shared->mas1;
  785. gtlbe->mas2 = vcpu->arch.shared->mas2;
  786. gtlbe->mas7_3 = vcpu->arch.shared->mas7_3;
  787. trace_kvm_gtlb_write(vcpu->arch.shared->mas0, gtlbe->mas1, gtlbe->mas2,
  788. (u32)gtlbe->mas7_3, (u32)(gtlbe->mas7_3 >> 32));
  789. /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
  790. if (tlbe_is_host_safe(vcpu, gtlbe)) {
  791. struct kvm_book3e_206_tlb_entry stlbe;
  792. int stlbsel, sesel;
  793. u64 eaddr;
  794. u64 raddr;
  795. switch (tlbsel) {
  796. case 0:
  797. /* TLB0 */
  798. gtlbe->mas1 &= ~MAS1_TSIZE(~0);
  799. gtlbe->mas1 |= MAS1_TSIZE(BOOK3E_PAGESZ_4K);
  800. stlbsel = 0;
  801. kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
  802. sesel = 0; /* unused */
  803. break;
  804. case 1:
  805. /* TLB1 */
  806. eaddr = get_tlb_eaddr(gtlbe);
  807. raddr = get_tlb_raddr(gtlbe);
  808. /* Create a 4KB mapping on the host.
  809. * If the guest wanted a large page,
  810. * only the first 4KB is mapped here and the rest
  811. * are mapped on the fly. */
  812. stlbsel = 1;
  813. sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
  814. raddr >> PAGE_SHIFT, gtlbe, &stlbe);
  815. break;
  816. default:
  817. BUG();
  818. }
  819. write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
  820. }
  821. kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
  822. return EMULATE_DONE;
  823. }
  824. int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
  825. {
  826. unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
  827. return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
  828. }
  829. int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
  830. {
  831. unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
  832. return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
  833. }
  834. void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
  835. {
  836. unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
  837. kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
  838. }
  839. void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
  840. {
  841. unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
  842. kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
  843. }
  844. gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
  845. gva_t eaddr)
  846. {
  847. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  848. struct kvm_book3e_206_tlb_entry *gtlbe;
  849. u64 pgmask;
  850. gtlbe = get_entry(vcpu_e500, tlbsel_of(index), esel_of(index));
  851. pgmask = get_tlb_bytes(gtlbe) - 1;
  852. return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
  853. }
  854. void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
  855. {
  856. }
  857. void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
  858. unsigned int index)
  859. {
  860. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  861. struct tlbe_priv *priv;
  862. struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
  863. int tlbsel = tlbsel_of(index);
  864. int esel = esel_of(index);
  865. int stlbsel, sesel;
  866. gtlbe = get_entry(vcpu_e500, tlbsel, esel);
  867. switch (tlbsel) {
  868. case 0:
  869. stlbsel = 0;
  870. sesel = 0; /* unused */
  871. priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
  872. kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, BOOK3E_PAGESZ_4K,
  873. &priv->ref, eaddr, &stlbe);
  874. break;
  875. case 1: {
  876. gfn_t gfn = gpaddr >> PAGE_SHIFT;
  877. stlbsel = 1;
  878. sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn,
  879. gtlbe, &stlbe);
  880. break;
  881. }
  882. default:
  883. BUG();
  884. break;
  885. }
  886. write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
  887. }
  888. int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
  889. gva_t eaddr, unsigned int pid, int as)
  890. {
  891. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  892. int esel, tlbsel;
  893. for (tlbsel = 0; tlbsel < 2; tlbsel++) {
  894. esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
  895. if (esel >= 0)
  896. return index_of(tlbsel, esel);
  897. }
  898. return -1;
  899. }
  900. void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
  901. {
  902. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  903. if (vcpu->arch.pid != pid) {
  904. vcpu_e500->pid[0] = vcpu->arch.pid = pid;
  905. kvmppc_e500_recalc_shadow_pid(vcpu_e500);
  906. }
  907. }
  908. void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
  909. {
  910. struct kvm_book3e_206_tlb_entry *tlbe;
  911. /* Insert large initial mapping for guest. */
  912. tlbe = get_entry(vcpu_e500, 1, 0);
  913. tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_256M);
  914. tlbe->mas2 = 0;
  915. tlbe->mas7_3 = E500_TLB_SUPER_PERM_MASK;
  916. /* 4K map for serial output. Used by kernel wrapper. */
  917. tlbe = get_entry(vcpu_e500, 1, 1);
  918. tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_4K);
  919. tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
  920. tlbe->mas7_3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
  921. }
  922. static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)
  923. {
  924. int i;
  925. clear_tlb_refs(vcpu_e500);
  926. kfree(vcpu_e500->gtlb_priv[0]);
  927. kfree(vcpu_e500->gtlb_priv[1]);
  928. if (vcpu_e500->shared_tlb_pages) {
  929. vfree((void *)(round_down((uintptr_t)vcpu_e500->gtlb_arch,
  930. PAGE_SIZE)));
  931. for (i = 0; i < vcpu_e500->num_shared_tlb_pages; i++) {
  932. set_page_dirty_lock(vcpu_e500->shared_tlb_pages[i]);
  933. put_page(vcpu_e500->shared_tlb_pages[i]);
  934. }
  935. vcpu_e500->num_shared_tlb_pages = 0;
  936. vcpu_e500->shared_tlb_pages = NULL;
  937. } else {
  938. kfree(vcpu_e500->gtlb_arch);
  939. }
  940. vcpu_e500->gtlb_arch = NULL;
  941. }
  942. int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
  943. struct kvm_config_tlb *cfg)
  944. {
  945. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  946. struct kvm_book3e_206_tlb_params params;
  947. char *virt;
  948. struct page **pages;
  949. struct tlbe_priv *privs[2] = {};
  950. size_t array_len;
  951. u32 sets;
  952. int num_pages, ret, i;
  953. if (cfg->mmu_type != KVM_MMU_FSL_BOOKE_NOHV)
  954. return -EINVAL;
  955. if (copy_from_user(&params, (void __user *)(uintptr_t)cfg->params,
  956. sizeof(params)))
  957. return -EFAULT;
  958. if (params.tlb_sizes[1] > 64)
  959. return -EINVAL;
  960. if (params.tlb_ways[1] != params.tlb_sizes[1])
  961. return -EINVAL;
  962. if (params.tlb_sizes[2] != 0 || params.tlb_sizes[3] != 0)
  963. return -EINVAL;
  964. if (params.tlb_ways[2] != 0 || params.tlb_ways[3] != 0)
  965. return -EINVAL;
  966. if (!is_power_of_2(params.tlb_ways[0]))
  967. return -EINVAL;
  968. sets = params.tlb_sizes[0] >> ilog2(params.tlb_ways[0]);
  969. if (!is_power_of_2(sets))
  970. return -EINVAL;
  971. array_len = params.tlb_sizes[0] + params.tlb_sizes[1];
  972. array_len *= sizeof(struct kvm_book3e_206_tlb_entry);
  973. if (cfg->array_len < array_len)
  974. return -EINVAL;
  975. num_pages = DIV_ROUND_UP(cfg->array + array_len - 1, PAGE_SIZE) -
  976. cfg->array / PAGE_SIZE;
  977. pages = kmalloc(sizeof(struct page *) * num_pages, GFP_KERNEL);
  978. if (!pages)
  979. return -ENOMEM;
  980. ret = get_user_pages_fast(cfg->array, num_pages, 1, pages);
  981. if (ret < 0)
  982. goto err_pages;
  983. if (ret != num_pages) {
  984. num_pages = ret;
  985. ret = -EFAULT;
  986. goto err_put_page;
  987. }
  988. virt = vmap(pages, num_pages, VM_MAP, PAGE_KERNEL);
  989. if (!virt)
  990. goto err_put_page;
  991. privs[0] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[0],
  992. GFP_KERNEL);
  993. privs[1] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[1],
  994. GFP_KERNEL);
  995. if (!privs[0] || !privs[1])
  996. goto err_put_page;
  997. free_gtlb(vcpu_e500);
  998. vcpu_e500->gtlb_priv[0] = privs[0];
  999. vcpu_e500->gtlb_priv[1] = privs[1];
  1000. vcpu_e500->gtlb_arch = (struct kvm_book3e_206_tlb_entry *)
  1001. (virt + (cfg->array & (PAGE_SIZE - 1)));
  1002. vcpu_e500->gtlb_params[0].entries = params.tlb_sizes[0];
  1003. vcpu_e500->gtlb_params[1].entries = params.tlb_sizes[1];
  1004. vcpu_e500->gtlb_offset[0] = 0;
  1005. vcpu_e500->gtlb_offset[1] = params.tlb_sizes[0];
  1006. vcpu_e500->tlb0cfg &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
  1007. if (params.tlb_sizes[0] <= 2048)
  1008. vcpu_e500->tlb0cfg |= params.tlb_sizes[0];
  1009. vcpu_e500->tlb0cfg |= params.tlb_ways[0] << TLBnCFG_ASSOC_SHIFT;
  1010. vcpu_e500->tlb1cfg &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
  1011. vcpu_e500->tlb1cfg |= params.tlb_sizes[1];
  1012. vcpu_e500->tlb1cfg |= params.tlb_ways[1] << TLBnCFG_ASSOC_SHIFT;
  1013. vcpu_e500->shared_tlb_pages = pages;
  1014. vcpu_e500->num_shared_tlb_pages = num_pages;
  1015. vcpu_e500->gtlb_params[0].ways = params.tlb_ways[0];
  1016. vcpu_e500->gtlb_params[0].sets = sets;
  1017. vcpu_e500->gtlb_params[1].ways = params.tlb_sizes[1];
  1018. vcpu_e500->gtlb_params[1].sets = 1;
  1019. return 0;
  1020. err_put_page:
  1021. kfree(privs[0]);
  1022. kfree(privs[1]);
  1023. for (i = 0; i < num_pages; i++)
  1024. put_page(pages[i]);
  1025. err_pages:
  1026. kfree(pages);
  1027. return ret;
  1028. }
  1029. int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
  1030. struct kvm_dirty_tlb *dirty)
  1031. {
  1032. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  1033. clear_tlb_refs(vcpu_e500);
  1034. return 0;
  1035. }
  1036. int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
  1037. {
  1038. int entry_size = sizeof(struct kvm_book3e_206_tlb_entry);
  1039. int entries = KVM_E500_TLB0_SIZE + KVM_E500_TLB1_SIZE;
  1040. host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
  1041. host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
  1042. /*
  1043. * This should never happen on real e500 hardware, but is
  1044. * architecturally possible -- e.g. in some weird nested
  1045. * virtualization case.
  1046. */
  1047. if (host_tlb_params[0].entries == 0 ||
  1048. host_tlb_params[1].entries == 0) {
  1049. pr_err("%s: need to know host tlb size\n", __func__);
  1050. return -ENODEV;
  1051. }
  1052. host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
  1053. TLBnCFG_ASSOC_SHIFT;
  1054. host_tlb_params[1].ways = host_tlb_params[1].entries;
  1055. if (!is_power_of_2(host_tlb_params[0].entries) ||
  1056. !is_power_of_2(host_tlb_params[0].ways) ||
  1057. host_tlb_params[0].entries < host_tlb_params[0].ways ||
  1058. host_tlb_params[0].ways == 0) {
  1059. pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
  1060. __func__, host_tlb_params[0].entries,
  1061. host_tlb_params[0].ways);
  1062. return -ENODEV;
  1063. }
  1064. host_tlb_params[0].sets =
  1065. host_tlb_params[0].entries / host_tlb_params[0].ways;
  1066. host_tlb_params[1].sets = 1;
  1067. vcpu_e500->gtlb_params[0].entries = KVM_E500_TLB0_SIZE;
  1068. vcpu_e500->gtlb_params[1].entries = KVM_E500_TLB1_SIZE;
  1069. vcpu_e500->gtlb_params[0].ways = KVM_E500_TLB0_WAY_NUM;
  1070. vcpu_e500->gtlb_params[0].sets =
  1071. KVM_E500_TLB0_SIZE / KVM_E500_TLB0_WAY_NUM;
  1072. vcpu_e500->gtlb_params[1].ways = KVM_E500_TLB1_SIZE;
  1073. vcpu_e500->gtlb_params[1].sets = 1;
  1074. vcpu_e500->gtlb_arch = kmalloc(entries * entry_size, GFP_KERNEL);
  1075. if (!vcpu_e500->gtlb_arch)
  1076. return -ENOMEM;
  1077. vcpu_e500->gtlb_offset[0] = 0;
  1078. vcpu_e500->gtlb_offset[1] = KVM_E500_TLB0_SIZE;
  1079. vcpu_e500->tlb_refs[0] =
  1080. kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
  1081. GFP_KERNEL);
  1082. if (!vcpu_e500->tlb_refs[0])
  1083. goto err;
  1084. vcpu_e500->tlb_refs[1] =
  1085. kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
  1086. GFP_KERNEL);
  1087. if (!vcpu_e500->tlb_refs[1])
  1088. goto err;
  1089. vcpu_e500->gtlb_priv[0] = kzalloc(sizeof(struct tlbe_ref) *
  1090. vcpu_e500->gtlb_params[0].entries,
  1091. GFP_KERNEL);
  1092. if (!vcpu_e500->gtlb_priv[0])
  1093. goto err;
  1094. vcpu_e500->gtlb_priv[1] = kzalloc(sizeof(struct tlbe_ref) *
  1095. vcpu_e500->gtlb_params[1].entries,
  1096. GFP_KERNEL);
  1097. if (!vcpu_e500->gtlb_priv[1])
  1098. goto err;
  1099. if (kvmppc_e500_id_table_alloc(vcpu_e500) == NULL)
  1100. goto err;
  1101. /* Init TLB configuration register */
  1102. vcpu_e500->tlb0cfg = mfspr(SPRN_TLB0CFG) &
  1103. ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
  1104. vcpu_e500->tlb0cfg |= vcpu_e500->gtlb_params[0].entries;
  1105. vcpu_e500->tlb0cfg |=
  1106. vcpu_e500->gtlb_params[0].ways << TLBnCFG_ASSOC_SHIFT;
  1107. vcpu_e500->tlb1cfg = mfspr(SPRN_TLB1CFG) &
  1108. ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
  1109. vcpu_e500->tlb0cfg |= vcpu_e500->gtlb_params[1].entries;
  1110. vcpu_e500->tlb0cfg |=
  1111. vcpu_e500->gtlb_params[1].ways << TLBnCFG_ASSOC_SHIFT;
  1112. return 0;
  1113. err:
  1114. free_gtlb(vcpu_e500);
  1115. kfree(vcpu_e500->tlb_refs[0]);
  1116. kfree(vcpu_e500->tlb_refs[1]);
  1117. return -1;
  1118. }
  1119. void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
  1120. {
  1121. free_gtlb(vcpu_e500);
  1122. kvmppc_e500_id_table_free(vcpu_e500);
  1123. kfree(vcpu_e500->tlb_refs[0]);
  1124. kfree(vcpu_e500->tlb_refs[1]);
  1125. }