byteorder.h 1.3 KB

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  1. /*
  2. * arch/arm/include/asm/byteorder.h
  3. *
  4. * ARM Endian-ness. In little endian mode, the data bus is connected such
  5. * that byte accesses appear as:
  6. * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
  7. * and word accesses (data or instruction) appear as:
  8. * d0...d31
  9. *
  10. * When in big endian mode, byte accesses appear as:
  11. * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
  12. * and word accesses (data or instruction) appear as:
  13. * d0...d31
  14. */
  15. #ifndef __ASM_ARM_BYTEORDER_H
  16. #define __ASM_ARM_BYTEORDER_H
  17. #include <linux/compiler.h>
  18. #include <asm/types.h>
  19. #ifdef __ARMEB__
  20. # define __BIG_ENDIAN
  21. #else
  22. # define __LITTLE_ENDIAN
  23. #endif
  24. #define __SWAB_64_THRU_32__
  25. static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
  26. {
  27. __u32 t;
  28. #ifndef __thumb__
  29. if (!__builtin_constant_p(x)) {
  30. /*
  31. * The compiler needs a bit of a hint here to always do the
  32. * right thing and not screw it up to different degrees
  33. * depending on the gcc version.
  34. */
  35. asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
  36. } else
  37. #endif
  38. t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
  39. x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
  40. t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
  41. x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
  42. return x;
  43. }
  44. #define __arch_swab32 __arch_swab32
  45. #include <linux/byteorder.h>
  46. #endif