events.c 42 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/page.h>
  39. #include <asm/xen/pci.h>
  40. #include <asm/xen/hypercall.h>
  41. #include <asm/xen/hypervisor.h>
  42. #include <xen/xen.h>
  43. #include <xen/hvm.h>
  44. #include <xen/xen-ops.h>
  45. #include <xen/events.h>
  46. #include <xen/interface/xen.h>
  47. #include <xen/interface/event_channel.h>
  48. #include <xen/interface/hvm/hvm_op.h>
  49. #include <xen/interface/hvm/params.h>
  50. /*
  51. * This lock protects updates to the following mapping and reference-count
  52. * arrays. The lock does not need to be acquired to read the mapping tables.
  53. */
  54. static DEFINE_MUTEX(irq_mapping_update_lock);
  55. static LIST_HEAD(xen_irq_list_head);
  56. /* IRQ <-> VIRQ mapping. */
  57. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  58. /* IRQ <-> IPI mapping */
  59. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  60. /* Interrupt types. */
  61. enum xen_irq_type {
  62. IRQT_UNBOUND = 0,
  63. IRQT_PIRQ,
  64. IRQT_VIRQ,
  65. IRQT_IPI,
  66. IRQT_EVTCHN
  67. };
  68. /*
  69. * Packed IRQ information:
  70. * type - enum xen_irq_type
  71. * event channel - irq->event channel mapping
  72. * cpu - cpu this event channel is bound to
  73. * index - type-specific information:
  74. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  75. * guest, or GSI (real passthrough IRQ) of the device.
  76. * VIRQ - virq number
  77. * IPI - IPI vector
  78. * EVTCHN -
  79. */
  80. struct irq_info {
  81. struct list_head list;
  82. int refcnt;
  83. enum xen_irq_type type; /* type */
  84. unsigned irq;
  85. unsigned short evtchn; /* event channel */
  86. unsigned short cpu; /* cpu bound */
  87. union {
  88. unsigned short virq;
  89. enum ipi_vector ipi;
  90. struct {
  91. unsigned short pirq;
  92. unsigned short gsi;
  93. unsigned char vector;
  94. unsigned char flags;
  95. uint16_t domid;
  96. } pirq;
  97. } u;
  98. };
  99. #define PIRQ_NEEDS_EOI (1 << 0)
  100. #define PIRQ_SHAREABLE (1 << 1)
  101. static int *evtchn_to_irq;
  102. static unsigned long *pirq_eoi_map;
  103. static bool (*pirq_needs_eoi)(unsigned irq);
  104. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  105. cpu_evtchn_mask);
  106. /* Xen will never allocate port zero for any purpose. */
  107. #define VALID_EVTCHN(chn) ((chn) != 0)
  108. static struct irq_chip xen_dynamic_chip;
  109. static struct irq_chip xen_percpu_chip;
  110. static struct irq_chip xen_pirq_chip;
  111. static void enable_dynirq(struct irq_data *data);
  112. static void disable_dynirq(struct irq_data *data);
  113. /* Get info for IRQ */
  114. static struct irq_info *info_for_irq(unsigned irq)
  115. {
  116. return irq_get_handler_data(irq);
  117. }
  118. /* Constructors for packed IRQ information. */
  119. static void xen_irq_info_common_init(struct irq_info *info,
  120. unsigned irq,
  121. enum xen_irq_type type,
  122. unsigned short evtchn,
  123. unsigned short cpu)
  124. {
  125. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  126. info->type = type;
  127. info->irq = irq;
  128. info->evtchn = evtchn;
  129. info->cpu = cpu;
  130. evtchn_to_irq[evtchn] = irq;
  131. }
  132. static void xen_irq_info_evtchn_init(unsigned irq,
  133. unsigned short evtchn)
  134. {
  135. struct irq_info *info = info_for_irq(irq);
  136. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  137. }
  138. static void xen_irq_info_ipi_init(unsigned cpu,
  139. unsigned irq,
  140. unsigned short evtchn,
  141. enum ipi_vector ipi)
  142. {
  143. struct irq_info *info = info_for_irq(irq);
  144. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  145. info->u.ipi = ipi;
  146. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  147. }
  148. static void xen_irq_info_virq_init(unsigned cpu,
  149. unsigned irq,
  150. unsigned short evtchn,
  151. unsigned short virq)
  152. {
  153. struct irq_info *info = info_for_irq(irq);
  154. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  155. info->u.virq = virq;
  156. per_cpu(virq_to_irq, cpu)[virq] = irq;
  157. }
  158. static void xen_irq_info_pirq_init(unsigned irq,
  159. unsigned short evtchn,
  160. unsigned short pirq,
  161. unsigned short gsi,
  162. unsigned short vector,
  163. uint16_t domid,
  164. unsigned char flags)
  165. {
  166. struct irq_info *info = info_for_irq(irq);
  167. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  168. info->u.pirq.pirq = pirq;
  169. info->u.pirq.gsi = gsi;
  170. info->u.pirq.vector = vector;
  171. info->u.pirq.domid = domid;
  172. info->u.pirq.flags = flags;
  173. }
  174. /*
  175. * Accessors for packed IRQ information.
  176. */
  177. static unsigned int evtchn_from_irq(unsigned irq)
  178. {
  179. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  180. return 0;
  181. return info_for_irq(irq)->evtchn;
  182. }
  183. unsigned irq_from_evtchn(unsigned int evtchn)
  184. {
  185. return evtchn_to_irq[evtchn];
  186. }
  187. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  188. static enum ipi_vector ipi_from_irq(unsigned irq)
  189. {
  190. struct irq_info *info = info_for_irq(irq);
  191. BUG_ON(info == NULL);
  192. BUG_ON(info->type != IRQT_IPI);
  193. return info->u.ipi;
  194. }
  195. static unsigned virq_from_irq(unsigned irq)
  196. {
  197. struct irq_info *info = info_for_irq(irq);
  198. BUG_ON(info == NULL);
  199. BUG_ON(info->type != IRQT_VIRQ);
  200. return info->u.virq;
  201. }
  202. static unsigned pirq_from_irq(unsigned irq)
  203. {
  204. struct irq_info *info = info_for_irq(irq);
  205. BUG_ON(info == NULL);
  206. BUG_ON(info->type != IRQT_PIRQ);
  207. return info->u.pirq.pirq;
  208. }
  209. static enum xen_irq_type type_from_irq(unsigned irq)
  210. {
  211. return info_for_irq(irq)->type;
  212. }
  213. static unsigned cpu_from_irq(unsigned irq)
  214. {
  215. return info_for_irq(irq)->cpu;
  216. }
  217. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  218. {
  219. int irq = evtchn_to_irq[evtchn];
  220. unsigned ret = 0;
  221. if (irq != -1)
  222. ret = cpu_from_irq(irq);
  223. return ret;
  224. }
  225. static bool pirq_check_eoi_map(unsigned irq)
  226. {
  227. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  228. }
  229. static bool pirq_needs_eoi_flag(unsigned irq)
  230. {
  231. struct irq_info *info = info_for_irq(irq);
  232. BUG_ON(info->type != IRQT_PIRQ);
  233. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  234. }
  235. static inline unsigned long active_evtchns(unsigned int cpu,
  236. struct shared_info *sh,
  237. unsigned int idx)
  238. {
  239. return sh->evtchn_pending[idx] &
  240. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  241. ~sh->evtchn_mask[idx];
  242. }
  243. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  244. {
  245. int irq = evtchn_to_irq[chn];
  246. BUG_ON(irq == -1);
  247. #ifdef CONFIG_SMP
  248. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  249. #endif
  250. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  251. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  252. info_for_irq(irq)->cpu = cpu;
  253. }
  254. static void init_evtchn_cpu_bindings(void)
  255. {
  256. int i;
  257. #ifdef CONFIG_SMP
  258. struct irq_info *info;
  259. /* By default all event channels notify CPU#0. */
  260. list_for_each_entry(info, &xen_irq_list_head, list) {
  261. struct irq_desc *desc = irq_to_desc(info->irq);
  262. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  263. }
  264. #endif
  265. for_each_possible_cpu(i)
  266. memset(per_cpu(cpu_evtchn_mask, i),
  267. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  268. }
  269. static inline void clear_evtchn(int port)
  270. {
  271. struct shared_info *s = HYPERVISOR_shared_info;
  272. sync_clear_bit(port, &s->evtchn_pending[0]);
  273. }
  274. static inline void set_evtchn(int port)
  275. {
  276. struct shared_info *s = HYPERVISOR_shared_info;
  277. sync_set_bit(port, &s->evtchn_pending[0]);
  278. }
  279. static inline int test_evtchn(int port)
  280. {
  281. struct shared_info *s = HYPERVISOR_shared_info;
  282. return sync_test_bit(port, &s->evtchn_pending[0]);
  283. }
  284. /**
  285. * notify_remote_via_irq - send event to remote end of event channel via irq
  286. * @irq: irq of event channel to send event to
  287. *
  288. * Unlike notify_remote_via_evtchn(), this is safe to use across
  289. * save/restore. Notifications on a broken connection are silently
  290. * dropped.
  291. */
  292. void notify_remote_via_irq(int irq)
  293. {
  294. int evtchn = evtchn_from_irq(irq);
  295. if (VALID_EVTCHN(evtchn))
  296. notify_remote_via_evtchn(evtchn);
  297. }
  298. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  299. static void mask_evtchn(int port)
  300. {
  301. struct shared_info *s = HYPERVISOR_shared_info;
  302. sync_set_bit(port, &s->evtchn_mask[0]);
  303. }
  304. static void unmask_evtchn(int port)
  305. {
  306. struct shared_info *s = HYPERVISOR_shared_info;
  307. unsigned int cpu = get_cpu();
  308. int do_hypercall = 0, evtchn_pending = 0;
  309. BUG_ON(!irqs_disabled());
  310. if (unlikely((cpu != cpu_from_evtchn(port))))
  311. do_hypercall = 1;
  312. else
  313. evtchn_pending = sync_test_bit(port, &s->evtchn_pending[0]);
  314. if (unlikely(evtchn_pending && xen_hvm_domain()))
  315. do_hypercall = 1;
  316. /* Slow path (hypercall) if this is a non-local port or if this is
  317. * an hvm domain and an event is pending (hvm domains don't have
  318. * their own implementation of irq_enable). */
  319. if (do_hypercall) {
  320. struct evtchn_unmask unmask = { .port = port };
  321. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  322. } else {
  323. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  324. sync_clear_bit(port, &s->evtchn_mask[0]);
  325. /*
  326. * The following is basically the equivalent of
  327. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  328. * the interrupt edge' if the channel is masked.
  329. */
  330. if (evtchn_pending &&
  331. !sync_test_and_set_bit(port / BITS_PER_LONG,
  332. &vcpu_info->evtchn_pending_sel))
  333. vcpu_info->evtchn_upcall_pending = 1;
  334. }
  335. put_cpu();
  336. }
  337. static void xen_irq_init(unsigned irq)
  338. {
  339. struct irq_info *info;
  340. #ifdef CONFIG_SMP
  341. struct irq_desc *desc = irq_to_desc(irq);
  342. /* By default all event channels notify CPU#0. */
  343. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  344. #endif
  345. info = kzalloc(sizeof(*info), GFP_KERNEL);
  346. if (info == NULL)
  347. panic("Unable to allocate metadata for IRQ%d\n", irq);
  348. info->type = IRQT_UNBOUND;
  349. info->refcnt = -1;
  350. irq_set_handler_data(irq, info);
  351. list_add_tail(&info->list, &xen_irq_list_head);
  352. }
  353. static int __must_check xen_allocate_irq_dynamic(void)
  354. {
  355. int first = 0;
  356. int irq;
  357. #ifdef CONFIG_X86_IO_APIC
  358. /*
  359. * For an HVM guest or domain 0 which see "real" (emulated or
  360. * actual respectively) GSIs we allocate dynamic IRQs
  361. * e.g. those corresponding to event channels or MSIs
  362. * etc. from the range above those "real" GSIs to avoid
  363. * collisions.
  364. */
  365. if (xen_initial_domain() || xen_hvm_domain())
  366. first = get_nr_irqs_gsi();
  367. #endif
  368. irq = irq_alloc_desc_from(first, -1);
  369. if (irq >= 0)
  370. xen_irq_init(irq);
  371. return irq;
  372. }
  373. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  374. {
  375. int irq;
  376. /*
  377. * A PV guest has no concept of a GSI (since it has no ACPI
  378. * nor access to/knowledge of the physical APICs). Therefore
  379. * all IRQs are dynamically allocated from the entire IRQ
  380. * space.
  381. */
  382. if (xen_pv_domain() && !xen_initial_domain())
  383. return xen_allocate_irq_dynamic();
  384. /* Legacy IRQ descriptors are already allocated by the arch. */
  385. if (gsi < NR_IRQS_LEGACY)
  386. irq = gsi;
  387. else
  388. irq = irq_alloc_desc_at(gsi, -1);
  389. xen_irq_init(irq);
  390. return irq;
  391. }
  392. static void xen_free_irq(unsigned irq)
  393. {
  394. struct irq_info *info = irq_get_handler_data(irq);
  395. list_del(&info->list);
  396. irq_set_handler_data(irq, NULL);
  397. WARN_ON(info->refcnt > 0);
  398. kfree(info);
  399. /* Legacy IRQ descriptors are managed by the arch. */
  400. if (irq < NR_IRQS_LEGACY)
  401. return;
  402. irq_free_desc(irq);
  403. }
  404. static void pirq_query_unmask(int irq)
  405. {
  406. struct physdev_irq_status_query irq_status;
  407. struct irq_info *info = info_for_irq(irq);
  408. BUG_ON(info->type != IRQT_PIRQ);
  409. irq_status.irq = pirq_from_irq(irq);
  410. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  411. irq_status.flags = 0;
  412. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  413. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  414. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  415. }
  416. static bool probing_irq(int irq)
  417. {
  418. struct irq_desc *desc = irq_to_desc(irq);
  419. return desc && desc->action == NULL;
  420. }
  421. static void eoi_pirq(struct irq_data *data)
  422. {
  423. int evtchn = evtchn_from_irq(data->irq);
  424. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  425. int rc = 0;
  426. irq_move_irq(data);
  427. if (VALID_EVTCHN(evtchn))
  428. clear_evtchn(evtchn);
  429. if (pirq_needs_eoi(data->irq)) {
  430. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  431. WARN_ON(rc);
  432. }
  433. }
  434. static void mask_ack_pirq(struct irq_data *data)
  435. {
  436. disable_dynirq(data);
  437. eoi_pirq(data);
  438. }
  439. static unsigned int __startup_pirq(unsigned int irq)
  440. {
  441. struct evtchn_bind_pirq bind_pirq;
  442. struct irq_info *info = info_for_irq(irq);
  443. int evtchn = evtchn_from_irq(irq);
  444. int rc;
  445. BUG_ON(info->type != IRQT_PIRQ);
  446. if (VALID_EVTCHN(evtchn))
  447. goto out;
  448. bind_pirq.pirq = pirq_from_irq(irq);
  449. /* NB. We are happy to share unless we are probing. */
  450. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  451. BIND_PIRQ__WILL_SHARE : 0;
  452. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  453. if (rc != 0) {
  454. if (!probing_irq(irq))
  455. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  456. irq);
  457. return 0;
  458. }
  459. evtchn = bind_pirq.port;
  460. pirq_query_unmask(irq);
  461. evtchn_to_irq[evtchn] = irq;
  462. bind_evtchn_to_cpu(evtchn, 0);
  463. info->evtchn = evtchn;
  464. out:
  465. unmask_evtchn(evtchn);
  466. eoi_pirq(irq_get_irq_data(irq));
  467. return 0;
  468. }
  469. static unsigned int startup_pirq(struct irq_data *data)
  470. {
  471. return __startup_pirq(data->irq);
  472. }
  473. static void shutdown_pirq(struct irq_data *data)
  474. {
  475. struct evtchn_close close;
  476. unsigned int irq = data->irq;
  477. struct irq_info *info = info_for_irq(irq);
  478. int evtchn = evtchn_from_irq(irq);
  479. BUG_ON(info->type != IRQT_PIRQ);
  480. if (!VALID_EVTCHN(evtchn))
  481. return;
  482. mask_evtchn(evtchn);
  483. close.port = evtchn;
  484. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  485. BUG();
  486. bind_evtchn_to_cpu(evtchn, 0);
  487. evtchn_to_irq[evtchn] = -1;
  488. info->evtchn = 0;
  489. }
  490. static void enable_pirq(struct irq_data *data)
  491. {
  492. startup_pirq(data);
  493. }
  494. static void disable_pirq(struct irq_data *data)
  495. {
  496. disable_dynirq(data);
  497. }
  498. int xen_irq_from_gsi(unsigned gsi)
  499. {
  500. struct irq_info *info;
  501. list_for_each_entry(info, &xen_irq_list_head, list) {
  502. if (info->type != IRQT_PIRQ)
  503. continue;
  504. if (info->u.pirq.gsi == gsi)
  505. return info->irq;
  506. }
  507. return -1;
  508. }
  509. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  510. /*
  511. * Do not make any assumptions regarding the relationship between the
  512. * IRQ number returned here and the Xen pirq argument.
  513. *
  514. * Note: We don't assign an event channel until the irq actually started
  515. * up. Return an existing irq if we've already got one for the gsi.
  516. *
  517. * Shareable implies level triggered, not shareable implies edge
  518. * triggered here.
  519. */
  520. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  521. unsigned pirq, int shareable, char *name)
  522. {
  523. int irq = -1;
  524. struct physdev_irq irq_op;
  525. mutex_lock(&irq_mapping_update_lock);
  526. irq = xen_irq_from_gsi(gsi);
  527. if (irq != -1) {
  528. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  529. irq, gsi);
  530. goto out;
  531. }
  532. irq = xen_allocate_irq_gsi(gsi);
  533. if (irq < 0)
  534. goto out;
  535. irq_op.irq = irq;
  536. irq_op.vector = 0;
  537. /* Only the privileged domain can do this. For non-priv, the pcifront
  538. * driver provides a PCI bus that does the call to do exactly
  539. * this in the priv domain. */
  540. if (xen_initial_domain() &&
  541. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  542. xen_free_irq(irq);
  543. irq = -ENOSPC;
  544. goto out;
  545. }
  546. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  547. shareable ? PIRQ_SHAREABLE : 0);
  548. pirq_query_unmask(irq);
  549. /* We try to use the handler with the appropriate semantic for the
  550. * type of interrupt: if the interrupt is an edge triggered
  551. * interrupt we use handle_edge_irq.
  552. *
  553. * On the other hand if the interrupt is level triggered we use
  554. * handle_fasteoi_irq like the native code does for this kind of
  555. * interrupts.
  556. *
  557. * Depending on the Xen version, pirq_needs_eoi might return true
  558. * not only for level triggered interrupts but for edge triggered
  559. * interrupts too. In any case Xen always honors the eoi mechanism,
  560. * not injecting any more pirqs of the same kind if the first one
  561. * hasn't received an eoi yet. Therefore using the fasteoi handler
  562. * is the right choice either way.
  563. */
  564. if (shareable)
  565. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  566. handle_fasteoi_irq, name);
  567. else
  568. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  569. handle_edge_irq, name);
  570. out:
  571. mutex_unlock(&irq_mapping_update_lock);
  572. return irq;
  573. }
  574. #ifdef CONFIG_PCI_MSI
  575. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  576. {
  577. int rc;
  578. struct physdev_get_free_pirq op_get_free_pirq;
  579. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  580. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  581. WARN_ONCE(rc == -ENOSYS,
  582. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  583. return rc ? -1 : op_get_free_pirq.pirq;
  584. }
  585. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  586. int pirq, int vector, const char *name,
  587. domid_t domid)
  588. {
  589. int irq, ret;
  590. mutex_lock(&irq_mapping_update_lock);
  591. irq = xen_allocate_irq_dynamic();
  592. if (irq < 0)
  593. goto out;
  594. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  595. name);
  596. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  597. ret = irq_set_msi_desc(irq, msidesc);
  598. if (ret < 0)
  599. goto error_irq;
  600. out:
  601. mutex_unlock(&irq_mapping_update_lock);
  602. return irq;
  603. error_irq:
  604. mutex_unlock(&irq_mapping_update_lock);
  605. xen_free_irq(irq);
  606. return ret;
  607. }
  608. #endif
  609. int xen_destroy_irq(int irq)
  610. {
  611. struct irq_desc *desc;
  612. struct physdev_unmap_pirq unmap_irq;
  613. struct irq_info *info = info_for_irq(irq);
  614. int rc = -ENOENT;
  615. mutex_lock(&irq_mapping_update_lock);
  616. desc = irq_to_desc(irq);
  617. if (!desc)
  618. goto out;
  619. if (xen_initial_domain()) {
  620. unmap_irq.pirq = info->u.pirq.pirq;
  621. unmap_irq.domid = info->u.pirq.domid;
  622. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  623. /* If another domain quits without making the pci_disable_msix
  624. * call, the Xen hypervisor takes care of freeing the PIRQs
  625. * (free_domain_pirqs).
  626. */
  627. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  628. printk(KERN_INFO "domain %d does not have %d anymore\n",
  629. info->u.pirq.domid, info->u.pirq.pirq);
  630. else if (rc) {
  631. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  632. goto out;
  633. }
  634. }
  635. xen_free_irq(irq);
  636. out:
  637. mutex_unlock(&irq_mapping_update_lock);
  638. return rc;
  639. }
  640. int xen_irq_from_pirq(unsigned pirq)
  641. {
  642. int irq;
  643. struct irq_info *info;
  644. mutex_lock(&irq_mapping_update_lock);
  645. list_for_each_entry(info, &xen_irq_list_head, list) {
  646. if (info->type != IRQT_PIRQ)
  647. continue;
  648. irq = info->irq;
  649. if (info->u.pirq.pirq == pirq)
  650. goto out;
  651. }
  652. irq = -1;
  653. out:
  654. mutex_unlock(&irq_mapping_update_lock);
  655. return irq;
  656. }
  657. int xen_pirq_from_irq(unsigned irq)
  658. {
  659. return pirq_from_irq(irq);
  660. }
  661. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  662. int bind_evtchn_to_irq(unsigned int evtchn)
  663. {
  664. int irq;
  665. mutex_lock(&irq_mapping_update_lock);
  666. irq = evtchn_to_irq[evtchn];
  667. if (irq == -1) {
  668. irq = xen_allocate_irq_dynamic();
  669. if (irq == -1)
  670. goto out;
  671. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  672. handle_edge_irq, "event");
  673. xen_irq_info_evtchn_init(irq, evtchn);
  674. } else {
  675. struct irq_info *info = info_for_irq(irq);
  676. WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
  677. }
  678. irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
  679. out:
  680. mutex_unlock(&irq_mapping_update_lock);
  681. return irq;
  682. }
  683. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  684. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  685. {
  686. struct evtchn_bind_ipi bind_ipi;
  687. int evtchn, irq;
  688. mutex_lock(&irq_mapping_update_lock);
  689. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  690. if (irq == -1) {
  691. irq = xen_allocate_irq_dynamic();
  692. if (irq < 0)
  693. goto out;
  694. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  695. handle_percpu_irq, "ipi");
  696. bind_ipi.vcpu = cpu;
  697. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  698. &bind_ipi) != 0)
  699. BUG();
  700. evtchn = bind_ipi.port;
  701. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  702. bind_evtchn_to_cpu(evtchn, cpu);
  703. } else {
  704. struct irq_info *info = info_for_irq(irq);
  705. WARN_ON(info == NULL || info->type != IRQT_IPI);
  706. }
  707. out:
  708. mutex_unlock(&irq_mapping_update_lock);
  709. return irq;
  710. }
  711. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  712. unsigned int remote_port)
  713. {
  714. struct evtchn_bind_interdomain bind_interdomain;
  715. int err;
  716. bind_interdomain.remote_dom = remote_domain;
  717. bind_interdomain.remote_port = remote_port;
  718. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  719. &bind_interdomain);
  720. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  721. }
  722. static int find_virq(unsigned int virq, unsigned int cpu)
  723. {
  724. struct evtchn_status status;
  725. int port, rc = -ENOENT;
  726. memset(&status, 0, sizeof(status));
  727. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  728. status.dom = DOMID_SELF;
  729. status.port = port;
  730. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  731. if (rc < 0)
  732. continue;
  733. if (status.status != EVTCHNSTAT_virq)
  734. continue;
  735. if (status.u.virq == virq && status.vcpu == cpu) {
  736. rc = port;
  737. break;
  738. }
  739. }
  740. return rc;
  741. }
  742. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  743. {
  744. struct evtchn_bind_virq bind_virq;
  745. int evtchn, irq, ret;
  746. mutex_lock(&irq_mapping_update_lock);
  747. irq = per_cpu(virq_to_irq, cpu)[virq];
  748. if (irq == -1) {
  749. irq = xen_allocate_irq_dynamic();
  750. if (irq == -1)
  751. goto out;
  752. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  753. handle_percpu_irq, "virq");
  754. bind_virq.virq = virq;
  755. bind_virq.vcpu = cpu;
  756. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  757. &bind_virq);
  758. if (ret == 0)
  759. evtchn = bind_virq.port;
  760. else {
  761. if (ret == -EEXIST)
  762. ret = find_virq(virq, cpu);
  763. BUG_ON(ret < 0);
  764. evtchn = ret;
  765. }
  766. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  767. bind_evtchn_to_cpu(evtchn, cpu);
  768. } else {
  769. struct irq_info *info = info_for_irq(irq);
  770. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  771. }
  772. out:
  773. mutex_unlock(&irq_mapping_update_lock);
  774. return irq;
  775. }
  776. static void unbind_from_irq(unsigned int irq)
  777. {
  778. struct evtchn_close close;
  779. int evtchn = evtchn_from_irq(irq);
  780. struct irq_info *info = irq_get_handler_data(irq);
  781. mutex_lock(&irq_mapping_update_lock);
  782. if (info->refcnt > 0) {
  783. info->refcnt--;
  784. if (info->refcnt != 0)
  785. goto done;
  786. }
  787. if (VALID_EVTCHN(evtchn)) {
  788. close.port = evtchn;
  789. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  790. BUG();
  791. switch (type_from_irq(irq)) {
  792. case IRQT_VIRQ:
  793. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  794. [virq_from_irq(irq)] = -1;
  795. break;
  796. case IRQT_IPI:
  797. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  798. [ipi_from_irq(irq)] = -1;
  799. break;
  800. default:
  801. break;
  802. }
  803. /* Closed ports are implicitly re-bound to VCPU0. */
  804. bind_evtchn_to_cpu(evtchn, 0);
  805. evtchn_to_irq[evtchn] = -1;
  806. }
  807. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  808. xen_free_irq(irq);
  809. done:
  810. mutex_unlock(&irq_mapping_update_lock);
  811. }
  812. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  813. irq_handler_t handler,
  814. unsigned long irqflags,
  815. const char *devname, void *dev_id)
  816. {
  817. int irq, retval;
  818. irq = bind_evtchn_to_irq(evtchn);
  819. if (irq < 0)
  820. return irq;
  821. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  822. if (retval != 0) {
  823. unbind_from_irq(irq);
  824. return retval;
  825. }
  826. return irq;
  827. }
  828. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  829. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  830. unsigned int remote_port,
  831. irq_handler_t handler,
  832. unsigned long irqflags,
  833. const char *devname,
  834. void *dev_id)
  835. {
  836. int irq, retval;
  837. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  838. if (irq < 0)
  839. return irq;
  840. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  841. if (retval != 0) {
  842. unbind_from_irq(irq);
  843. return retval;
  844. }
  845. return irq;
  846. }
  847. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  848. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  849. irq_handler_t handler,
  850. unsigned long irqflags, const char *devname, void *dev_id)
  851. {
  852. int irq, retval;
  853. irq = bind_virq_to_irq(virq, cpu);
  854. if (irq < 0)
  855. return irq;
  856. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  857. if (retval != 0) {
  858. unbind_from_irq(irq);
  859. return retval;
  860. }
  861. return irq;
  862. }
  863. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  864. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  865. unsigned int cpu,
  866. irq_handler_t handler,
  867. unsigned long irqflags,
  868. const char *devname,
  869. void *dev_id)
  870. {
  871. int irq, retval;
  872. irq = bind_ipi_to_irq(ipi, cpu);
  873. if (irq < 0)
  874. return irq;
  875. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  876. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  877. if (retval != 0) {
  878. unbind_from_irq(irq);
  879. return retval;
  880. }
  881. return irq;
  882. }
  883. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  884. {
  885. free_irq(irq, dev_id);
  886. unbind_from_irq(irq);
  887. }
  888. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  889. int evtchn_make_refcounted(unsigned int evtchn)
  890. {
  891. int irq = evtchn_to_irq[evtchn];
  892. struct irq_info *info;
  893. if (irq == -1)
  894. return -ENOENT;
  895. info = irq_get_handler_data(irq);
  896. if (!info)
  897. return -ENOENT;
  898. WARN_ON(info->refcnt != -1);
  899. info->refcnt = 1;
  900. return 0;
  901. }
  902. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  903. int evtchn_get(unsigned int evtchn)
  904. {
  905. int irq;
  906. struct irq_info *info;
  907. int err = -ENOENT;
  908. if (evtchn >= NR_EVENT_CHANNELS)
  909. return -EINVAL;
  910. mutex_lock(&irq_mapping_update_lock);
  911. irq = evtchn_to_irq[evtchn];
  912. if (irq == -1)
  913. goto done;
  914. info = irq_get_handler_data(irq);
  915. if (!info)
  916. goto done;
  917. err = -EINVAL;
  918. if (info->refcnt <= 0)
  919. goto done;
  920. info->refcnt++;
  921. err = 0;
  922. done:
  923. mutex_unlock(&irq_mapping_update_lock);
  924. return err;
  925. }
  926. EXPORT_SYMBOL_GPL(evtchn_get);
  927. void evtchn_put(unsigned int evtchn)
  928. {
  929. int irq = evtchn_to_irq[evtchn];
  930. if (WARN_ON(irq == -1))
  931. return;
  932. unbind_from_irq(irq);
  933. }
  934. EXPORT_SYMBOL_GPL(evtchn_put);
  935. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  936. {
  937. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  938. BUG_ON(irq < 0);
  939. notify_remote_via_irq(irq);
  940. }
  941. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  942. {
  943. struct shared_info *sh = HYPERVISOR_shared_info;
  944. int cpu = smp_processor_id();
  945. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  946. int i;
  947. unsigned long flags;
  948. static DEFINE_SPINLOCK(debug_lock);
  949. struct vcpu_info *v;
  950. spin_lock_irqsave(&debug_lock, flags);
  951. printk("\nvcpu %d\n ", cpu);
  952. for_each_online_cpu(i) {
  953. int pending;
  954. v = per_cpu(xen_vcpu, i);
  955. pending = (get_irq_regs() && i == cpu)
  956. ? xen_irqs_disabled(get_irq_regs())
  957. : v->evtchn_upcall_mask;
  958. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  959. pending, v->evtchn_upcall_pending,
  960. (int)(sizeof(v->evtchn_pending_sel)*2),
  961. v->evtchn_pending_sel);
  962. }
  963. v = per_cpu(xen_vcpu, cpu);
  964. printk("\npending:\n ");
  965. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  966. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  967. sh->evtchn_pending[i],
  968. i % 8 == 0 ? "\n " : " ");
  969. printk("\nglobal mask:\n ");
  970. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  971. printk("%0*lx%s",
  972. (int)(sizeof(sh->evtchn_mask[0])*2),
  973. sh->evtchn_mask[i],
  974. i % 8 == 0 ? "\n " : " ");
  975. printk("\nglobally unmasked:\n ");
  976. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  977. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  978. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  979. i % 8 == 0 ? "\n " : " ");
  980. printk("\nlocal cpu%d mask:\n ", cpu);
  981. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  982. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  983. cpu_evtchn[i],
  984. i % 8 == 0 ? "\n " : " ");
  985. printk("\nlocally unmasked:\n ");
  986. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  987. unsigned long pending = sh->evtchn_pending[i]
  988. & ~sh->evtchn_mask[i]
  989. & cpu_evtchn[i];
  990. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  991. pending, i % 8 == 0 ? "\n " : " ");
  992. }
  993. printk("\npending list:\n");
  994. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  995. if (sync_test_bit(i, sh->evtchn_pending)) {
  996. int word_idx = i / BITS_PER_LONG;
  997. printk(" %d: event %d -> irq %d%s%s%s\n",
  998. cpu_from_evtchn(i), i,
  999. evtchn_to_irq[i],
  1000. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  1001. ? "" : " l2-clear",
  1002. !sync_test_bit(i, sh->evtchn_mask)
  1003. ? "" : " globally-masked",
  1004. sync_test_bit(i, cpu_evtchn)
  1005. ? "" : " locally-masked");
  1006. }
  1007. }
  1008. spin_unlock_irqrestore(&debug_lock, flags);
  1009. return IRQ_HANDLED;
  1010. }
  1011. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  1012. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  1013. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  1014. /*
  1015. * Mask out the i least significant bits of w
  1016. */
  1017. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  1018. /*
  1019. * Search the CPUs pending events bitmasks. For each one found, map
  1020. * the event number to an irq, and feed it into do_IRQ() for
  1021. * handling.
  1022. *
  1023. * Xen uses a two-level bitmap to speed searching. The first level is
  1024. * a bitset of words which contain pending event bits. The second
  1025. * level is a bitset of pending events themselves.
  1026. */
  1027. static void __xen_evtchn_do_upcall(void)
  1028. {
  1029. int start_word_idx, start_bit_idx;
  1030. int word_idx, bit_idx;
  1031. int i;
  1032. int cpu = get_cpu();
  1033. struct shared_info *s = HYPERVISOR_shared_info;
  1034. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1035. unsigned count;
  1036. do {
  1037. unsigned long pending_words;
  1038. vcpu_info->evtchn_upcall_pending = 0;
  1039. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  1040. goto out;
  1041. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  1042. /* Clear master flag /before/ clearing selector flag. */
  1043. wmb();
  1044. #endif
  1045. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  1046. start_word_idx = __this_cpu_read(current_word_idx);
  1047. start_bit_idx = __this_cpu_read(current_bit_idx);
  1048. word_idx = start_word_idx;
  1049. for (i = 0; pending_words != 0; i++) {
  1050. unsigned long pending_bits;
  1051. unsigned long words;
  1052. words = MASK_LSBS(pending_words, word_idx);
  1053. /*
  1054. * If we masked out all events, wrap to beginning.
  1055. */
  1056. if (words == 0) {
  1057. word_idx = 0;
  1058. bit_idx = 0;
  1059. continue;
  1060. }
  1061. word_idx = __ffs(words);
  1062. pending_bits = active_evtchns(cpu, s, word_idx);
  1063. bit_idx = 0; /* usually scan entire word from start */
  1064. if (word_idx == start_word_idx) {
  1065. /* We scan the starting word in two parts */
  1066. if (i == 0)
  1067. /* 1st time: start in the middle */
  1068. bit_idx = start_bit_idx;
  1069. else
  1070. /* 2nd time: mask bits done already */
  1071. bit_idx &= (1UL << start_bit_idx) - 1;
  1072. }
  1073. do {
  1074. unsigned long bits;
  1075. int port, irq;
  1076. struct irq_desc *desc;
  1077. bits = MASK_LSBS(pending_bits, bit_idx);
  1078. /* If we masked out all events, move on. */
  1079. if (bits == 0)
  1080. break;
  1081. bit_idx = __ffs(bits);
  1082. /* Process port. */
  1083. port = (word_idx * BITS_PER_LONG) + bit_idx;
  1084. irq = evtchn_to_irq[port];
  1085. if (irq != -1) {
  1086. desc = irq_to_desc(irq);
  1087. if (desc)
  1088. generic_handle_irq_desc(irq, desc);
  1089. }
  1090. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  1091. /* Next caller starts at last processed + 1 */
  1092. __this_cpu_write(current_word_idx,
  1093. bit_idx ? word_idx :
  1094. (word_idx+1) % BITS_PER_LONG);
  1095. __this_cpu_write(current_bit_idx, bit_idx);
  1096. } while (bit_idx != 0);
  1097. /* Scan start_l1i twice; all others once. */
  1098. if ((word_idx != start_word_idx) || (i != 0))
  1099. pending_words &= ~(1UL << word_idx);
  1100. word_idx = (word_idx + 1) % BITS_PER_LONG;
  1101. }
  1102. BUG_ON(!irqs_disabled());
  1103. count = __this_cpu_read(xed_nesting_count);
  1104. __this_cpu_write(xed_nesting_count, 0);
  1105. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1106. out:
  1107. put_cpu();
  1108. }
  1109. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1110. {
  1111. struct pt_regs *old_regs = set_irq_regs(regs);
  1112. exit_idle();
  1113. irq_enter();
  1114. __xen_evtchn_do_upcall();
  1115. irq_exit();
  1116. set_irq_regs(old_regs);
  1117. }
  1118. void xen_hvm_evtchn_do_upcall(void)
  1119. {
  1120. __xen_evtchn_do_upcall();
  1121. }
  1122. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1123. /* Rebind a new event channel to an existing irq. */
  1124. void rebind_evtchn_irq(int evtchn, int irq)
  1125. {
  1126. struct irq_info *info = info_for_irq(irq);
  1127. /* Make sure the irq is masked, since the new event channel
  1128. will also be masked. */
  1129. disable_irq(irq);
  1130. mutex_lock(&irq_mapping_update_lock);
  1131. /* After resume the irq<->evtchn mappings are all cleared out */
  1132. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1133. /* Expect irq to have been bound before,
  1134. so there should be a proper type */
  1135. BUG_ON(info->type == IRQT_UNBOUND);
  1136. xen_irq_info_evtchn_init(irq, evtchn);
  1137. mutex_unlock(&irq_mapping_update_lock);
  1138. /* new event channels are always bound to cpu 0 */
  1139. irq_set_affinity(irq, cpumask_of(0));
  1140. /* Unmask the event channel. */
  1141. enable_irq(irq);
  1142. }
  1143. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1144. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1145. {
  1146. struct evtchn_bind_vcpu bind_vcpu;
  1147. int evtchn = evtchn_from_irq(irq);
  1148. if (!VALID_EVTCHN(evtchn))
  1149. return -1;
  1150. /*
  1151. * Events delivered via platform PCI interrupts are always
  1152. * routed to vcpu 0 and hence cannot be rebound.
  1153. */
  1154. if (xen_hvm_domain() && !xen_have_vector_callback)
  1155. return -1;
  1156. /* Send future instances of this interrupt to other vcpu. */
  1157. bind_vcpu.port = evtchn;
  1158. bind_vcpu.vcpu = tcpu;
  1159. /*
  1160. * If this fails, it usually just indicates that we're dealing with a
  1161. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1162. * it, but don't do the xenlinux-level rebind in that case.
  1163. */
  1164. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1165. bind_evtchn_to_cpu(evtchn, tcpu);
  1166. return 0;
  1167. }
  1168. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1169. bool force)
  1170. {
  1171. unsigned tcpu = cpumask_first(dest);
  1172. return rebind_irq_to_cpu(data->irq, tcpu);
  1173. }
  1174. int resend_irq_on_evtchn(unsigned int irq)
  1175. {
  1176. int masked, evtchn = evtchn_from_irq(irq);
  1177. struct shared_info *s = HYPERVISOR_shared_info;
  1178. if (!VALID_EVTCHN(evtchn))
  1179. return 1;
  1180. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1181. sync_set_bit(evtchn, s->evtchn_pending);
  1182. if (!masked)
  1183. unmask_evtchn(evtchn);
  1184. return 1;
  1185. }
  1186. static void enable_dynirq(struct irq_data *data)
  1187. {
  1188. int evtchn = evtchn_from_irq(data->irq);
  1189. if (VALID_EVTCHN(evtchn))
  1190. unmask_evtchn(evtchn);
  1191. }
  1192. static void disable_dynirq(struct irq_data *data)
  1193. {
  1194. int evtchn = evtchn_from_irq(data->irq);
  1195. if (VALID_EVTCHN(evtchn))
  1196. mask_evtchn(evtchn);
  1197. }
  1198. static void ack_dynirq(struct irq_data *data)
  1199. {
  1200. int evtchn = evtchn_from_irq(data->irq);
  1201. irq_move_irq(data);
  1202. if (VALID_EVTCHN(evtchn))
  1203. clear_evtchn(evtchn);
  1204. }
  1205. static void mask_ack_dynirq(struct irq_data *data)
  1206. {
  1207. disable_dynirq(data);
  1208. ack_dynirq(data);
  1209. }
  1210. static int retrigger_dynirq(struct irq_data *data)
  1211. {
  1212. int evtchn = evtchn_from_irq(data->irq);
  1213. struct shared_info *sh = HYPERVISOR_shared_info;
  1214. int ret = 0;
  1215. if (VALID_EVTCHN(evtchn)) {
  1216. int masked;
  1217. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1218. sync_set_bit(evtchn, sh->evtchn_pending);
  1219. if (!masked)
  1220. unmask_evtchn(evtchn);
  1221. ret = 1;
  1222. }
  1223. return ret;
  1224. }
  1225. static void restore_pirqs(void)
  1226. {
  1227. int pirq, rc, irq, gsi;
  1228. struct physdev_map_pirq map_irq;
  1229. struct irq_info *info;
  1230. list_for_each_entry(info, &xen_irq_list_head, list) {
  1231. if (info->type != IRQT_PIRQ)
  1232. continue;
  1233. pirq = info->u.pirq.pirq;
  1234. gsi = info->u.pirq.gsi;
  1235. irq = info->irq;
  1236. /* save/restore of PT devices doesn't work, so at this point the
  1237. * only devices present are GSI based emulated devices */
  1238. if (!gsi)
  1239. continue;
  1240. map_irq.domid = DOMID_SELF;
  1241. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1242. map_irq.index = gsi;
  1243. map_irq.pirq = pirq;
  1244. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1245. if (rc) {
  1246. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1247. gsi, irq, pirq, rc);
  1248. xen_free_irq(irq);
  1249. continue;
  1250. }
  1251. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1252. __startup_pirq(irq);
  1253. }
  1254. }
  1255. static void restore_cpu_virqs(unsigned int cpu)
  1256. {
  1257. struct evtchn_bind_virq bind_virq;
  1258. int virq, irq, evtchn;
  1259. for (virq = 0; virq < NR_VIRQS; virq++) {
  1260. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1261. continue;
  1262. BUG_ON(virq_from_irq(irq) != virq);
  1263. /* Get a new binding from Xen. */
  1264. bind_virq.virq = virq;
  1265. bind_virq.vcpu = cpu;
  1266. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1267. &bind_virq) != 0)
  1268. BUG();
  1269. evtchn = bind_virq.port;
  1270. /* Record the new mapping. */
  1271. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1272. bind_evtchn_to_cpu(evtchn, cpu);
  1273. }
  1274. }
  1275. static void restore_cpu_ipis(unsigned int cpu)
  1276. {
  1277. struct evtchn_bind_ipi bind_ipi;
  1278. int ipi, irq, evtchn;
  1279. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1280. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1281. continue;
  1282. BUG_ON(ipi_from_irq(irq) != ipi);
  1283. /* Get a new binding from Xen. */
  1284. bind_ipi.vcpu = cpu;
  1285. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1286. &bind_ipi) != 0)
  1287. BUG();
  1288. evtchn = bind_ipi.port;
  1289. /* Record the new mapping. */
  1290. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1291. bind_evtchn_to_cpu(evtchn, cpu);
  1292. }
  1293. }
  1294. /* Clear an irq's pending state, in preparation for polling on it */
  1295. void xen_clear_irq_pending(int irq)
  1296. {
  1297. int evtchn = evtchn_from_irq(irq);
  1298. if (VALID_EVTCHN(evtchn))
  1299. clear_evtchn(evtchn);
  1300. }
  1301. EXPORT_SYMBOL(xen_clear_irq_pending);
  1302. void xen_set_irq_pending(int irq)
  1303. {
  1304. int evtchn = evtchn_from_irq(irq);
  1305. if (VALID_EVTCHN(evtchn))
  1306. set_evtchn(evtchn);
  1307. }
  1308. bool xen_test_irq_pending(int irq)
  1309. {
  1310. int evtchn = evtchn_from_irq(irq);
  1311. bool ret = false;
  1312. if (VALID_EVTCHN(evtchn))
  1313. ret = test_evtchn(evtchn);
  1314. return ret;
  1315. }
  1316. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1317. * the irq will be disabled so it won't deliver an interrupt. */
  1318. void xen_poll_irq_timeout(int irq, u64 timeout)
  1319. {
  1320. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1321. if (VALID_EVTCHN(evtchn)) {
  1322. struct sched_poll poll;
  1323. poll.nr_ports = 1;
  1324. poll.timeout = timeout;
  1325. set_xen_guest_handle(poll.ports, &evtchn);
  1326. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1327. BUG();
  1328. }
  1329. }
  1330. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1331. /* Poll waiting for an irq to become pending. In the usual case, the
  1332. * irq will be disabled so it won't deliver an interrupt. */
  1333. void xen_poll_irq(int irq)
  1334. {
  1335. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1336. }
  1337. /* Check whether the IRQ line is shared with other guests. */
  1338. int xen_test_irq_shared(int irq)
  1339. {
  1340. struct irq_info *info = info_for_irq(irq);
  1341. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1342. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1343. return 0;
  1344. return !(irq_status.flags & XENIRQSTAT_shared);
  1345. }
  1346. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1347. void xen_irq_resume(void)
  1348. {
  1349. unsigned int cpu, evtchn;
  1350. struct irq_info *info;
  1351. init_evtchn_cpu_bindings();
  1352. /* New event-channel space is not 'live' yet. */
  1353. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1354. mask_evtchn(evtchn);
  1355. /* No IRQ <-> event-channel mappings. */
  1356. list_for_each_entry(info, &xen_irq_list_head, list)
  1357. info->evtchn = 0; /* zap event-channel binding */
  1358. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1359. evtchn_to_irq[evtchn] = -1;
  1360. for_each_possible_cpu(cpu) {
  1361. restore_cpu_virqs(cpu);
  1362. restore_cpu_ipis(cpu);
  1363. }
  1364. restore_pirqs();
  1365. }
  1366. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1367. .name = "xen-dyn",
  1368. .irq_disable = disable_dynirq,
  1369. .irq_mask = disable_dynirq,
  1370. .irq_unmask = enable_dynirq,
  1371. .irq_ack = ack_dynirq,
  1372. .irq_mask_ack = mask_ack_dynirq,
  1373. .irq_set_affinity = set_affinity_irq,
  1374. .irq_retrigger = retrigger_dynirq,
  1375. };
  1376. static struct irq_chip xen_pirq_chip __read_mostly = {
  1377. .name = "xen-pirq",
  1378. .irq_startup = startup_pirq,
  1379. .irq_shutdown = shutdown_pirq,
  1380. .irq_enable = enable_pirq,
  1381. .irq_disable = disable_pirq,
  1382. .irq_mask = disable_dynirq,
  1383. .irq_unmask = enable_dynirq,
  1384. .irq_ack = eoi_pirq,
  1385. .irq_eoi = eoi_pirq,
  1386. .irq_mask_ack = mask_ack_pirq,
  1387. .irq_set_affinity = set_affinity_irq,
  1388. .irq_retrigger = retrigger_dynirq,
  1389. };
  1390. static struct irq_chip xen_percpu_chip __read_mostly = {
  1391. .name = "xen-percpu",
  1392. .irq_disable = disable_dynirq,
  1393. .irq_mask = disable_dynirq,
  1394. .irq_unmask = enable_dynirq,
  1395. .irq_ack = ack_dynirq,
  1396. };
  1397. int xen_set_callback_via(uint64_t via)
  1398. {
  1399. struct xen_hvm_param a;
  1400. a.domid = DOMID_SELF;
  1401. a.index = HVM_PARAM_CALLBACK_IRQ;
  1402. a.value = via;
  1403. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1404. }
  1405. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1406. #ifdef CONFIG_XEN_PVHVM
  1407. /* Vector callbacks are better than PCI interrupts to receive event
  1408. * channel notifications because we can receive vector callbacks on any
  1409. * vcpu and we don't need PCI support or APIC interactions. */
  1410. void xen_callback_vector(void)
  1411. {
  1412. int rc;
  1413. uint64_t callback_via;
  1414. if (xen_have_vector_callback) {
  1415. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1416. rc = xen_set_callback_via(callback_via);
  1417. if (rc) {
  1418. printk(KERN_ERR "Request for Xen HVM callback vector"
  1419. " failed.\n");
  1420. xen_have_vector_callback = 0;
  1421. return;
  1422. }
  1423. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1424. "enabled\n");
  1425. /* in the restore case the vector has already been allocated */
  1426. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1427. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1428. }
  1429. }
  1430. #else
  1431. void xen_callback_vector(void) {}
  1432. #endif
  1433. void __init xen_init_IRQ(void)
  1434. {
  1435. int i, rc;
  1436. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1437. GFP_KERNEL);
  1438. BUG_ON(!evtchn_to_irq);
  1439. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1440. evtchn_to_irq[i] = -1;
  1441. init_evtchn_cpu_bindings();
  1442. /* No event channels are 'live' right now. */
  1443. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1444. mask_evtchn(i);
  1445. pirq_needs_eoi = pirq_needs_eoi_flag;
  1446. if (xen_hvm_domain()) {
  1447. xen_callback_vector();
  1448. native_init_IRQ();
  1449. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1450. * __acpi_register_gsi can point at the right function */
  1451. pci_xen_hvm_init();
  1452. } else {
  1453. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1454. irq_ctx_init(smp_processor_id());
  1455. if (xen_initial_domain())
  1456. pci_xen_initial_domain();
  1457. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1458. eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
  1459. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1460. if (rc != 0) {
  1461. free_page((unsigned long) pirq_eoi_map);
  1462. pirq_eoi_map = NULL;
  1463. } else
  1464. pirq_needs_eoi = pirq_check_eoi_map;
  1465. }
  1466. }