ipr.c 275 KB

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  1. /*
  2. * ipr.c -- driver for IBM Power Linux RAID adapters
  3. *
  4. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  5. *
  6. * Copyright (C) 2003, 2004 IBM Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. /*
  24. * Notes:
  25. *
  26. * This driver is used to control the following SCSI adapters:
  27. *
  28. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  29. *
  30. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  31. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  32. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  33. * Embedded SCSI adapter on p615 and p655 systems
  34. *
  35. * Supported Hardware Features:
  36. * - Ultra 320 SCSI controller
  37. * - PCI-X host interface
  38. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  39. * - Non-Volatile Write Cache
  40. * - Supports attachment of non-RAID disks, tape, and optical devices
  41. * - RAID Levels 0, 5, 10
  42. * - Hot spare
  43. * - Background Parity Checking
  44. * - Background Data Scrubbing
  45. * - Ability to increase the capacity of an existing RAID 5 disk array
  46. * by adding disks
  47. *
  48. * Driver Features:
  49. * - Tagged command queuing
  50. * - Adapter microcode download
  51. * - PCI hot plug
  52. * - SCSI device hot plug
  53. *
  54. */
  55. #include <linux/fs.h>
  56. #include <linux/init.h>
  57. #include <linux/types.h>
  58. #include <linux/errno.h>
  59. #include <linux/kernel.h>
  60. #include <linux/slab.h>
  61. #include <linux/vmalloc.h>
  62. #include <linux/ioport.h>
  63. #include <linux/delay.h>
  64. #include <linux/pci.h>
  65. #include <linux/wait.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/sched.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/blkdev.h>
  70. #include <linux/firmware.h>
  71. #include <linux/module.h>
  72. #include <linux/moduleparam.h>
  73. #include <linux/libata.h>
  74. #include <linux/hdreg.h>
  75. #include <linux/reboot.h>
  76. #include <linux/stringify.h>
  77. #include <asm/io.h>
  78. #include <asm/irq.h>
  79. #include <asm/processor.h>
  80. #include <scsi/scsi.h>
  81. #include <scsi/scsi_host.h>
  82. #include <scsi/scsi_tcq.h>
  83. #include <scsi/scsi_eh.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include "ipr.h"
  86. /*
  87. * Global Data
  88. */
  89. static LIST_HEAD(ipr_ioa_head);
  90. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  91. static unsigned int ipr_max_speed = 1;
  92. static int ipr_testmode = 0;
  93. static unsigned int ipr_fastfail = 0;
  94. static unsigned int ipr_transop_timeout = 0;
  95. static unsigned int ipr_debug = 0;
  96. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  97. static unsigned int ipr_dual_ioa_raid = 1;
  98. static unsigned int ipr_number_of_msix = 2;
  99. static DEFINE_SPINLOCK(ipr_driver_lock);
  100. /* This table describes the differences between DMA controller chips */
  101. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  102. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  103. .mailbox = 0x0042C,
  104. .max_cmds = 100,
  105. .cache_line_size = 0x20,
  106. .clear_isr = 1,
  107. {
  108. .set_interrupt_mask_reg = 0x0022C,
  109. .clr_interrupt_mask_reg = 0x00230,
  110. .clr_interrupt_mask_reg32 = 0x00230,
  111. .sense_interrupt_mask_reg = 0x0022C,
  112. .sense_interrupt_mask_reg32 = 0x0022C,
  113. .clr_interrupt_reg = 0x00228,
  114. .clr_interrupt_reg32 = 0x00228,
  115. .sense_interrupt_reg = 0x00224,
  116. .sense_interrupt_reg32 = 0x00224,
  117. .ioarrin_reg = 0x00404,
  118. .sense_uproc_interrupt_reg = 0x00214,
  119. .sense_uproc_interrupt_reg32 = 0x00214,
  120. .set_uproc_interrupt_reg = 0x00214,
  121. .set_uproc_interrupt_reg32 = 0x00214,
  122. .clr_uproc_interrupt_reg = 0x00218,
  123. .clr_uproc_interrupt_reg32 = 0x00218
  124. }
  125. },
  126. { /* Snipe and Scamp */
  127. .mailbox = 0x0052C,
  128. .max_cmds = 100,
  129. .cache_line_size = 0x20,
  130. .clear_isr = 1,
  131. {
  132. .set_interrupt_mask_reg = 0x00288,
  133. .clr_interrupt_mask_reg = 0x0028C,
  134. .clr_interrupt_mask_reg32 = 0x0028C,
  135. .sense_interrupt_mask_reg = 0x00288,
  136. .sense_interrupt_mask_reg32 = 0x00288,
  137. .clr_interrupt_reg = 0x00284,
  138. .clr_interrupt_reg32 = 0x00284,
  139. .sense_interrupt_reg = 0x00280,
  140. .sense_interrupt_reg32 = 0x00280,
  141. .ioarrin_reg = 0x00504,
  142. .sense_uproc_interrupt_reg = 0x00290,
  143. .sense_uproc_interrupt_reg32 = 0x00290,
  144. .set_uproc_interrupt_reg = 0x00290,
  145. .set_uproc_interrupt_reg32 = 0x00290,
  146. .clr_uproc_interrupt_reg = 0x00294,
  147. .clr_uproc_interrupt_reg32 = 0x00294
  148. }
  149. },
  150. { /* CRoC */
  151. .mailbox = 0x00044,
  152. .max_cmds = 1000,
  153. .cache_line_size = 0x20,
  154. .clear_isr = 0,
  155. {
  156. .set_interrupt_mask_reg = 0x00010,
  157. .clr_interrupt_mask_reg = 0x00018,
  158. .clr_interrupt_mask_reg32 = 0x0001C,
  159. .sense_interrupt_mask_reg = 0x00010,
  160. .sense_interrupt_mask_reg32 = 0x00014,
  161. .clr_interrupt_reg = 0x00008,
  162. .clr_interrupt_reg32 = 0x0000C,
  163. .sense_interrupt_reg = 0x00000,
  164. .sense_interrupt_reg32 = 0x00004,
  165. .ioarrin_reg = 0x00070,
  166. .sense_uproc_interrupt_reg = 0x00020,
  167. .sense_uproc_interrupt_reg32 = 0x00024,
  168. .set_uproc_interrupt_reg = 0x00020,
  169. .set_uproc_interrupt_reg32 = 0x00024,
  170. .clr_uproc_interrupt_reg = 0x00028,
  171. .clr_uproc_interrupt_reg32 = 0x0002C,
  172. .init_feedback_reg = 0x0005C,
  173. .dump_addr_reg = 0x00064,
  174. .dump_data_reg = 0x00068,
  175. .endian_swap_reg = 0x00084
  176. }
  177. },
  178. };
  179. static const struct ipr_chip_t ipr_chip[] = {
  180. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  181. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  182. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  183. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  184. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  185. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  186. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  187. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  188. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  189. };
  190. static int ipr_max_bus_speeds[] = {
  191. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  192. };
  193. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  194. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  195. module_param_named(max_speed, ipr_max_speed, uint, 0);
  196. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  197. module_param_named(log_level, ipr_log_level, uint, 0);
  198. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  199. module_param_named(testmode, ipr_testmode, int, 0);
  200. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  201. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  202. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  203. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  204. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  205. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  206. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  207. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  208. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  209. module_param_named(max_devs, ipr_max_devs, int, 0);
  210. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  211. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  212. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  213. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 5). (default:2)");
  214. MODULE_LICENSE("GPL");
  215. MODULE_VERSION(IPR_DRIVER_VERSION);
  216. /* A constant array of IOASCs/URCs/Error Messages */
  217. static const
  218. struct ipr_error_table_t ipr_error_table[] = {
  219. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  220. "8155: An unknown error was received"},
  221. {0x00330000, 0, 0,
  222. "Soft underlength error"},
  223. {0x005A0000, 0, 0,
  224. "Command to be cancelled not found"},
  225. {0x00808000, 0, 0,
  226. "Qualified success"},
  227. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  228. "FFFE: Soft device bus error recovered by the IOA"},
  229. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  230. "4101: Soft device bus fabric error"},
  231. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  232. "FFFC: Logical block guard error recovered by the device"},
  233. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  234. "FFFC: Logical block reference tag error recovered by the device"},
  235. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  236. "4171: Recovered scatter list tag / sequence number error"},
  237. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  238. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  239. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  240. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  241. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  242. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  243. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  244. "FFFD: Logical block guard error recovered by the IOA"},
  245. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  246. "FFF9: Device sector reassign successful"},
  247. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  248. "FFF7: Media error recovered by device rewrite procedures"},
  249. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  250. "7001: IOA sector reassignment successful"},
  251. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  252. "FFF9: Soft media error. Sector reassignment recommended"},
  253. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  254. "FFF7: Media error recovered by IOA rewrite procedures"},
  255. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  256. "FF3D: Soft PCI bus error recovered by the IOA"},
  257. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  258. "FFF6: Device hardware error recovered by the IOA"},
  259. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  260. "FFF6: Device hardware error recovered by the device"},
  261. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  262. "FF3D: Soft IOA error recovered by the IOA"},
  263. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  264. "FFFA: Undefined device response recovered by the IOA"},
  265. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  266. "FFF6: Device bus error, message or command phase"},
  267. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  268. "FFFE: Task Management Function failed"},
  269. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  270. "FFF6: Failure prediction threshold exceeded"},
  271. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  272. "8009: Impending cache battery pack failure"},
  273. {0x02040400, 0, 0,
  274. "34FF: Disk device format in progress"},
  275. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  276. "9070: IOA requested reset"},
  277. {0x023F0000, 0, 0,
  278. "Synchronization required"},
  279. {0x024E0000, 0, 0,
  280. "No ready, IOA shutdown"},
  281. {0x025A0000, 0, 0,
  282. "Not ready, IOA has been shutdown"},
  283. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  284. "3020: Storage subsystem configuration error"},
  285. {0x03110B00, 0, 0,
  286. "FFF5: Medium error, data unreadable, recommend reassign"},
  287. {0x03110C00, 0, 0,
  288. "7000: Medium error, data unreadable, do not reassign"},
  289. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  290. "FFF3: Disk media format bad"},
  291. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  292. "3002: Addressed device failed to respond to selection"},
  293. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  294. "3100: Device bus error"},
  295. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  296. "3109: IOA timed out a device command"},
  297. {0x04088000, 0, 0,
  298. "3120: SCSI bus is not operational"},
  299. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  300. "4100: Hard device bus fabric error"},
  301. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  302. "310C: Logical block guard error detected by the device"},
  303. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  304. "310C: Logical block reference tag error detected by the device"},
  305. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  306. "4170: Scatter list tag / sequence number error"},
  307. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  308. "8150: Logical block CRC error on IOA to Host transfer"},
  309. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  310. "4170: Logical block sequence number error on IOA to Host transfer"},
  311. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  312. "310D: Logical block reference tag error detected by the IOA"},
  313. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  314. "310D: Logical block guard error detected by the IOA"},
  315. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  316. "9000: IOA reserved area data check"},
  317. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  318. "9001: IOA reserved area invalid data pattern"},
  319. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  320. "9002: IOA reserved area LRC error"},
  321. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  322. "Hardware Error, IOA metadata access error"},
  323. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  324. "102E: Out of alternate sectors for disk storage"},
  325. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  326. "FFF4: Data transfer underlength error"},
  327. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  328. "FFF4: Data transfer overlength error"},
  329. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  330. "3400: Logical unit failure"},
  331. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  332. "FFF4: Device microcode is corrupt"},
  333. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  334. "8150: PCI bus error"},
  335. {0x04430000, 1, 0,
  336. "Unsupported device bus message received"},
  337. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  338. "FFF4: Disk device problem"},
  339. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  340. "8150: Permanent IOA failure"},
  341. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  342. "3010: Disk device returned wrong response to IOA"},
  343. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  344. "8151: IOA microcode error"},
  345. {0x04448500, 0, 0,
  346. "Device bus status error"},
  347. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  348. "8157: IOA error requiring IOA reset to recover"},
  349. {0x04448700, 0, 0,
  350. "ATA device status error"},
  351. {0x04490000, 0, 0,
  352. "Message reject received from the device"},
  353. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  354. "8008: A permanent cache battery pack failure occurred"},
  355. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  356. "9090: Disk unit has been modified after the last known status"},
  357. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  358. "9081: IOA detected device error"},
  359. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  360. "9082: IOA detected device error"},
  361. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  362. "3110: Device bus error, message or command phase"},
  363. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  364. "3110: SAS Command / Task Management Function failed"},
  365. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  366. "9091: Incorrect hardware configuration change has been detected"},
  367. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  368. "9073: Invalid multi-adapter configuration"},
  369. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  370. "4010: Incorrect connection between cascaded expanders"},
  371. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  372. "4020: Connections exceed IOA design limits"},
  373. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  374. "4030: Incorrect multipath connection"},
  375. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  376. "4110: Unsupported enclosure function"},
  377. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  378. "FFF4: Command to logical unit failed"},
  379. {0x05240000, 1, 0,
  380. "Illegal request, invalid request type or request packet"},
  381. {0x05250000, 0, 0,
  382. "Illegal request, invalid resource handle"},
  383. {0x05258000, 0, 0,
  384. "Illegal request, commands not allowed to this device"},
  385. {0x05258100, 0, 0,
  386. "Illegal request, command not allowed to a secondary adapter"},
  387. {0x05258200, 0, 0,
  388. "Illegal request, command not allowed to a non-optimized resource"},
  389. {0x05260000, 0, 0,
  390. "Illegal request, invalid field in parameter list"},
  391. {0x05260100, 0, 0,
  392. "Illegal request, parameter not supported"},
  393. {0x05260200, 0, 0,
  394. "Illegal request, parameter value invalid"},
  395. {0x052C0000, 0, 0,
  396. "Illegal request, command sequence error"},
  397. {0x052C8000, 1, 0,
  398. "Illegal request, dual adapter support not enabled"},
  399. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  400. "9031: Array protection temporarily suspended, protection resuming"},
  401. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  402. "9040: Array protection temporarily suspended, protection resuming"},
  403. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  404. "3140: Device bus not ready to ready transition"},
  405. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  406. "FFFB: SCSI bus was reset"},
  407. {0x06290500, 0, 0,
  408. "FFFE: SCSI bus transition to single ended"},
  409. {0x06290600, 0, 0,
  410. "FFFE: SCSI bus transition to LVD"},
  411. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  412. "FFFB: SCSI bus was reset by another initiator"},
  413. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  414. "3029: A device replacement has occurred"},
  415. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  416. "9051: IOA cache data exists for a missing or failed device"},
  417. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  418. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  419. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  420. "9025: Disk unit is not supported at its physical location"},
  421. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  422. "3020: IOA detected a SCSI bus configuration error"},
  423. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  424. "3150: SCSI bus configuration error"},
  425. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  426. "9074: Asymmetric advanced function disk configuration"},
  427. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  428. "4040: Incomplete multipath connection between IOA and enclosure"},
  429. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  430. "4041: Incomplete multipath connection between enclosure and device"},
  431. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  432. "9075: Incomplete multipath connection between IOA and remote IOA"},
  433. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  434. "9076: Configuration error, missing remote IOA"},
  435. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  436. "4050: Enclosure does not support a required multipath function"},
  437. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  438. "4070: Logically bad block written on device"},
  439. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  440. "9041: Array protection temporarily suspended"},
  441. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  442. "9042: Corrupt array parity detected on specified device"},
  443. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  444. "9030: Array no longer protected due to missing or failed disk unit"},
  445. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  446. "9071: Link operational transition"},
  447. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  448. "9072: Link not operational transition"},
  449. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  450. "9032: Array exposed but still protected"},
  451. {0x066B8300, 0, IPR_DEFAULT_LOG_LEVEL + 1,
  452. "70DD: Device forced failed by disrupt device command"},
  453. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  454. "4061: Multipath redundancy level got better"},
  455. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  456. "4060: Multipath redundancy level got worse"},
  457. {0x07270000, 0, 0,
  458. "Failure due to other device"},
  459. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  460. "9008: IOA does not support functions expected by devices"},
  461. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  462. "9010: Cache data associated with attached devices cannot be found"},
  463. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  464. "9011: Cache data belongs to devices other than those attached"},
  465. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  466. "9020: Array missing 2 or more devices with only 1 device present"},
  467. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  468. "9021: Array missing 2 or more devices with 2 or more devices present"},
  469. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  470. "9022: Exposed array is missing a required device"},
  471. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  472. "9023: Array member(s) not at required physical locations"},
  473. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  474. "9024: Array not functional due to present hardware configuration"},
  475. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  476. "9026: Array not functional due to present hardware configuration"},
  477. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  478. "9027: Array is missing a device and parity is out of sync"},
  479. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  480. "9028: Maximum number of arrays already exist"},
  481. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  482. "9050: Required cache data cannot be located for a disk unit"},
  483. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  484. "9052: Cache data exists for a device that has been modified"},
  485. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  486. "9054: IOA resources not available due to previous problems"},
  487. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  488. "9092: Disk unit requires initialization before use"},
  489. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  490. "9029: Incorrect hardware configuration change has been detected"},
  491. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  492. "9060: One or more disk pairs are missing from an array"},
  493. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  494. "9061: One or more disks are missing from an array"},
  495. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  496. "9062: One or more disks are missing from an array"},
  497. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  498. "9063: Maximum number of functional arrays has been exceeded"},
  499. {0x0B260000, 0, 0,
  500. "Aborted command, invalid descriptor"},
  501. {0x0B5A0000, 0, 0,
  502. "Command terminated by host"}
  503. };
  504. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  505. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  506. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  507. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  508. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  509. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  510. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  511. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  512. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  513. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  514. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  515. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  516. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  517. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  518. };
  519. /*
  520. * Function Prototypes
  521. */
  522. static int ipr_reset_alert(struct ipr_cmnd *);
  523. static void ipr_process_ccn(struct ipr_cmnd *);
  524. static void ipr_process_error(struct ipr_cmnd *);
  525. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  526. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  527. enum ipr_shutdown_type);
  528. #ifdef CONFIG_SCSI_IPR_TRACE
  529. /**
  530. * ipr_trc_hook - Add a trace entry to the driver trace
  531. * @ipr_cmd: ipr command struct
  532. * @type: trace type
  533. * @add_data: additional data
  534. *
  535. * Return value:
  536. * none
  537. **/
  538. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  539. u8 type, u32 add_data)
  540. {
  541. struct ipr_trace_entry *trace_entry;
  542. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  543. trace_entry = &ioa_cfg->trace[atomic_add_return
  544. (1, &ioa_cfg->trace_index)%IPR_NUM_TRACE_ENTRIES];
  545. trace_entry->time = jiffies;
  546. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  547. trace_entry->type = type;
  548. if (ipr_cmd->ioa_cfg->sis64)
  549. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  550. else
  551. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  552. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  553. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  554. trace_entry->u.add_data = add_data;
  555. wmb();
  556. }
  557. #else
  558. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  559. #endif
  560. /**
  561. * ipr_lock_and_done - Acquire lock and complete command
  562. * @ipr_cmd: ipr command struct
  563. *
  564. * Return value:
  565. * none
  566. **/
  567. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  568. {
  569. unsigned long lock_flags;
  570. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  571. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  572. ipr_cmd->done(ipr_cmd);
  573. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  574. }
  575. /**
  576. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  577. * @ipr_cmd: ipr command struct
  578. *
  579. * Return value:
  580. * none
  581. **/
  582. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  583. {
  584. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  585. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  586. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  587. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  588. int hrrq_id;
  589. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  590. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  591. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  592. ioarcb->data_transfer_length = 0;
  593. ioarcb->read_data_transfer_length = 0;
  594. ioarcb->ioadl_len = 0;
  595. ioarcb->read_ioadl_len = 0;
  596. if (ipr_cmd->ioa_cfg->sis64) {
  597. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  598. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  599. ioasa64->u.gata.status = 0;
  600. } else {
  601. ioarcb->write_ioadl_addr =
  602. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  603. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  604. ioasa->u.gata.status = 0;
  605. }
  606. ioasa->hdr.ioasc = 0;
  607. ioasa->hdr.residual_data_len = 0;
  608. ipr_cmd->scsi_cmd = NULL;
  609. ipr_cmd->qc = NULL;
  610. ipr_cmd->sense_buffer[0] = 0;
  611. ipr_cmd->dma_use_sg = 0;
  612. }
  613. /**
  614. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  615. * @ipr_cmd: ipr command struct
  616. *
  617. * Return value:
  618. * none
  619. **/
  620. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  621. void (*fast_done) (struct ipr_cmnd *))
  622. {
  623. ipr_reinit_ipr_cmnd(ipr_cmd);
  624. ipr_cmd->u.scratch = 0;
  625. ipr_cmd->sibling = NULL;
  626. ipr_cmd->fast_done = fast_done;
  627. init_timer(&ipr_cmd->timer);
  628. }
  629. /**
  630. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  631. * @ioa_cfg: ioa config struct
  632. *
  633. * Return value:
  634. * pointer to ipr command struct
  635. **/
  636. static
  637. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  638. {
  639. struct ipr_cmnd *ipr_cmd = NULL;
  640. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  641. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  642. struct ipr_cmnd, queue);
  643. list_del(&ipr_cmd->queue);
  644. }
  645. return ipr_cmd;
  646. }
  647. /**
  648. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  649. * @ioa_cfg: ioa config struct
  650. *
  651. * Return value:
  652. * pointer to ipr command struct
  653. **/
  654. static
  655. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  656. {
  657. struct ipr_cmnd *ipr_cmd =
  658. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  659. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  660. return ipr_cmd;
  661. }
  662. /**
  663. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  664. * @ioa_cfg: ioa config struct
  665. * @clr_ints: interrupts to clear
  666. *
  667. * This function masks all interrupts on the adapter, then clears the
  668. * interrupts specified in the mask
  669. *
  670. * Return value:
  671. * none
  672. **/
  673. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  674. u32 clr_ints)
  675. {
  676. volatile u32 int_reg;
  677. int i;
  678. /* Stop new interrupts */
  679. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  680. spin_lock(&ioa_cfg->hrrq[i]._lock);
  681. ioa_cfg->hrrq[i].allow_interrupts = 0;
  682. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  683. }
  684. wmb();
  685. /* Set interrupt mask to stop all new interrupts */
  686. if (ioa_cfg->sis64)
  687. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  688. else
  689. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  690. /* Clear any pending interrupts */
  691. if (ioa_cfg->sis64)
  692. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  693. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  694. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  695. }
  696. /**
  697. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  698. * @ioa_cfg: ioa config struct
  699. *
  700. * Return value:
  701. * 0 on success / -EIO on failure
  702. **/
  703. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  704. {
  705. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  706. if (pcix_cmd_reg == 0)
  707. return 0;
  708. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  709. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  710. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  711. return -EIO;
  712. }
  713. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  714. return 0;
  715. }
  716. /**
  717. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  718. * @ioa_cfg: ioa config struct
  719. *
  720. * Return value:
  721. * 0 on success / -EIO on failure
  722. **/
  723. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  724. {
  725. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  726. if (pcix_cmd_reg) {
  727. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  728. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  729. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  730. return -EIO;
  731. }
  732. }
  733. return 0;
  734. }
  735. /**
  736. * ipr_sata_eh_done - done function for aborted SATA commands
  737. * @ipr_cmd: ipr command struct
  738. *
  739. * This function is invoked for ops generated to SATA
  740. * devices which are being aborted.
  741. *
  742. * Return value:
  743. * none
  744. **/
  745. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  746. {
  747. struct ata_queued_cmd *qc = ipr_cmd->qc;
  748. struct ipr_sata_port *sata_port = qc->ap->private_data;
  749. qc->err_mask |= AC_ERR_OTHER;
  750. sata_port->ioasa.status |= ATA_BUSY;
  751. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  752. ata_qc_complete(qc);
  753. }
  754. /**
  755. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  756. * @ipr_cmd: ipr command struct
  757. *
  758. * This function is invoked by the interrupt handler for
  759. * ops generated by the SCSI mid-layer which are being aborted.
  760. *
  761. * Return value:
  762. * none
  763. **/
  764. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  765. {
  766. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  767. scsi_cmd->result |= (DID_ERROR << 16);
  768. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  769. scsi_cmd->scsi_done(scsi_cmd);
  770. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  771. }
  772. /**
  773. * ipr_fail_all_ops - Fails all outstanding ops.
  774. * @ioa_cfg: ioa config struct
  775. *
  776. * This function fails all outstanding ops.
  777. *
  778. * Return value:
  779. * none
  780. **/
  781. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  782. {
  783. struct ipr_cmnd *ipr_cmd, *temp;
  784. struct ipr_hrr_queue *hrrq;
  785. ENTER;
  786. for_each_hrrq(hrrq, ioa_cfg) {
  787. spin_lock(&hrrq->_lock);
  788. list_for_each_entry_safe(ipr_cmd,
  789. temp, &hrrq->hrrq_pending_q, queue) {
  790. list_del(&ipr_cmd->queue);
  791. ipr_cmd->s.ioasa.hdr.ioasc =
  792. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  793. ipr_cmd->s.ioasa.hdr.ilid =
  794. cpu_to_be32(IPR_DRIVER_ILID);
  795. if (ipr_cmd->scsi_cmd)
  796. ipr_cmd->done = ipr_scsi_eh_done;
  797. else if (ipr_cmd->qc)
  798. ipr_cmd->done = ipr_sata_eh_done;
  799. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  800. IPR_IOASC_IOA_WAS_RESET);
  801. del_timer(&ipr_cmd->timer);
  802. ipr_cmd->done(ipr_cmd);
  803. }
  804. spin_unlock(&hrrq->_lock);
  805. }
  806. LEAVE;
  807. }
  808. /**
  809. * ipr_send_command - Send driver initiated requests.
  810. * @ipr_cmd: ipr command struct
  811. *
  812. * This function sends a command to the adapter using the correct write call.
  813. * In the case of sis64, calculate the ioarcb size required. Then or in the
  814. * appropriate bits.
  815. *
  816. * Return value:
  817. * none
  818. **/
  819. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  820. {
  821. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  822. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  823. if (ioa_cfg->sis64) {
  824. /* The default size is 256 bytes */
  825. send_dma_addr |= 0x1;
  826. /* If the number of ioadls * size of ioadl > 128 bytes,
  827. then use a 512 byte ioarcb */
  828. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  829. send_dma_addr |= 0x4;
  830. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  831. } else
  832. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  833. }
  834. /**
  835. * ipr_do_req - Send driver initiated requests.
  836. * @ipr_cmd: ipr command struct
  837. * @done: done function
  838. * @timeout_func: timeout function
  839. * @timeout: timeout value
  840. *
  841. * This function sends the specified command to the adapter with the
  842. * timeout given. The done function is invoked on command completion.
  843. *
  844. * Return value:
  845. * none
  846. **/
  847. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  848. void (*done) (struct ipr_cmnd *),
  849. void (*timeout_func) (struct ipr_cmnd *), u32 timeout)
  850. {
  851. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  852. ipr_cmd->done = done;
  853. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  854. ipr_cmd->timer.expires = jiffies + timeout;
  855. ipr_cmd->timer.function = (void (*)(unsigned long))timeout_func;
  856. add_timer(&ipr_cmd->timer);
  857. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  858. ipr_send_command(ipr_cmd);
  859. }
  860. /**
  861. * ipr_internal_cmd_done - Op done function for an internally generated op.
  862. * @ipr_cmd: ipr command struct
  863. *
  864. * This function is the op done function for an internally generated,
  865. * blocking op. It simply wakes the sleeping thread.
  866. *
  867. * Return value:
  868. * none
  869. **/
  870. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  871. {
  872. if (ipr_cmd->sibling)
  873. ipr_cmd->sibling = NULL;
  874. else
  875. complete(&ipr_cmd->completion);
  876. }
  877. /**
  878. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  879. * @ipr_cmd: ipr command struct
  880. * @dma_addr: dma address
  881. * @len: transfer length
  882. * @flags: ioadl flag value
  883. *
  884. * This function initializes an ioadl in the case where there is only a single
  885. * descriptor.
  886. *
  887. * Return value:
  888. * nothing
  889. **/
  890. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  891. u32 len, int flags)
  892. {
  893. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  894. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  895. ipr_cmd->dma_use_sg = 1;
  896. if (ipr_cmd->ioa_cfg->sis64) {
  897. ioadl64->flags = cpu_to_be32(flags);
  898. ioadl64->data_len = cpu_to_be32(len);
  899. ioadl64->address = cpu_to_be64(dma_addr);
  900. ipr_cmd->ioarcb.ioadl_len =
  901. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  902. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  903. } else {
  904. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  905. ioadl->address = cpu_to_be32(dma_addr);
  906. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  907. ipr_cmd->ioarcb.read_ioadl_len =
  908. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  909. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  910. } else {
  911. ipr_cmd->ioarcb.ioadl_len =
  912. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  913. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  914. }
  915. }
  916. }
  917. /**
  918. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  919. * @ipr_cmd: ipr command struct
  920. * @timeout_func: function to invoke if command times out
  921. * @timeout: timeout
  922. *
  923. * Return value:
  924. * none
  925. **/
  926. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  927. void (*timeout_func) (struct ipr_cmnd *ipr_cmd),
  928. u32 timeout)
  929. {
  930. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  931. init_completion(&ipr_cmd->completion);
  932. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  933. spin_unlock_irq(ioa_cfg->host->host_lock);
  934. wait_for_completion(&ipr_cmd->completion);
  935. spin_lock_irq(ioa_cfg->host->host_lock);
  936. }
  937. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  938. {
  939. if (ioa_cfg->hrrq_num == 1)
  940. return 0;
  941. else
  942. return (atomic_add_return(1, &ioa_cfg->hrrq_index) % (ioa_cfg->hrrq_num - 1)) + 1;
  943. }
  944. /**
  945. * ipr_send_hcam - Send an HCAM to the adapter.
  946. * @ioa_cfg: ioa config struct
  947. * @type: HCAM type
  948. * @hostrcb: hostrcb struct
  949. *
  950. * This function will send a Host Controlled Async command to the adapter.
  951. * If HCAMs are currently not allowed to be issued to the adapter, it will
  952. * place the hostrcb on the free queue.
  953. *
  954. * Return value:
  955. * none
  956. **/
  957. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  958. struct ipr_hostrcb *hostrcb)
  959. {
  960. struct ipr_cmnd *ipr_cmd;
  961. struct ipr_ioarcb *ioarcb;
  962. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  963. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  964. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  965. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  966. ipr_cmd->u.hostrcb = hostrcb;
  967. ioarcb = &ipr_cmd->ioarcb;
  968. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  969. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  970. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  971. ioarcb->cmd_pkt.cdb[1] = type;
  972. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  973. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  974. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  975. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  976. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  977. ipr_cmd->done = ipr_process_ccn;
  978. else
  979. ipr_cmd->done = ipr_process_error;
  980. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  981. ipr_send_command(ipr_cmd);
  982. } else {
  983. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  984. }
  985. }
  986. /**
  987. * ipr_update_ata_class - Update the ata class in the resource entry
  988. * @res: resource entry struct
  989. * @proto: cfgte device bus protocol value
  990. *
  991. * Return value:
  992. * none
  993. **/
  994. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  995. {
  996. switch (proto) {
  997. case IPR_PROTO_SATA:
  998. case IPR_PROTO_SAS_STP:
  999. res->ata_class = ATA_DEV_ATA;
  1000. break;
  1001. case IPR_PROTO_SATA_ATAPI:
  1002. case IPR_PROTO_SAS_STP_ATAPI:
  1003. res->ata_class = ATA_DEV_ATAPI;
  1004. break;
  1005. default:
  1006. res->ata_class = ATA_DEV_UNKNOWN;
  1007. break;
  1008. };
  1009. }
  1010. /**
  1011. * ipr_init_res_entry - Initialize a resource entry struct.
  1012. * @res: resource entry struct
  1013. * @cfgtew: config table entry wrapper struct
  1014. *
  1015. * Return value:
  1016. * none
  1017. **/
  1018. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1019. struct ipr_config_table_entry_wrapper *cfgtew)
  1020. {
  1021. int found = 0;
  1022. unsigned int proto;
  1023. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1024. struct ipr_resource_entry *gscsi_res = NULL;
  1025. res->needs_sync_complete = 0;
  1026. res->in_erp = 0;
  1027. res->add_to_ml = 0;
  1028. res->del_from_ml = 0;
  1029. res->resetting_device = 0;
  1030. res->sdev = NULL;
  1031. res->sata_port = NULL;
  1032. if (ioa_cfg->sis64) {
  1033. proto = cfgtew->u.cfgte64->proto;
  1034. res->res_flags = cfgtew->u.cfgte64->res_flags;
  1035. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1036. res->type = cfgtew->u.cfgte64->res_type;
  1037. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1038. sizeof(res->res_path));
  1039. res->bus = 0;
  1040. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1041. sizeof(res->dev_lun.scsi_lun));
  1042. res->lun = scsilun_to_int(&res->dev_lun);
  1043. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1044. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1045. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1046. found = 1;
  1047. res->target = gscsi_res->target;
  1048. break;
  1049. }
  1050. }
  1051. if (!found) {
  1052. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1053. ioa_cfg->max_devs_supported);
  1054. set_bit(res->target, ioa_cfg->target_ids);
  1055. }
  1056. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1057. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1058. res->target = 0;
  1059. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1060. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1061. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1062. ioa_cfg->max_devs_supported);
  1063. set_bit(res->target, ioa_cfg->array_ids);
  1064. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1065. res->bus = IPR_VSET_VIRTUAL_BUS;
  1066. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1067. ioa_cfg->max_devs_supported);
  1068. set_bit(res->target, ioa_cfg->vset_ids);
  1069. } else {
  1070. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1071. ioa_cfg->max_devs_supported);
  1072. set_bit(res->target, ioa_cfg->target_ids);
  1073. }
  1074. } else {
  1075. proto = cfgtew->u.cfgte->proto;
  1076. res->qmodel = IPR_QUEUEING_MODEL(res);
  1077. res->flags = cfgtew->u.cfgte->flags;
  1078. if (res->flags & IPR_IS_IOA_RESOURCE)
  1079. res->type = IPR_RES_TYPE_IOAFP;
  1080. else
  1081. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1082. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1083. res->target = cfgtew->u.cfgte->res_addr.target;
  1084. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1085. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1086. }
  1087. ipr_update_ata_class(res, proto);
  1088. }
  1089. /**
  1090. * ipr_is_same_device - Determine if two devices are the same.
  1091. * @res: resource entry struct
  1092. * @cfgtew: config table entry wrapper struct
  1093. *
  1094. * Return value:
  1095. * 1 if the devices are the same / 0 otherwise
  1096. **/
  1097. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1098. struct ipr_config_table_entry_wrapper *cfgtew)
  1099. {
  1100. if (res->ioa_cfg->sis64) {
  1101. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1102. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1103. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1104. sizeof(cfgtew->u.cfgte64->lun))) {
  1105. return 1;
  1106. }
  1107. } else {
  1108. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1109. res->target == cfgtew->u.cfgte->res_addr.target &&
  1110. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1111. return 1;
  1112. }
  1113. return 0;
  1114. }
  1115. /**
  1116. * __ipr_format_res_path - Format the resource path for printing.
  1117. * @res_path: resource path
  1118. * @buf: buffer
  1119. * @len: length of buffer provided
  1120. *
  1121. * Return value:
  1122. * pointer to buffer
  1123. **/
  1124. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1125. {
  1126. int i;
  1127. char *p = buffer;
  1128. *p = '\0';
  1129. p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
  1130. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1131. p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1132. return buffer;
  1133. }
  1134. /**
  1135. * ipr_format_res_path - Format the resource path for printing.
  1136. * @ioa_cfg: ioa config struct
  1137. * @res_path: resource path
  1138. * @buf: buffer
  1139. * @len: length of buffer provided
  1140. *
  1141. * Return value:
  1142. * pointer to buffer
  1143. **/
  1144. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1145. u8 *res_path, char *buffer, int len)
  1146. {
  1147. char *p = buffer;
  1148. *p = '\0';
  1149. p += snprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1150. __ipr_format_res_path(res_path, p, len - (buffer - p));
  1151. return buffer;
  1152. }
  1153. /**
  1154. * ipr_update_res_entry - Update the resource entry.
  1155. * @res: resource entry struct
  1156. * @cfgtew: config table entry wrapper struct
  1157. *
  1158. * Return value:
  1159. * none
  1160. **/
  1161. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1162. struct ipr_config_table_entry_wrapper *cfgtew)
  1163. {
  1164. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1165. unsigned int proto;
  1166. int new_path = 0;
  1167. if (res->ioa_cfg->sis64) {
  1168. res->flags = cfgtew->u.cfgte64->flags;
  1169. res->res_flags = cfgtew->u.cfgte64->res_flags;
  1170. res->type = cfgtew->u.cfgte64->res_type;
  1171. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1172. sizeof(struct ipr_std_inq_data));
  1173. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1174. proto = cfgtew->u.cfgte64->proto;
  1175. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1176. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1177. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1178. sizeof(res->dev_lun.scsi_lun));
  1179. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1180. sizeof(res->res_path))) {
  1181. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1182. sizeof(res->res_path));
  1183. new_path = 1;
  1184. }
  1185. if (res->sdev && new_path)
  1186. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1187. ipr_format_res_path(res->ioa_cfg,
  1188. res->res_path, buffer, sizeof(buffer)));
  1189. } else {
  1190. res->flags = cfgtew->u.cfgte->flags;
  1191. if (res->flags & IPR_IS_IOA_RESOURCE)
  1192. res->type = IPR_RES_TYPE_IOAFP;
  1193. else
  1194. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1195. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1196. sizeof(struct ipr_std_inq_data));
  1197. res->qmodel = IPR_QUEUEING_MODEL(res);
  1198. proto = cfgtew->u.cfgte->proto;
  1199. res->res_handle = cfgtew->u.cfgte->res_handle;
  1200. }
  1201. ipr_update_ata_class(res, proto);
  1202. }
  1203. /**
  1204. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1205. * for the resource.
  1206. * @res: resource entry struct
  1207. * @cfgtew: config table entry wrapper struct
  1208. *
  1209. * Return value:
  1210. * none
  1211. **/
  1212. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1213. {
  1214. struct ipr_resource_entry *gscsi_res = NULL;
  1215. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1216. if (!ioa_cfg->sis64)
  1217. return;
  1218. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1219. clear_bit(res->target, ioa_cfg->array_ids);
  1220. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1221. clear_bit(res->target, ioa_cfg->vset_ids);
  1222. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1223. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1224. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1225. return;
  1226. clear_bit(res->target, ioa_cfg->target_ids);
  1227. } else if (res->bus == 0)
  1228. clear_bit(res->target, ioa_cfg->target_ids);
  1229. }
  1230. /**
  1231. * ipr_handle_config_change - Handle a config change from the adapter
  1232. * @ioa_cfg: ioa config struct
  1233. * @hostrcb: hostrcb
  1234. *
  1235. * Return value:
  1236. * none
  1237. **/
  1238. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1239. struct ipr_hostrcb *hostrcb)
  1240. {
  1241. struct ipr_resource_entry *res = NULL;
  1242. struct ipr_config_table_entry_wrapper cfgtew;
  1243. __be32 cc_res_handle;
  1244. u32 is_ndn = 1;
  1245. if (ioa_cfg->sis64) {
  1246. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1247. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1248. } else {
  1249. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1250. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1251. }
  1252. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1253. if (res->res_handle == cc_res_handle) {
  1254. is_ndn = 0;
  1255. break;
  1256. }
  1257. }
  1258. if (is_ndn) {
  1259. if (list_empty(&ioa_cfg->free_res_q)) {
  1260. ipr_send_hcam(ioa_cfg,
  1261. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1262. hostrcb);
  1263. return;
  1264. }
  1265. res = list_entry(ioa_cfg->free_res_q.next,
  1266. struct ipr_resource_entry, queue);
  1267. list_del(&res->queue);
  1268. ipr_init_res_entry(res, &cfgtew);
  1269. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1270. }
  1271. ipr_update_res_entry(res, &cfgtew);
  1272. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1273. if (res->sdev) {
  1274. res->del_from_ml = 1;
  1275. res->res_handle = IPR_INVALID_RES_HANDLE;
  1276. if (ioa_cfg->allow_ml_add_del)
  1277. schedule_work(&ioa_cfg->work_q);
  1278. } else {
  1279. ipr_clear_res_target(res);
  1280. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1281. }
  1282. } else if (!res->sdev || res->del_from_ml) {
  1283. res->add_to_ml = 1;
  1284. if (ioa_cfg->allow_ml_add_del)
  1285. schedule_work(&ioa_cfg->work_q);
  1286. }
  1287. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1288. }
  1289. /**
  1290. * ipr_process_ccn - Op done function for a CCN.
  1291. * @ipr_cmd: ipr command struct
  1292. *
  1293. * This function is the op done function for a configuration
  1294. * change notification host controlled async from the adapter.
  1295. *
  1296. * Return value:
  1297. * none
  1298. **/
  1299. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1300. {
  1301. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1302. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1303. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1304. list_del(&hostrcb->queue);
  1305. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1306. if (ioasc) {
  1307. if (ioasc != IPR_IOASC_IOA_WAS_RESET)
  1308. dev_err(&ioa_cfg->pdev->dev,
  1309. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1310. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1311. } else {
  1312. ipr_handle_config_change(ioa_cfg, hostrcb);
  1313. }
  1314. }
  1315. /**
  1316. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1317. * @i: index into buffer
  1318. * @buf: string to modify
  1319. *
  1320. * This function will strip all trailing whitespace, pad the end
  1321. * of the string with a single space, and NULL terminate the string.
  1322. *
  1323. * Return value:
  1324. * new length of string
  1325. **/
  1326. static int strip_and_pad_whitespace(int i, char *buf)
  1327. {
  1328. while (i && buf[i] == ' ')
  1329. i--;
  1330. buf[i+1] = ' ';
  1331. buf[i+2] = '\0';
  1332. return i + 2;
  1333. }
  1334. /**
  1335. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1336. * @prefix: string to print at start of printk
  1337. * @hostrcb: hostrcb pointer
  1338. * @vpd: vendor/product id/sn struct
  1339. *
  1340. * Return value:
  1341. * none
  1342. **/
  1343. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1344. struct ipr_vpd *vpd)
  1345. {
  1346. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1347. int i = 0;
  1348. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1349. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1350. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1351. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1352. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1353. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1354. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n", prefix, buffer);
  1355. }
  1356. /**
  1357. * ipr_log_vpd - Log the passed VPD to the error log.
  1358. * @vpd: vendor/product id/sn struct
  1359. *
  1360. * Return value:
  1361. * none
  1362. **/
  1363. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1364. {
  1365. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1366. + IPR_SERIAL_NUM_LEN];
  1367. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1368. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1369. IPR_PROD_ID_LEN);
  1370. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1371. ipr_err("Vendor/Product ID: %s\n", buffer);
  1372. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1373. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1374. ipr_err(" Serial Number: %s\n", buffer);
  1375. }
  1376. /**
  1377. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1378. * @prefix: string to print at start of printk
  1379. * @hostrcb: hostrcb pointer
  1380. * @vpd: vendor/product id/sn/wwn struct
  1381. *
  1382. * Return value:
  1383. * none
  1384. **/
  1385. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1386. struct ipr_ext_vpd *vpd)
  1387. {
  1388. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1389. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1390. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1391. }
  1392. /**
  1393. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1394. * @vpd: vendor/product id/sn/wwn struct
  1395. *
  1396. * Return value:
  1397. * none
  1398. **/
  1399. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1400. {
  1401. ipr_log_vpd(&vpd->vpd);
  1402. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1403. be32_to_cpu(vpd->wwid[1]));
  1404. }
  1405. /**
  1406. * ipr_log_enhanced_cache_error - Log a cache error.
  1407. * @ioa_cfg: ioa config struct
  1408. * @hostrcb: hostrcb struct
  1409. *
  1410. * Return value:
  1411. * none
  1412. **/
  1413. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1414. struct ipr_hostrcb *hostrcb)
  1415. {
  1416. struct ipr_hostrcb_type_12_error *error;
  1417. if (ioa_cfg->sis64)
  1418. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1419. else
  1420. error = &hostrcb->hcam.u.error.u.type_12_error;
  1421. ipr_err("-----Current Configuration-----\n");
  1422. ipr_err("Cache Directory Card Information:\n");
  1423. ipr_log_ext_vpd(&error->ioa_vpd);
  1424. ipr_err("Adapter Card Information:\n");
  1425. ipr_log_ext_vpd(&error->cfc_vpd);
  1426. ipr_err("-----Expected Configuration-----\n");
  1427. ipr_err("Cache Directory Card Information:\n");
  1428. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1429. ipr_err("Adapter Card Information:\n");
  1430. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1431. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1432. be32_to_cpu(error->ioa_data[0]),
  1433. be32_to_cpu(error->ioa_data[1]),
  1434. be32_to_cpu(error->ioa_data[2]));
  1435. }
  1436. /**
  1437. * ipr_log_cache_error - Log a cache error.
  1438. * @ioa_cfg: ioa config struct
  1439. * @hostrcb: hostrcb struct
  1440. *
  1441. * Return value:
  1442. * none
  1443. **/
  1444. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1445. struct ipr_hostrcb *hostrcb)
  1446. {
  1447. struct ipr_hostrcb_type_02_error *error =
  1448. &hostrcb->hcam.u.error.u.type_02_error;
  1449. ipr_err("-----Current Configuration-----\n");
  1450. ipr_err("Cache Directory Card Information:\n");
  1451. ipr_log_vpd(&error->ioa_vpd);
  1452. ipr_err("Adapter Card Information:\n");
  1453. ipr_log_vpd(&error->cfc_vpd);
  1454. ipr_err("-----Expected Configuration-----\n");
  1455. ipr_err("Cache Directory Card Information:\n");
  1456. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1457. ipr_err("Adapter Card Information:\n");
  1458. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1459. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1460. be32_to_cpu(error->ioa_data[0]),
  1461. be32_to_cpu(error->ioa_data[1]),
  1462. be32_to_cpu(error->ioa_data[2]));
  1463. }
  1464. /**
  1465. * ipr_log_enhanced_config_error - Log a configuration error.
  1466. * @ioa_cfg: ioa config struct
  1467. * @hostrcb: hostrcb struct
  1468. *
  1469. * Return value:
  1470. * none
  1471. **/
  1472. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1473. struct ipr_hostrcb *hostrcb)
  1474. {
  1475. int errors_logged, i;
  1476. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1477. struct ipr_hostrcb_type_13_error *error;
  1478. error = &hostrcb->hcam.u.error.u.type_13_error;
  1479. errors_logged = be32_to_cpu(error->errors_logged);
  1480. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1481. be32_to_cpu(error->errors_detected), errors_logged);
  1482. dev_entry = error->dev;
  1483. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1484. ipr_err_separator;
  1485. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1486. ipr_log_ext_vpd(&dev_entry->vpd);
  1487. ipr_err("-----New Device Information-----\n");
  1488. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1489. ipr_err("Cache Directory Card Information:\n");
  1490. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1491. ipr_err("Adapter Card Information:\n");
  1492. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1493. }
  1494. }
  1495. /**
  1496. * ipr_log_sis64_config_error - Log a device error.
  1497. * @ioa_cfg: ioa config struct
  1498. * @hostrcb: hostrcb struct
  1499. *
  1500. * Return value:
  1501. * none
  1502. **/
  1503. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1504. struct ipr_hostrcb *hostrcb)
  1505. {
  1506. int errors_logged, i;
  1507. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1508. struct ipr_hostrcb_type_23_error *error;
  1509. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1510. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1511. errors_logged = be32_to_cpu(error->errors_logged);
  1512. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1513. be32_to_cpu(error->errors_detected), errors_logged);
  1514. dev_entry = error->dev;
  1515. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1516. ipr_err_separator;
  1517. ipr_err("Device %d : %s", i + 1,
  1518. __ipr_format_res_path(dev_entry->res_path,
  1519. buffer, sizeof(buffer)));
  1520. ipr_log_ext_vpd(&dev_entry->vpd);
  1521. ipr_err("-----New Device Information-----\n");
  1522. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1523. ipr_err("Cache Directory Card Information:\n");
  1524. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1525. ipr_err("Adapter Card Information:\n");
  1526. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1527. }
  1528. }
  1529. /**
  1530. * ipr_log_config_error - Log a configuration error.
  1531. * @ioa_cfg: ioa config struct
  1532. * @hostrcb: hostrcb struct
  1533. *
  1534. * Return value:
  1535. * none
  1536. **/
  1537. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1538. struct ipr_hostrcb *hostrcb)
  1539. {
  1540. int errors_logged, i;
  1541. struct ipr_hostrcb_device_data_entry *dev_entry;
  1542. struct ipr_hostrcb_type_03_error *error;
  1543. error = &hostrcb->hcam.u.error.u.type_03_error;
  1544. errors_logged = be32_to_cpu(error->errors_logged);
  1545. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1546. be32_to_cpu(error->errors_detected), errors_logged);
  1547. dev_entry = error->dev;
  1548. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1549. ipr_err_separator;
  1550. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1551. ipr_log_vpd(&dev_entry->vpd);
  1552. ipr_err("-----New Device Information-----\n");
  1553. ipr_log_vpd(&dev_entry->new_vpd);
  1554. ipr_err("Cache Directory Card Information:\n");
  1555. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1556. ipr_err("Adapter Card Information:\n");
  1557. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1558. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1559. be32_to_cpu(dev_entry->ioa_data[0]),
  1560. be32_to_cpu(dev_entry->ioa_data[1]),
  1561. be32_to_cpu(dev_entry->ioa_data[2]),
  1562. be32_to_cpu(dev_entry->ioa_data[3]),
  1563. be32_to_cpu(dev_entry->ioa_data[4]));
  1564. }
  1565. }
  1566. /**
  1567. * ipr_log_enhanced_array_error - Log an array configuration error.
  1568. * @ioa_cfg: ioa config struct
  1569. * @hostrcb: hostrcb struct
  1570. *
  1571. * Return value:
  1572. * none
  1573. **/
  1574. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1575. struct ipr_hostrcb *hostrcb)
  1576. {
  1577. int i, num_entries;
  1578. struct ipr_hostrcb_type_14_error *error;
  1579. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1580. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1581. error = &hostrcb->hcam.u.error.u.type_14_error;
  1582. ipr_err_separator;
  1583. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1584. error->protection_level,
  1585. ioa_cfg->host->host_no,
  1586. error->last_func_vset_res_addr.bus,
  1587. error->last_func_vset_res_addr.target,
  1588. error->last_func_vset_res_addr.lun);
  1589. ipr_err_separator;
  1590. array_entry = error->array_member;
  1591. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1592. ARRAY_SIZE(error->array_member));
  1593. for (i = 0; i < num_entries; i++, array_entry++) {
  1594. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1595. continue;
  1596. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1597. ipr_err("Exposed Array Member %d:\n", i);
  1598. else
  1599. ipr_err("Array Member %d:\n", i);
  1600. ipr_log_ext_vpd(&array_entry->vpd);
  1601. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1602. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1603. "Expected Location");
  1604. ipr_err_separator;
  1605. }
  1606. }
  1607. /**
  1608. * ipr_log_array_error - Log an array configuration error.
  1609. * @ioa_cfg: ioa config struct
  1610. * @hostrcb: hostrcb struct
  1611. *
  1612. * Return value:
  1613. * none
  1614. **/
  1615. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1616. struct ipr_hostrcb *hostrcb)
  1617. {
  1618. int i;
  1619. struct ipr_hostrcb_type_04_error *error;
  1620. struct ipr_hostrcb_array_data_entry *array_entry;
  1621. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1622. error = &hostrcb->hcam.u.error.u.type_04_error;
  1623. ipr_err_separator;
  1624. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1625. error->protection_level,
  1626. ioa_cfg->host->host_no,
  1627. error->last_func_vset_res_addr.bus,
  1628. error->last_func_vset_res_addr.target,
  1629. error->last_func_vset_res_addr.lun);
  1630. ipr_err_separator;
  1631. array_entry = error->array_member;
  1632. for (i = 0; i < 18; i++) {
  1633. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1634. continue;
  1635. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1636. ipr_err("Exposed Array Member %d:\n", i);
  1637. else
  1638. ipr_err("Array Member %d:\n", i);
  1639. ipr_log_vpd(&array_entry->vpd);
  1640. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1641. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1642. "Expected Location");
  1643. ipr_err_separator;
  1644. if (i == 9)
  1645. array_entry = error->array_member2;
  1646. else
  1647. array_entry++;
  1648. }
  1649. }
  1650. /**
  1651. * ipr_log_hex_data - Log additional hex IOA error data.
  1652. * @ioa_cfg: ioa config struct
  1653. * @data: IOA error data
  1654. * @len: data length
  1655. *
  1656. * Return value:
  1657. * none
  1658. **/
  1659. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, u32 *data, int len)
  1660. {
  1661. int i;
  1662. if (len == 0)
  1663. return;
  1664. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1665. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1666. for (i = 0; i < len / 4; i += 4) {
  1667. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1668. be32_to_cpu(data[i]),
  1669. be32_to_cpu(data[i+1]),
  1670. be32_to_cpu(data[i+2]),
  1671. be32_to_cpu(data[i+3]));
  1672. }
  1673. }
  1674. /**
  1675. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1676. * @ioa_cfg: ioa config struct
  1677. * @hostrcb: hostrcb struct
  1678. *
  1679. * Return value:
  1680. * none
  1681. **/
  1682. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1683. struct ipr_hostrcb *hostrcb)
  1684. {
  1685. struct ipr_hostrcb_type_17_error *error;
  1686. if (ioa_cfg->sis64)
  1687. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1688. else
  1689. error = &hostrcb->hcam.u.error.u.type_17_error;
  1690. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1691. strim(error->failure_reason);
  1692. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1693. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1694. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1695. ipr_log_hex_data(ioa_cfg, error->data,
  1696. be32_to_cpu(hostrcb->hcam.length) -
  1697. (offsetof(struct ipr_hostrcb_error, u) +
  1698. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1699. }
  1700. /**
  1701. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1702. * @ioa_cfg: ioa config struct
  1703. * @hostrcb: hostrcb struct
  1704. *
  1705. * Return value:
  1706. * none
  1707. **/
  1708. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1709. struct ipr_hostrcb *hostrcb)
  1710. {
  1711. struct ipr_hostrcb_type_07_error *error;
  1712. error = &hostrcb->hcam.u.error.u.type_07_error;
  1713. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1714. strim(error->failure_reason);
  1715. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1716. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1717. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1718. ipr_log_hex_data(ioa_cfg, error->data,
  1719. be32_to_cpu(hostrcb->hcam.length) -
  1720. (offsetof(struct ipr_hostrcb_error, u) +
  1721. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1722. }
  1723. static const struct {
  1724. u8 active;
  1725. char *desc;
  1726. } path_active_desc[] = {
  1727. { IPR_PATH_NO_INFO, "Path" },
  1728. { IPR_PATH_ACTIVE, "Active path" },
  1729. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1730. };
  1731. static const struct {
  1732. u8 state;
  1733. char *desc;
  1734. } path_state_desc[] = {
  1735. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1736. { IPR_PATH_HEALTHY, "is healthy" },
  1737. { IPR_PATH_DEGRADED, "is degraded" },
  1738. { IPR_PATH_FAILED, "is failed" }
  1739. };
  1740. /**
  1741. * ipr_log_fabric_path - Log a fabric path error
  1742. * @hostrcb: hostrcb struct
  1743. * @fabric: fabric descriptor
  1744. *
  1745. * Return value:
  1746. * none
  1747. **/
  1748. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1749. struct ipr_hostrcb_fabric_desc *fabric)
  1750. {
  1751. int i, j;
  1752. u8 path_state = fabric->path_state;
  1753. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1754. u8 state = path_state & IPR_PATH_STATE_MASK;
  1755. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1756. if (path_active_desc[i].active != active)
  1757. continue;
  1758. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1759. if (path_state_desc[j].state != state)
  1760. continue;
  1761. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1762. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1763. path_active_desc[i].desc, path_state_desc[j].desc,
  1764. fabric->ioa_port);
  1765. } else if (fabric->cascaded_expander == 0xff) {
  1766. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1767. path_active_desc[i].desc, path_state_desc[j].desc,
  1768. fabric->ioa_port, fabric->phy);
  1769. } else if (fabric->phy == 0xff) {
  1770. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1771. path_active_desc[i].desc, path_state_desc[j].desc,
  1772. fabric->ioa_port, fabric->cascaded_expander);
  1773. } else {
  1774. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1775. path_active_desc[i].desc, path_state_desc[j].desc,
  1776. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1777. }
  1778. return;
  1779. }
  1780. }
  1781. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1782. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1783. }
  1784. /**
  1785. * ipr_log64_fabric_path - Log a fabric path error
  1786. * @hostrcb: hostrcb struct
  1787. * @fabric: fabric descriptor
  1788. *
  1789. * Return value:
  1790. * none
  1791. **/
  1792. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1793. struct ipr_hostrcb64_fabric_desc *fabric)
  1794. {
  1795. int i, j;
  1796. u8 path_state = fabric->path_state;
  1797. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1798. u8 state = path_state & IPR_PATH_STATE_MASK;
  1799. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1800. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1801. if (path_active_desc[i].active != active)
  1802. continue;
  1803. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1804. if (path_state_desc[j].state != state)
  1805. continue;
  1806. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1807. path_active_desc[i].desc, path_state_desc[j].desc,
  1808. ipr_format_res_path(hostrcb->ioa_cfg,
  1809. fabric->res_path,
  1810. buffer, sizeof(buffer)));
  1811. return;
  1812. }
  1813. }
  1814. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1815. ipr_format_res_path(hostrcb->ioa_cfg, fabric->res_path,
  1816. buffer, sizeof(buffer)));
  1817. }
  1818. static const struct {
  1819. u8 type;
  1820. char *desc;
  1821. } path_type_desc[] = {
  1822. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1823. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1824. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1825. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1826. };
  1827. static const struct {
  1828. u8 status;
  1829. char *desc;
  1830. } path_status_desc[] = {
  1831. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1832. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1833. { IPR_PATH_CFG_FAILED, "Failed" },
  1834. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1835. { IPR_PATH_NOT_DETECTED, "Missing" },
  1836. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1837. };
  1838. static const char *link_rate[] = {
  1839. "unknown",
  1840. "disabled",
  1841. "phy reset problem",
  1842. "spinup hold",
  1843. "port selector",
  1844. "unknown",
  1845. "unknown",
  1846. "unknown",
  1847. "1.5Gbps",
  1848. "3.0Gbps",
  1849. "unknown",
  1850. "unknown",
  1851. "unknown",
  1852. "unknown",
  1853. "unknown",
  1854. "unknown"
  1855. };
  1856. /**
  1857. * ipr_log_path_elem - Log a fabric path element.
  1858. * @hostrcb: hostrcb struct
  1859. * @cfg: fabric path element struct
  1860. *
  1861. * Return value:
  1862. * none
  1863. **/
  1864. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1865. struct ipr_hostrcb_config_element *cfg)
  1866. {
  1867. int i, j;
  1868. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1869. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1870. if (type == IPR_PATH_CFG_NOT_EXIST)
  1871. return;
  1872. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1873. if (path_type_desc[i].type != type)
  1874. continue;
  1875. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1876. if (path_status_desc[j].status != status)
  1877. continue;
  1878. if (type == IPR_PATH_CFG_IOA_PORT) {
  1879. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1880. path_status_desc[j].desc, path_type_desc[i].desc,
  1881. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1882. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1883. } else {
  1884. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1885. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1886. path_status_desc[j].desc, path_type_desc[i].desc,
  1887. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1888. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1889. } else if (cfg->cascaded_expander == 0xff) {
  1890. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1891. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1892. path_type_desc[i].desc, cfg->phy,
  1893. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1894. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1895. } else if (cfg->phy == 0xff) {
  1896. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1897. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1898. path_type_desc[i].desc, cfg->cascaded_expander,
  1899. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1900. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1901. } else {
  1902. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1903. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1904. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  1905. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1906. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1907. }
  1908. }
  1909. return;
  1910. }
  1911. }
  1912. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  1913. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  1914. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1915. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1916. }
  1917. /**
  1918. * ipr_log64_path_elem - Log a fabric path element.
  1919. * @hostrcb: hostrcb struct
  1920. * @cfg: fabric path element struct
  1921. *
  1922. * Return value:
  1923. * none
  1924. **/
  1925. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  1926. struct ipr_hostrcb64_config_element *cfg)
  1927. {
  1928. int i, j;
  1929. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  1930. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1931. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1932. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1933. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  1934. return;
  1935. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1936. if (path_type_desc[i].type != type)
  1937. continue;
  1938. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1939. if (path_status_desc[j].status != status)
  1940. continue;
  1941. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  1942. path_status_desc[j].desc, path_type_desc[i].desc,
  1943. ipr_format_res_path(hostrcb->ioa_cfg,
  1944. cfg->res_path, buffer, sizeof(buffer)),
  1945. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1946. be32_to_cpu(cfg->wwid[0]),
  1947. be32_to_cpu(cfg->wwid[1]));
  1948. return;
  1949. }
  1950. }
  1951. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  1952. "WWN=%08X%08X\n", cfg->type_status,
  1953. ipr_format_res_path(hostrcb->ioa_cfg,
  1954. cfg->res_path, buffer, sizeof(buffer)),
  1955. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1956. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1957. }
  1958. /**
  1959. * ipr_log_fabric_error - Log a fabric error.
  1960. * @ioa_cfg: ioa config struct
  1961. * @hostrcb: hostrcb struct
  1962. *
  1963. * Return value:
  1964. * none
  1965. **/
  1966. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  1967. struct ipr_hostrcb *hostrcb)
  1968. {
  1969. struct ipr_hostrcb_type_20_error *error;
  1970. struct ipr_hostrcb_fabric_desc *fabric;
  1971. struct ipr_hostrcb_config_element *cfg;
  1972. int i, add_len;
  1973. error = &hostrcb->hcam.u.error.u.type_20_error;
  1974. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1975. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  1976. add_len = be32_to_cpu(hostrcb->hcam.length) -
  1977. (offsetof(struct ipr_hostrcb_error, u) +
  1978. offsetof(struct ipr_hostrcb_type_20_error, desc));
  1979. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  1980. ipr_log_fabric_path(hostrcb, fabric);
  1981. for_each_fabric_cfg(fabric, cfg)
  1982. ipr_log_path_elem(hostrcb, cfg);
  1983. add_len -= be16_to_cpu(fabric->length);
  1984. fabric = (struct ipr_hostrcb_fabric_desc *)
  1985. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  1986. }
  1987. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  1988. }
  1989. /**
  1990. * ipr_log_sis64_array_error - Log a sis64 array error.
  1991. * @ioa_cfg: ioa config struct
  1992. * @hostrcb: hostrcb struct
  1993. *
  1994. * Return value:
  1995. * none
  1996. **/
  1997. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1998. struct ipr_hostrcb *hostrcb)
  1999. {
  2000. int i, num_entries;
  2001. struct ipr_hostrcb_type_24_error *error;
  2002. struct ipr_hostrcb64_array_data_entry *array_entry;
  2003. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2004. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  2005. error = &hostrcb->hcam.u.error64.u.type_24_error;
  2006. ipr_err_separator;
  2007. ipr_err("RAID %s Array Configuration: %s\n",
  2008. error->protection_level,
  2009. ipr_format_res_path(ioa_cfg, error->last_res_path,
  2010. buffer, sizeof(buffer)));
  2011. ipr_err_separator;
  2012. array_entry = error->array_member;
  2013. num_entries = min_t(u32, error->num_entries,
  2014. ARRAY_SIZE(error->array_member));
  2015. for (i = 0; i < num_entries; i++, array_entry++) {
  2016. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  2017. continue;
  2018. if (error->exposed_mode_adn == i)
  2019. ipr_err("Exposed Array Member %d:\n", i);
  2020. else
  2021. ipr_err("Array Member %d:\n", i);
  2022. ipr_err("Array Member %d:\n", i);
  2023. ipr_log_ext_vpd(&array_entry->vpd);
  2024. ipr_err("Current Location: %s\n",
  2025. ipr_format_res_path(ioa_cfg, array_entry->res_path,
  2026. buffer, sizeof(buffer)));
  2027. ipr_err("Expected Location: %s\n",
  2028. ipr_format_res_path(ioa_cfg,
  2029. array_entry->expected_res_path,
  2030. buffer, sizeof(buffer)));
  2031. ipr_err_separator;
  2032. }
  2033. }
  2034. /**
  2035. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  2036. * @ioa_cfg: ioa config struct
  2037. * @hostrcb: hostrcb struct
  2038. *
  2039. * Return value:
  2040. * none
  2041. **/
  2042. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2043. struct ipr_hostrcb *hostrcb)
  2044. {
  2045. struct ipr_hostrcb_type_30_error *error;
  2046. struct ipr_hostrcb64_fabric_desc *fabric;
  2047. struct ipr_hostrcb64_config_element *cfg;
  2048. int i, add_len;
  2049. error = &hostrcb->hcam.u.error64.u.type_30_error;
  2050. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2051. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2052. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2053. (offsetof(struct ipr_hostrcb64_error, u) +
  2054. offsetof(struct ipr_hostrcb_type_30_error, desc));
  2055. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2056. ipr_log64_fabric_path(hostrcb, fabric);
  2057. for_each_fabric_cfg(fabric, cfg)
  2058. ipr_log64_path_elem(hostrcb, cfg);
  2059. add_len -= be16_to_cpu(fabric->length);
  2060. fabric = (struct ipr_hostrcb64_fabric_desc *)
  2061. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2062. }
  2063. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  2064. }
  2065. /**
  2066. * ipr_log_generic_error - Log an adapter error.
  2067. * @ioa_cfg: ioa config struct
  2068. * @hostrcb: hostrcb struct
  2069. *
  2070. * Return value:
  2071. * none
  2072. **/
  2073. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  2074. struct ipr_hostrcb *hostrcb)
  2075. {
  2076. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  2077. be32_to_cpu(hostrcb->hcam.length));
  2078. }
  2079. /**
  2080. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  2081. * @ioasc: IOASC
  2082. *
  2083. * This function will return the index of into the ipr_error_table
  2084. * for the specified IOASC. If the IOASC is not in the table,
  2085. * 0 will be returned, which points to the entry used for unknown errors.
  2086. *
  2087. * Return value:
  2088. * index into the ipr_error_table
  2089. **/
  2090. static u32 ipr_get_error(u32 ioasc)
  2091. {
  2092. int i;
  2093. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2094. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2095. return i;
  2096. return 0;
  2097. }
  2098. /**
  2099. * ipr_handle_log_data - Log an adapter error.
  2100. * @ioa_cfg: ioa config struct
  2101. * @hostrcb: hostrcb struct
  2102. *
  2103. * This function logs an adapter error to the system.
  2104. *
  2105. * Return value:
  2106. * none
  2107. **/
  2108. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2109. struct ipr_hostrcb *hostrcb)
  2110. {
  2111. u32 ioasc;
  2112. int error_index;
  2113. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2114. return;
  2115. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2116. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2117. if (ioa_cfg->sis64)
  2118. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2119. else
  2120. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2121. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2122. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2123. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2124. scsi_report_bus_reset(ioa_cfg->host,
  2125. hostrcb->hcam.u.error.fd_res_addr.bus);
  2126. }
  2127. error_index = ipr_get_error(ioasc);
  2128. if (!ipr_error_table[error_index].log_hcam)
  2129. return;
  2130. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2131. /* Set indication we have logged an error */
  2132. ioa_cfg->errors_logged++;
  2133. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2134. return;
  2135. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2136. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2137. switch (hostrcb->hcam.overlay_id) {
  2138. case IPR_HOST_RCB_OVERLAY_ID_2:
  2139. ipr_log_cache_error(ioa_cfg, hostrcb);
  2140. break;
  2141. case IPR_HOST_RCB_OVERLAY_ID_3:
  2142. ipr_log_config_error(ioa_cfg, hostrcb);
  2143. break;
  2144. case IPR_HOST_RCB_OVERLAY_ID_4:
  2145. case IPR_HOST_RCB_OVERLAY_ID_6:
  2146. ipr_log_array_error(ioa_cfg, hostrcb);
  2147. break;
  2148. case IPR_HOST_RCB_OVERLAY_ID_7:
  2149. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2150. break;
  2151. case IPR_HOST_RCB_OVERLAY_ID_12:
  2152. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2153. break;
  2154. case IPR_HOST_RCB_OVERLAY_ID_13:
  2155. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2156. break;
  2157. case IPR_HOST_RCB_OVERLAY_ID_14:
  2158. case IPR_HOST_RCB_OVERLAY_ID_16:
  2159. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2160. break;
  2161. case IPR_HOST_RCB_OVERLAY_ID_17:
  2162. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2163. break;
  2164. case IPR_HOST_RCB_OVERLAY_ID_20:
  2165. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2166. break;
  2167. case IPR_HOST_RCB_OVERLAY_ID_23:
  2168. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2169. break;
  2170. case IPR_HOST_RCB_OVERLAY_ID_24:
  2171. case IPR_HOST_RCB_OVERLAY_ID_26:
  2172. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2173. break;
  2174. case IPR_HOST_RCB_OVERLAY_ID_30:
  2175. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2176. break;
  2177. case IPR_HOST_RCB_OVERLAY_ID_1:
  2178. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2179. default:
  2180. ipr_log_generic_error(ioa_cfg, hostrcb);
  2181. break;
  2182. }
  2183. }
  2184. /**
  2185. * ipr_process_error - Op done function for an adapter error log.
  2186. * @ipr_cmd: ipr command struct
  2187. *
  2188. * This function is the op done function for an error log host
  2189. * controlled async from the adapter. It will log the error and
  2190. * send the HCAM back to the adapter.
  2191. *
  2192. * Return value:
  2193. * none
  2194. **/
  2195. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2196. {
  2197. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2198. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2199. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2200. u32 fd_ioasc;
  2201. if (ioa_cfg->sis64)
  2202. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2203. else
  2204. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2205. list_del(&hostrcb->queue);
  2206. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  2207. if (!ioasc) {
  2208. ipr_handle_log_data(ioa_cfg, hostrcb);
  2209. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2210. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2211. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET) {
  2212. dev_err(&ioa_cfg->pdev->dev,
  2213. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2214. }
  2215. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2216. }
  2217. /**
  2218. * ipr_timeout - An internally generated op has timed out.
  2219. * @ipr_cmd: ipr command struct
  2220. *
  2221. * This function blocks host requests and initiates an
  2222. * adapter reset.
  2223. *
  2224. * Return value:
  2225. * none
  2226. **/
  2227. static void ipr_timeout(struct ipr_cmnd *ipr_cmd)
  2228. {
  2229. unsigned long lock_flags = 0;
  2230. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2231. ENTER;
  2232. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2233. ioa_cfg->errors_logged++;
  2234. dev_err(&ioa_cfg->pdev->dev,
  2235. "Adapter being reset due to command timeout.\n");
  2236. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2237. ioa_cfg->sdt_state = GET_DUMP;
  2238. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2239. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2240. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2241. LEAVE;
  2242. }
  2243. /**
  2244. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2245. * @ipr_cmd: ipr command struct
  2246. *
  2247. * This function blocks host requests and initiates an
  2248. * adapter reset.
  2249. *
  2250. * Return value:
  2251. * none
  2252. **/
  2253. static void ipr_oper_timeout(struct ipr_cmnd *ipr_cmd)
  2254. {
  2255. unsigned long lock_flags = 0;
  2256. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2257. ENTER;
  2258. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2259. ioa_cfg->errors_logged++;
  2260. dev_err(&ioa_cfg->pdev->dev,
  2261. "Adapter timed out transitioning to operational.\n");
  2262. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2263. ioa_cfg->sdt_state = GET_DUMP;
  2264. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2265. if (ipr_fastfail)
  2266. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2267. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2268. }
  2269. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2270. LEAVE;
  2271. }
  2272. /**
  2273. * ipr_reset_reload - Reset/Reload the IOA
  2274. * @ioa_cfg: ioa config struct
  2275. * @shutdown_type: shutdown type
  2276. *
  2277. * This function resets the adapter and re-initializes it.
  2278. * This function assumes that all new host commands have been stopped.
  2279. * Return value:
  2280. * SUCCESS / FAILED
  2281. **/
  2282. static int ipr_reset_reload(struct ipr_ioa_cfg *ioa_cfg,
  2283. enum ipr_shutdown_type shutdown_type)
  2284. {
  2285. if (!ioa_cfg->in_reset_reload)
  2286. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  2287. spin_unlock_irq(ioa_cfg->host->host_lock);
  2288. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  2289. spin_lock_irq(ioa_cfg->host->host_lock);
  2290. /* If we got hit with a host reset while we were already resetting
  2291. the adapter for some reason, and the reset failed. */
  2292. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  2293. ipr_trace;
  2294. return FAILED;
  2295. }
  2296. return SUCCESS;
  2297. }
  2298. /**
  2299. * ipr_find_ses_entry - Find matching SES in SES table
  2300. * @res: resource entry struct of SES
  2301. *
  2302. * Return value:
  2303. * pointer to SES table entry / NULL on failure
  2304. **/
  2305. static const struct ipr_ses_table_entry *
  2306. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2307. {
  2308. int i, j, matches;
  2309. struct ipr_std_inq_vpids *vpids;
  2310. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2311. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2312. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2313. if (ste->compare_product_id_byte[j] == 'X') {
  2314. vpids = &res->std_inq_data.vpids;
  2315. if (vpids->product_id[j] == ste->product_id[j])
  2316. matches++;
  2317. else
  2318. break;
  2319. } else
  2320. matches++;
  2321. }
  2322. if (matches == IPR_PROD_ID_LEN)
  2323. return ste;
  2324. }
  2325. return NULL;
  2326. }
  2327. /**
  2328. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2329. * @ioa_cfg: ioa config struct
  2330. * @bus: SCSI bus
  2331. * @bus_width: bus width
  2332. *
  2333. * Return value:
  2334. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2335. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2336. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2337. * max 160MHz = max 320MB/sec).
  2338. **/
  2339. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2340. {
  2341. struct ipr_resource_entry *res;
  2342. const struct ipr_ses_table_entry *ste;
  2343. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2344. /* Loop through each config table entry in the config table buffer */
  2345. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2346. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2347. continue;
  2348. if (bus != res->bus)
  2349. continue;
  2350. if (!(ste = ipr_find_ses_entry(res)))
  2351. continue;
  2352. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2353. }
  2354. return max_xfer_rate;
  2355. }
  2356. /**
  2357. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2358. * @ioa_cfg: ioa config struct
  2359. * @max_delay: max delay in micro-seconds to wait
  2360. *
  2361. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2362. *
  2363. * Return value:
  2364. * 0 on success / other on failure
  2365. **/
  2366. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2367. {
  2368. volatile u32 pcii_reg;
  2369. int delay = 1;
  2370. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2371. while (delay < max_delay) {
  2372. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2373. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2374. return 0;
  2375. /* udelay cannot be used if delay is more than a few milliseconds */
  2376. if ((delay / 1000) > MAX_UDELAY_MS)
  2377. mdelay(delay / 1000);
  2378. else
  2379. udelay(delay);
  2380. delay += delay;
  2381. }
  2382. return -EIO;
  2383. }
  2384. /**
  2385. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2386. * @ioa_cfg: ioa config struct
  2387. * @start_addr: adapter address to dump
  2388. * @dest: destination kernel buffer
  2389. * @length_in_words: length to dump in 4 byte words
  2390. *
  2391. * Return value:
  2392. * 0 on success
  2393. **/
  2394. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2395. u32 start_addr,
  2396. __be32 *dest, u32 length_in_words)
  2397. {
  2398. int i;
  2399. for (i = 0; i < length_in_words; i++) {
  2400. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2401. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2402. dest++;
  2403. }
  2404. return 0;
  2405. }
  2406. /**
  2407. * ipr_get_ldump_data_section - Dump IOA memory
  2408. * @ioa_cfg: ioa config struct
  2409. * @start_addr: adapter address to dump
  2410. * @dest: destination kernel buffer
  2411. * @length_in_words: length to dump in 4 byte words
  2412. *
  2413. * Return value:
  2414. * 0 on success / -EIO on failure
  2415. **/
  2416. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2417. u32 start_addr,
  2418. __be32 *dest, u32 length_in_words)
  2419. {
  2420. volatile u32 temp_pcii_reg;
  2421. int i, delay = 0;
  2422. if (ioa_cfg->sis64)
  2423. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2424. dest, length_in_words);
  2425. /* Write IOA interrupt reg starting LDUMP state */
  2426. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2427. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2428. /* Wait for IO debug acknowledge */
  2429. if (ipr_wait_iodbg_ack(ioa_cfg,
  2430. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2431. dev_err(&ioa_cfg->pdev->dev,
  2432. "IOA dump long data transfer timeout\n");
  2433. return -EIO;
  2434. }
  2435. /* Signal LDUMP interlocked - clear IO debug ack */
  2436. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2437. ioa_cfg->regs.clr_interrupt_reg);
  2438. /* Write Mailbox with starting address */
  2439. writel(start_addr, ioa_cfg->ioa_mailbox);
  2440. /* Signal address valid - clear IOA Reset alert */
  2441. writel(IPR_UPROCI_RESET_ALERT,
  2442. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2443. for (i = 0; i < length_in_words; i++) {
  2444. /* Wait for IO debug acknowledge */
  2445. if (ipr_wait_iodbg_ack(ioa_cfg,
  2446. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2447. dev_err(&ioa_cfg->pdev->dev,
  2448. "IOA dump short data transfer timeout\n");
  2449. return -EIO;
  2450. }
  2451. /* Read data from mailbox and increment destination pointer */
  2452. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2453. dest++;
  2454. /* For all but the last word of data, signal data received */
  2455. if (i < (length_in_words - 1)) {
  2456. /* Signal dump data received - Clear IO debug Ack */
  2457. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2458. ioa_cfg->regs.clr_interrupt_reg);
  2459. }
  2460. }
  2461. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2462. writel(IPR_UPROCI_RESET_ALERT,
  2463. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2464. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2465. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2466. /* Signal dump data received - Clear IO debug Ack */
  2467. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2468. ioa_cfg->regs.clr_interrupt_reg);
  2469. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2470. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2471. temp_pcii_reg =
  2472. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2473. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2474. return 0;
  2475. udelay(10);
  2476. delay += 10;
  2477. }
  2478. return 0;
  2479. }
  2480. #ifdef CONFIG_SCSI_IPR_DUMP
  2481. /**
  2482. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2483. * @ioa_cfg: ioa config struct
  2484. * @pci_address: adapter address
  2485. * @length: length of data to copy
  2486. *
  2487. * Copy data from PCI adapter to kernel buffer.
  2488. * Note: length MUST be a 4 byte multiple
  2489. * Return value:
  2490. * 0 on success / other on failure
  2491. **/
  2492. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2493. unsigned long pci_address, u32 length)
  2494. {
  2495. int bytes_copied = 0;
  2496. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2497. __be32 *page;
  2498. unsigned long lock_flags = 0;
  2499. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2500. if (ioa_cfg->sis64)
  2501. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2502. else
  2503. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2504. while (bytes_copied < length &&
  2505. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2506. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2507. ioa_dump->page_offset == 0) {
  2508. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2509. if (!page) {
  2510. ipr_trace;
  2511. return bytes_copied;
  2512. }
  2513. ioa_dump->page_offset = 0;
  2514. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2515. ioa_dump->next_page_index++;
  2516. } else
  2517. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2518. rem_len = length - bytes_copied;
  2519. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2520. cur_len = min(rem_len, rem_page_len);
  2521. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2522. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2523. rc = -EIO;
  2524. } else {
  2525. rc = ipr_get_ldump_data_section(ioa_cfg,
  2526. pci_address + bytes_copied,
  2527. &page[ioa_dump->page_offset / 4],
  2528. (cur_len / sizeof(u32)));
  2529. }
  2530. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2531. if (!rc) {
  2532. ioa_dump->page_offset += cur_len;
  2533. bytes_copied += cur_len;
  2534. } else {
  2535. ipr_trace;
  2536. break;
  2537. }
  2538. schedule();
  2539. }
  2540. return bytes_copied;
  2541. }
  2542. /**
  2543. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2544. * @hdr: dump entry header struct
  2545. *
  2546. * Return value:
  2547. * nothing
  2548. **/
  2549. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2550. {
  2551. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2552. hdr->num_elems = 1;
  2553. hdr->offset = sizeof(*hdr);
  2554. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2555. }
  2556. /**
  2557. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2558. * @ioa_cfg: ioa config struct
  2559. * @driver_dump: driver dump struct
  2560. *
  2561. * Return value:
  2562. * nothing
  2563. **/
  2564. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2565. struct ipr_driver_dump *driver_dump)
  2566. {
  2567. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2568. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2569. driver_dump->ioa_type_entry.hdr.len =
  2570. sizeof(struct ipr_dump_ioa_type_entry) -
  2571. sizeof(struct ipr_dump_entry_header);
  2572. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2573. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2574. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2575. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2576. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2577. ucode_vpd->minor_release[1];
  2578. driver_dump->hdr.num_entries++;
  2579. }
  2580. /**
  2581. * ipr_dump_version_data - Fill in the driver version in the dump.
  2582. * @ioa_cfg: ioa config struct
  2583. * @driver_dump: driver dump struct
  2584. *
  2585. * Return value:
  2586. * nothing
  2587. **/
  2588. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2589. struct ipr_driver_dump *driver_dump)
  2590. {
  2591. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2592. driver_dump->version_entry.hdr.len =
  2593. sizeof(struct ipr_dump_version_entry) -
  2594. sizeof(struct ipr_dump_entry_header);
  2595. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2596. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2597. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2598. driver_dump->hdr.num_entries++;
  2599. }
  2600. /**
  2601. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2602. * @ioa_cfg: ioa config struct
  2603. * @driver_dump: driver dump struct
  2604. *
  2605. * Return value:
  2606. * nothing
  2607. **/
  2608. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2609. struct ipr_driver_dump *driver_dump)
  2610. {
  2611. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2612. driver_dump->trace_entry.hdr.len =
  2613. sizeof(struct ipr_dump_trace_entry) -
  2614. sizeof(struct ipr_dump_entry_header);
  2615. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2616. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2617. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2618. driver_dump->hdr.num_entries++;
  2619. }
  2620. /**
  2621. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2622. * @ioa_cfg: ioa config struct
  2623. * @driver_dump: driver dump struct
  2624. *
  2625. * Return value:
  2626. * nothing
  2627. **/
  2628. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2629. struct ipr_driver_dump *driver_dump)
  2630. {
  2631. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2632. driver_dump->location_entry.hdr.len =
  2633. sizeof(struct ipr_dump_location_entry) -
  2634. sizeof(struct ipr_dump_entry_header);
  2635. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2636. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2637. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2638. driver_dump->hdr.num_entries++;
  2639. }
  2640. /**
  2641. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2642. * @ioa_cfg: ioa config struct
  2643. * @dump: dump struct
  2644. *
  2645. * Return value:
  2646. * nothing
  2647. **/
  2648. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2649. {
  2650. unsigned long start_addr, sdt_word;
  2651. unsigned long lock_flags = 0;
  2652. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2653. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2654. u32 num_entries, max_num_entries, start_off, end_off;
  2655. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2656. struct ipr_sdt *sdt;
  2657. int valid = 1;
  2658. int i;
  2659. ENTER;
  2660. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2661. if (ioa_cfg->sdt_state != READ_DUMP) {
  2662. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2663. return;
  2664. }
  2665. if (ioa_cfg->sis64) {
  2666. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2667. ssleep(IPR_DUMP_DELAY_SECONDS);
  2668. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2669. }
  2670. start_addr = readl(ioa_cfg->ioa_mailbox);
  2671. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2672. dev_err(&ioa_cfg->pdev->dev,
  2673. "Invalid dump table format: %lx\n", start_addr);
  2674. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2675. return;
  2676. }
  2677. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2678. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2679. /* Initialize the overall dump header */
  2680. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2681. driver_dump->hdr.num_entries = 1;
  2682. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2683. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2684. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2685. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2686. ipr_dump_version_data(ioa_cfg, driver_dump);
  2687. ipr_dump_location_data(ioa_cfg, driver_dump);
  2688. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2689. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2690. /* Update dump_header */
  2691. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2692. /* IOA Dump entry */
  2693. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2694. ioa_dump->hdr.len = 0;
  2695. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2696. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2697. /* First entries in sdt are actually a list of dump addresses and
  2698. lengths to gather the real dump data. sdt represents the pointer
  2699. to the ioa generated dump table. Dump data will be extracted based
  2700. on entries in this table */
  2701. sdt = &ioa_dump->sdt;
  2702. if (ioa_cfg->sis64) {
  2703. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2704. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2705. } else {
  2706. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2707. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2708. }
  2709. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2710. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2711. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2712. bytes_to_copy / sizeof(__be32));
  2713. /* Smart Dump table is ready to use and the first entry is valid */
  2714. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2715. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2716. dev_err(&ioa_cfg->pdev->dev,
  2717. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2718. rc, be32_to_cpu(sdt->hdr.state));
  2719. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2720. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2721. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2722. return;
  2723. }
  2724. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2725. if (num_entries > max_num_entries)
  2726. num_entries = max_num_entries;
  2727. /* Update dump length to the actual data to be copied */
  2728. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2729. if (ioa_cfg->sis64)
  2730. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2731. else
  2732. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2733. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2734. for (i = 0; i < num_entries; i++) {
  2735. if (ioa_dump->hdr.len > max_dump_size) {
  2736. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2737. break;
  2738. }
  2739. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2740. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2741. if (ioa_cfg->sis64)
  2742. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2743. else {
  2744. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2745. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2746. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2747. bytes_to_copy = end_off - start_off;
  2748. else
  2749. valid = 0;
  2750. }
  2751. if (valid) {
  2752. if (bytes_to_copy > max_dump_size) {
  2753. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2754. continue;
  2755. }
  2756. /* Copy data from adapter to driver buffers */
  2757. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2758. bytes_to_copy);
  2759. ioa_dump->hdr.len += bytes_copied;
  2760. if (bytes_copied != bytes_to_copy) {
  2761. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2762. break;
  2763. }
  2764. }
  2765. }
  2766. }
  2767. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2768. /* Update dump_header */
  2769. driver_dump->hdr.len += ioa_dump->hdr.len;
  2770. wmb();
  2771. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2772. LEAVE;
  2773. }
  2774. #else
  2775. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
  2776. #endif
  2777. /**
  2778. * ipr_release_dump - Free adapter dump memory
  2779. * @kref: kref struct
  2780. *
  2781. * Return value:
  2782. * nothing
  2783. **/
  2784. static void ipr_release_dump(struct kref *kref)
  2785. {
  2786. struct ipr_dump *dump = container_of(kref, struct ipr_dump, kref);
  2787. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2788. unsigned long lock_flags = 0;
  2789. int i;
  2790. ENTER;
  2791. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2792. ioa_cfg->dump = NULL;
  2793. ioa_cfg->sdt_state = INACTIVE;
  2794. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2795. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2796. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2797. vfree(dump->ioa_dump.ioa_data);
  2798. kfree(dump);
  2799. LEAVE;
  2800. }
  2801. /**
  2802. * ipr_worker_thread - Worker thread
  2803. * @work: ioa config struct
  2804. *
  2805. * Called at task level from a work thread. This function takes care
  2806. * of adding and removing device from the mid-layer as configuration
  2807. * changes are detected by the adapter.
  2808. *
  2809. * Return value:
  2810. * nothing
  2811. **/
  2812. static void ipr_worker_thread(struct work_struct *work)
  2813. {
  2814. unsigned long lock_flags;
  2815. struct ipr_resource_entry *res;
  2816. struct scsi_device *sdev;
  2817. struct ipr_dump *dump;
  2818. struct ipr_ioa_cfg *ioa_cfg =
  2819. container_of(work, struct ipr_ioa_cfg, work_q);
  2820. u8 bus, target, lun;
  2821. int did_work;
  2822. ENTER;
  2823. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2824. if (ioa_cfg->sdt_state == READ_DUMP) {
  2825. dump = ioa_cfg->dump;
  2826. if (!dump) {
  2827. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2828. return;
  2829. }
  2830. kref_get(&dump->kref);
  2831. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2832. ipr_get_ioa_dump(ioa_cfg, dump);
  2833. kref_put(&dump->kref, ipr_release_dump);
  2834. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2835. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  2836. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2837. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2838. return;
  2839. }
  2840. restart:
  2841. do {
  2842. did_work = 0;
  2843. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
  2844. !ioa_cfg->allow_ml_add_del) {
  2845. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2846. return;
  2847. }
  2848. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2849. if (res->del_from_ml && res->sdev) {
  2850. did_work = 1;
  2851. sdev = res->sdev;
  2852. if (!scsi_device_get(sdev)) {
  2853. if (!res->add_to_ml)
  2854. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2855. else
  2856. res->del_from_ml = 0;
  2857. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2858. scsi_remove_device(sdev);
  2859. scsi_device_put(sdev);
  2860. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2861. }
  2862. break;
  2863. }
  2864. }
  2865. } while (did_work);
  2866. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2867. if (res->add_to_ml) {
  2868. bus = res->bus;
  2869. target = res->target;
  2870. lun = res->lun;
  2871. res->add_to_ml = 0;
  2872. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2873. scsi_add_device(ioa_cfg->host, bus, target, lun);
  2874. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2875. goto restart;
  2876. }
  2877. }
  2878. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2879. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  2880. LEAVE;
  2881. }
  2882. #ifdef CONFIG_SCSI_IPR_TRACE
  2883. /**
  2884. * ipr_read_trace - Dump the adapter trace
  2885. * @filp: open sysfs file
  2886. * @kobj: kobject struct
  2887. * @bin_attr: bin_attribute struct
  2888. * @buf: buffer
  2889. * @off: offset
  2890. * @count: buffer size
  2891. *
  2892. * Return value:
  2893. * number of bytes printed to buffer
  2894. **/
  2895. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  2896. struct bin_attribute *bin_attr,
  2897. char *buf, loff_t off, size_t count)
  2898. {
  2899. struct device *dev = container_of(kobj, struct device, kobj);
  2900. struct Scsi_Host *shost = class_to_shost(dev);
  2901. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2902. unsigned long lock_flags = 0;
  2903. ssize_t ret;
  2904. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2905. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  2906. IPR_TRACE_SIZE);
  2907. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2908. return ret;
  2909. }
  2910. static struct bin_attribute ipr_trace_attr = {
  2911. .attr = {
  2912. .name = "trace",
  2913. .mode = S_IRUGO,
  2914. },
  2915. .size = 0,
  2916. .read = ipr_read_trace,
  2917. };
  2918. #endif
  2919. /**
  2920. * ipr_show_fw_version - Show the firmware version
  2921. * @dev: class device struct
  2922. * @buf: buffer
  2923. *
  2924. * Return value:
  2925. * number of bytes printed to buffer
  2926. **/
  2927. static ssize_t ipr_show_fw_version(struct device *dev,
  2928. struct device_attribute *attr, char *buf)
  2929. {
  2930. struct Scsi_Host *shost = class_to_shost(dev);
  2931. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2932. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2933. unsigned long lock_flags = 0;
  2934. int len;
  2935. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2936. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  2937. ucode_vpd->major_release, ucode_vpd->card_type,
  2938. ucode_vpd->minor_release[0],
  2939. ucode_vpd->minor_release[1]);
  2940. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2941. return len;
  2942. }
  2943. static struct device_attribute ipr_fw_version_attr = {
  2944. .attr = {
  2945. .name = "fw_version",
  2946. .mode = S_IRUGO,
  2947. },
  2948. .show = ipr_show_fw_version,
  2949. };
  2950. /**
  2951. * ipr_show_log_level - Show the adapter's error logging level
  2952. * @dev: class device struct
  2953. * @buf: buffer
  2954. *
  2955. * Return value:
  2956. * number of bytes printed to buffer
  2957. **/
  2958. static ssize_t ipr_show_log_level(struct device *dev,
  2959. struct device_attribute *attr, char *buf)
  2960. {
  2961. struct Scsi_Host *shost = class_to_shost(dev);
  2962. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2963. unsigned long lock_flags = 0;
  2964. int len;
  2965. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2966. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  2967. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2968. return len;
  2969. }
  2970. /**
  2971. * ipr_store_log_level - Change the adapter's error logging level
  2972. * @dev: class device struct
  2973. * @buf: buffer
  2974. *
  2975. * Return value:
  2976. * number of bytes printed to buffer
  2977. **/
  2978. static ssize_t ipr_store_log_level(struct device *dev,
  2979. struct device_attribute *attr,
  2980. const char *buf, size_t count)
  2981. {
  2982. struct Scsi_Host *shost = class_to_shost(dev);
  2983. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2984. unsigned long lock_flags = 0;
  2985. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2986. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  2987. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2988. return strlen(buf);
  2989. }
  2990. static struct device_attribute ipr_log_level_attr = {
  2991. .attr = {
  2992. .name = "log_level",
  2993. .mode = S_IRUGO | S_IWUSR,
  2994. },
  2995. .show = ipr_show_log_level,
  2996. .store = ipr_store_log_level
  2997. };
  2998. /**
  2999. * ipr_store_diagnostics - IOA Diagnostics interface
  3000. * @dev: device struct
  3001. * @buf: buffer
  3002. * @count: buffer size
  3003. *
  3004. * This function will reset the adapter and wait a reasonable
  3005. * amount of time for any errors that the adapter might log.
  3006. *
  3007. * Return value:
  3008. * count on success / other on failure
  3009. **/
  3010. static ssize_t ipr_store_diagnostics(struct device *dev,
  3011. struct device_attribute *attr,
  3012. const char *buf, size_t count)
  3013. {
  3014. struct Scsi_Host *shost = class_to_shost(dev);
  3015. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3016. unsigned long lock_flags = 0;
  3017. int rc = count;
  3018. if (!capable(CAP_SYS_ADMIN))
  3019. return -EACCES;
  3020. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3021. while (ioa_cfg->in_reset_reload) {
  3022. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3023. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3024. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3025. }
  3026. ioa_cfg->errors_logged = 0;
  3027. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3028. if (ioa_cfg->in_reset_reload) {
  3029. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3030. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3031. /* Wait for a second for any errors to be logged */
  3032. msleep(1000);
  3033. } else {
  3034. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3035. return -EIO;
  3036. }
  3037. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3038. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  3039. rc = -EIO;
  3040. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3041. return rc;
  3042. }
  3043. static struct device_attribute ipr_diagnostics_attr = {
  3044. .attr = {
  3045. .name = "run_diagnostics",
  3046. .mode = S_IWUSR,
  3047. },
  3048. .store = ipr_store_diagnostics
  3049. };
  3050. /**
  3051. * ipr_show_adapter_state - Show the adapter's state
  3052. * @class_dev: device struct
  3053. * @buf: buffer
  3054. *
  3055. * Return value:
  3056. * number of bytes printed to buffer
  3057. **/
  3058. static ssize_t ipr_show_adapter_state(struct device *dev,
  3059. struct device_attribute *attr, char *buf)
  3060. {
  3061. struct Scsi_Host *shost = class_to_shost(dev);
  3062. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3063. unsigned long lock_flags = 0;
  3064. int len;
  3065. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3066. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  3067. len = snprintf(buf, PAGE_SIZE, "offline\n");
  3068. else
  3069. len = snprintf(buf, PAGE_SIZE, "online\n");
  3070. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3071. return len;
  3072. }
  3073. /**
  3074. * ipr_store_adapter_state - Change adapter state
  3075. * @dev: device struct
  3076. * @buf: buffer
  3077. * @count: buffer size
  3078. *
  3079. * This function will change the adapter's state.
  3080. *
  3081. * Return value:
  3082. * count on success / other on failure
  3083. **/
  3084. static ssize_t ipr_store_adapter_state(struct device *dev,
  3085. struct device_attribute *attr,
  3086. const char *buf, size_t count)
  3087. {
  3088. struct Scsi_Host *shost = class_to_shost(dev);
  3089. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3090. unsigned long lock_flags;
  3091. int result = count, i;
  3092. if (!capable(CAP_SYS_ADMIN))
  3093. return -EACCES;
  3094. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3095. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead &&
  3096. !strncmp(buf, "online", 6)) {
  3097. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  3098. spin_lock(&ioa_cfg->hrrq[i]._lock);
  3099. ioa_cfg->hrrq[i].ioa_is_dead = 0;
  3100. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  3101. }
  3102. wmb();
  3103. ioa_cfg->reset_retries = 0;
  3104. ioa_cfg->in_ioa_bringdown = 0;
  3105. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3106. }
  3107. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3108. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3109. return result;
  3110. }
  3111. static struct device_attribute ipr_ioa_state_attr = {
  3112. .attr = {
  3113. .name = "online_state",
  3114. .mode = S_IRUGO | S_IWUSR,
  3115. },
  3116. .show = ipr_show_adapter_state,
  3117. .store = ipr_store_adapter_state
  3118. };
  3119. /**
  3120. * ipr_store_reset_adapter - Reset the adapter
  3121. * @dev: device struct
  3122. * @buf: buffer
  3123. * @count: buffer size
  3124. *
  3125. * This function will reset the adapter.
  3126. *
  3127. * Return value:
  3128. * count on success / other on failure
  3129. **/
  3130. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3131. struct device_attribute *attr,
  3132. const char *buf, size_t count)
  3133. {
  3134. struct Scsi_Host *shost = class_to_shost(dev);
  3135. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3136. unsigned long lock_flags;
  3137. int result = count;
  3138. if (!capable(CAP_SYS_ADMIN))
  3139. return -EACCES;
  3140. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3141. if (!ioa_cfg->in_reset_reload)
  3142. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3143. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3144. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3145. return result;
  3146. }
  3147. static struct device_attribute ipr_ioa_reset_attr = {
  3148. .attr = {
  3149. .name = "reset_host",
  3150. .mode = S_IWUSR,
  3151. },
  3152. .store = ipr_store_reset_adapter
  3153. };
  3154. /**
  3155. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3156. * @buf_len: buffer length
  3157. *
  3158. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3159. * list to use for microcode download
  3160. *
  3161. * Return value:
  3162. * pointer to sglist / NULL on failure
  3163. **/
  3164. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3165. {
  3166. int sg_size, order, bsize_elem, num_elem, i, j;
  3167. struct ipr_sglist *sglist;
  3168. struct scatterlist *scatterlist;
  3169. struct page *page;
  3170. /* Get the minimum size per scatter/gather element */
  3171. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3172. /* Get the actual size per element */
  3173. order = get_order(sg_size);
  3174. /* Determine the actual number of bytes per element */
  3175. bsize_elem = PAGE_SIZE * (1 << order);
  3176. /* Determine the actual number of sg entries needed */
  3177. if (buf_len % bsize_elem)
  3178. num_elem = (buf_len / bsize_elem) + 1;
  3179. else
  3180. num_elem = buf_len / bsize_elem;
  3181. /* Allocate a scatter/gather list for the DMA */
  3182. sglist = kzalloc(sizeof(struct ipr_sglist) +
  3183. (sizeof(struct scatterlist) * (num_elem - 1)),
  3184. GFP_KERNEL);
  3185. if (sglist == NULL) {
  3186. ipr_trace;
  3187. return NULL;
  3188. }
  3189. scatterlist = sglist->scatterlist;
  3190. sg_init_table(scatterlist, num_elem);
  3191. sglist->order = order;
  3192. sglist->num_sg = num_elem;
  3193. /* Allocate a bunch of sg elements */
  3194. for (i = 0; i < num_elem; i++) {
  3195. page = alloc_pages(GFP_KERNEL, order);
  3196. if (!page) {
  3197. ipr_trace;
  3198. /* Free up what we already allocated */
  3199. for (j = i - 1; j >= 0; j--)
  3200. __free_pages(sg_page(&scatterlist[j]), order);
  3201. kfree(sglist);
  3202. return NULL;
  3203. }
  3204. sg_set_page(&scatterlist[i], page, 0, 0);
  3205. }
  3206. return sglist;
  3207. }
  3208. /**
  3209. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3210. * @p_dnld: scatter/gather list pointer
  3211. *
  3212. * Free a DMA'able ucode download buffer previously allocated with
  3213. * ipr_alloc_ucode_buffer
  3214. *
  3215. * Return value:
  3216. * nothing
  3217. **/
  3218. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3219. {
  3220. int i;
  3221. for (i = 0; i < sglist->num_sg; i++)
  3222. __free_pages(sg_page(&sglist->scatterlist[i]), sglist->order);
  3223. kfree(sglist);
  3224. }
  3225. /**
  3226. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3227. * @sglist: scatter/gather list pointer
  3228. * @buffer: buffer pointer
  3229. * @len: buffer length
  3230. *
  3231. * Copy a microcode image from a user buffer into a buffer allocated by
  3232. * ipr_alloc_ucode_buffer
  3233. *
  3234. * Return value:
  3235. * 0 on success / other on failure
  3236. **/
  3237. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3238. u8 *buffer, u32 len)
  3239. {
  3240. int bsize_elem, i, result = 0;
  3241. struct scatterlist *scatterlist;
  3242. void *kaddr;
  3243. /* Determine the actual number of bytes per element */
  3244. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3245. scatterlist = sglist->scatterlist;
  3246. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  3247. struct page *page = sg_page(&scatterlist[i]);
  3248. kaddr = kmap(page);
  3249. memcpy(kaddr, buffer, bsize_elem);
  3250. kunmap(page);
  3251. scatterlist[i].length = bsize_elem;
  3252. if (result != 0) {
  3253. ipr_trace;
  3254. return result;
  3255. }
  3256. }
  3257. if (len % bsize_elem) {
  3258. struct page *page = sg_page(&scatterlist[i]);
  3259. kaddr = kmap(page);
  3260. memcpy(kaddr, buffer, len % bsize_elem);
  3261. kunmap(page);
  3262. scatterlist[i].length = len % bsize_elem;
  3263. }
  3264. sglist->buffer_len = len;
  3265. return result;
  3266. }
  3267. /**
  3268. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3269. * @ipr_cmd: ipr command struct
  3270. * @sglist: scatter/gather list
  3271. *
  3272. * Builds a microcode download IOA data list (IOADL).
  3273. *
  3274. **/
  3275. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3276. struct ipr_sglist *sglist)
  3277. {
  3278. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3279. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3280. struct scatterlist *scatterlist = sglist->scatterlist;
  3281. int i;
  3282. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3283. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3284. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3285. ioarcb->ioadl_len =
  3286. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3287. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3288. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3289. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(&scatterlist[i]));
  3290. ioadl64[i].address = cpu_to_be64(sg_dma_address(&scatterlist[i]));
  3291. }
  3292. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3293. }
  3294. /**
  3295. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3296. * @ipr_cmd: ipr command struct
  3297. * @sglist: scatter/gather list
  3298. *
  3299. * Builds a microcode download IOA data list (IOADL).
  3300. *
  3301. **/
  3302. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3303. struct ipr_sglist *sglist)
  3304. {
  3305. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3306. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3307. struct scatterlist *scatterlist = sglist->scatterlist;
  3308. int i;
  3309. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3310. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3311. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3312. ioarcb->ioadl_len =
  3313. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3314. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3315. ioadl[i].flags_and_data_len =
  3316. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(&scatterlist[i]));
  3317. ioadl[i].address =
  3318. cpu_to_be32(sg_dma_address(&scatterlist[i]));
  3319. }
  3320. ioadl[i-1].flags_and_data_len |=
  3321. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3322. }
  3323. /**
  3324. * ipr_update_ioa_ucode - Update IOA's microcode
  3325. * @ioa_cfg: ioa config struct
  3326. * @sglist: scatter/gather list
  3327. *
  3328. * Initiate an adapter reset to update the IOA's microcode
  3329. *
  3330. * Return value:
  3331. * 0 on success / -EIO on failure
  3332. **/
  3333. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3334. struct ipr_sglist *sglist)
  3335. {
  3336. unsigned long lock_flags;
  3337. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3338. while (ioa_cfg->in_reset_reload) {
  3339. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3340. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3341. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3342. }
  3343. if (ioa_cfg->ucode_sglist) {
  3344. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3345. dev_err(&ioa_cfg->pdev->dev,
  3346. "Microcode download already in progress\n");
  3347. return -EIO;
  3348. }
  3349. sglist->num_dma_sg = pci_map_sg(ioa_cfg->pdev, sglist->scatterlist,
  3350. sglist->num_sg, DMA_TO_DEVICE);
  3351. if (!sglist->num_dma_sg) {
  3352. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3353. dev_err(&ioa_cfg->pdev->dev,
  3354. "Failed to map microcode download buffer!\n");
  3355. return -EIO;
  3356. }
  3357. ioa_cfg->ucode_sglist = sglist;
  3358. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3359. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3360. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3361. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3362. ioa_cfg->ucode_sglist = NULL;
  3363. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3364. return 0;
  3365. }
  3366. /**
  3367. * ipr_store_update_fw - Update the firmware on the adapter
  3368. * @class_dev: device struct
  3369. * @buf: buffer
  3370. * @count: buffer size
  3371. *
  3372. * This function will update the firmware on the adapter.
  3373. *
  3374. * Return value:
  3375. * count on success / other on failure
  3376. **/
  3377. static ssize_t ipr_store_update_fw(struct device *dev,
  3378. struct device_attribute *attr,
  3379. const char *buf, size_t count)
  3380. {
  3381. struct Scsi_Host *shost = class_to_shost(dev);
  3382. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3383. struct ipr_ucode_image_header *image_hdr;
  3384. const struct firmware *fw_entry;
  3385. struct ipr_sglist *sglist;
  3386. char fname[100];
  3387. char *src;
  3388. int len, result, dnld_size;
  3389. if (!capable(CAP_SYS_ADMIN))
  3390. return -EACCES;
  3391. len = snprintf(fname, 99, "%s", buf);
  3392. fname[len-1] = '\0';
  3393. if (request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev)) {
  3394. dev_err(&ioa_cfg->pdev->dev, "Firmware file %s not found\n", fname);
  3395. return -EIO;
  3396. }
  3397. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3398. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3399. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3400. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3401. if (!sglist) {
  3402. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3403. release_firmware(fw_entry);
  3404. return -ENOMEM;
  3405. }
  3406. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3407. if (result) {
  3408. dev_err(&ioa_cfg->pdev->dev,
  3409. "Microcode buffer copy to DMA buffer failed\n");
  3410. goto out;
  3411. }
  3412. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3413. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3414. if (!result)
  3415. result = count;
  3416. out:
  3417. ipr_free_ucode_buffer(sglist);
  3418. release_firmware(fw_entry);
  3419. return result;
  3420. }
  3421. static struct device_attribute ipr_update_fw_attr = {
  3422. .attr = {
  3423. .name = "update_fw",
  3424. .mode = S_IWUSR,
  3425. },
  3426. .store = ipr_store_update_fw
  3427. };
  3428. /**
  3429. * ipr_show_fw_type - Show the adapter's firmware type.
  3430. * @dev: class device struct
  3431. * @buf: buffer
  3432. *
  3433. * Return value:
  3434. * number of bytes printed to buffer
  3435. **/
  3436. static ssize_t ipr_show_fw_type(struct device *dev,
  3437. struct device_attribute *attr, char *buf)
  3438. {
  3439. struct Scsi_Host *shost = class_to_shost(dev);
  3440. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3441. unsigned long lock_flags = 0;
  3442. int len;
  3443. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3444. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3445. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3446. return len;
  3447. }
  3448. static struct device_attribute ipr_ioa_fw_type_attr = {
  3449. .attr = {
  3450. .name = "fw_type",
  3451. .mode = S_IRUGO,
  3452. },
  3453. .show = ipr_show_fw_type
  3454. };
  3455. static struct device_attribute *ipr_ioa_attrs[] = {
  3456. &ipr_fw_version_attr,
  3457. &ipr_log_level_attr,
  3458. &ipr_diagnostics_attr,
  3459. &ipr_ioa_state_attr,
  3460. &ipr_ioa_reset_attr,
  3461. &ipr_update_fw_attr,
  3462. &ipr_ioa_fw_type_attr,
  3463. NULL,
  3464. };
  3465. #ifdef CONFIG_SCSI_IPR_DUMP
  3466. /**
  3467. * ipr_read_dump - Dump the adapter
  3468. * @filp: open sysfs file
  3469. * @kobj: kobject struct
  3470. * @bin_attr: bin_attribute struct
  3471. * @buf: buffer
  3472. * @off: offset
  3473. * @count: buffer size
  3474. *
  3475. * Return value:
  3476. * number of bytes printed to buffer
  3477. **/
  3478. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3479. struct bin_attribute *bin_attr,
  3480. char *buf, loff_t off, size_t count)
  3481. {
  3482. struct device *cdev = container_of(kobj, struct device, kobj);
  3483. struct Scsi_Host *shost = class_to_shost(cdev);
  3484. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3485. struct ipr_dump *dump;
  3486. unsigned long lock_flags = 0;
  3487. char *src;
  3488. int len, sdt_end;
  3489. size_t rc = count;
  3490. if (!capable(CAP_SYS_ADMIN))
  3491. return -EACCES;
  3492. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3493. dump = ioa_cfg->dump;
  3494. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3495. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3496. return 0;
  3497. }
  3498. kref_get(&dump->kref);
  3499. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3500. if (off > dump->driver_dump.hdr.len) {
  3501. kref_put(&dump->kref, ipr_release_dump);
  3502. return 0;
  3503. }
  3504. if (off + count > dump->driver_dump.hdr.len) {
  3505. count = dump->driver_dump.hdr.len - off;
  3506. rc = count;
  3507. }
  3508. if (count && off < sizeof(dump->driver_dump)) {
  3509. if (off + count > sizeof(dump->driver_dump))
  3510. len = sizeof(dump->driver_dump) - off;
  3511. else
  3512. len = count;
  3513. src = (u8 *)&dump->driver_dump + off;
  3514. memcpy(buf, src, len);
  3515. buf += len;
  3516. off += len;
  3517. count -= len;
  3518. }
  3519. off -= sizeof(dump->driver_dump);
  3520. if (ioa_cfg->sis64)
  3521. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3522. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3523. sizeof(struct ipr_sdt_entry));
  3524. else
  3525. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3526. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3527. if (count && off < sdt_end) {
  3528. if (off + count > sdt_end)
  3529. len = sdt_end - off;
  3530. else
  3531. len = count;
  3532. src = (u8 *)&dump->ioa_dump + off;
  3533. memcpy(buf, src, len);
  3534. buf += len;
  3535. off += len;
  3536. count -= len;
  3537. }
  3538. off -= sdt_end;
  3539. while (count) {
  3540. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3541. len = PAGE_ALIGN(off) - off;
  3542. else
  3543. len = count;
  3544. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3545. src += off & ~PAGE_MASK;
  3546. memcpy(buf, src, len);
  3547. buf += len;
  3548. off += len;
  3549. count -= len;
  3550. }
  3551. kref_put(&dump->kref, ipr_release_dump);
  3552. return rc;
  3553. }
  3554. /**
  3555. * ipr_alloc_dump - Prepare for adapter dump
  3556. * @ioa_cfg: ioa config struct
  3557. *
  3558. * Return value:
  3559. * 0 on success / other on failure
  3560. **/
  3561. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3562. {
  3563. struct ipr_dump *dump;
  3564. __be32 **ioa_data;
  3565. unsigned long lock_flags = 0;
  3566. dump = kzalloc(sizeof(struct ipr_dump), GFP_KERNEL);
  3567. if (!dump) {
  3568. ipr_err("Dump memory allocation failed\n");
  3569. return -ENOMEM;
  3570. }
  3571. if (ioa_cfg->sis64)
  3572. ioa_data = vmalloc(IPR_FMT3_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3573. else
  3574. ioa_data = vmalloc(IPR_FMT2_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3575. if (!ioa_data) {
  3576. ipr_err("Dump memory allocation failed\n");
  3577. kfree(dump);
  3578. return -ENOMEM;
  3579. }
  3580. dump->ioa_dump.ioa_data = ioa_data;
  3581. kref_init(&dump->kref);
  3582. dump->ioa_cfg = ioa_cfg;
  3583. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3584. if (INACTIVE != ioa_cfg->sdt_state) {
  3585. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3586. vfree(dump->ioa_dump.ioa_data);
  3587. kfree(dump);
  3588. return 0;
  3589. }
  3590. ioa_cfg->dump = dump;
  3591. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3592. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead && !ioa_cfg->dump_taken) {
  3593. ioa_cfg->dump_taken = 1;
  3594. schedule_work(&ioa_cfg->work_q);
  3595. }
  3596. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3597. return 0;
  3598. }
  3599. /**
  3600. * ipr_free_dump - Free adapter dump memory
  3601. * @ioa_cfg: ioa config struct
  3602. *
  3603. * Return value:
  3604. * 0 on success / other on failure
  3605. **/
  3606. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3607. {
  3608. struct ipr_dump *dump;
  3609. unsigned long lock_flags = 0;
  3610. ENTER;
  3611. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3612. dump = ioa_cfg->dump;
  3613. if (!dump) {
  3614. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3615. return 0;
  3616. }
  3617. ioa_cfg->dump = NULL;
  3618. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3619. kref_put(&dump->kref, ipr_release_dump);
  3620. LEAVE;
  3621. return 0;
  3622. }
  3623. /**
  3624. * ipr_write_dump - Setup dump state of adapter
  3625. * @filp: open sysfs file
  3626. * @kobj: kobject struct
  3627. * @bin_attr: bin_attribute struct
  3628. * @buf: buffer
  3629. * @off: offset
  3630. * @count: buffer size
  3631. *
  3632. * Return value:
  3633. * number of bytes printed to buffer
  3634. **/
  3635. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3636. struct bin_attribute *bin_attr,
  3637. char *buf, loff_t off, size_t count)
  3638. {
  3639. struct device *cdev = container_of(kobj, struct device, kobj);
  3640. struct Scsi_Host *shost = class_to_shost(cdev);
  3641. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3642. int rc;
  3643. if (!capable(CAP_SYS_ADMIN))
  3644. return -EACCES;
  3645. if (buf[0] == '1')
  3646. rc = ipr_alloc_dump(ioa_cfg);
  3647. else if (buf[0] == '0')
  3648. rc = ipr_free_dump(ioa_cfg);
  3649. else
  3650. return -EINVAL;
  3651. if (rc)
  3652. return rc;
  3653. else
  3654. return count;
  3655. }
  3656. static struct bin_attribute ipr_dump_attr = {
  3657. .attr = {
  3658. .name = "dump",
  3659. .mode = S_IRUSR | S_IWUSR,
  3660. },
  3661. .size = 0,
  3662. .read = ipr_read_dump,
  3663. .write = ipr_write_dump
  3664. };
  3665. #else
  3666. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3667. #endif
  3668. /**
  3669. * ipr_change_queue_depth - Change the device's queue depth
  3670. * @sdev: scsi device struct
  3671. * @qdepth: depth to set
  3672. * @reason: calling context
  3673. *
  3674. * Return value:
  3675. * actual depth set
  3676. **/
  3677. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth,
  3678. int reason)
  3679. {
  3680. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3681. struct ipr_resource_entry *res;
  3682. unsigned long lock_flags = 0;
  3683. if (reason != SCSI_QDEPTH_DEFAULT)
  3684. return -EOPNOTSUPP;
  3685. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3686. res = (struct ipr_resource_entry *)sdev->hostdata;
  3687. if (res && ipr_is_gata(res) && qdepth > IPR_MAX_CMD_PER_ATA_LUN)
  3688. qdepth = IPR_MAX_CMD_PER_ATA_LUN;
  3689. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3690. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  3691. return sdev->queue_depth;
  3692. }
  3693. /**
  3694. * ipr_change_queue_type - Change the device's queue type
  3695. * @dsev: scsi device struct
  3696. * @tag_type: type of tags to use
  3697. *
  3698. * Return value:
  3699. * actual queue type set
  3700. **/
  3701. static int ipr_change_queue_type(struct scsi_device *sdev, int tag_type)
  3702. {
  3703. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3704. struct ipr_resource_entry *res;
  3705. unsigned long lock_flags = 0;
  3706. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3707. res = (struct ipr_resource_entry *)sdev->hostdata;
  3708. if (res) {
  3709. if (ipr_is_gscsi(res) && sdev->tagged_supported) {
  3710. /*
  3711. * We don't bother quiescing the device here since the
  3712. * adapter firmware does it for us.
  3713. */
  3714. scsi_set_tag_type(sdev, tag_type);
  3715. if (tag_type)
  3716. scsi_activate_tcq(sdev, sdev->queue_depth);
  3717. else
  3718. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  3719. } else
  3720. tag_type = 0;
  3721. } else
  3722. tag_type = 0;
  3723. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3724. return tag_type;
  3725. }
  3726. /**
  3727. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3728. * @dev: device struct
  3729. * @attr: device attribute structure
  3730. * @buf: buffer
  3731. *
  3732. * Return value:
  3733. * number of bytes printed to buffer
  3734. **/
  3735. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3736. {
  3737. struct scsi_device *sdev = to_scsi_device(dev);
  3738. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3739. struct ipr_resource_entry *res;
  3740. unsigned long lock_flags = 0;
  3741. ssize_t len = -ENXIO;
  3742. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3743. res = (struct ipr_resource_entry *)sdev->hostdata;
  3744. if (res)
  3745. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3746. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3747. return len;
  3748. }
  3749. static struct device_attribute ipr_adapter_handle_attr = {
  3750. .attr = {
  3751. .name = "adapter_handle",
  3752. .mode = S_IRUSR,
  3753. },
  3754. .show = ipr_show_adapter_handle
  3755. };
  3756. /**
  3757. * ipr_show_resource_path - Show the resource path or the resource address for
  3758. * this device.
  3759. * @dev: device struct
  3760. * @attr: device attribute structure
  3761. * @buf: buffer
  3762. *
  3763. * Return value:
  3764. * number of bytes printed to buffer
  3765. **/
  3766. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  3767. {
  3768. struct scsi_device *sdev = to_scsi_device(dev);
  3769. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3770. struct ipr_resource_entry *res;
  3771. unsigned long lock_flags = 0;
  3772. ssize_t len = -ENXIO;
  3773. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3774. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3775. res = (struct ipr_resource_entry *)sdev->hostdata;
  3776. if (res && ioa_cfg->sis64)
  3777. len = snprintf(buf, PAGE_SIZE, "%s\n",
  3778. __ipr_format_res_path(res->res_path, buffer,
  3779. sizeof(buffer)));
  3780. else if (res)
  3781. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  3782. res->bus, res->target, res->lun);
  3783. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3784. return len;
  3785. }
  3786. static struct device_attribute ipr_resource_path_attr = {
  3787. .attr = {
  3788. .name = "resource_path",
  3789. .mode = S_IRUGO,
  3790. },
  3791. .show = ipr_show_resource_path
  3792. };
  3793. /**
  3794. * ipr_show_device_id - Show the device_id for this device.
  3795. * @dev: device struct
  3796. * @attr: device attribute structure
  3797. * @buf: buffer
  3798. *
  3799. * Return value:
  3800. * number of bytes printed to buffer
  3801. **/
  3802. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  3803. {
  3804. struct scsi_device *sdev = to_scsi_device(dev);
  3805. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3806. struct ipr_resource_entry *res;
  3807. unsigned long lock_flags = 0;
  3808. ssize_t len = -ENXIO;
  3809. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3810. res = (struct ipr_resource_entry *)sdev->hostdata;
  3811. if (res && ioa_cfg->sis64)
  3812. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->dev_id);
  3813. else if (res)
  3814. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  3815. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3816. return len;
  3817. }
  3818. static struct device_attribute ipr_device_id_attr = {
  3819. .attr = {
  3820. .name = "device_id",
  3821. .mode = S_IRUGO,
  3822. },
  3823. .show = ipr_show_device_id
  3824. };
  3825. /**
  3826. * ipr_show_resource_type - Show the resource type for this device.
  3827. * @dev: device struct
  3828. * @attr: device attribute structure
  3829. * @buf: buffer
  3830. *
  3831. * Return value:
  3832. * number of bytes printed to buffer
  3833. **/
  3834. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  3835. {
  3836. struct scsi_device *sdev = to_scsi_device(dev);
  3837. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3838. struct ipr_resource_entry *res;
  3839. unsigned long lock_flags = 0;
  3840. ssize_t len = -ENXIO;
  3841. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3842. res = (struct ipr_resource_entry *)sdev->hostdata;
  3843. if (res)
  3844. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  3845. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3846. return len;
  3847. }
  3848. static struct device_attribute ipr_resource_type_attr = {
  3849. .attr = {
  3850. .name = "resource_type",
  3851. .mode = S_IRUGO,
  3852. },
  3853. .show = ipr_show_resource_type
  3854. };
  3855. static struct device_attribute *ipr_dev_attrs[] = {
  3856. &ipr_adapter_handle_attr,
  3857. &ipr_resource_path_attr,
  3858. &ipr_device_id_attr,
  3859. &ipr_resource_type_attr,
  3860. NULL,
  3861. };
  3862. /**
  3863. * ipr_biosparam - Return the HSC mapping
  3864. * @sdev: scsi device struct
  3865. * @block_device: block device pointer
  3866. * @capacity: capacity of the device
  3867. * @parm: Array containing returned HSC values.
  3868. *
  3869. * This function generates the HSC parms that fdisk uses.
  3870. * We want to make sure we return something that places partitions
  3871. * on 4k boundaries for best performance with the IOA.
  3872. *
  3873. * Return value:
  3874. * 0 on success
  3875. **/
  3876. static int ipr_biosparam(struct scsi_device *sdev,
  3877. struct block_device *block_device,
  3878. sector_t capacity, int *parm)
  3879. {
  3880. int heads, sectors;
  3881. sector_t cylinders;
  3882. heads = 128;
  3883. sectors = 32;
  3884. cylinders = capacity;
  3885. sector_div(cylinders, (128 * 32));
  3886. /* return result */
  3887. parm[0] = heads;
  3888. parm[1] = sectors;
  3889. parm[2] = cylinders;
  3890. return 0;
  3891. }
  3892. /**
  3893. * ipr_find_starget - Find target based on bus/target.
  3894. * @starget: scsi target struct
  3895. *
  3896. * Return value:
  3897. * resource entry pointer if found / NULL if not found
  3898. **/
  3899. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  3900. {
  3901. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3902. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3903. struct ipr_resource_entry *res;
  3904. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  3905. if ((res->bus == starget->channel) &&
  3906. (res->target == starget->id)) {
  3907. return res;
  3908. }
  3909. }
  3910. return NULL;
  3911. }
  3912. static struct ata_port_info sata_port_info;
  3913. /**
  3914. * ipr_target_alloc - Prepare for commands to a SCSI target
  3915. * @starget: scsi target struct
  3916. *
  3917. * If the device is a SATA device, this function allocates an
  3918. * ATA port with libata, else it does nothing.
  3919. *
  3920. * Return value:
  3921. * 0 on success / non-0 on failure
  3922. **/
  3923. static int ipr_target_alloc(struct scsi_target *starget)
  3924. {
  3925. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3926. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3927. struct ipr_sata_port *sata_port;
  3928. struct ata_port *ap;
  3929. struct ipr_resource_entry *res;
  3930. unsigned long lock_flags;
  3931. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3932. res = ipr_find_starget(starget);
  3933. starget->hostdata = NULL;
  3934. if (res && ipr_is_gata(res)) {
  3935. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3936. sata_port = kzalloc(sizeof(*sata_port), GFP_KERNEL);
  3937. if (!sata_port)
  3938. return -ENOMEM;
  3939. ap = ata_sas_port_alloc(&ioa_cfg->ata_host, &sata_port_info, shost);
  3940. if (ap) {
  3941. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3942. sata_port->ioa_cfg = ioa_cfg;
  3943. sata_port->ap = ap;
  3944. sata_port->res = res;
  3945. res->sata_port = sata_port;
  3946. ap->private_data = sata_port;
  3947. starget->hostdata = sata_port;
  3948. } else {
  3949. kfree(sata_port);
  3950. return -ENOMEM;
  3951. }
  3952. }
  3953. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3954. return 0;
  3955. }
  3956. /**
  3957. * ipr_target_destroy - Destroy a SCSI target
  3958. * @starget: scsi target struct
  3959. *
  3960. * If the device was a SATA device, this function frees the libata
  3961. * ATA port, else it does nothing.
  3962. *
  3963. **/
  3964. static void ipr_target_destroy(struct scsi_target *starget)
  3965. {
  3966. struct ipr_sata_port *sata_port = starget->hostdata;
  3967. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3968. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3969. if (ioa_cfg->sis64) {
  3970. if (!ipr_find_starget(starget)) {
  3971. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  3972. clear_bit(starget->id, ioa_cfg->array_ids);
  3973. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  3974. clear_bit(starget->id, ioa_cfg->vset_ids);
  3975. else if (starget->channel == 0)
  3976. clear_bit(starget->id, ioa_cfg->target_ids);
  3977. }
  3978. }
  3979. if (sata_port) {
  3980. starget->hostdata = NULL;
  3981. ata_sas_port_destroy(sata_port->ap);
  3982. kfree(sata_port);
  3983. }
  3984. }
  3985. /**
  3986. * ipr_find_sdev - Find device based on bus/target/lun.
  3987. * @sdev: scsi device struct
  3988. *
  3989. * Return value:
  3990. * resource entry pointer if found / NULL if not found
  3991. **/
  3992. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  3993. {
  3994. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  3995. struct ipr_resource_entry *res;
  3996. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  3997. if ((res->bus == sdev->channel) &&
  3998. (res->target == sdev->id) &&
  3999. (res->lun == sdev->lun))
  4000. return res;
  4001. }
  4002. return NULL;
  4003. }
  4004. /**
  4005. * ipr_slave_destroy - Unconfigure a SCSI device
  4006. * @sdev: scsi device struct
  4007. *
  4008. * Return value:
  4009. * nothing
  4010. **/
  4011. static void ipr_slave_destroy(struct scsi_device *sdev)
  4012. {
  4013. struct ipr_resource_entry *res;
  4014. struct ipr_ioa_cfg *ioa_cfg;
  4015. unsigned long lock_flags = 0;
  4016. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4017. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4018. res = (struct ipr_resource_entry *) sdev->hostdata;
  4019. if (res) {
  4020. if (res->sata_port)
  4021. res->sata_port->ap->link.device[0].class = ATA_DEV_NONE;
  4022. sdev->hostdata = NULL;
  4023. res->sdev = NULL;
  4024. res->sata_port = NULL;
  4025. }
  4026. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4027. }
  4028. /**
  4029. * ipr_slave_configure - Configure a SCSI device
  4030. * @sdev: scsi device struct
  4031. *
  4032. * This function configures the specified scsi device.
  4033. *
  4034. * Return value:
  4035. * 0 on success
  4036. **/
  4037. static int ipr_slave_configure(struct scsi_device *sdev)
  4038. {
  4039. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4040. struct ipr_resource_entry *res;
  4041. struct ata_port *ap = NULL;
  4042. unsigned long lock_flags = 0;
  4043. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4044. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4045. res = sdev->hostdata;
  4046. if (res) {
  4047. if (ipr_is_af_dasd_device(res))
  4048. sdev->type = TYPE_RAID;
  4049. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  4050. sdev->scsi_level = 4;
  4051. sdev->no_uld_attach = 1;
  4052. }
  4053. if (ipr_is_vset_device(res)) {
  4054. blk_queue_rq_timeout(sdev->request_queue,
  4055. IPR_VSET_RW_TIMEOUT);
  4056. blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS);
  4057. }
  4058. if (ipr_is_gata(res) && res->sata_port)
  4059. ap = res->sata_port->ap;
  4060. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4061. if (ap) {
  4062. scsi_adjust_queue_depth(sdev, 0, IPR_MAX_CMD_PER_ATA_LUN);
  4063. ata_sas_slave_configure(sdev, ap);
  4064. } else
  4065. scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
  4066. if (ioa_cfg->sis64)
  4067. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  4068. ipr_format_res_path(ioa_cfg,
  4069. res->res_path, buffer, sizeof(buffer)));
  4070. return 0;
  4071. }
  4072. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4073. return 0;
  4074. }
  4075. /**
  4076. * ipr_ata_slave_alloc - Prepare for commands to a SATA device
  4077. * @sdev: scsi device struct
  4078. *
  4079. * This function initializes an ATA port so that future commands
  4080. * sent through queuecommand will work.
  4081. *
  4082. * Return value:
  4083. * 0 on success
  4084. **/
  4085. static int ipr_ata_slave_alloc(struct scsi_device *sdev)
  4086. {
  4087. struct ipr_sata_port *sata_port = NULL;
  4088. int rc = -ENXIO;
  4089. ENTER;
  4090. if (sdev->sdev_target)
  4091. sata_port = sdev->sdev_target->hostdata;
  4092. if (sata_port) {
  4093. rc = ata_sas_port_init(sata_port->ap);
  4094. if (rc == 0)
  4095. rc = ata_sas_sync_probe(sata_port->ap);
  4096. }
  4097. if (rc)
  4098. ipr_slave_destroy(sdev);
  4099. LEAVE;
  4100. return rc;
  4101. }
  4102. /**
  4103. * ipr_slave_alloc - Prepare for commands to a device.
  4104. * @sdev: scsi device struct
  4105. *
  4106. * This function saves a pointer to the resource entry
  4107. * in the scsi device struct if the device exists. We
  4108. * can then use this pointer in ipr_queuecommand when
  4109. * handling new commands.
  4110. *
  4111. * Return value:
  4112. * 0 on success / -ENXIO if device does not exist
  4113. **/
  4114. static int ipr_slave_alloc(struct scsi_device *sdev)
  4115. {
  4116. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4117. struct ipr_resource_entry *res;
  4118. unsigned long lock_flags;
  4119. int rc = -ENXIO;
  4120. sdev->hostdata = NULL;
  4121. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4122. res = ipr_find_sdev(sdev);
  4123. if (res) {
  4124. res->sdev = sdev;
  4125. res->add_to_ml = 0;
  4126. res->in_erp = 0;
  4127. sdev->hostdata = res;
  4128. if (!ipr_is_naca_model(res))
  4129. res->needs_sync_complete = 1;
  4130. rc = 0;
  4131. if (ipr_is_gata(res)) {
  4132. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4133. return ipr_ata_slave_alloc(sdev);
  4134. }
  4135. }
  4136. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4137. return rc;
  4138. }
  4139. /**
  4140. * ipr_eh_host_reset - Reset the host adapter
  4141. * @scsi_cmd: scsi command struct
  4142. *
  4143. * Return value:
  4144. * SUCCESS / FAILED
  4145. **/
  4146. static int __ipr_eh_host_reset(struct scsi_cmnd *scsi_cmd)
  4147. {
  4148. struct ipr_ioa_cfg *ioa_cfg;
  4149. int rc;
  4150. ENTER;
  4151. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4152. if (!ioa_cfg->in_reset_reload) {
  4153. dev_err(&ioa_cfg->pdev->dev,
  4154. "Adapter being reset as a result of error recovery.\n");
  4155. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4156. ioa_cfg->sdt_state = GET_DUMP;
  4157. }
  4158. rc = ipr_reset_reload(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4159. LEAVE;
  4160. return rc;
  4161. }
  4162. static int ipr_eh_host_reset(struct scsi_cmnd *cmd)
  4163. {
  4164. int rc;
  4165. spin_lock_irq(cmd->device->host->host_lock);
  4166. rc = __ipr_eh_host_reset(cmd);
  4167. spin_unlock_irq(cmd->device->host->host_lock);
  4168. return rc;
  4169. }
  4170. /**
  4171. * ipr_device_reset - Reset the device
  4172. * @ioa_cfg: ioa config struct
  4173. * @res: resource entry struct
  4174. *
  4175. * This function issues a device reset to the affected device.
  4176. * If the device is a SCSI device, a LUN reset will be sent
  4177. * to the device first. If that does not work, a target reset
  4178. * will be sent. If the device is a SATA device, a PHY reset will
  4179. * be sent.
  4180. *
  4181. * Return value:
  4182. * 0 on success / non-zero on failure
  4183. **/
  4184. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4185. struct ipr_resource_entry *res)
  4186. {
  4187. struct ipr_cmnd *ipr_cmd;
  4188. struct ipr_ioarcb *ioarcb;
  4189. struct ipr_cmd_pkt *cmd_pkt;
  4190. struct ipr_ioarcb_ata_regs *regs;
  4191. u32 ioasc;
  4192. ENTER;
  4193. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4194. ioarcb = &ipr_cmd->ioarcb;
  4195. cmd_pkt = &ioarcb->cmd_pkt;
  4196. if (ipr_cmd->ioa_cfg->sis64) {
  4197. regs = &ipr_cmd->i.ata_ioadl.regs;
  4198. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4199. } else
  4200. regs = &ioarcb->u.add_data.u.regs;
  4201. ioarcb->res_handle = res->res_handle;
  4202. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4203. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4204. if (ipr_is_gata(res)) {
  4205. cmd_pkt->cdb[2] = IPR_ATA_PHY_RESET;
  4206. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(regs->flags));
  4207. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  4208. }
  4209. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4210. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4211. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4212. if (ipr_is_gata(res) && res->sata_port && ioasc != IPR_IOASC_IOA_WAS_RESET) {
  4213. if (ipr_cmd->ioa_cfg->sis64)
  4214. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  4215. sizeof(struct ipr_ioasa_gata));
  4216. else
  4217. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  4218. sizeof(struct ipr_ioasa_gata));
  4219. }
  4220. LEAVE;
  4221. return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0;
  4222. }
  4223. /**
  4224. * ipr_sata_reset - Reset the SATA port
  4225. * @link: SATA link to reset
  4226. * @classes: class of the attached device
  4227. *
  4228. * This function issues a SATA phy reset to the affected ATA link.
  4229. *
  4230. * Return value:
  4231. * 0 on success / non-zero on failure
  4232. **/
  4233. static int ipr_sata_reset(struct ata_link *link, unsigned int *classes,
  4234. unsigned long deadline)
  4235. {
  4236. struct ipr_sata_port *sata_port = link->ap->private_data;
  4237. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  4238. struct ipr_resource_entry *res;
  4239. unsigned long lock_flags = 0;
  4240. int rc = -ENXIO;
  4241. ENTER;
  4242. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4243. while (ioa_cfg->in_reset_reload) {
  4244. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4245. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4246. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4247. }
  4248. res = sata_port->res;
  4249. if (res) {
  4250. rc = ipr_device_reset(ioa_cfg, res);
  4251. *classes = res->ata_class;
  4252. }
  4253. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4254. LEAVE;
  4255. return rc;
  4256. }
  4257. /**
  4258. * ipr_eh_dev_reset - Reset the device
  4259. * @scsi_cmd: scsi command struct
  4260. *
  4261. * This function issues a device reset to the affected device.
  4262. * A LUN reset will be sent to the device first. If that does
  4263. * not work, a target reset will be sent.
  4264. *
  4265. * Return value:
  4266. * SUCCESS / FAILED
  4267. **/
  4268. static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd)
  4269. {
  4270. struct ipr_cmnd *ipr_cmd;
  4271. struct ipr_ioa_cfg *ioa_cfg;
  4272. struct ipr_resource_entry *res;
  4273. struct ata_port *ap;
  4274. int rc = 0;
  4275. struct ipr_hrr_queue *hrrq;
  4276. ENTER;
  4277. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4278. res = scsi_cmd->device->hostdata;
  4279. if (!res)
  4280. return FAILED;
  4281. /*
  4282. * If we are currently going through reset/reload, return failed. This will force the
  4283. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4284. * reset to complete
  4285. */
  4286. if (ioa_cfg->in_reset_reload)
  4287. return FAILED;
  4288. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4289. return FAILED;
  4290. for_each_hrrq(hrrq, ioa_cfg) {
  4291. spin_lock(&hrrq->_lock);
  4292. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4293. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4294. if (ipr_cmd->scsi_cmd)
  4295. ipr_cmd->done = ipr_scsi_eh_done;
  4296. if (ipr_cmd->qc)
  4297. ipr_cmd->done = ipr_sata_eh_done;
  4298. if (ipr_cmd->qc &&
  4299. !(ipr_cmd->qc->flags & ATA_QCFLAG_FAILED)) {
  4300. ipr_cmd->qc->err_mask |= AC_ERR_TIMEOUT;
  4301. ipr_cmd->qc->flags |= ATA_QCFLAG_FAILED;
  4302. }
  4303. }
  4304. }
  4305. spin_unlock(&hrrq->_lock);
  4306. }
  4307. res->resetting_device = 1;
  4308. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4309. if (ipr_is_gata(res) && res->sata_port) {
  4310. ap = res->sata_port->ap;
  4311. spin_unlock_irq(scsi_cmd->device->host->host_lock);
  4312. ata_std_error_handler(ap);
  4313. spin_lock_irq(scsi_cmd->device->host->host_lock);
  4314. for_each_hrrq(hrrq, ioa_cfg) {
  4315. spin_lock(&hrrq->_lock);
  4316. list_for_each_entry(ipr_cmd,
  4317. &hrrq->hrrq_pending_q, queue) {
  4318. if (ipr_cmd->ioarcb.res_handle ==
  4319. res->res_handle) {
  4320. rc = -EIO;
  4321. break;
  4322. }
  4323. }
  4324. spin_unlock(&hrrq->_lock);
  4325. }
  4326. } else
  4327. rc = ipr_device_reset(ioa_cfg, res);
  4328. res->resetting_device = 0;
  4329. LEAVE;
  4330. return rc ? FAILED : SUCCESS;
  4331. }
  4332. static int ipr_eh_dev_reset(struct scsi_cmnd *cmd)
  4333. {
  4334. int rc;
  4335. spin_lock_irq(cmd->device->host->host_lock);
  4336. rc = __ipr_eh_dev_reset(cmd);
  4337. spin_unlock_irq(cmd->device->host->host_lock);
  4338. return rc;
  4339. }
  4340. /**
  4341. * ipr_bus_reset_done - Op done function for bus reset.
  4342. * @ipr_cmd: ipr command struct
  4343. *
  4344. * This function is the op done function for a bus reset
  4345. *
  4346. * Return value:
  4347. * none
  4348. **/
  4349. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4350. {
  4351. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4352. struct ipr_resource_entry *res;
  4353. ENTER;
  4354. if (!ioa_cfg->sis64)
  4355. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4356. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4357. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4358. break;
  4359. }
  4360. }
  4361. /*
  4362. * If abort has not completed, indicate the reset has, else call the
  4363. * abort's done function to wake the sleeping eh thread
  4364. */
  4365. if (ipr_cmd->sibling->sibling)
  4366. ipr_cmd->sibling->sibling = NULL;
  4367. else
  4368. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4369. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4370. LEAVE;
  4371. }
  4372. /**
  4373. * ipr_abort_timeout - An abort task has timed out
  4374. * @ipr_cmd: ipr command struct
  4375. *
  4376. * This function handles when an abort task times out. If this
  4377. * happens we issue a bus reset since we have resources tied
  4378. * up that must be freed before returning to the midlayer.
  4379. *
  4380. * Return value:
  4381. * none
  4382. **/
  4383. static void ipr_abort_timeout(struct ipr_cmnd *ipr_cmd)
  4384. {
  4385. struct ipr_cmnd *reset_cmd;
  4386. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4387. struct ipr_cmd_pkt *cmd_pkt;
  4388. unsigned long lock_flags = 0;
  4389. ENTER;
  4390. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4391. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4392. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4393. return;
  4394. }
  4395. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4396. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4397. ipr_cmd->sibling = reset_cmd;
  4398. reset_cmd->sibling = ipr_cmd;
  4399. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4400. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4401. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4402. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4403. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4404. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4405. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4406. LEAVE;
  4407. }
  4408. /**
  4409. * ipr_cancel_op - Cancel specified op
  4410. * @scsi_cmd: scsi command struct
  4411. *
  4412. * This function cancels specified op.
  4413. *
  4414. * Return value:
  4415. * SUCCESS / FAILED
  4416. **/
  4417. static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
  4418. {
  4419. struct ipr_cmnd *ipr_cmd;
  4420. struct ipr_ioa_cfg *ioa_cfg;
  4421. struct ipr_resource_entry *res;
  4422. struct ipr_cmd_pkt *cmd_pkt;
  4423. u32 ioasc, int_reg;
  4424. int op_found = 0;
  4425. struct ipr_hrr_queue *hrrq;
  4426. ENTER;
  4427. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4428. res = scsi_cmd->device->hostdata;
  4429. /* If we are currently going through reset/reload, return failed.
  4430. * This will force the mid-layer to call ipr_eh_host_reset,
  4431. * which will then go to sleep and wait for the reset to complete
  4432. */
  4433. if (ioa_cfg->in_reset_reload ||
  4434. ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4435. return FAILED;
  4436. if (!res)
  4437. return FAILED;
  4438. /*
  4439. * If we are aborting a timed out op, chances are that the timeout was caused
  4440. * by a still not detected EEH error. In such cases, reading a register will
  4441. * trigger the EEH recovery infrastructure.
  4442. */
  4443. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4444. if (!ipr_is_gscsi(res))
  4445. return FAILED;
  4446. for_each_hrrq(hrrq, ioa_cfg) {
  4447. spin_lock(&hrrq->_lock);
  4448. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4449. if (ipr_cmd->scsi_cmd == scsi_cmd) {
  4450. ipr_cmd->done = ipr_scsi_eh_done;
  4451. op_found = 1;
  4452. break;
  4453. }
  4454. }
  4455. spin_unlock(&hrrq->_lock);
  4456. }
  4457. if (!op_found)
  4458. return SUCCESS;
  4459. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4460. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4461. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4462. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4463. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4464. ipr_cmd->u.sdev = scsi_cmd->device;
  4465. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4466. scsi_cmd->cmnd[0]);
  4467. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4468. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4469. /*
  4470. * If the abort task timed out and we sent a bus reset, we will get
  4471. * one the following responses to the abort
  4472. */
  4473. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4474. ioasc = 0;
  4475. ipr_trace;
  4476. }
  4477. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  4478. if (!ipr_is_naca_model(res))
  4479. res->needs_sync_complete = 1;
  4480. LEAVE;
  4481. return IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  4482. }
  4483. /**
  4484. * ipr_eh_abort - Abort a single op
  4485. * @scsi_cmd: scsi command struct
  4486. *
  4487. * Return value:
  4488. * SUCCESS / FAILED
  4489. **/
  4490. static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd)
  4491. {
  4492. unsigned long flags;
  4493. int rc;
  4494. ENTER;
  4495. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4496. rc = ipr_cancel_op(scsi_cmd);
  4497. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4498. LEAVE;
  4499. return rc;
  4500. }
  4501. /**
  4502. * ipr_handle_other_interrupt - Handle "other" interrupts
  4503. * @ioa_cfg: ioa config struct
  4504. * @int_reg: interrupt register
  4505. *
  4506. * Return value:
  4507. * IRQ_NONE / IRQ_HANDLED
  4508. **/
  4509. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4510. u32 int_reg)
  4511. {
  4512. irqreturn_t rc = IRQ_HANDLED;
  4513. u32 int_mask_reg;
  4514. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4515. int_reg &= ~int_mask_reg;
  4516. /* If an interrupt on the adapter did not occur, ignore it.
  4517. * Or in the case of SIS 64, check for a stage change interrupt.
  4518. */
  4519. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4520. if (ioa_cfg->sis64) {
  4521. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4522. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4523. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4524. /* clear stage change */
  4525. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4526. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4527. list_del(&ioa_cfg->reset_cmd->queue);
  4528. del_timer(&ioa_cfg->reset_cmd->timer);
  4529. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4530. return IRQ_HANDLED;
  4531. }
  4532. }
  4533. return IRQ_NONE;
  4534. }
  4535. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4536. /* Mask the interrupt */
  4537. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4538. /* Clear the interrupt */
  4539. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.clr_interrupt_reg);
  4540. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4541. list_del(&ioa_cfg->reset_cmd->queue);
  4542. del_timer(&ioa_cfg->reset_cmd->timer);
  4543. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4544. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  4545. if (ioa_cfg->clear_isr) {
  4546. if (ipr_debug && printk_ratelimit())
  4547. dev_err(&ioa_cfg->pdev->dev,
  4548. "Spurious interrupt detected. 0x%08X\n", int_reg);
  4549. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4550. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4551. return IRQ_NONE;
  4552. }
  4553. } else {
  4554. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  4555. ioa_cfg->ioa_unit_checked = 1;
  4556. else if (int_reg & IPR_PCII_NO_HOST_RRQ)
  4557. dev_err(&ioa_cfg->pdev->dev,
  4558. "No Host RRQ. 0x%08X\n", int_reg);
  4559. else
  4560. dev_err(&ioa_cfg->pdev->dev,
  4561. "Permanent IOA failure. 0x%08X\n", int_reg);
  4562. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4563. ioa_cfg->sdt_state = GET_DUMP;
  4564. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  4565. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4566. }
  4567. return rc;
  4568. }
  4569. /**
  4570. * ipr_isr_eh - Interrupt service routine error handler
  4571. * @ioa_cfg: ioa config struct
  4572. * @msg: message to log
  4573. *
  4574. * Return value:
  4575. * none
  4576. **/
  4577. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg, u16 number)
  4578. {
  4579. ioa_cfg->errors_logged++;
  4580. dev_err(&ioa_cfg->pdev->dev, "%s %d\n", msg, number);
  4581. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4582. ioa_cfg->sdt_state = GET_DUMP;
  4583. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4584. }
  4585. static int __ipr_process_hrrq(struct ipr_hrr_queue *hrr_queue,
  4586. struct list_head *doneq)
  4587. {
  4588. u32 ioasc;
  4589. u16 cmd_index;
  4590. struct ipr_cmnd *ipr_cmd;
  4591. struct ipr_ioa_cfg *ioa_cfg = hrr_queue->ioa_cfg;
  4592. int num_hrrq = 0;
  4593. /* If interrupts are disabled, ignore the interrupt */
  4594. if (!hrr_queue->allow_interrupts)
  4595. return 0;
  4596. while ((be32_to_cpu(*hrr_queue->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4597. hrr_queue->toggle_bit) {
  4598. cmd_index = (be32_to_cpu(*hrr_queue->hrrq_curr) &
  4599. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >>
  4600. IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4601. if (unlikely(cmd_index > hrr_queue->max_cmd_id ||
  4602. cmd_index < hrr_queue->min_cmd_id)) {
  4603. ipr_isr_eh(ioa_cfg,
  4604. "Invalid response handle from IOA: ",
  4605. cmd_index);
  4606. break;
  4607. }
  4608. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4609. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4610. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4611. list_move_tail(&ipr_cmd->queue, doneq);
  4612. if (hrr_queue->hrrq_curr < hrr_queue->hrrq_end) {
  4613. hrr_queue->hrrq_curr++;
  4614. } else {
  4615. hrr_queue->hrrq_curr = hrr_queue->hrrq_start;
  4616. hrr_queue->toggle_bit ^= 1u;
  4617. }
  4618. num_hrrq++;
  4619. }
  4620. return num_hrrq;
  4621. }
  4622. /**
  4623. * ipr_isr - Interrupt service routine
  4624. * @irq: irq number
  4625. * @devp: pointer to ioa config struct
  4626. *
  4627. * Return value:
  4628. * IRQ_NONE / IRQ_HANDLED
  4629. **/
  4630. static irqreturn_t ipr_isr(int irq, void *devp)
  4631. {
  4632. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4633. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4634. unsigned long hrrq_flags = 0;
  4635. u32 int_reg = 0;
  4636. u32 ioasc;
  4637. u16 cmd_index;
  4638. int num_hrrq = 0;
  4639. int irq_none = 0;
  4640. struct ipr_cmnd *ipr_cmd, *temp;
  4641. irqreturn_t rc = IRQ_NONE;
  4642. LIST_HEAD(doneq);
  4643. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4644. /* If interrupts are disabled, ignore the interrupt */
  4645. if (!hrrq->allow_interrupts) {
  4646. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4647. return IRQ_NONE;
  4648. }
  4649. while (1) {
  4650. ipr_cmd = NULL;
  4651. while ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4652. hrrq->toggle_bit) {
  4653. cmd_index = (be32_to_cpu(*hrrq->hrrq_curr) &
  4654. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4655. if (unlikely(cmd_index > hrrq->max_cmd_id ||
  4656. cmd_index < hrrq->min_cmd_id)) {
  4657. ipr_isr_eh(ioa_cfg,
  4658. "Invalid response handle from IOA: ",
  4659. cmd_index);
  4660. rc = IRQ_HANDLED;
  4661. goto unlock_out;
  4662. }
  4663. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4664. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4665. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4666. list_move_tail(&ipr_cmd->queue, &doneq);
  4667. rc = IRQ_HANDLED;
  4668. if (hrrq->hrrq_curr < hrrq->hrrq_end) {
  4669. hrrq->hrrq_curr++;
  4670. } else {
  4671. hrrq->hrrq_curr = hrrq->hrrq_start;
  4672. hrrq->toggle_bit ^= 1u;
  4673. }
  4674. }
  4675. if (ipr_cmd && !ioa_cfg->clear_isr)
  4676. break;
  4677. if (ipr_cmd != NULL) {
  4678. /* Clear the PCI interrupt */
  4679. num_hrrq = 0;
  4680. do {
  4681. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4682. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4683. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  4684. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  4685. } else if (rc == IRQ_NONE && irq_none == 0) {
  4686. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4687. irq_none++;
  4688. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  4689. int_reg & IPR_PCII_HRRQ_UPDATED) {
  4690. ipr_isr_eh(ioa_cfg, "Error clearing HRRQ: ", num_hrrq);
  4691. rc = IRQ_HANDLED;
  4692. goto unlock_out;
  4693. } else
  4694. break;
  4695. }
  4696. if (unlikely(rc == IRQ_NONE))
  4697. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  4698. unlock_out:
  4699. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4700. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4701. list_del(&ipr_cmd->queue);
  4702. del_timer(&ipr_cmd->timer);
  4703. ipr_cmd->fast_done(ipr_cmd);
  4704. }
  4705. return rc;
  4706. }
  4707. /**
  4708. * ipr_isr_mhrrq - Interrupt service routine
  4709. * @irq: irq number
  4710. * @devp: pointer to ioa config struct
  4711. *
  4712. * Return value:
  4713. * IRQ_NONE / IRQ_HANDLED
  4714. **/
  4715. static irqreturn_t ipr_isr_mhrrq(int irq, void *devp)
  4716. {
  4717. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4718. unsigned long hrrq_flags = 0;
  4719. struct ipr_cmnd *ipr_cmd, *temp;
  4720. irqreturn_t rc = IRQ_NONE;
  4721. LIST_HEAD(doneq);
  4722. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4723. /* If interrupts are disabled, ignore the interrupt */
  4724. if (!hrrq->allow_interrupts) {
  4725. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4726. return IRQ_NONE;
  4727. }
  4728. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4729. hrrq->toggle_bit)
  4730. if (__ipr_process_hrrq(hrrq, &doneq))
  4731. rc = IRQ_HANDLED;
  4732. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4733. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4734. list_del(&ipr_cmd->queue);
  4735. del_timer(&ipr_cmd->timer);
  4736. ipr_cmd->fast_done(ipr_cmd);
  4737. }
  4738. return rc;
  4739. }
  4740. /**
  4741. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  4742. * @ioa_cfg: ioa config struct
  4743. * @ipr_cmd: ipr command struct
  4744. *
  4745. * Return value:
  4746. * 0 on success / -1 on failure
  4747. **/
  4748. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  4749. struct ipr_cmnd *ipr_cmd)
  4750. {
  4751. int i, nseg;
  4752. struct scatterlist *sg;
  4753. u32 length;
  4754. u32 ioadl_flags = 0;
  4755. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4756. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4757. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  4758. length = scsi_bufflen(scsi_cmd);
  4759. if (!length)
  4760. return 0;
  4761. nseg = scsi_dma_map(scsi_cmd);
  4762. if (nseg < 0) {
  4763. if (printk_ratelimit())
  4764. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4765. return -1;
  4766. }
  4767. ipr_cmd->dma_use_sg = nseg;
  4768. ioarcb->data_transfer_length = cpu_to_be32(length);
  4769. ioarcb->ioadl_len =
  4770. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  4771. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4772. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4773. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4774. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  4775. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4776. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4777. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  4778. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  4779. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  4780. }
  4781. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4782. return 0;
  4783. }
  4784. /**
  4785. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  4786. * @ioa_cfg: ioa config struct
  4787. * @ipr_cmd: ipr command struct
  4788. *
  4789. * Return value:
  4790. * 0 on success / -1 on failure
  4791. **/
  4792. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  4793. struct ipr_cmnd *ipr_cmd)
  4794. {
  4795. int i, nseg;
  4796. struct scatterlist *sg;
  4797. u32 length;
  4798. u32 ioadl_flags = 0;
  4799. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4800. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4801. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  4802. length = scsi_bufflen(scsi_cmd);
  4803. if (!length)
  4804. return 0;
  4805. nseg = scsi_dma_map(scsi_cmd);
  4806. if (nseg < 0) {
  4807. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4808. return -1;
  4809. }
  4810. ipr_cmd->dma_use_sg = nseg;
  4811. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4812. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4813. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4814. ioarcb->data_transfer_length = cpu_to_be32(length);
  4815. ioarcb->ioadl_len =
  4816. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4817. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  4818. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4819. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  4820. ioarcb->read_ioadl_len =
  4821. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4822. }
  4823. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  4824. ioadl = ioarcb->u.add_data.u.ioadl;
  4825. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  4826. offsetof(struct ipr_ioarcb, u.add_data));
  4827. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  4828. }
  4829. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4830. ioadl[i].flags_and_data_len =
  4831. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  4832. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  4833. }
  4834. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4835. return 0;
  4836. }
  4837. /**
  4838. * ipr_get_task_attributes - Translate SPI Q-Tag to task attributes
  4839. * @scsi_cmd: scsi command struct
  4840. *
  4841. * Return value:
  4842. * task attributes
  4843. **/
  4844. static u8 ipr_get_task_attributes(struct scsi_cmnd *scsi_cmd)
  4845. {
  4846. u8 tag[2];
  4847. u8 rc = IPR_FLAGS_LO_UNTAGGED_TASK;
  4848. if (scsi_populate_tag_msg(scsi_cmd, tag)) {
  4849. switch (tag[0]) {
  4850. case MSG_SIMPLE_TAG:
  4851. rc = IPR_FLAGS_LO_SIMPLE_TASK;
  4852. break;
  4853. case MSG_HEAD_TAG:
  4854. rc = IPR_FLAGS_LO_HEAD_OF_Q_TASK;
  4855. break;
  4856. case MSG_ORDERED_TAG:
  4857. rc = IPR_FLAGS_LO_ORDERED_TASK;
  4858. break;
  4859. };
  4860. }
  4861. return rc;
  4862. }
  4863. /**
  4864. * ipr_erp_done - Process completion of ERP for a device
  4865. * @ipr_cmd: ipr command struct
  4866. *
  4867. * This function copies the sense buffer into the scsi_cmd
  4868. * struct and pushes the scsi_done function.
  4869. *
  4870. * Return value:
  4871. * nothing
  4872. **/
  4873. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  4874. {
  4875. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4876. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  4877. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4878. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  4879. scsi_cmd->result |= (DID_ERROR << 16);
  4880. scmd_printk(KERN_ERR, scsi_cmd,
  4881. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  4882. } else {
  4883. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  4884. SCSI_SENSE_BUFFERSIZE);
  4885. }
  4886. if (res) {
  4887. if (!ipr_is_naca_model(res))
  4888. res->needs_sync_complete = 1;
  4889. res->in_erp = 0;
  4890. }
  4891. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  4892. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4893. scsi_cmd->scsi_done(scsi_cmd);
  4894. }
  4895. /**
  4896. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  4897. * @ipr_cmd: ipr command struct
  4898. *
  4899. * Return value:
  4900. * none
  4901. **/
  4902. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  4903. {
  4904. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4905. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  4906. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  4907. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  4908. ioarcb->data_transfer_length = 0;
  4909. ioarcb->read_data_transfer_length = 0;
  4910. ioarcb->ioadl_len = 0;
  4911. ioarcb->read_ioadl_len = 0;
  4912. ioasa->hdr.ioasc = 0;
  4913. ioasa->hdr.residual_data_len = 0;
  4914. if (ipr_cmd->ioa_cfg->sis64)
  4915. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  4916. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  4917. else {
  4918. ioarcb->write_ioadl_addr =
  4919. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  4920. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  4921. }
  4922. }
  4923. /**
  4924. * ipr_erp_request_sense - Send request sense to a device
  4925. * @ipr_cmd: ipr command struct
  4926. *
  4927. * This function sends a request sense to a device as a result
  4928. * of a check condition.
  4929. *
  4930. * Return value:
  4931. * nothing
  4932. **/
  4933. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  4934. {
  4935. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4936. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4937. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  4938. ipr_erp_done(ipr_cmd);
  4939. return;
  4940. }
  4941. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  4942. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  4943. cmd_pkt->cdb[0] = REQUEST_SENSE;
  4944. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  4945. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  4946. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  4947. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  4948. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  4949. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  4950. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  4951. IPR_REQUEST_SENSE_TIMEOUT * 2);
  4952. }
  4953. /**
  4954. * ipr_erp_cancel_all - Send cancel all to a device
  4955. * @ipr_cmd: ipr command struct
  4956. *
  4957. * This function sends a cancel all to a device to clear the
  4958. * queue. If we are running TCQ on the device, QERR is set to 1,
  4959. * which means all outstanding ops have been dropped on the floor.
  4960. * Cancel all will return them to us.
  4961. *
  4962. * Return value:
  4963. * nothing
  4964. **/
  4965. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  4966. {
  4967. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4968. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  4969. struct ipr_cmd_pkt *cmd_pkt;
  4970. res->in_erp = 1;
  4971. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  4972. if (!scsi_get_tag_type(scsi_cmd->device)) {
  4973. ipr_erp_request_sense(ipr_cmd);
  4974. return;
  4975. }
  4976. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4977. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4978. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4979. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  4980. IPR_CANCEL_ALL_TIMEOUT);
  4981. }
  4982. /**
  4983. * ipr_dump_ioasa - Dump contents of IOASA
  4984. * @ioa_cfg: ioa config struct
  4985. * @ipr_cmd: ipr command struct
  4986. * @res: resource entry struct
  4987. *
  4988. * This function is invoked by the interrupt handler when ops
  4989. * fail. It will log the IOASA if appropriate. Only called
  4990. * for GPDD ops.
  4991. *
  4992. * Return value:
  4993. * none
  4994. **/
  4995. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  4996. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  4997. {
  4998. int i;
  4999. u16 data_len;
  5000. u32 ioasc, fd_ioasc;
  5001. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5002. __be32 *ioasa_data = (__be32 *)ioasa;
  5003. int error_index;
  5004. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  5005. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  5006. if (0 == ioasc)
  5007. return;
  5008. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  5009. return;
  5010. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  5011. error_index = ipr_get_error(fd_ioasc);
  5012. else
  5013. error_index = ipr_get_error(ioasc);
  5014. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  5015. /* Don't log an error if the IOA already logged one */
  5016. if (ioasa->hdr.ilid != 0)
  5017. return;
  5018. if (!ipr_is_gscsi(res))
  5019. return;
  5020. if (ipr_error_table[error_index].log_ioasa == 0)
  5021. return;
  5022. }
  5023. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  5024. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  5025. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  5026. data_len = sizeof(struct ipr_ioasa64);
  5027. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  5028. data_len = sizeof(struct ipr_ioasa);
  5029. ipr_err("IOASA Dump:\n");
  5030. for (i = 0; i < data_len / 4; i += 4) {
  5031. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  5032. be32_to_cpu(ioasa_data[i]),
  5033. be32_to_cpu(ioasa_data[i+1]),
  5034. be32_to_cpu(ioasa_data[i+2]),
  5035. be32_to_cpu(ioasa_data[i+3]));
  5036. }
  5037. }
  5038. /**
  5039. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  5040. * @ioasa: IOASA
  5041. * @sense_buf: sense data buffer
  5042. *
  5043. * Return value:
  5044. * none
  5045. **/
  5046. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  5047. {
  5048. u32 failing_lba;
  5049. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  5050. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  5051. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5052. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  5053. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  5054. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  5055. return;
  5056. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  5057. if (ipr_is_vset_device(res) &&
  5058. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  5059. ioasa->u.vset.failing_lba_hi != 0) {
  5060. sense_buf[0] = 0x72;
  5061. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  5062. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  5063. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  5064. sense_buf[7] = 12;
  5065. sense_buf[8] = 0;
  5066. sense_buf[9] = 0x0A;
  5067. sense_buf[10] = 0x80;
  5068. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  5069. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  5070. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  5071. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  5072. sense_buf[15] = failing_lba & 0x000000ff;
  5073. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5074. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  5075. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  5076. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  5077. sense_buf[19] = failing_lba & 0x000000ff;
  5078. } else {
  5079. sense_buf[0] = 0x70;
  5080. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  5081. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  5082. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  5083. /* Illegal request */
  5084. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  5085. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  5086. sense_buf[7] = 10; /* additional length */
  5087. /* IOARCB was in error */
  5088. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  5089. sense_buf[15] = 0xC0;
  5090. else /* Parameter data was invalid */
  5091. sense_buf[15] = 0x80;
  5092. sense_buf[16] =
  5093. ((IPR_FIELD_POINTER_MASK &
  5094. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  5095. sense_buf[17] =
  5096. (IPR_FIELD_POINTER_MASK &
  5097. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  5098. } else {
  5099. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  5100. if (ipr_is_vset_device(res))
  5101. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5102. else
  5103. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  5104. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  5105. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  5106. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  5107. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  5108. sense_buf[6] = failing_lba & 0x000000ff;
  5109. }
  5110. sense_buf[7] = 6; /* additional length */
  5111. }
  5112. }
  5113. }
  5114. /**
  5115. * ipr_get_autosense - Copy autosense data to sense buffer
  5116. * @ipr_cmd: ipr command struct
  5117. *
  5118. * This function copies the autosense buffer to the buffer
  5119. * in the scsi_cmd, if there is autosense available.
  5120. *
  5121. * Return value:
  5122. * 1 if autosense was available / 0 if not
  5123. **/
  5124. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  5125. {
  5126. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5127. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  5128. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  5129. return 0;
  5130. if (ipr_cmd->ioa_cfg->sis64)
  5131. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  5132. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  5133. SCSI_SENSE_BUFFERSIZE));
  5134. else
  5135. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  5136. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  5137. SCSI_SENSE_BUFFERSIZE));
  5138. return 1;
  5139. }
  5140. /**
  5141. * ipr_erp_start - Process an error response for a SCSI op
  5142. * @ioa_cfg: ioa config struct
  5143. * @ipr_cmd: ipr command struct
  5144. *
  5145. * This function determines whether or not to initiate ERP
  5146. * on the affected device.
  5147. *
  5148. * Return value:
  5149. * nothing
  5150. **/
  5151. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  5152. struct ipr_cmnd *ipr_cmd)
  5153. {
  5154. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5155. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5156. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5157. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  5158. if (!res) {
  5159. ipr_scsi_eh_done(ipr_cmd);
  5160. return;
  5161. }
  5162. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  5163. ipr_gen_sense(ipr_cmd);
  5164. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5165. switch (masked_ioasc) {
  5166. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  5167. if (ipr_is_naca_model(res))
  5168. scsi_cmd->result |= (DID_ABORT << 16);
  5169. else
  5170. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5171. break;
  5172. case IPR_IOASC_IR_RESOURCE_HANDLE:
  5173. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  5174. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5175. break;
  5176. case IPR_IOASC_HW_SEL_TIMEOUT:
  5177. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5178. if (!ipr_is_naca_model(res))
  5179. res->needs_sync_complete = 1;
  5180. break;
  5181. case IPR_IOASC_SYNC_REQUIRED:
  5182. if (!res->in_erp)
  5183. res->needs_sync_complete = 1;
  5184. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5185. break;
  5186. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  5187. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  5188. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  5189. break;
  5190. case IPR_IOASC_BUS_WAS_RESET:
  5191. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  5192. /*
  5193. * Report the bus reset and ask for a retry. The device
  5194. * will give CC/UA the next command.
  5195. */
  5196. if (!res->resetting_device)
  5197. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  5198. scsi_cmd->result |= (DID_ERROR << 16);
  5199. if (!ipr_is_naca_model(res))
  5200. res->needs_sync_complete = 1;
  5201. break;
  5202. case IPR_IOASC_HW_DEV_BUS_STATUS:
  5203. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  5204. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  5205. if (!ipr_get_autosense(ipr_cmd)) {
  5206. if (!ipr_is_naca_model(res)) {
  5207. ipr_erp_cancel_all(ipr_cmd);
  5208. return;
  5209. }
  5210. }
  5211. }
  5212. if (!ipr_is_naca_model(res))
  5213. res->needs_sync_complete = 1;
  5214. break;
  5215. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5216. break;
  5217. default:
  5218. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5219. scsi_cmd->result |= (DID_ERROR << 16);
  5220. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5221. res->needs_sync_complete = 1;
  5222. break;
  5223. }
  5224. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5225. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5226. scsi_cmd->scsi_done(scsi_cmd);
  5227. }
  5228. /**
  5229. * ipr_scsi_done - mid-layer done function
  5230. * @ipr_cmd: ipr command struct
  5231. *
  5232. * This function is invoked by the interrupt handler for
  5233. * ops generated by the SCSI mid-layer
  5234. *
  5235. * Return value:
  5236. * none
  5237. **/
  5238. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5239. {
  5240. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5241. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5242. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5243. unsigned long hrrq_flags;
  5244. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5245. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5246. scsi_dma_unmap(scsi_cmd);
  5247. spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
  5248. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5249. scsi_cmd->scsi_done(scsi_cmd);
  5250. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
  5251. } else {
  5252. spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
  5253. ipr_erp_start(ioa_cfg, ipr_cmd);
  5254. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
  5255. }
  5256. }
  5257. /**
  5258. * ipr_queuecommand - Queue a mid-layer request
  5259. * @shost: scsi host struct
  5260. * @scsi_cmd: scsi command struct
  5261. *
  5262. * This function queues a request generated by the mid-layer.
  5263. *
  5264. * Return value:
  5265. * 0 on success
  5266. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5267. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5268. **/
  5269. static int ipr_queuecommand(struct Scsi_Host *shost,
  5270. struct scsi_cmnd *scsi_cmd)
  5271. {
  5272. struct ipr_ioa_cfg *ioa_cfg;
  5273. struct ipr_resource_entry *res;
  5274. struct ipr_ioarcb *ioarcb;
  5275. struct ipr_cmnd *ipr_cmd;
  5276. unsigned long hrrq_flags, lock_flags;
  5277. int rc;
  5278. struct ipr_hrr_queue *hrrq;
  5279. int hrrq_id;
  5280. ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  5281. scsi_cmd->result = (DID_OK << 16);
  5282. res = scsi_cmd->device->hostdata;
  5283. if (ipr_is_gata(res) && res->sata_port) {
  5284. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5285. rc = ata_sas_queuecmd(scsi_cmd, res->sata_port->ap);
  5286. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5287. return rc;
  5288. }
  5289. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5290. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5291. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5292. /*
  5293. * We are currently blocking all devices due to a host reset
  5294. * We have told the host to stop giving us new requests, but
  5295. * ERP ops don't count. FIXME
  5296. */
  5297. if (unlikely(!hrrq->allow_cmds && !hrrq->ioa_is_dead)) {
  5298. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5299. return SCSI_MLQUEUE_HOST_BUSY;
  5300. }
  5301. /*
  5302. * FIXME - Create scsi_set_host_offline interface
  5303. * and the ioa_is_dead check can be removed
  5304. */
  5305. if (unlikely(hrrq->ioa_is_dead || !res)) {
  5306. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5307. goto err_nodev;
  5308. }
  5309. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5310. if (ipr_cmd == NULL) {
  5311. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5312. return SCSI_MLQUEUE_HOST_BUSY;
  5313. }
  5314. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5315. ipr_init_ipr_cmnd(ipr_cmd, ipr_scsi_done);
  5316. ioarcb = &ipr_cmd->ioarcb;
  5317. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5318. ipr_cmd->scsi_cmd = scsi_cmd;
  5319. ipr_cmd->done = ipr_scsi_eh_done;
  5320. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5321. if (scsi_cmd->underflow == 0)
  5322. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5323. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5324. if (ipr_is_gscsi(res))
  5325. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5326. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5327. ioarcb->cmd_pkt.flags_lo |= ipr_get_task_attributes(scsi_cmd);
  5328. }
  5329. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5330. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
  5331. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5332. }
  5333. if (ioa_cfg->sis64)
  5334. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5335. else
  5336. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5337. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5338. if (unlikely(rc || (!hrrq->allow_cmds && !hrrq->ioa_is_dead))) {
  5339. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5340. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5341. if (!rc)
  5342. scsi_dma_unmap(scsi_cmd);
  5343. return SCSI_MLQUEUE_HOST_BUSY;
  5344. }
  5345. if (unlikely(hrrq->ioa_is_dead)) {
  5346. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5347. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5348. scsi_dma_unmap(scsi_cmd);
  5349. goto err_nodev;
  5350. }
  5351. ioarcb->res_handle = res->res_handle;
  5352. if (res->needs_sync_complete) {
  5353. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5354. res->needs_sync_complete = 0;
  5355. }
  5356. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_pending_q);
  5357. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5358. ipr_send_command(ipr_cmd);
  5359. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5360. return 0;
  5361. err_nodev:
  5362. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5363. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5364. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5365. scsi_cmd->scsi_done(scsi_cmd);
  5366. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5367. return 0;
  5368. }
  5369. /**
  5370. * ipr_ioctl - IOCTL handler
  5371. * @sdev: scsi device struct
  5372. * @cmd: IOCTL cmd
  5373. * @arg: IOCTL arg
  5374. *
  5375. * Return value:
  5376. * 0 on success / other on failure
  5377. **/
  5378. static int ipr_ioctl(struct scsi_device *sdev, int cmd, void __user *arg)
  5379. {
  5380. struct ipr_resource_entry *res;
  5381. res = (struct ipr_resource_entry *)sdev->hostdata;
  5382. if (res && ipr_is_gata(res)) {
  5383. if (cmd == HDIO_GET_IDENTITY)
  5384. return -ENOTTY;
  5385. return ata_sas_scsi_ioctl(res->sata_port->ap, sdev, cmd, arg);
  5386. }
  5387. return -EINVAL;
  5388. }
  5389. /**
  5390. * ipr_info - Get information about the card/driver
  5391. * @scsi_host: scsi host struct
  5392. *
  5393. * Return value:
  5394. * pointer to buffer with description string
  5395. **/
  5396. static const char *ipr_ioa_info(struct Scsi_Host *host)
  5397. {
  5398. static char buffer[512];
  5399. struct ipr_ioa_cfg *ioa_cfg;
  5400. unsigned long lock_flags = 0;
  5401. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5402. spin_lock_irqsave(host->host_lock, lock_flags);
  5403. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5404. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5405. return buffer;
  5406. }
  5407. static struct scsi_host_template driver_template = {
  5408. .module = THIS_MODULE,
  5409. .name = "IPR",
  5410. .info = ipr_ioa_info,
  5411. .ioctl = ipr_ioctl,
  5412. .queuecommand = ipr_queuecommand,
  5413. .eh_abort_handler = ipr_eh_abort,
  5414. .eh_device_reset_handler = ipr_eh_dev_reset,
  5415. .eh_host_reset_handler = ipr_eh_host_reset,
  5416. .slave_alloc = ipr_slave_alloc,
  5417. .slave_configure = ipr_slave_configure,
  5418. .slave_destroy = ipr_slave_destroy,
  5419. .target_alloc = ipr_target_alloc,
  5420. .target_destroy = ipr_target_destroy,
  5421. .change_queue_depth = ipr_change_queue_depth,
  5422. .change_queue_type = ipr_change_queue_type,
  5423. .bios_param = ipr_biosparam,
  5424. .can_queue = IPR_MAX_COMMANDS,
  5425. .this_id = -1,
  5426. .sg_tablesize = IPR_MAX_SGLIST,
  5427. .max_sectors = IPR_IOA_MAX_SECTORS,
  5428. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5429. .use_clustering = ENABLE_CLUSTERING,
  5430. .shost_attrs = ipr_ioa_attrs,
  5431. .sdev_attrs = ipr_dev_attrs,
  5432. .proc_name = IPR_NAME
  5433. };
  5434. /**
  5435. * ipr_ata_phy_reset - libata phy_reset handler
  5436. * @ap: ata port to reset
  5437. *
  5438. **/
  5439. static void ipr_ata_phy_reset(struct ata_port *ap)
  5440. {
  5441. unsigned long flags;
  5442. struct ipr_sata_port *sata_port = ap->private_data;
  5443. struct ipr_resource_entry *res = sata_port->res;
  5444. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5445. int rc;
  5446. ENTER;
  5447. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5448. while (ioa_cfg->in_reset_reload) {
  5449. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5450. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5451. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5452. }
  5453. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5454. goto out_unlock;
  5455. rc = ipr_device_reset(ioa_cfg, res);
  5456. if (rc) {
  5457. ap->link.device[0].class = ATA_DEV_NONE;
  5458. goto out_unlock;
  5459. }
  5460. ap->link.device[0].class = res->ata_class;
  5461. if (ap->link.device[0].class == ATA_DEV_UNKNOWN)
  5462. ap->link.device[0].class = ATA_DEV_NONE;
  5463. out_unlock:
  5464. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5465. LEAVE;
  5466. }
  5467. /**
  5468. * ipr_ata_post_internal - Cleanup after an internal command
  5469. * @qc: ATA queued command
  5470. *
  5471. * Return value:
  5472. * none
  5473. **/
  5474. static void ipr_ata_post_internal(struct ata_queued_cmd *qc)
  5475. {
  5476. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5477. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5478. struct ipr_cmnd *ipr_cmd;
  5479. struct ipr_hrr_queue *hrrq;
  5480. unsigned long flags;
  5481. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5482. while (ioa_cfg->in_reset_reload) {
  5483. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5484. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5485. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5486. }
  5487. for_each_hrrq(hrrq, ioa_cfg) {
  5488. spin_lock(&hrrq->_lock);
  5489. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  5490. if (ipr_cmd->qc == qc) {
  5491. ipr_device_reset(ioa_cfg, sata_port->res);
  5492. break;
  5493. }
  5494. }
  5495. spin_unlock(&hrrq->_lock);
  5496. }
  5497. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5498. }
  5499. /**
  5500. * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure
  5501. * @regs: destination
  5502. * @tf: source ATA taskfile
  5503. *
  5504. * Return value:
  5505. * none
  5506. **/
  5507. static void ipr_copy_sata_tf(struct ipr_ioarcb_ata_regs *regs,
  5508. struct ata_taskfile *tf)
  5509. {
  5510. regs->feature = tf->feature;
  5511. regs->nsect = tf->nsect;
  5512. regs->lbal = tf->lbal;
  5513. regs->lbam = tf->lbam;
  5514. regs->lbah = tf->lbah;
  5515. regs->device = tf->device;
  5516. regs->command = tf->command;
  5517. regs->hob_feature = tf->hob_feature;
  5518. regs->hob_nsect = tf->hob_nsect;
  5519. regs->hob_lbal = tf->hob_lbal;
  5520. regs->hob_lbam = tf->hob_lbam;
  5521. regs->hob_lbah = tf->hob_lbah;
  5522. regs->ctl = tf->ctl;
  5523. }
  5524. /**
  5525. * ipr_sata_done - done function for SATA commands
  5526. * @ipr_cmd: ipr command struct
  5527. *
  5528. * This function is invoked by the interrupt handler for
  5529. * ops generated by the SCSI mid-layer to SATA devices
  5530. *
  5531. * Return value:
  5532. * none
  5533. **/
  5534. static void ipr_sata_done(struct ipr_cmnd *ipr_cmd)
  5535. {
  5536. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5537. struct ata_queued_cmd *qc = ipr_cmd->qc;
  5538. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5539. struct ipr_resource_entry *res = sata_port->res;
  5540. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5541. spin_lock(&ipr_cmd->hrrq->_lock);
  5542. if (ipr_cmd->ioa_cfg->sis64)
  5543. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  5544. sizeof(struct ipr_ioasa_gata));
  5545. else
  5546. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  5547. sizeof(struct ipr_ioasa_gata));
  5548. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5549. if (be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc_specific) & IPR_ATA_DEVICE_WAS_RESET)
  5550. scsi_report_device_reset(ioa_cfg->host, res->bus, res->target);
  5551. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5552. qc->err_mask |= __ac_err_mask(sata_port->ioasa.status);
  5553. else
  5554. qc->err_mask |= ac_err_mask(sata_port->ioasa.status);
  5555. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5556. spin_unlock(&ipr_cmd->hrrq->_lock);
  5557. ata_qc_complete(qc);
  5558. }
  5559. /**
  5560. * ipr_build_ata_ioadl64 - Build an ATA scatter/gather list
  5561. * @ipr_cmd: ipr command struct
  5562. * @qc: ATA queued command
  5563. *
  5564. **/
  5565. static void ipr_build_ata_ioadl64(struct ipr_cmnd *ipr_cmd,
  5566. struct ata_queued_cmd *qc)
  5567. {
  5568. u32 ioadl_flags = 0;
  5569. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5570. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  5571. struct ipr_ioadl64_desc *last_ioadl64 = NULL;
  5572. int len = qc->nbytes;
  5573. struct scatterlist *sg;
  5574. unsigned int si;
  5575. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5576. if (len == 0)
  5577. return;
  5578. if (qc->dma_dir == DMA_TO_DEVICE) {
  5579. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5580. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5581. } else if (qc->dma_dir == DMA_FROM_DEVICE)
  5582. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5583. ioarcb->data_transfer_length = cpu_to_be32(len);
  5584. ioarcb->ioadl_len =
  5585. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5586. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5587. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ata_ioadl));
  5588. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5589. ioadl64->flags = cpu_to_be32(ioadl_flags);
  5590. ioadl64->data_len = cpu_to_be32(sg_dma_len(sg));
  5591. ioadl64->address = cpu_to_be64(sg_dma_address(sg));
  5592. last_ioadl64 = ioadl64;
  5593. ioadl64++;
  5594. }
  5595. if (likely(last_ioadl64))
  5596. last_ioadl64->flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5597. }
  5598. /**
  5599. * ipr_build_ata_ioadl - Build an ATA scatter/gather list
  5600. * @ipr_cmd: ipr command struct
  5601. * @qc: ATA queued command
  5602. *
  5603. **/
  5604. static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
  5605. struct ata_queued_cmd *qc)
  5606. {
  5607. u32 ioadl_flags = 0;
  5608. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5609. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5610. struct ipr_ioadl_desc *last_ioadl = NULL;
  5611. int len = qc->nbytes;
  5612. struct scatterlist *sg;
  5613. unsigned int si;
  5614. if (len == 0)
  5615. return;
  5616. if (qc->dma_dir == DMA_TO_DEVICE) {
  5617. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5618. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5619. ioarcb->data_transfer_length = cpu_to_be32(len);
  5620. ioarcb->ioadl_len =
  5621. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5622. } else if (qc->dma_dir == DMA_FROM_DEVICE) {
  5623. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5624. ioarcb->read_data_transfer_length = cpu_to_be32(len);
  5625. ioarcb->read_ioadl_len =
  5626. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5627. }
  5628. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5629. ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5630. ioadl->address = cpu_to_be32(sg_dma_address(sg));
  5631. last_ioadl = ioadl;
  5632. ioadl++;
  5633. }
  5634. if (likely(last_ioadl))
  5635. last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5636. }
  5637. /**
  5638. * ipr_qc_defer - Get a free ipr_cmd
  5639. * @qc: queued command
  5640. *
  5641. * Return value:
  5642. * 0 if success
  5643. **/
  5644. static int ipr_qc_defer(struct ata_queued_cmd *qc)
  5645. {
  5646. struct ata_port *ap = qc->ap;
  5647. struct ipr_sata_port *sata_port = ap->private_data;
  5648. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5649. struct ipr_cmnd *ipr_cmd;
  5650. struct ipr_hrr_queue *hrrq;
  5651. int hrrq_id;
  5652. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5653. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5654. qc->lldd_task = NULL;
  5655. spin_lock(&hrrq->_lock);
  5656. if (unlikely(hrrq->ioa_is_dead)) {
  5657. spin_unlock(&hrrq->_lock);
  5658. return 0;
  5659. }
  5660. if (unlikely(!hrrq->allow_cmds)) {
  5661. spin_unlock(&hrrq->_lock);
  5662. return ATA_DEFER_LINK;
  5663. }
  5664. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5665. if (ipr_cmd == NULL) {
  5666. spin_unlock(&hrrq->_lock);
  5667. return ATA_DEFER_LINK;
  5668. }
  5669. qc->lldd_task = ipr_cmd;
  5670. spin_unlock(&hrrq->_lock);
  5671. return 0;
  5672. }
  5673. /**
  5674. * ipr_qc_issue - Issue a SATA qc to a device
  5675. * @qc: queued command
  5676. *
  5677. * Return value:
  5678. * 0 if success
  5679. **/
  5680. static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc)
  5681. {
  5682. struct ata_port *ap = qc->ap;
  5683. struct ipr_sata_port *sata_port = ap->private_data;
  5684. struct ipr_resource_entry *res = sata_port->res;
  5685. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5686. struct ipr_cmnd *ipr_cmd;
  5687. struct ipr_ioarcb *ioarcb;
  5688. struct ipr_ioarcb_ata_regs *regs;
  5689. if (qc->lldd_task == NULL)
  5690. ipr_qc_defer(qc);
  5691. ipr_cmd = qc->lldd_task;
  5692. if (ipr_cmd == NULL)
  5693. return AC_ERR_SYSTEM;
  5694. qc->lldd_task = NULL;
  5695. spin_lock(&ipr_cmd->hrrq->_lock);
  5696. if (unlikely(!ipr_cmd->hrrq->allow_cmds ||
  5697. ipr_cmd->hrrq->ioa_is_dead)) {
  5698. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5699. spin_unlock(&ipr_cmd->hrrq->_lock);
  5700. return AC_ERR_SYSTEM;
  5701. }
  5702. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  5703. ioarcb = &ipr_cmd->ioarcb;
  5704. if (ioa_cfg->sis64) {
  5705. regs = &ipr_cmd->i.ata_ioadl.regs;
  5706. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  5707. } else
  5708. regs = &ioarcb->u.add_data.u.regs;
  5709. memset(regs, 0, sizeof(*regs));
  5710. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(*regs));
  5711. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  5712. ipr_cmd->qc = qc;
  5713. ipr_cmd->done = ipr_sata_done;
  5714. ipr_cmd->ioarcb.res_handle = res->res_handle;
  5715. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_ATA_PASSTHRU;
  5716. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5717. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5718. ipr_cmd->dma_use_sg = qc->n_elem;
  5719. if (ioa_cfg->sis64)
  5720. ipr_build_ata_ioadl64(ipr_cmd, qc);
  5721. else
  5722. ipr_build_ata_ioadl(ipr_cmd, qc);
  5723. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  5724. ipr_copy_sata_tf(regs, &qc->tf);
  5725. memcpy(ioarcb->cmd_pkt.cdb, qc->cdb, IPR_MAX_CDB_LEN);
  5726. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5727. switch (qc->tf.protocol) {
  5728. case ATA_PROT_NODATA:
  5729. case ATA_PROT_PIO:
  5730. break;
  5731. case ATA_PROT_DMA:
  5732. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5733. break;
  5734. case ATAPI_PROT_PIO:
  5735. case ATAPI_PROT_NODATA:
  5736. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5737. break;
  5738. case ATAPI_PROT_DMA:
  5739. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5740. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5741. break;
  5742. default:
  5743. WARN_ON(1);
  5744. spin_unlock(&ipr_cmd->hrrq->_lock);
  5745. return AC_ERR_INVALID;
  5746. }
  5747. ipr_send_command(ipr_cmd);
  5748. spin_unlock(&ipr_cmd->hrrq->_lock);
  5749. return 0;
  5750. }
  5751. /**
  5752. * ipr_qc_fill_rtf - Read result TF
  5753. * @qc: ATA queued command
  5754. *
  5755. * Return value:
  5756. * true
  5757. **/
  5758. static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
  5759. {
  5760. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5761. struct ipr_ioasa_gata *g = &sata_port->ioasa;
  5762. struct ata_taskfile *tf = &qc->result_tf;
  5763. tf->feature = g->error;
  5764. tf->nsect = g->nsect;
  5765. tf->lbal = g->lbal;
  5766. tf->lbam = g->lbam;
  5767. tf->lbah = g->lbah;
  5768. tf->device = g->device;
  5769. tf->command = g->status;
  5770. tf->hob_nsect = g->hob_nsect;
  5771. tf->hob_lbal = g->hob_lbal;
  5772. tf->hob_lbam = g->hob_lbam;
  5773. tf->hob_lbah = g->hob_lbah;
  5774. tf->ctl = g->alt_status;
  5775. return true;
  5776. }
  5777. static struct ata_port_operations ipr_sata_ops = {
  5778. .phy_reset = ipr_ata_phy_reset,
  5779. .hardreset = ipr_sata_reset,
  5780. .post_internal_cmd = ipr_ata_post_internal,
  5781. .qc_prep = ata_noop_qc_prep,
  5782. .qc_defer = ipr_qc_defer,
  5783. .qc_issue = ipr_qc_issue,
  5784. .qc_fill_rtf = ipr_qc_fill_rtf,
  5785. .port_start = ata_sas_port_start,
  5786. .port_stop = ata_sas_port_stop
  5787. };
  5788. static struct ata_port_info sata_port_info = {
  5789. .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
  5790. .pio_mask = ATA_PIO4_ONLY,
  5791. .mwdma_mask = ATA_MWDMA2,
  5792. .udma_mask = ATA_UDMA6,
  5793. .port_ops = &ipr_sata_ops
  5794. };
  5795. #ifdef CONFIG_PPC_PSERIES
  5796. static const u16 ipr_blocked_processors[] = {
  5797. PVR_NORTHSTAR,
  5798. PVR_PULSAR,
  5799. PVR_POWER4,
  5800. PVR_ICESTAR,
  5801. PVR_SSTAR,
  5802. PVR_POWER4p,
  5803. PVR_630,
  5804. PVR_630p
  5805. };
  5806. /**
  5807. * ipr_invalid_adapter - Determine if this adapter is supported on this hardware
  5808. * @ioa_cfg: ioa cfg struct
  5809. *
  5810. * Adapters that use Gemstone revision < 3.1 do not work reliably on
  5811. * certain pSeries hardware. This function determines if the given
  5812. * adapter is in one of these confgurations or not.
  5813. *
  5814. * Return value:
  5815. * 1 if adapter is not supported / 0 if adapter is supported
  5816. **/
  5817. static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg)
  5818. {
  5819. int i;
  5820. if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) {
  5821. for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++) {
  5822. if (pvr_version_is(ipr_blocked_processors[i]))
  5823. return 1;
  5824. }
  5825. }
  5826. return 0;
  5827. }
  5828. #else
  5829. #define ipr_invalid_adapter(ioa_cfg) 0
  5830. #endif
  5831. /**
  5832. * ipr_ioa_bringdown_done - IOA bring down completion.
  5833. * @ipr_cmd: ipr command struct
  5834. *
  5835. * This function processes the completion of an adapter bring down.
  5836. * It wakes any reset sleepers.
  5837. *
  5838. * Return value:
  5839. * IPR_RC_JOB_RETURN
  5840. **/
  5841. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  5842. {
  5843. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5844. ENTER;
  5845. ioa_cfg->in_reset_reload = 0;
  5846. ioa_cfg->reset_retries = 0;
  5847. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5848. wake_up_all(&ioa_cfg->reset_wait_q);
  5849. spin_unlock_irq(ioa_cfg->host->host_lock);
  5850. scsi_unblock_requests(ioa_cfg->host);
  5851. spin_lock_irq(ioa_cfg->host->host_lock);
  5852. LEAVE;
  5853. return IPR_RC_JOB_RETURN;
  5854. }
  5855. /**
  5856. * ipr_ioa_reset_done - IOA reset completion.
  5857. * @ipr_cmd: ipr command struct
  5858. *
  5859. * This function processes the completion of an adapter reset.
  5860. * It schedules any necessary mid-layer add/removes and
  5861. * wakes any reset sleepers.
  5862. *
  5863. * Return value:
  5864. * IPR_RC_JOB_RETURN
  5865. **/
  5866. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  5867. {
  5868. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5869. struct ipr_resource_entry *res;
  5870. struct ipr_hostrcb *hostrcb, *temp;
  5871. int i = 0, j;
  5872. ENTER;
  5873. ioa_cfg->in_reset_reload = 0;
  5874. for (j = 0; j < ioa_cfg->hrrq_num; j++) {
  5875. spin_lock(&ioa_cfg->hrrq[j]._lock);
  5876. ioa_cfg->hrrq[j].allow_cmds = 1;
  5877. spin_unlock(&ioa_cfg->hrrq[j]._lock);
  5878. }
  5879. wmb();
  5880. ioa_cfg->reset_cmd = NULL;
  5881. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  5882. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  5883. if (ioa_cfg->allow_ml_add_del && (res->add_to_ml || res->del_from_ml)) {
  5884. ipr_trace;
  5885. break;
  5886. }
  5887. }
  5888. schedule_work(&ioa_cfg->work_q);
  5889. list_for_each_entry_safe(hostrcb, temp, &ioa_cfg->hostrcb_free_q, queue) {
  5890. list_del(&hostrcb->queue);
  5891. if (i++ < IPR_NUM_LOG_HCAMS)
  5892. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  5893. else
  5894. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  5895. }
  5896. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  5897. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  5898. ioa_cfg->reset_retries = 0;
  5899. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5900. wake_up_all(&ioa_cfg->reset_wait_q);
  5901. spin_unlock(ioa_cfg->host->host_lock);
  5902. scsi_unblock_requests(ioa_cfg->host);
  5903. spin_lock(ioa_cfg->host->host_lock);
  5904. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5905. scsi_block_requests(ioa_cfg->host);
  5906. LEAVE;
  5907. return IPR_RC_JOB_RETURN;
  5908. }
  5909. /**
  5910. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  5911. * @supported_dev: supported device struct
  5912. * @vpids: vendor product id struct
  5913. *
  5914. * Return value:
  5915. * none
  5916. **/
  5917. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  5918. struct ipr_std_inq_vpids *vpids)
  5919. {
  5920. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  5921. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  5922. supported_dev->num_records = 1;
  5923. supported_dev->data_length =
  5924. cpu_to_be16(sizeof(struct ipr_supported_device));
  5925. supported_dev->reserved = 0;
  5926. }
  5927. /**
  5928. * ipr_set_supported_devs - Send Set Supported Devices for a device
  5929. * @ipr_cmd: ipr command struct
  5930. *
  5931. * This function sends a Set Supported Devices to the adapter
  5932. *
  5933. * Return value:
  5934. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  5935. **/
  5936. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  5937. {
  5938. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5939. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  5940. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5941. struct ipr_resource_entry *res = ipr_cmd->u.res;
  5942. ipr_cmd->job_step = ipr_ioa_reset_done;
  5943. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  5944. if (!ipr_is_scsi_disk(res))
  5945. continue;
  5946. ipr_cmd->u.res = res;
  5947. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  5948. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  5949. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5950. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5951. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  5952. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  5953. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  5954. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  5955. ipr_init_ioadl(ipr_cmd,
  5956. ioa_cfg->vpd_cbs_dma +
  5957. offsetof(struct ipr_misc_cbs, supp_dev),
  5958. sizeof(struct ipr_supported_device),
  5959. IPR_IOADL_FLAGS_WRITE_LAST);
  5960. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  5961. IPR_SET_SUP_DEVICE_TIMEOUT);
  5962. if (!ioa_cfg->sis64)
  5963. ipr_cmd->job_step = ipr_set_supported_devs;
  5964. LEAVE;
  5965. return IPR_RC_JOB_RETURN;
  5966. }
  5967. LEAVE;
  5968. return IPR_RC_JOB_CONTINUE;
  5969. }
  5970. /**
  5971. * ipr_get_mode_page - Locate specified mode page
  5972. * @mode_pages: mode page buffer
  5973. * @page_code: page code to find
  5974. * @len: minimum required length for mode page
  5975. *
  5976. * Return value:
  5977. * pointer to mode page / NULL on failure
  5978. **/
  5979. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  5980. u32 page_code, u32 len)
  5981. {
  5982. struct ipr_mode_page_hdr *mode_hdr;
  5983. u32 page_length;
  5984. u32 length;
  5985. if (!mode_pages || (mode_pages->hdr.length == 0))
  5986. return NULL;
  5987. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  5988. mode_hdr = (struct ipr_mode_page_hdr *)
  5989. (mode_pages->data + mode_pages->hdr.block_desc_len);
  5990. while (length) {
  5991. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  5992. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  5993. return mode_hdr;
  5994. break;
  5995. } else {
  5996. page_length = (sizeof(struct ipr_mode_page_hdr) +
  5997. mode_hdr->page_length);
  5998. length -= page_length;
  5999. mode_hdr = (struct ipr_mode_page_hdr *)
  6000. ((unsigned long)mode_hdr + page_length);
  6001. }
  6002. }
  6003. return NULL;
  6004. }
  6005. /**
  6006. * ipr_check_term_power - Check for term power errors
  6007. * @ioa_cfg: ioa config struct
  6008. * @mode_pages: IOAFP mode pages buffer
  6009. *
  6010. * Check the IOAFP's mode page 28 for term power errors
  6011. *
  6012. * Return value:
  6013. * nothing
  6014. **/
  6015. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  6016. struct ipr_mode_pages *mode_pages)
  6017. {
  6018. int i;
  6019. int entry_length;
  6020. struct ipr_dev_bus_entry *bus;
  6021. struct ipr_mode_page28 *mode_page;
  6022. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6023. sizeof(struct ipr_mode_page28));
  6024. entry_length = mode_page->entry_length;
  6025. bus = mode_page->bus;
  6026. for (i = 0; i < mode_page->num_entries; i++) {
  6027. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  6028. dev_err(&ioa_cfg->pdev->dev,
  6029. "Term power is absent on scsi bus %d\n",
  6030. bus->res_addr.bus);
  6031. }
  6032. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  6033. }
  6034. }
  6035. /**
  6036. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  6037. * @ioa_cfg: ioa config struct
  6038. *
  6039. * Looks through the config table checking for SES devices. If
  6040. * the SES device is in the SES table indicating a maximum SCSI
  6041. * bus speed, the speed is limited for the bus.
  6042. *
  6043. * Return value:
  6044. * none
  6045. **/
  6046. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  6047. {
  6048. u32 max_xfer_rate;
  6049. int i;
  6050. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  6051. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  6052. ioa_cfg->bus_attr[i].bus_width);
  6053. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  6054. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  6055. }
  6056. }
  6057. /**
  6058. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  6059. * @ioa_cfg: ioa config struct
  6060. * @mode_pages: mode page 28 buffer
  6061. *
  6062. * Updates mode page 28 based on driver configuration
  6063. *
  6064. * Return value:
  6065. * none
  6066. **/
  6067. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  6068. struct ipr_mode_pages *mode_pages)
  6069. {
  6070. int i, entry_length;
  6071. struct ipr_dev_bus_entry *bus;
  6072. struct ipr_bus_attributes *bus_attr;
  6073. struct ipr_mode_page28 *mode_page;
  6074. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6075. sizeof(struct ipr_mode_page28));
  6076. entry_length = mode_page->entry_length;
  6077. /* Loop for each device bus entry */
  6078. for (i = 0, bus = mode_page->bus;
  6079. i < mode_page->num_entries;
  6080. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  6081. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  6082. dev_err(&ioa_cfg->pdev->dev,
  6083. "Invalid resource address reported: 0x%08X\n",
  6084. IPR_GET_PHYS_LOC(bus->res_addr));
  6085. continue;
  6086. }
  6087. bus_attr = &ioa_cfg->bus_attr[i];
  6088. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  6089. bus->bus_width = bus_attr->bus_width;
  6090. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  6091. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  6092. if (bus_attr->qas_enabled)
  6093. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  6094. else
  6095. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  6096. }
  6097. }
  6098. /**
  6099. * ipr_build_mode_select - Build a mode select command
  6100. * @ipr_cmd: ipr command struct
  6101. * @res_handle: resource handle to send command to
  6102. * @parm: Byte 2 of Mode Sense command
  6103. * @dma_addr: DMA buffer address
  6104. * @xfer_len: data transfer length
  6105. *
  6106. * Return value:
  6107. * none
  6108. **/
  6109. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  6110. __be32 res_handle, u8 parm,
  6111. dma_addr_t dma_addr, u8 xfer_len)
  6112. {
  6113. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6114. ioarcb->res_handle = res_handle;
  6115. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6116. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6117. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  6118. ioarcb->cmd_pkt.cdb[1] = parm;
  6119. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6120. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  6121. }
  6122. /**
  6123. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  6124. * @ipr_cmd: ipr command struct
  6125. *
  6126. * This function sets up the SCSI bus attributes and sends
  6127. * a Mode Select for Page 28 to activate them.
  6128. *
  6129. * Return value:
  6130. * IPR_RC_JOB_RETURN
  6131. **/
  6132. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  6133. {
  6134. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6135. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6136. int length;
  6137. ENTER;
  6138. ipr_scsi_bus_speed_limit(ioa_cfg);
  6139. ipr_check_term_power(ioa_cfg, mode_pages);
  6140. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  6141. length = mode_pages->hdr.length + 1;
  6142. mode_pages->hdr.length = 0;
  6143. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6144. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6145. length);
  6146. ipr_cmd->job_step = ipr_set_supported_devs;
  6147. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6148. struct ipr_resource_entry, queue);
  6149. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6150. LEAVE;
  6151. return IPR_RC_JOB_RETURN;
  6152. }
  6153. /**
  6154. * ipr_build_mode_sense - Builds a mode sense command
  6155. * @ipr_cmd: ipr command struct
  6156. * @res: resource entry struct
  6157. * @parm: Byte 2 of mode sense command
  6158. * @dma_addr: DMA address of mode sense buffer
  6159. * @xfer_len: Size of DMA buffer
  6160. *
  6161. * Return value:
  6162. * none
  6163. **/
  6164. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  6165. __be32 res_handle,
  6166. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  6167. {
  6168. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6169. ioarcb->res_handle = res_handle;
  6170. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  6171. ioarcb->cmd_pkt.cdb[2] = parm;
  6172. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6173. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6174. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6175. }
  6176. /**
  6177. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  6178. * @ipr_cmd: ipr command struct
  6179. *
  6180. * This function handles the failure of an IOA bringup command.
  6181. *
  6182. * Return value:
  6183. * IPR_RC_JOB_RETURN
  6184. **/
  6185. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  6186. {
  6187. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6188. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6189. dev_err(&ioa_cfg->pdev->dev,
  6190. "0x%02X failed with IOASC: 0x%08X\n",
  6191. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  6192. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6193. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6194. return IPR_RC_JOB_RETURN;
  6195. }
  6196. /**
  6197. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  6198. * @ipr_cmd: ipr command struct
  6199. *
  6200. * This function handles the failure of a Mode Sense to the IOAFP.
  6201. * Some adapters do not handle all mode pages.
  6202. *
  6203. * Return value:
  6204. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6205. **/
  6206. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  6207. {
  6208. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6209. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6210. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6211. ipr_cmd->job_step = ipr_set_supported_devs;
  6212. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6213. struct ipr_resource_entry, queue);
  6214. return IPR_RC_JOB_CONTINUE;
  6215. }
  6216. return ipr_reset_cmd_failed(ipr_cmd);
  6217. }
  6218. /**
  6219. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  6220. * @ipr_cmd: ipr command struct
  6221. *
  6222. * This function send a Page 28 mode sense to the IOA to
  6223. * retrieve SCSI bus attributes.
  6224. *
  6225. * Return value:
  6226. * IPR_RC_JOB_RETURN
  6227. **/
  6228. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  6229. {
  6230. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6231. ENTER;
  6232. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6233. 0x28, ioa_cfg->vpd_cbs_dma +
  6234. offsetof(struct ipr_misc_cbs, mode_pages),
  6235. sizeof(struct ipr_mode_pages));
  6236. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  6237. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  6238. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6239. LEAVE;
  6240. return IPR_RC_JOB_RETURN;
  6241. }
  6242. /**
  6243. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  6244. * @ipr_cmd: ipr command struct
  6245. *
  6246. * This function enables dual IOA RAID support if possible.
  6247. *
  6248. * Return value:
  6249. * IPR_RC_JOB_RETURN
  6250. **/
  6251. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  6252. {
  6253. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6254. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6255. struct ipr_mode_page24 *mode_page;
  6256. int length;
  6257. ENTER;
  6258. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  6259. sizeof(struct ipr_mode_page24));
  6260. if (mode_page)
  6261. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  6262. length = mode_pages->hdr.length + 1;
  6263. mode_pages->hdr.length = 0;
  6264. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6265. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6266. length);
  6267. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6268. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6269. LEAVE;
  6270. return IPR_RC_JOB_RETURN;
  6271. }
  6272. /**
  6273. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  6274. * @ipr_cmd: ipr command struct
  6275. *
  6276. * This function handles the failure of a Mode Sense to the IOAFP.
  6277. * Some adapters do not handle all mode pages.
  6278. *
  6279. * Return value:
  6280. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6281. **/
  6282. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  6283. {
  6284. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6285. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6286. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6287. return IPR_RC_JOB_CONTINUE;
  6288. }
  6289. return ipr_reset_cmd_failed(ipr_cmd);
  6290. }
  6291. /**
  6292. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  6293. * @ipr_cmd: ipr command struct
  6294. *
  6295. * This function send a mode sense to the IOA to retrieve
  6296. * the IOA Advanced Function Control mode page.
  6297. *
  6298. * Return value:
  6299. * IPR_RC_JOB_RETURN
  6300. **/
  6301. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  6302. {
  6303. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6304. ENTER;
  6305. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6306. 0x24, ioa_cfg->vpd_cbs_dma +
  6307. offsetof(struct ipr_misc_cbs, mode_pages),
  6308. sizeof(struct ipr_mode_pages));
  6309. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  6310. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  6311. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6312. LEAVE;
  6313. return IPR_RC_JOB_RETURN;
  6314. }
  6315. /**
  6316. * ipr_init_res_table - Initialize the resource table
  6317. * @ipr_cmd: ipr command struct
  6318. *
  6319. * This function looks through the existing resource table, comparing
  6320. * it with the config table. This function will take care of old/new
  6321. * devices and schedule adding/removing them from the mid-layer
  6322. * as appropriate.
  6323. *
  6324. * Return value:
  6325. * IPR_RC_JOB_CONTINUE
  6326. **/
  6327. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6328. {
  6329. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6330. struct ipr_resource_entry *res, *temp;
  6331. struct ipr_config_table_entry_wrapper cfgtew;
  6332. int entries, found, flag, i;
  6333. LIST_HEAD(old_res);
  6334. ENTER;
  6335. if (ioa_cfg->sis64)
  6336. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6337. else
  6338. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6339. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6340. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6341. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6342. list_move_tail(&res->queue, &old_res);
  6343. if (ioa_cfg->sis64)
  6344. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6345. else
  6346. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6347. for (i = 0; i < entries; i++) {
  6348. if (ioa_cfg->sis64)
  6349. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6350. else
  6351. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6352. found = 0;
  6353. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6354. if (ipr_is_same_device(res, &cfgtew)) {
  6355. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6356. found = 1;
  6357. break;
  6358. }
  6359. }
  6360. if (!found) {
  6361. if (list_empty(&ioa_cfg->free_res_q)) {
  6362. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6363. break;
  6364. }
  6365. found = 1;
  6366. res = list_entry(ioa_cfg->free_res_q.next,
  6367. struct ipr_resource_entry, queue);
  6368. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6369. ipr_init_res_entry(res, &cfgtew);
  6370. res->add_to_ml = 1;
  6371. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6372. res->sdev->allow_restart = 1;
  6373. if (found)
  6374. ipr_update_res_entry(res, &cfgtew);
  6375. }
  6376. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6377. if (res->sdev) {
  6378. res->del_from_ml = 1;
  6379. res->res_handle = IPR_INVALID_RES_HANDLE;
  6380. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6381. }
  6382. }
  6383. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6384. ipr_clear_res_target(res);
  6385. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6386. }
  6387. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6388. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6389. else
  6390. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6391. LEAVE;
  6392. return IPR_RC_JOB_CONTINUE;
  6393. }
  6394. /**
  6395. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6396. * @ipr_cmd: ipr command struct
  6397. *
  6398. * This function sends a Query IOA Configuration command
  6399. * to the adapter to retrieve the IOA configuration table.
  6400. *
  6401. * Return value:
  6402. * IPR_RC_JOB_RETURN
  6403. **/
  6404. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6405. {
  6406. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6407. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6408. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6409. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6410. ENTER;
  6411. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6412. ioa_cfg->dual_raid = 1;
  6413. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6414. ucode_vpd->major_release, ucode_vpd->card_type,
  6415. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6416. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6417. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6418. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6419. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6420. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6421. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6422. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6423. IPR_IOADL_FLAGS_READ_LAST);
  6424. ipr_cmd->job_step = ipr_init_res_table;
  6425. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6426. LEAVE;
  6427. return IPR_RC_JOB_RETURN;
  6428. }
  6429. /**
  6430. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6431. * @ipr_cmd: ipr command struct
  6432. *
  6433. * This utility function sends an inquiry to the adapter.
  6434. *
  6435. * Return value:
  6436. * none
  6437. **/
  6438. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6439. dma_addr_t dma_addr, u8 xfer_len)
  6440. {
  6441. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6442. ENTER;
  6443. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6444. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6445. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  6446. ioarcb->cmd_pkt.cdb[1] = flags;
  6447. ioarcb->cmd_pkt.cdb[2] = page;
  6448. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6449. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6450. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6451. LEAVE;
  6452. }
  6453. /**
  6454. * ipr_inquiry_page_supported - Is the given inquiry page supported
  6455. * @page0: inquiry page 0 buffer
  6456. * @page: page code.
  6457. *
  6458. * This function determines if the specified inquiry page is supported.
  6459. *
  6460. * Return value:
  6461. * 1 if page is supported / 0 if not
  6462. **/
  6463. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  6464. {
  6465. int i;
  6466. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  6467. if (page0->page[i] == page)
  6468. return 1;
  6469. return 0;
  6470. }
  6471. /**
  6472. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  6473. * @ipr_cmd: ipr command struct
  6474. *
  6475. * This function sends a Page 0xD0 inquiry to the adapter
  6476. * to retrieve adapter capabilities.
  6477. *
  6478. * Return value:
  6479. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6480. **/
  6481. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  6482. {
  6483. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6484. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6485. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6486. ENTER;
  6487. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6488. memset(cap, 0, sizeof(*cap));
  6489. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  6490. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  6491. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  6492. sizeof(struct ipr_inquiry_cap));
  6493. return IPR_RC_JOB_RETURN;
  6494. }
  6495. LEAVE;
  6496. return IPR_RC_JOB_CONTINUE;
  6497. }
  6498. /**
  6499. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  6500. * @ipr_cmd: ipr command struct
  6501. *
  6502. * This function sends a Page 3 inquiry to the adapter
  6503. * to retrieve software VPD information.
  6504. *
  6505. * Return value:
  6506. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6507. **/
  6508. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  6509. {
  6510. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6511. ENTER;
  6512. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  6513. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  6514. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  6515. sizeof(struct ipr_inquiry_page3));
  6516. LEAVE;
  6517. return IPR_RC_JOB_RETURN;
  6518. }
  6519. /**
  6520. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  6521. * @ipr_cmd: ipr command struct
  6522. *
  6523. * This function sends a Page 0 inquiry to the adapter
  6524. * to retrieve supported inquiry pages.
  6525. *
  6526. * Return value:
  6527. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6528. **/
  6529. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  6530. {
  6531. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6532. char type[5];
  6533. ENTER;
  6534. /* Grab the type out of the VPD and store it away */
  6535. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  6536. type[4] = '\0';
  6537. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  6538. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  6539. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  6540. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  6541. sizeof(struct ipr_inquiry_page0));
  6542. LEAVE;
  6543. return IPR_RC_JOB_RETURN;
  6544. }
  6545. /**
  6546. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  6547. * @ipr_cmd: ipr command struct
  6548. *
  6549. * This function sends a standard inquiry to the adapter.
  6550. *
  6551. * Return value:
  6552. * IPR_RC_JOB_RETURN
  6553. **/
  6554. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  6555. {
  6556. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6557. ENTER;
  6558. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  6559. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  6560. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  6561. sizeof(struct ipr_ioa_vpd));
  6562. LEAVE;
  6563. return IPR_RC_JOB_RETURN;
  6564. }
  6565. /**
  6566. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  6567. * @ipr_cmd: ipr command struct
  6568. *
  6569. * This function send an Identify Host Request Response Queue
  6570. * command to establish the HRRQ with the adapter.
  6571. *
  6572. * Return value:
  6573. * IPR_RC_JOB_RETURN
  6574. **/
  6575. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  6576. {
  6577. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6578. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6579. struct ipr_hrr_queue *hrrq;
  6580. ENTER;
  6581. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  6582. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  6583. if (ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num) {
  6584. hrrq = &ioa_cfg->hrrq[ioa_cfg->identify_hrrq_index];
  6585. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  6586. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6587. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6588. if (ioa_cfg->sis64)
  6589. ioarcb->cmd_pkt.cdb[1] = 0x1;
  6590. if (ioa_cfg->nvectors == 1)
  6591. ioarcb->cmd_pkt.cdb[1] &= ~IPR_ID_HRRQ_SELE_ENABLE;
  6592. else
  6593. ioarcb->cmd_pkt.cdb[1] |= IPR_ID_HRRQ_SELE_ENABLE;
  6594. ioarcb->cmd_pkt.cdb[2] =
  6595. ((u64) hrrq->host_rrq_dma >> 24) & 0xff;
  6596. ioarcb->cmd_pkt.cdb[3] =
  6597. ((u64) hrrq->host_rrq_dma >> 16) & 0xff;
  6598. ioarcb->cmd_pkt.cdb[4] =
  6599. ((u64) hrrq->host_rrq_dma >> 8) & 0xff;
  6600. ioarcb->cmd_pkt.cdb[5] =
  6601. ((u64) hrrq->host_rrq_dma) & 0xff;
  6602. ioarcb->cmd_pkt.cdb[7] =
  6603. ((sizeof(u32) * hrrq->size) >> 8) & 0xff;
  6604. ioarcb->cmd_pkt.cdb[8] =
  6605. (sizeof(u32) * hrrq->size) & 0xff;
  6606. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6607. ioarcb->cmd_pkt.cdb[9] =
  6608. ioa_cfg->identify_hrrq_index;
  6609. if (ioa_cfg->sis64) {
  6610. ioarcb->cmd_pkt.cdb[10] =
  6611. ((u64) hrrq->host_rrq_dma >> 56) & 0xff;
  6612. ioarcb->cmd_pkt.cdb[11] =
  6613. ((u64) hrrq->host_rrq_dma >> 48) & 0xff;
  6614. ioarcb->cmd_pkt.cdb[12] =
  6615. ((u64) hrrq->host_rrq_dma >> 40) & 0xff;
  6616. ioarcb->cmd_pkt.cdb[13] =
  6617. ((u64) hrrq->host_rrq_dma >> 32) & 0xff;
  6618. }
  6619. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6620. ioarcb->cmd_pkt.cdb[14] =
  6621. ioa_cfg->identify_hrrq_index;
  6622. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6623. IPR_INTERNAL_TIMEOUT);
  6624. if (++ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num)
  6625. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6626. LEAVE;
  6627. return IPR_RC_JOB_RETURN;
  6628. }
  6629. LEAVE;
  6630. return IPR_RC_JOB_CONTINUE;
  6631. }
  6632. /**
  6633. * ipr_reset_timer_done - Adapter reset timer function
  6634. * @ipr_cmd: ipr command struct
  6635. *
  6636. * Description: This function is used in adapter reset processing
  6637. * for timing events. If the reset_cmd pointer in the IOA
  6638. * config struct is not this adapter's we are doing nested
  6639. * resets and fail_all_ops will take care of freeing the
  6640. * command block.
  6641. *
  6642. * Return value:
  6643. * none
  6644. **/
  6645. static void ipr_reset_timer_done(struct ipr_cmnd *ipr_cmd)
  6646. {
  6647. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6648. unsigned long lock_flags = 0;
  6649. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  6650. if (ioa_cfg->reset_cmd == ipr_cmd) {
  6651. list_del(&ipr_cmd->queue);
  6652. ipr_cmd->done(ipr_cmd);
  6653. }
  6654. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  6655. }
  6656. /**
  6657. * ipr_reset_start_timer - Start a timer for adapter reset job
  6658. * @ipr_cmd: ipr command struct
  6659. * @timeout: timeout value
  6660. *
  6661. * Description: This function is used in adapter reset processing
  6662. * for timing events. If the reset_cmd pointer in the IOA
  6663. * config struct is not this adapter's we are doing nested
  6664. * resets and fail_all_ops will take care of freeing the
  6665. * command block.
  6666. *
  6667. * Return value:
  6668. * none
  6669. **/
  6670. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  6671. unsigned long timeout)
  6672. {
  6673. ENTER;
  6674. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6675. ipr_cmd->done = ipr_reset_ioa_job;
  6676. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6677. ipr_cmd->timer.expires = jiffies + timeout;
  6678. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_reset_timer_done;
  6679. add_timer(&ipr_cmd->timer);
  6680. }
  6681. /**
  6682. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  6683. * @ioa_cfg: ioa cfg struct
  6684. *
  6685. * Return value:
  6686. * nothing
  6687. **/
  6688. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  6689. {
  6690. struct ipr_hrr_queue *hrrq;
  6691. for_each_hrrq(hrrq, ioa_cfg) {
  6692. spin_lock(&hrrq->_lock);
  6693. memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size);
  6694. /* Initialize Host RRQ pointers */
  6695. hrrq->hrrq_start = hrrq->host_rrq;
  6696. hrrq->hrrq_end = &hrrq->host_rrq[hrrq->size - 1];
  6697. hrrq->hrrq_curr = hrrq->hrrq_start;
  6698. hrrq->toggle_bit = 1;
  6699. spin_unlock(&hrrq->_lock);
  6700. }
  6701. wmb();
  6702. ioa_cfg->identify_hrrq_index = 0;
  6703. if (ioa_cfg->hrrq_num == 1)
  6704. atomic_set(&ioa_cfg->hrrq_index, 0);
  6705. else
  6706. atomic_set(&ioa_cfg->hrrq_index, 1);
  6707. /* Zero out config table */
  6708. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  6709. }
  6710. /**
  6711. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  6712. * @ipr_cmd: ipr command struct
  6713. *
  6714. * Return value:
  6715. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6716. **/
  6717. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  6718. {
  6719. unsigned long stage, stage_time;
  6720. u32 feedback;
  6721. volatile u32 int_reg;
  6722. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6723. u64 maskval = 0;
  6724. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  6725. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  6726. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  6727. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  6728. /* sanity check the stage_time value */
  6729. if (stage_time == 0)
  6730. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  6731. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  6732. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  6733. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  6734. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  6735. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  6736. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  6737. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6738. stage_time = ioa_cfg->transop_timeout;
  6739. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6740. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  6741. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6742. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6743. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6744. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6745. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  6746. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  6747. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6748. return IPR_RC_JOB_CONTINUE;
  6749. }
  6750. }
  6751. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6752. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  6753. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6754. ipr_cmd->done = ipr_reset_ioa_job;
  6755. add_timer(&ipr_cmd->timer);
  6756. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6757. return IPR_RC_JOB_RETURN;
  6758. }
  6759. /**
  6760. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  6761. * @ipr_cmd: ipr command struct
  6762. *
  6763. * This function reinitializes some control blocks and
  6764. * enables destructive diagnostics on the adapter.
  6765. *
  6766. * Return value:
  6767. * IPR_RC_JOB_RETURN
  6768. **/
  6769. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  6770. {
  6771. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6772. volatile u32 int_reg;
  6773. volatile u64 maskval;
  6774. int i;
  6775. ENTER;
  6776. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6777. ipr_init_ioa_mem(ioa_cfg);
  6778. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  6779. spin_lock(&ioa_cfg->hrrq[i]._lock);
  6780. ioa_cfg->hrrq[i].allow_interrupts = 1;
  6781. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  6782. }
  6783. wmb();
  6784. if (ioa_cfg->sis64) {
  6785. /* Set the adapter to the correct endian mode. */
  6786. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6787. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  6788. }
  6789. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6790. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6791. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  6792. ioa_cfg->regs.clr_interrupt_mask_reg32);
  6793. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6794. return IPR_RC_JOB_CONTINUE;
  6795. }
  6796. /* Enable destructive diagnostics on IOA */
  6797. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  6798. if (ioa_cfg->sis64) {
  6799. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6800. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  6801. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  6802. } else
  6803. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  6804. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6805. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  6806. if (ioa_cfg->sis64) {
  6807. ipr_cmd->job_step = ipr_reset_next_stage;
  6808. return IPR_RC_JOB_CONTINUE;
  6809. }
  6810. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6811. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  6812. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6813. ipr_cmd->done = ipr_reset_ioa_job;
  6814. add_timer(&ipr_cmd->timer);
  6815. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6816. LEAVE;
  6817. return IPR_RC_JOB_RETURN;
  6818. }
  6819. /**
  6820. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  6821. * @ipr_cmd: ipr command struct
  6822. *
  6823. * This function is invoked when an adapter dump has run out
  6824. * of processing time.
  6825. *
  6826. * Return value:
  6827. * IPR_RC_JOB_CONTINUE
  6828. **/
  6829. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  6830. {
  6831. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6832. if (ioa_cfg->sdt_state == GET_DUMP)
  6833. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6834. else if (ioa_cfg->sdt_state == READ_DUMP)
  6835. ioa_cfg->sdt_state = ABORT_DUMP;
  6836. ioa_cfg->dump_timeout = 1;
  6837. ipr_cmd->job_step = ipr_reset_alert;
  6838. return IPR_RC_JOB_CONTINUE;
  6839. }
  6840. /**
  6841. * ipr_unit_check_no_data - Log a unit check/no data error log
  6842. * @ioa_cfg: ioa config struct
  6843. *
  6844. * Logs an error indicating the adapter unit checked, but for some
  6845. * reason, we were unable to fetch the unit check buffer.
  6846. *
  6847. * Return value:
  6848. * nothing
  6849. **/
  6850. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  6851. {
  6852. ioa_cfg->errors_logged++;
  6853. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  6854. }
  6855. /**
  6856. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  6857. * @ioa_cfg: ioa config struct
  6858. *
  6859. * Fetches the unit check buffer from the adapter by clocking the data
  6860. * through the mailbox register.
  6861. *
  6862. * Return value:
  6863. * nothing
  6864. **/
  6865. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  6866. {
  6867. unsigned long mailbox;
  6868. struct ipr_hostrcb *hostrcb;
  6869. struct ipr_uc_sdt sdt;
  6870. int rc, length;
  6871. u32 ioasc;
  6872. mailbox = readl(ioa_cfg->ioa_mailbox);
  6873. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  6874. ipr_unit_check_no_data(ioa_cfg);
  6875. return;
  6876. }
  6877. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  6878. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  6879. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  6880. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  6881. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  6882. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  6883. ipr_unit_check_no_data(ioa_cfg);
  6884. return;
  6885. }
  6886. /* Find length of the first sdt entry (UC buffer) */
  6887. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  6888. length = be32_to_cpu(sdt.entry[0].end_token);
  6889. else
  6890. length = (be32_to_cpu(sdt.entry[0].end_token) -
  6891. be32_to_cpu(sdt.entry[0].start_token)) &
  6892. IPR_FMT2_MBX_ADDR_MASK;
  6893. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  6894. struct ipr_hostrcb, queue);
  6895. list_del(&hostrcb->queue);
  6896. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  6897. rc = ipr_get_ldump_data_section(ioa_cfg,
  6898. be32_to_cpu(sdt.entry[0].start_token),
  6899. (__be32 *)&hostrcb->hcam,
  6900. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  6901. if (!rc) {
  6902. ipr_handle_log_data(ioa_cfg, hostrcb);
  6903. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  6904. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  6905. ioa_cfg->sdt_state == GET_DUMP)
  6906. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6907. } else
  6908. ipr_unit_check_no_data(ioa_cfg);
  6909. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  6910. }
  6911. /**
  6912. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  6913. * @ipr_cmd: ipr command struct
  6914. *
  6915. * Description: This function will call to get the unit check buffer.
  6916. *
  6917. * Return value:
  6918. * IPR_RC_JOB_RETURN
  6919. **/
  6920. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  6921. {
  6922. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6923. ENTER;
  6924. ioa_cfg->ioa_unit_checked = 0;
  6925. ipr_get_unit_check_buffer(ioa_cfg);
  6926. ipr_cmd->job_step = ipr_reset_alert;
  6927. ipr_reset_start_timer(ipr_cmd, 0);
  6928. LEAVE;
  6929. return IPR_RC_JOB_RETURN;
  6930. }
  6931. /**
  6932. * ipr_reset_restore_cfg_space - Restore PCI config space.
  6933. * @ipr_cmd: ipr command struct
  6934. *
  6935. * Description: This function restores the saved PCI config space of
  6936. * the adapter, fails all outstanding ops back to the callers, and
  6937. * fetches the dump/unit check if applicable to this reset.
  6938. *
  6939. * Return value:
  6940. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6941. **/
  6942. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  6943. {
  6944. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6945. u32 int_reg;
  6946. ENTER;
  6947. ioa_cfg->pdev->state_saved = true;
  6948. pci_restore_state(ioa_cfg->pdev);
  6949. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  6950. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  6951. return IPR_RC_JOB_CONTINUE;
  6952. }
  6953. ipr_fail_all_ops(ioa_cfg);
  6954. if (ioa_cfg->sis64) {
  6955. /* Set the adapter to the correct endian mode. */
  6956. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6957. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  6958. }
  6959. if (ioa_cfg->ioa_unit_checked) {
  6960. if (ioa_cfg->sis64) {
  6961. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  6962. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  6963. return IPR_RC_JOB_RETURN;
  6964. } else {
  6965. ioa_cfg->ioa_unit_checked = 0;
  6966. ipr_get_unit_check_buffer(ioa_cfg);
  6967. ipr_cmd->job_step = ipr_reset_alert;
  6968. ipr_reset_start_timer(ipr_cmd, 0);
  6969. return IPR_RC_JOB_RETURN;
  6970. }
  6971. }
  6972. if (ioa_cfg->in_ioa_bringdown) {
  6973. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  6974. } else {
  6975. ipr_cmd->job_step = ipr_reset_enable_ioa;
  6976. if (GET_DUMP == ioa_cfg->sdt_state) {
  6977. ioa_cfg->sdt_state = READ_DUMP;
  6978. ioa_cfg->dump_timeout = 0;
  6979. if (ioa_cfg->sis64)
  6980. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  6981. else
  6982. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  6983. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  6984. schedule_work(&ioa_cfg->work_q);
  6985. return IPR_RC_JOB_RETURN;
  6986. }
  6987. }
  6988. LEAVE;
  6989. return IPR_RC_JOB_CONTINUE;
  6990. }
  6991. /**
  6992. * ipr_reset_bist_done - BIST has completed on the adapter.
  6993. * @ipr_cmd: ipr command struct
  6994. *
  6995. * Description: Unblock config space and resume the reset process.
  6996. *
  6997. * Return value:
  6998. * IPR_RC_JOB_CONTINUE
  6999. **/
  7000. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  7001. {
  7002. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7003. ENTER;
  7004. if (ioa_cfg->cfg_locked)
  7005. pci_cfg_access_unlock(ioa_cfg->pdev);
  7006. ioa_cfg->cfg_locked = 0;
  7007. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  7008. LEAVE;
  7009. return IPR_RC_JOB_CONTINUE;
  7010. }
  7011. /**
  7012. * ipr_reset_start_bist - Run BIST on the adapter.
  7013. * @ipr_cmd: ipr command struct
  7014. *
  7015. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  7016. *
  7017. * Return value:
  7018. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7019. **/
  7020. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  7021. {
  7022. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7023. int rc = PCIBIOS_SUCCESSFUL;
  7024. ENTER;
  7025. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  7026. writel(IPR_UPROCI_SIS64_START_BIST,
  7027. ioa_cfg->regs.set_uproc_interrupt_reg32);
  7028. else
  7029. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  7030. if (rc == PCIBIOS_SUCCESSFUL) {
  7031. ipr_cmd->job_step = ipr_reset_bist_done;
  7032. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7033. rc = IPR_RC_JOB_RETURN;
  7034. } else {
  7035. if (ioa_cfg->cfg_locked)
  7036. pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
  7037. ioa_cfg->cfg_locked = 0;
  7038. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7039. rc = IPR_RC_JOB_CONTINUE;
  7040. }
  7041. LEAVE;
  7042. return rc;
  7043. }
  7044. /**
  7045. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  7046. * @ipr_cmd: ipr command struct
  7047. *
  7048. * Description: This clears PCI reset to the adapter and delays two seconds.
  7049. *
  7050. * Return value:
  7051. * IPR_RC_JOB_RETURN
  7052. **/
  7053. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  7054. {
  7055. ENTER;
  7056. pci_set_pcie_reset_state(ipr_cmd->ioa_cfg->pdev, pcie_deassert_reset);
  7057. ipr_cmd->job_step = ipr_reset_bist_done;
  7058. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7059. LEAVE;
  7060. return IPR_RC_JOB_RETURN;
  7061. }
  7062. /**
  7063. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  7064. * @ipr_cmd: ipr command struct
  7065. *
  7066. * Description: This asserts PCI reset to the adapter.
  7067. *
  7068. * Return value:
  7069. * IPR_RC_JOB_RETURN
  7070. **/
  7071. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  7072. {
  7073. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7074. struct pci_dev *pdev = ioa_cfg->pdev;
  7075. ENTER;
  7076. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  7077. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  7078. ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
  7079. LEAVE;
  7080. return IPR_RC_JOB_RETURN;
  7081. }
  7082. /**
  7083. * ipr_reset_block_config_access_wait - Wait for permission to block config access
  7084. * @ipr_cmd: ipr command struct
  7085. *
  7086. * Description: This attempts to block config access to the IOA.
  7087. *
  7088. * Return value:
  7089. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7090. **/
  7091. static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
  7092. {
  7093. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7094. int rc = IPR_RC_JOB_CONTINUE;
  7095. if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
  7096. ioa_cfg->cfg_locked = 1;
  7097. ipr_cmd->job_step = ioa_cfg->reset;
  7098. } else {
  7099. if (ipr_cmd->u.time_left) {
  7100. rc = IPR_RC_JOB_RETURN;
  7101. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7102. ipr_reset_start_timer(ipr_cmd,
  7103. IPR_CHECK_FOR_RESET_TIMEOUT);
  7104. } else {
  7105. ipr_cmd->job_step = ioa_cfg->reset;
  7106. dev_err(&ioa_cfg->pdev->dev,
  7107. "Timed out waiting to lock config access. Resetting anyway.\n");
  7108. }
  7109. }
  7110. return rc;
  7111. }
  7112. /**
  7113. * ipr_reset_block_config_access - Block config access to the IOA
  7114. * @ipr_cmd: ipr command struct
  7115. *
  7116. * Description: This attempts to block config access to the IOA
  7117. *
  7118. * Return value:
  7119. * IPR_RC_JOB_CONTINUE
  7120. **/
  7121. static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
  7122. {
  7123. ipr_cmd->ioa_cfg->cfg_locked = 0;
  7124. ipr_cmd->job_step = ipr_reset_block_config_access_wait;
  7125. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7126. return IPR_RC_JOB_CONTINUE;
  7127. }
  7128. /**
  7129. * ipr_reset_allowed - Query whether or not IOA can be reset
  7130. * @ioa_cfg: ioa config struct
  7131. *
  7132. * Return value:
  7133. * 0 if reset not allowed / non-zero if reset is allowed
  7134. **/
  7135. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  7136. {
  7137. volatile u32 temp_reg;
  7138. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7139. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  7140. }
  7141. /**
  7142. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  7143. * @ipr_cmd: ipr command struct
  7144. *
  7145. * Description: This function waits for adapter permission to run BIST,
  7146. * then runs BIST. If the adapter does not give permission after a
  7147. * reasonable time, we will reset the adapter anyway. The impact of
  7148. * resetting the adapter without warning the adapter is the risk of
  7149. * losing the persistent error log on the adapter. If the adapter is
  7150. * reset while it is writing to the flash on the adapter, the flash
  7151. * segment will have bad ECC and be zeroed.
  7152. *
  7153. * Return value:
  7154. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7155. **/
  7156. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  7157. {
  7158. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7159. int rc = IPR_RC_JOB_RETURN;
  7160. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  7161. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7162. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7163. } else {
  7164. ipr_cmd->job_step = ipr_reset_block_config_access;
  7165. rc = IPR_RC_JOB_CONTINUE;
  7166. }
  7167. return rc;
  7168. }
  7169. /**
  7170. * ipr_reset_alert - Alert the adapter of a pending reset
  7171. * @ipr_cmd: ipr command struct
  7172. *
  7173. * Description: This function alerts the adapter that it will be reset.
  7174. * If memory space is not currently enabled, proceed directly
  7175. * to running BIST on the adapter. The timer must always be started
  7176. * so we guarantee we do not run BIST from ipr_isr.
  7177. *
  7178. * Return value:
  7179. * IPR_RC_JOB_RETURN
  7180. **/
  7181. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  7182. {
  7183. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7184. u16 cmd_reg;
  7185. int rc;
  7186. ENTER;
  7187. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  7188. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  7189. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  7190. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7191. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  7192. } else {
  7193. ipr_cmd->job_step = ipr_reset_block_config_access;
  7194. }
  7195. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7196. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7197. LEAVE;
  7198. return IPR_RC_JOB_RETURN;
  7199. }
  7200. /**
  7201. * ipr_reset_ucode_download_done - Microcode download completion
  7202. * @ipr_cmd: ipr command struct
  7203. *
  7204. * Description: This function unmaps the microcode download buffer.
  7205. *
  7206. * Return value:
  7207. * IPR_RC_JOB_CONTINUE
  7208. **/
  7209. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  7210. {
  7211. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7212. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7213. pci_unmap_sg(ioa_cfg->pdev, sglist->scatterlist,
  7214. sglist->num_sg, DMA_TO_DEVICE);
  7215. ipr_cmd->job_step = ipr_reset_alert;
  7216. return IPR_RC_JOB_CONTINUE;
  7217. }
  7218. /**
  7219. * ipr_reset_ucode_download - Download microcode to the adapter
  7220. * @ipr_cmd: ipr command struct
  7221. *
  7222. * Description: This function checks to see if it there is microcode
  7223. * to download to the adapter. If there is, a download is performed.
  7224. *
  7225. * Return value:
  7226. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7227. **/
  7228. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  7229. {
  7230. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7231. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7232. ENTER;
  7233. ipr_cmd->job_step = ipr_reset_alert;
  7234. if (!sglist)
  7235. return IPR_RC_JOB_CONTINUE;
  7236. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7237. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7238. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  7239. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  7240. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  7241. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  7242. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  7243. if (ioa_cfg->sis64)
  7244. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  7245. else
  7246. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  7247. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  7248. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7249. IPR_WRITE_BUFFER_TIMEOUT);
  7250. LEAVE;
  7251. return IPR_RC_JOB_RETURN;
  7252. }
  7253. /**
  7254. * ipr_reset_shutdown_ioa - Shutdown the adapter
  7255. * @ipr_cmd: ipr command struct
  7256. *
  7257. * Description: This function issues an adapter shutdown of the
  7258. * specified type to the specified adapter as part of the
  7259. * adapter reset job.
  7260. *
  7261. * Return value:
  7262. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7263. **/
  7264. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  7265. {
  7266. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7267. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  7268. unsigned long timeout;
  7269. int rc = IPR_RC_JOB_CONTINUE;
  7270. ENTER;
  7271. if (shutdown_type != IPR_SHUTDOWN_NONE &&
  7272. !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7273. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7274. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7275. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  7276. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  7277. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  7278. timeout = IPR_SHUTDOWN_TIMEOUT;
  7279. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  7280. timeout = IPR_INTERNAL_TIMEOUT;
  7281. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  7282. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  7283. else
  7284. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  7285. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  7286. rc = IPR_RC_JOB_RETURN;
  7287. ipr_cmd->job_step = ipr_reset_ucode_download;
  7288. } else
  7289. ipr_cmd->job_step = ipr_reset_alert;
  7290. LEAVE;
  7291. return rc;
  7292. }
  7293. /**
  7294. * ipr_reset_ioa_job - Adapter reset job
  7295. * @ipr_cmd: ipr command struct
  7296. *
  7297. * Description: This function is the job router for the adapter reset job.
  7298. *
  7299. * Return value:
  7300. * none
  7301. **/
  7302. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  7303. {
  7304. u32 rc, ioasc;
  7305. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7306. do {
  7307. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  7308. if (ioa_cfg->reset_cmd != ipr_cmd) {
  7309. /*
  7310. * We are doing nested adapter resets and this is
  7311. * not the current reset job.
  7312. */
  7313. list_add_tail(&ipr_cmd->queue,
  7314. &ipr_cmd->hrrq->hrrq_free_q);
  7315. return;
  7316. }
  7317. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  7318. rc = ipr_cmd->job_step_failed(ipr_cmd);
  7319. if (rc == IPR_RC_JOB_RETURN)
  7320. return;
  7321. }
  7322. ipr_reinit_ipr_cmnd(ipr_cmd);
  7323. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  7324. rc = ipr_cmd->job_step(ipr_cmd);
  7325. } while (rc == IPR_RC_JOB_CONTINUE);
  7326. }
  7327. /**
  7328. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  7329. * @ioa_cfg: ioa config struct
  7330. * @job_step: first job step of reset job
  7331. * @shutdown_type: shutdown type
  7332. *
  7333. * Description: This function will initiate the reset of the given adapter
  7334. * starting at the selected job step.
  7335. * If the caller needs to wait on the completion of the reset,
  7336. * the caller must sleep on the reset_wait_q.
  7337. *
  7338. * Return value:
  7339. * none
  7340. **/
  7341. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7342. int (*job_step) (struct ipr_cmnd *),
  7343. enum ipr_shutdown_type shutdown_type)
  7344. {
  7345. struct ipr_cmnd *ipr_cmd;
  7346. int i;
  7347. ioa_cfg->in_reset_reload = 1;
  7348. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7349. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7350. ioa_cfg->hrrq[i].allow_cmds = 0;
  7351. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7352. }
  7353. wmb();
  7354. scsi_block_requests(ioa_cfg->host);
  7355. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  7356. ioa_cfg->reset_cmd = ipr_cmd;
  7357. ipr_cmd->job_step = job_step;
  7358. ipr_cmd->u.shutdown_type = shutdown_type;
  7359. ipr_reset_ioa_job(ipr_cmd);
  7360. }
  7361. /**
  7362. * ipr_initiate_ioa_reset - Initiate an adapter reset
  7363. * @ioa_cfg: ioa config struct
  7364. * @shutdown_type: shutdown type
  7365. *
  7366. * Description: This function will initiate the reset of the given adapter.
  7367. * If the caller needs to wait on the completion of the reset,
  7368. * the caller must sleep on the reset_wait_q.
  7369. *
  7370. * Return value:
  7371. * none
  7372. **/
  7373. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7374. enum ipr_shutdown_type shutdown_type)
  7375. {
  7376. int i;
  7377. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  7378. return;
  7379. if (ioa_cfg->in_reset_reload) {
  7380. if (ioa_cfg->sdt_state == GET_DUMP)
  7381. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7382. else if (ioa_cfg->sdt_state == READ_DUMP)
  7383. ioa_cfg->sdt_state = ABORT_DUMP;
  7384. }
  7385. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  7386. dev_err(&ioa_cfg->pdev->dev,
  7387. "IOA taken offline - error recovery failed\n");
  7388. ioa_cfg->reset_retries = 0;
  7389. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7390. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7391. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  7392. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7393. }
  7394. wmb();
  7395. if (ioa_cfg->in_ioa_bringdown) {
  7396. ioa_cfg->reset_cmd = NULL;
  7397. ioa_cfg->in_reset_reload = 0;
  7398. ipr_fail_all_ops(ioa_cfg);
  7399. wake_up_all(&ioa_cfg->reset_wait_q);
  7400. spin_unlock_irq(ioa_cfg->host->host_lock);
  7401. scsi_unblock_requests(ioa_cfg->host);
  7402. spin_lock_irq(ioa_cfg->host->host_lock);
  7403. return;
  7404. } else {
  7405. ioa_cfg->in_ioa_bringdown = 1;
  7406. shutdown_type = IPR_SHUTDOWN_NONE;
  7407. }
  7408. }
  7409. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  7410. shutdown_type);
  7411. }
  7412. /**
  7413. * ipr_reset_freeze - Hold off all I/O activity
  7414. * @ipr_cmd: ipr command struct
  7415. *
  7416. * Description: If the PCI slot is frozen, hold off all I/O
  7417. * activity; then, as soon as the slot is available again,
  7418. * initiate an adapter reset.
  7419. */
  7420. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  7421. {
  7422. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7423. int i;
  7424. /* Disallow new interrupts, avoid loop */
  7425. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7426. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7427. ioa_cfg->hrrq[i].allow_interrupts = 0;
  7428. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7429. }
  7430. wmb();
  7431. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7432. ipr_cmd->done = ipr_reset_ioa_job;
  7433. return IPR_RC_JOB_RETURN;
  7434. }
  7435. /**
  7436. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  7437. * @pdev: PCI device struct
  7438. *
  7439. * Description: This routine is called to tell us that the PCI bus
  7440. * is down. Can't do anything here, except put the device driver
  7441. * into a holding pattern, waiting for the PCI bus to come back.
  7442. */
  7443. static void ipr_pci_frozen(struct pci_dev *pdev)
  7444. {
  7445. unsigned long flags = 0;
  7446. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7447. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7448. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  7449. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7450. }
  7451. /**
  7452. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  7453. * @pdev: PCI device struct
  7454. *
  7455. * Description: This routine is called by the pci error recovery
  7456. * code after the PCI slot has been reset, just before we
  7457. * should resume normal operations.
  7458. */
  7459. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  7460. {
  7461. unsigned long flags = 0;
  7462. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7463. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7464. if (ioa_cfg->needs_warm_reset)
  7465. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7466. else
  7467. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  7468. IPR_SHUTDOWN_NONE);
  7469. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7470. return PCI_ERS_RESULT_RECOVERED;
  7471. }
  7472. /**
  7473. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  7474. * @pdev: PCI device struct
  7475. *
  7476. * Description: This routine is called when the PCI bus has
  7477. * permanently failed.
  7478. */
  7479. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  7480. {
  7481. unsigned long flags = 0;
  7482. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7483. int i;
  7484. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7485. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  7486. ioa_cfg->sdt_state = ABORT_DUMP;
  7487. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES;
  7488. ioa_cfg->in_ioa_bringdown = 1;
  7489. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7490. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7491. ioa_cfg->hrrq[i].allow_cmds = 0;
  7492. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7493. }
  7494. wmb();
  7495. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7496. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7497. }
  7498. /**
  7499. * ipr_pci_error_detected - Called when a PCI error is detected.
  7500. * @pdev: PCI device struct
  7501. * @state: PCI channel state
  7502. *
  7503. * Description: Called when a PCI error is detected.
  7504. *
  7505. * Return value:
  7506. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  7507. */
  7508. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  7509. pci_channel_state_t state)
  7510. {
  7511. switch (state) {
  7512. case pci_channel_io_frozen:
  7513. ipr_pci_frozen(pdev);
  7514. return PCI_ERS_RESULT_NEED_RESET;
  7515. case pci_channel_io_perm_failure:
  7516. ipr_pci_perm_failure(pdev);
  7517. return PCI_ERS_RESULT_DISCONNECT;
  7518. break;
  7519. default:
  7520. break;
  7521. }
  7522. return PCI_ERS_RESULT_NEED_RESET;
  7523. }
  7524. /**
  7525. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  7526. * @ioa_cfg: ioa cfg struct
  7527. *
  7528. * Description: This is the second phase of adapter intialization
  7529. * This function takes care of initilizing the adapter to the point
  7530. * where it can accept new commands.
  7531. * Return value:
  7532. * 0 on success / -EIO on failure
  7533. **/
  7534. static int ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  7535. {
  7536. int rc = 0;
  7537. unsigned long host_lock_flags = 0;
  7538. ENTER;
  7539. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7540. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  7541. if (ioa_cfg->needs_hard_reset) {
  7542. ioa_cfg->needs_hard_reset = 0;
  7543. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7544. } else
  7545. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  7546. IPR_SHUTDOWN_NONE);
  7547. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7548. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7549. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7550. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7551. rc = -EIO;
  7552. } else if (ipr_invalid_adapter(ioa_cfg)) {
  7553. if (!ipr_testmode)
  7554. rc = -EIO;
  7555. dev_err(&ioa_cfg->pdev->dev,
  7556. "Adapter not supported in this hardware configuration.\n");
  7557. }
  7558. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7559. LEAVE;
  7560. return rc;
  7561. }
  7562. /**
  7563. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  7564. * @ioa_cfg: ioa config struct
  7565. *
  7566. * Return value:
  7567. * none
  7568. **/
  7569. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7570. {
  7571. int i;
  7572. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7573. if (ioa_cfg->ipr_cmnd_list[i])
  7574. pci_pool_free(ioa_cfg->ipr_cmd_pool,
  7575. ioa_cfg->ipr_cmnd_list[i],
  7576. ioa_cfg->ipr_cmnd_list_dma[i]);
  7577. ioa_cfg->ipr_cmnd_list[i] = NULL;
  7578. }
  7579. if (ioa_cfg->ipr_cmd_pool)
  7580. pci_pool_destroy(ioa_cfg->ipr_cmd_pool);
  7581. kfree(ioa_cfg->ipr_cmnd_list);
  7582. kfree(ioa_cfg->ipr_cmnd_list_dma);
  7583. ioa_cfg->ipr_cmnd_list = NULL;
  7584. ioa_cfg->ipr_cmnd_list_dma = NULL;
  7585. ioa_cfg->ipr_cmd_pool = NULL;
  7586. }
  7587. /**
  7588. * ipr_free_mem - Frees memory allocated for an adapter
  7589. * @ioa_cfg: ioa cfg struct
  7590. *
  7591. * Return value:
  7592. * nothing
  7593. **/
  7594. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  7595. {
  7596. int i;
  7597. kfree(ioa_cfg->res_entries);
  7598. pci_free_consistent(ioa_cfg->pdev, sizeof(struct ipr_misc_cbs),
  7599. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7600. ipr_free_cmd_blks(ioa_cfg);
  7601. for (i = 0; i < ioa_cfg->hrrq_num; i++)
  7602. pci_free_consistent(ioa_cfg->pdev,
  7603. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7604. ioa_cfg->hrrq[i].host_rrq,
  7605. ioa_cfg->hrrq[i].host_rrq_dma);
  7606. pci_free_consistent(ioa_cfg->pdev, ioa_cfg->cfg_table_size,
  7607. ioa_cfg->u.cfg_table,
  7608. ioa_cfg->cfg_table_dma);
  7609. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7610. pci_free_consistent(ioa_cfg->pdev,
  7611. sizeof(struct ipr_hostrcb),
  7612. ioa_cfg->hostrcb[i],
  7613. ioa_cfg->hostrcb_dma[i]);
  7614. }
  7615. ipr_free_dump(ioa_cfg);
  7616. kfree(ioa_cfg->trace);
  7617. }
  7618. /**
  7619. * ipr_free_all_resources - Free all allocated resources for an adapter.
  7620. * @ipr_cmd: ipr command struct
  7621. *
  7622. * This function frees all allocated resources for the
  7623. * specified adapter.
  7624. *
  7625. * Return value:
  7626. * none
  7627. **/
  7628. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  7629. {
  7630. struct pci_dev *pdev = ioa_cfg->pdev;
  7631. ENTER;
  7632. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  7633. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  7634. int i;
  7635. for (i = 0; i < ioa_cfg->nvectors; i++)
  7636. free_irq(ioa_cfg->vectors_info[i].vec,
  7637. &ioa_cfg->hrrq[i]);
  7638. } else
  7639. free_irq(pdev->irq, &ioa_cfg->hrrq[0]);
  7640. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  7641. pci_disable_msi(pdev);
  7642. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  7643. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  7644. pci_disable_msix(pdev);
  7645. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  7646. }
  7647. iounmap(ioa_cfg->hdw_dma_regs);
  7648. pci_release_regions(pdev);
  7649. ipr_free_mem(ioa_cfg);
  7650. scsi_host_put(ioa_cfg->host);
  7651. pci_disable_device(pdev);
  7652. LEAVE;
  7653. }
  7654. /**
  7655. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  7656. * @ioa_cfg: ioa config struct
  7657. *
  7658. * Return value:
  7659. * 0 on success / -ENOMEM on allocation failure
  7660. **/
  7661. static int ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7662. {
  7663. struct ipr_cmnd *ipr_cmd;
  7664. struct ipr_ioarcb *ioarcb;
  7665. dma_addr_t dma_addr;
  7666. int i, entries_each_hrrq, hrrq_id = 0;
  7667. ioa_cfg->ipr_cmd_pool = pci_pool_create(IPR_NAME, ioa_cfg->pdev,
  7668. sizeof(struct ipr_cmnd), 512, 0);
  7669. if (!ioa_cfg->ipr_cmd_pool)
  7670. return -ENOMEM;
  7671. ioa_cfg->ipr_cmnd_list = kcalloc(IPR_NUM_CMD_BLKS, sizeof(struct ipr_cmnd *), GFP_KERNEL);
  7672. ioa_cfg->ipr_cmnd_list_dma = kcalloc(IPR_NUM_CMD_BLKS, sizeof(dma_addr_t), GFP_KERNEL);
  7673. if (!ioa_cfg->ipr_cmnd_list || !ioa_cfg->ipr_cmnd_list_dma) {
  7674. ipr_free_cmd_blks(ioa_cfg);
  7675. return -ENOMEM;
  7676. }
  7677. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7678. if (ioa_cfg->hrrq_num > 1) {
  7679. if (i == 0) {
  7680. entries_each_hrrq = IPR_NUM_INTERNAL_CMD_BLKS;
  7681. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7682. ioa_cfg->hrrq[i].max_cmd_id =
  7683. (entries_each_hrrq - 1);
  7684. } else {
  7685. entries_each_hrrq =
  7686. IPR_NUM_BASE_CMD_BLKS/
  7687. (ioa_cfg->hrrq_num - 1);
  7688. ioa_cfg->hrrq[i].min_cmd_id =
  7689. IPR_NUM_INTERNAL_CMD_BLKS +
  7690. (i - 1) * entries_each_hrrq;
  7691. ioa_cfg->hrrq[i].max_cmd_id =
  7692. (IPR_NUM_INTERNAL_CMD_BLKS +
  7693. i * entries_each_hrrq - 1);
  7694. }
  7695. } else {
  7696. entries_each_hrrq = IPR_NUM_CMD_BLKS;
  7697. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7698. ioa_cfg->hrrq[i].max_cmd_id = (entries_each_hrrq - 1);
  7699. }
  7700. ioa_cfg->hrrq[i].size = entries_each_hrrq;
  7701. }
  7702. BUG_ON(ioa_cfg->hrrq_num == 0);
  7703. i = IPR_NUM_CMD_BLKS -
  7704. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id - 1;
  7705. if (i > 0) {
  7706. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].size += i;
  7707. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id += i;
  7708. }
  7709. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7710. ipr_cmd = pci_pool_alloc(ioa_cfg->ipr_cmd_pool, GFP_KERNEL, &dma_addr);
  7711. if (!ipr_cmd) {
  7712. ipr_free_cmd_blks(ioa_cfg);
  7713. return -ENOMEM;
  7714. }
  7715. memset(ipr_cmd, 0, sizeof(*ipr_cmd));
  7716. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  7717. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  7718. ioarcb = &ipr_cmd->ioarcb;
  7719. ipr_cmd->dma_addr = dma_addr;
  7720. if (ioa_cfg->sis64)
  7721. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  7722. else
  7723. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  7724. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  7725. if (ioa_cfg->sis64) {
  7726. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  7727. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  7728. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  7729. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  7730. } else {
  7731. ioarcb->write_ioadl_addr =
  7732. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  7733. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  7734. ioarcb->ioasa_host_pci_addr =
  7735. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  7736. }
  7737. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  7738. ipr_cmd->cmd_index = i;
  7739. ipr_cmd->ioa_cfg = ioa_cfg;
  7740. ipr_cmd->sense_buffer_dma = dma_addr +
  7741. offsetof(struct ipr_cmnd, sense_buffer);
  7742. ipr_cmd->ioarcb.cmd_pkt.hrrq_id = hrrq_id;
  7743. ipr_cmd->hrrq = &ioa_cfg->hrrq[hrrq_id];
  7744. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7745. if (i >= ioa_cfg->hrrq[hrrq_id].max_cmd_id)
  7746. hrrq_id++;
  7747. }
  7748. return 0;
  7749. }
  7750. /**
  7751. * ipr_alloc_mem - Allocate memory for an adapter
  7752. * @ioa_cfg: ioa config struct
  7753. *
  7754. * Return value:
  7755. * 0 on success / non-zero for error
  7756. **/
  7757. static int ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  7758. {
  7759. struct pci_dev *pdev = ioa_cfg->pdev;
  7760. int i, rc = -ENOMEM;
  7761. ENTER;
  7762. ioa_cfg->res_entries = kzalloc(sizeof(struct ipr_resource_entry) *
  7763. ioa_cfg->max_devs_supported, GFP_KERNEL);
  7764. if (!ioa_cfg->res_entries)
  7765. goto out;
  7766. if (ioa_cfg->sis64) {
  7767. ioa_cfg->target_ids = kzalloc(sizeof(unsigned long) *
  7768. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7769. ioa_cfg->array_ids = kzalloc(sizeof(unsigned long) *
  7770. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7771. ioa_cfg->vset_ids = kzalloc(sizeof(unsigned long) *
  7772. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7773. if (!ioa_cfg->target_ids || !ioa_cfg->array_ids
  7774. || !ioa_cfg->vset_ids)
  7775. goto out_free_res_entries;
  7776. }
  7777. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  7778. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  7779. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  7780. }
  7781. ioa_cfg->vpd_cbs = pci_alloc_consistent(ioa_cfg->pdev,
  7782. sizeof(struct ipr_misc_cbs),
  7783. &ioa_cfg->vpd_cbs_dma);
  7784. if (!ioa_cfg->vpd_cbs)
  7785. goto out_free_res_entries;
  7786. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7787. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_free_q);
  7788. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_pending_q);
  7789. spin_lock_init(&ioa_cfg->hrrq[i]._lock);
  7790. if (i == 0)
  7791. ioa_cfg->hrrq[i].lock = ioa_cfg->host->host_lock;
  7792. else
  7793. ioa_cfg->hrrq[i].lock = &ioa_cfg->hrrq[i]._lock;
  7794. }
  7795. if (ipr_alloc_cmd_blks(ioa_cfg))
  7796. goto out_free_vpd_cbs;
  7797. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7798. ioa_cfg->hrrq[i].host_rrq = pci_alloc_consistent(ioa_cfg->pdev,
  7799. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7800. &ioa_cfg->hrrq[i].host_rrq_dma);
  7801. if (!ioa_cfg->hrrq[i].host_rrq) {
  7802. while (--i > 0)
  7803. pci_free_consistent(pdev,
  7804. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7805. ioa_cfg->hrrq[i].host_rrq,
  7806. ioa_cfg->hrrq[i].host_rrq_dma);
  7807. goto out_ipr_free_cmd_blocks;
  7808. }
  7809. ioa_cfg->hrrq[i].ioa_cfg = ioa_cfg;
  7810. }
  7811. ioa_cfg->u.cfg_table = pci_alloc_consistent(ioa_cfg->pdev,
  7812. ioa_cfg->cfg_table_size,
  7813. &ioa_cfg->cfg_table_dma);
  7814. if (!ioa_cfg->u.cfg_table)
  7815. goto out_free_host_rrq;
  7816. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7817. ioa_cfg->hostrcb[i] = pci_alloc_consistent(ioa_cfg->pdev,
  7818. sizeof(struct ipr_hostrcb),
  7819. &ioa_cfg->hostrcb_dma[i]);
  7820. if (!ioa_cfg->hostrcb[i])
  7821. goto out_free_hostrcb_dma;
  7822. ioa_cfg->hostrcb[i]->hostrcb_dma =
  7823. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  7824. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  7825. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  7826. }
  7827. ioa_cfg->trace = kzalloc(sizeof(struct ipr_trace_entry) *
  7828. IPR_NUM_TRACE_ENTRIES, GFP_KERNEL);
  7829. if (!ioa_cfg->trace)
  7830. goto out_free_hostrcb_dma;
  7831. rc = 0;
  7832. out:
  7833. LEAVE;
  7834. return rc;
  7835. out_free_hostrcb_dma:
  7836. while (i-- > 0) {
  7837. pci_free_consistent(pdev, sizeof(struct ipr_hostrcb),
  7838. ioa_cfg->hostrcb[i],
  7839. ioa_cfg->hostrcb_dma[i]);
  7840. }
  7841. pci_free_consistent(pdev, ioa_cfg->cfg_table_size,
  7842. ioa_cfg->u.cfg_table,
  7843. ioa_cfg->cfg_table_dma);
  7844. out_free_host_rrq:
  7845. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7846. pci_free_consistent(pdev,
  7847. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7848. ioa_cfg->hrrq[i].host_rrq,
  7849. ioa_cfg->hrrq[i].host_rrq_dma);
  7850. }
  7851. out_ipr_free_cmd_blocks:
  7852. ipr_free_cmd_blks(ioa_cfg);
  7853. out_free_vpd_cbs:
  7854. pci_free_consistent(pdev, sizeof(struct ipr_misc_cbs),
  7855. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7856. out_free_res_entries:
  7857. kfree(ioa_cfg->res_entries);
  7858. kfree(ioa_cfg->target_ids);
  7859. kfree(ioa_cfg->array_ids);
  7860. kfree(ioa_cfg->vset_ids);
  7861. goto out;
  7862. }
  7863. /**
  7864. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  7865. * @ioa_cfg: ioa config struct
  7866. *
  7867. * Return value:
  7868. * none
  7869. **/
  7870. static void ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  7871. {
  7872. int i;
  7873. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  7874. ioa_cfg->bus_attr[i].bus = i;
  7875. ioa_cfg->bus_attr[i].qas_enabled = 0;
  7876. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  7877. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  7878. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  7879. else
  7880. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  7881. }
  7882. }
  7883. /**
  7884. * ipr_init_ioa_cfg - Initialize IOA config struct
  7885. * @ioa_cfg: ioa config struct
  7886. * @host: scsi host struct
  7887. * @pdev: PCI dev struct
  7888. *
  7889. * Return value:
  7890. * none
  7891. **/
  7892. static void ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  7893. struct Scsi_Host *host, struct pci_dev *pdev)
  7894. {
  7895. const struct ipr_interrupt_offsets *p;
  7896. struct ipr_interrupts *t;
  7897. void __iomem *base;
  7898. ioa_cfg->host = host;
  7899. ioa_cfg->pdev = pdev;
  7900. ioa_cfg->log_level = ipr_log_level;
  7901. ioa_cfg->doorbell = IPR_DOORBELL;
  7902. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  7903. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  7904. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  7905. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  7906. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  7907. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  7908. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  7909. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  7910. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  7911. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  7912. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  7913. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  7914. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  7915. ioa_cfg->sdt_state = INACTIVE;
  7916. ipr_initialize_bus_attr(ioa_cfg);
  7917. ioa_cfg->max_devs_supported = ipr_max_devs;
  7918. if (ioa_cfg->sis64) {
  7919. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  7920. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  7921. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  7922. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  7923. } else {
  7924. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  7925. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  7926. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  7927. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  7928. }
  7929. host->max_channel = IPR_MAX_BUS_TO_SCAN;
  7930. host->unique_id = host->host_no;
  7931. host->max_cmd_len = IPR_MAX_CDB_LEN;
  7932. host->can_queue = ioa_cfg->max_cmds;
  7933. pci_set_drvdata(pdev, ioa_cfg);
  7934. p = &ioa_cfg->chip_cfg->regs;
  7935. t = &ioa_cfg->regs;
  7936. base = ioa_cfg->hdw_dma_regs;
  7937. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  7938. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  7939. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  7940. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  7941. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  7942. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  7943. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  7944. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  7945. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  7946. t->ioarrin_reg = base + p->ioarrin_reg;
  7947. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  7948. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  7949. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  7950. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  7951. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  7952. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  7953. if (ioa_cfg->sis64) {
  7954. t->init_feedback_reg = base + p->init_feedback_reg;
  7955. t->dump_addr_reg = base + p->dump_addr_reg;
  7956. t->dump_data_reg = base + p->dump_data_reg;
  7957. t->endian_swap_reg = base + p->endian_swap_reg;
  7958. }
  7959. }
  7960. /**
  7961. * ipr_get_chip_info - Find adapter chip information
  7962. * @dev_id: PCI device id struct
  7963. *
  7964. * Return value:
  7965. * ptr to chip information on success / NULL on failure
  7966. **/
  7967. static const struct ipr_chip_t *
  7968. ipr_get_chip_info(const struct pci_device_id *dev_id)
  7969. {
  7970. int i;
  7971. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  7972. if (ipr_chip[i].vendor == dev_id->vendor &&
  7973. ipr_chip[i].device == dev_id->device)
  7974. return &ipr_chip[i];
  7975. return NULL;
  7976. }
  7977. static int ipr_enable_msix(struct ipr_ioa_cfg *ioa_cfg)
  7978. {
  7979. struct msix_entry entries[IPR_MAX_MSIX_VECTORS];
  7980. int i, err, vectors;
  7981. for (i = 0; i < ARRAY_SIZE(entries); ++i)
  7982. entries[i].entry = i;
  7983. vectors = ipr_number_of_msix;
  7984. while ((err = pci_enable_msix(ioa_cfg->pdev, entries, vectors)) > 0)
  7985. vectors = err;
  7986. if (err < 0) {
  7987. pci_disable_msix(ioa_cfg->pdev);
  7988. return err;
  7989. }
  7990. if (!err) {
  7991. for (i = 0; i < vectors; i++)
  7992. ioa_cfg->vectors_info[i].vec = entries[i].vector;
  7993. ioa_cfg->nvectors = vectors;
  7994. }
  7995. return err;
  7996. }
  7997. static int ipr_enable_msi(struct ipr_ioa_cfg *ioa_cfg)
  7998. {
  7999. int i, err, vectors;
  8000. vectors = ipr_number_of_msix;
  8001. while ((err = pci_enable_msi_block(ioa_cfg->pdev, vectors)) > 0)
  8002. vectors = err;
  8003. if (err < 0) {
  8004. pci_disable_msi(ioa_cfg->pdev);
  8005. return err;
  8006. }
  8007. if (!err) {
  8008. for (i = 0; i < vectors; i++)
  8009. ioa_cfg->vectors_info[i].vec = ioa_cfg->pdev->irq + i;
  8010. ioa_cfg->nvectors = vectors;
  8011. }
  8012. return err;
  8013. }
  8014. static void name_msi_vectors(struct ipr_ioa_cfg *ioa_cfg)
  8015. {
  8016. int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1;
  8017. for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) {
  8018. snprintf(ioa_cfg->vectors_info[vec_idx].desc, n,
  8019. "host%d-%d", ioa_cfg->host->host_no, vec_idx);
  8020. ioa_cfg->vectors_info[vec_idx].
  8021. desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0;
  8022. }
  8023. }
  8024. static int ipr_request_other_msi_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8025. {
  8026. int i, rc;
  8027. for (i = 1; i < ioa_cfg->nvectors; i++) {
  8028. rc = request_irq(ioa_cfg->vectors_info[i].vec,
  8029. ipr_isr_mhrrq,
  8030. 0,
  8031. ioa_cfg->vectors_info[i].desc,
  8032. &ioa_cfg->hrrq[i]);
  8033. if (rc) {
  8034. while (--i >= 0)
  8035. free_irq(ioa_cfg->vectors_info[i].vec,
  8036. &ioa_cfg->hrrq[i]);
  8037. return rc;
  8038. }
  8039. }
  8040. return 0;
  8041. }
  8042. /**
  8043. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  8044. * @pdev: PCI device struct
  8045. *
  8046. * Description: Simply set the msi_received flag to 1 indicating that
  8047. * Message Signaled Interrupts are supported.
  8048. *
  8049. * Return value:
  8050. * 0 on success / non-zero on failure
  8051. **/
  8052. static irqreturn_t ipr_test_intr(int irq, void *devp)
  8053. {
  8054. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  8055. unsigned long lock_flags = 0;
  8056. irqreturn_t rc = IRQ_HANDLED;
  8057. dev_info(&ioa_cfg->pdev->dev, "Received IRQ : %d\n", irq);
  8058. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8059. ioa_cfg->msi_received = 1;
  8060. wake_up(&ioa_cfg->msi_wait_q);
  8061. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8062. return rc;
  8063. }
  8064. /**
  8065. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  8066. * @pdev: PCI device struct
  8067. *
  8068. * Description: The return value from pci_enable_msi() can not always be
  8069. * trusted. This routine sets up and initiates a test interrupt to determine
  8070. * if the interrupt is received via the ipr_test_intr() service routine.
  8071. * If the tests fails, the driver will fall back to LSI.
  8072. *
  8073. * Return value:
  8074. * 0 on success / non-zero on failure
  8075. **/
  8076. static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
  8077. {
  8078. int rc;
  8079. volatile u32 int_reg;
  8080. unsigned long lock_flags = 0;
  8081. ENTER;
  8082. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8083. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8084. ioa_cfg->msi_received = 0;
  8085. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8086. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  8087. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  8088. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8089. rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8090. if (rc) {
  8091. dev_err(&pdev->dev, "Can not assign irq %d\n", pdev->irq);
  8092. return rc;
  8093. } else if (ipr_debug)
  8094. dev_info(&pdev->dev, "IRQ assigned: %d\n", pdev->irq);
  8095. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  8096. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  8097. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  8098. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8099. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8100. if (!ioa_cfg->msi_received) {
  8101. /* MSI test failed */
  8102. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  8103. rc = -EOPNOTSUPP;
  8104. } else if (ipr_debug)
  8105. dev_info(&pdev->dev, "MSI test succeeded.\n");
  8106. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8107. free_irq(pdev->irq, ioa_cfg);
  8108. LEAVE;
  8109. return rc;
  8110. }
  8111. /* ipr_probe_ioa - Allocates memory and does first stage of initialization
  8112. * @pdev: PCI device struct
  8113. * @dev_id: PCI device id struct
  8114. *
  8115. * Return value:
  8116. * 0 on success / non-zero on failure
  8117. **/
  8118. static int ipr_probe_ioa(struct pci_dev *pdev,
  8119. const struct pci_device_id *dev_id)
  8120. {
  8121. struct ipr_ioa_cfg *ioa_cfg;
  8122. struct Scsi_Host *host;
  8123. unsigned long ipr_regs_pci;
  8124. void __iomem *ipr_regs;
  8125. int rc = PCIBIOS_SUCCESSFUL;
  8126. volatile u32 mask, uproc, interrupts;
  8127. unsigned long lock_flags;
  8128. ENTER;
  8129. if ((rc = pci_enable_device(pdev))) {
  8130. dev_err(&pdev->dev, "Cannot enable adapter\n");
  8131. goto out;
  8132. }
  8133. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  8134. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  8135. if (!host) {
  8136. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  8137. rc = -ENOMEM;
  8138. goto out_disable;
  8139. }
  8140. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  8141. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  8142. ata_host_init(&ioa_cfg->ata_host, &pdev->dev, &ipr_sata_ops);
  8143. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  8144. if (!ioa_cfg->ipr_chip) {
  8145. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  8146. dev_id->vendor, dev_id->device);
  8147. goto out_scsi_host_put;
  8148. }
  8149. /* set SIS 32 or SIS 64 */
  8150. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  8151. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  8152. ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr;
  8153. ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds;
  8154. if (ipr_transop_timeout)
  8155. ioa_cfg->transop_timeout = ipr_transop_timeout;
  8156. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  8157. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  8158. else
  8159. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  8160. ioa_cfg->revid = pdev->revision;
  8161. ipr_regs_pci = pci_resource_start(pdev, 0);
  8162. rc = pci_request_regions(pdev, IPR_NAME);
  8163. if (rc < 0) {
  8164. dev_err(&pdev->dev,
  8165. "Couldn't register memory range of registers\n");
  8166. goto out_scsi_host_put;
  8167. }
  8168. ipr_regs = pci_ioremap_bar(pdev, 0);
  8169. if (!ipr_regs) {
  8170. dev_err(&pdev->dev,
  8171. "Couldn't map memory range of registers\n");
  8172. rc = -ENOMEM;
  8173. goto out_release_regions;
  8174. }
  8175. ioa_cfg->hdw_dma_regs = ipr_regs;
  8176. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  8177. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  8178. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  8179. pci_set_master(pdev);
  8180. if (ioa_cfg->sis64) {
  8181. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  8182. if (rc < 0) {
  8183. dev_dbg(&pdev->dev, "Failed to set 64 bit PCI DMA mask\n");
  8184. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  8185. }
  8186. } else
  8187. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  8188. if (rc < 0) {
  8189. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  8190. goto cleanup_nomem;
  8191. }
  8192. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  8193. ioa_cfg->chip_cfg->cache_line_size);
  8194. if (rc != PCIBIOS_SUCCESSFUL) {
  8195. dev_err(&pdev->dev, "Write of cache line size failed\n");
  8196. rc = -EIO;
  8197. goto cleanup_nomem;
  8198. }
  8199. if (ipr_number_of_msix > IPR_MAX_MSIX_VECTORS) {
  8200. dev_err(&pdev->dev, "The max number of MSIX is %d\n",
  8201. IPR_MAX_MSIX_VECTORS);
  8202. ipr_number_of_msix = IPR_MAX_MSIX_VECTORS;
  8203. }
  8204. if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8205. ipr_enable_msix(ioa_cfg) == 0)
  8206. ioa_cfg->intr_flag = IPR_USE_MSIX;
  8207. else if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8208. ipr_enable_msi(ioa_cfg) == 0)
  8209. ioa_cfg->intr_flag = IPR_USE_MSI;
  8210. else {
  8211. ioa_cfg->intr_flag = IPR_USE_LSI;
  8212. ioa_cfg->nvectors = 1;
  8213. dev_info(&pdev->dev, "Cannot enable MSI.\n");
  8214. }
  8215. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  8216. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8217. rc = ipr_test_msi(ioa_cfg, pdev);
  8218. if (rc == -EOPNOTSUPP) {
  8219. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  8220. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  8221. pci_disable_msi(pdev);
  8222. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8223. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  8224. pci_disable_msix(pdev);
  8225. }
  8226. ioa_cfg->intr_flag = IPR_USE_LSI;
  8227. ioa_cfg->nvectors = 1;
  8228. }
  8229. else if (rc)
  8230. goto out_msi_disable;
  8231. else {
  8232. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8233. dev_info(&pdev->dev,
  8234. "Request for %d MSIs succeeded with starting IRQ: %d\n",
  8235. ioa_cfg->nvectors, pdev->irq);
  8236. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8237. dev_info(&pdev->dev,
  8238. "Request for %d MSIXs succeeded.",
  8239. ioa_cfg->nvectors);
  8240. }
  8241. }
  8242. ioa_cfg->hrrq_num = min3(ioa_cfg->nvectors,
  8243. (unsigned int)num_online_cpus(),
  8244. (unsigned int)IPR_MAX_HRRQ_NUM);
  8245. /* Save away PCI config space for use following IOA reset */
  8246. rc = pci_save_state(pdev);
  8247. if (rc != PCIBIOS_SUCCESSFUL) {
  8248. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  8249. rc = -EIO;
  8250. goto out_msi_disable;
  8251. }
  8252. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  8253. goto out_msi_disable;
  8254. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  8255. goto out_msi_disable;
  8256. if (ioa_cfg->sis64)
  8257. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  8258. + ((sizeof(struct ipr_config_table_entry64)
  8259. * ioa_cfg->max_devs_supported)));
  8260. else
  8261. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  8262. + ((sizeof(struct ipr_config_table_entry)
  8263. * ioa_cfg->max_devs_supported)));
  8264. rc = ipr_alloc_mem(ioa_cfg);
  8265. if (rc < 0) {
  8266. dev_err(&pdev->dev,
  8267. "Couldn't allocate enough memory for device driver!\n");
  8268. goto out_msi_disable;
  8269. }
  8270. /*
  8271. * If HRRQ updated interrupt is not masked, or reset alert is set,
  8272. * the card is in an unknown state and needs a hard reset
  8273. */
  8274. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  8275. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  8276. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  8277. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  8278. ioa_cfg->needs_hard_reset = 1;
  8279. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  8280. ioa_cfg->needs_hard_reset = 1;
  8281. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  8282. ioa_cfg->ioa_unit_checked = 1;
  8283. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8284. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8285. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8286. if (ioa_cfg->intr_flag == IPR_USE_MSI
  8287. || ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8288. name_msi_vectors(ioa_cfg);
  8289. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_isr,
  8290. 0,
  8291. ioa_cfg->vectors_info[0].desc,
  8292. &ioa_cfg->hrrq[0]);
  8293. if (!rc)
  8294. rc = ipr_request_other_msi_irqs(ioa_cfg);
  8295. } else {
  8296. rc = request_irq(pdev->irq, ipr_isr,
  8297. IRQF_SHARED,
  8298. IPR_NAME, &ioa_cfg->hrrq[0]);
  8299. }
  8300. if (rc) {
  8301. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  8302. pdev->irq, rc);
  8303. goto cleanup_nolog;
  8304. }
  8305. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  8306. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  8307. ioa_cfg->needs_warm_reset = 1;
  8308. ioa_cfg->reset = ipr_reset_slot_reset;
  8309. } else
  8310. ioa_cfg->reset = ipr_reset_start_bist;
  8311. spin_lock(&ipr_driver_lock);
  8312. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  8313. spin_unlock(&ipr_driver_lock);
  8314. LEAVE;
  8315. out:
  8316. return rc;
  8317. cleanup_nolog:
  8318. ipr_free_mem(ioa_cfg);
  8319. out_msi_disable:
  8320. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8321. pci_disable_msi(pdev);
  8322. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8323. pci_disable_msix(pdev);
  8324. cleanup_nomem:
  8325. iounmap(ipr_regs);
  8326. out_release_regions:
  8327. pci_release_regions(pdev);
  8328. out_scsi_host_put:
  8329. scsi_host_put(host);
  8330. out_disable:
  8331. pci_disable_device(pdev);
  8332. goto out;
  8333. }
  8334. /**
  8335. * ipr_scan_vsets - Scans for VSET devices
  8336. * @ioa_cfg: ioa config struct
  8337. *
  8338. * Description: Since the VSET resources do not follow SAM in that we can have
  8339. * sparse LUNs with no LUN 0, we have to scan for these ourselves.
  8340. *
  8341. * Return value:
  8342. * none
  8343. **/
  8344. static void ipr_scan_vsets(struct ipr_ioa_cfg *ioa_cfg)
  8345. {
  8346. int target, lun;
  8347. for (target = 0; target < IPR_MAX_NUM_TARGETS_PER_BUS; target++)
  8348. for (lun = 0; lun < IPR_MAX_NUM_VSET_LUNS_PER_TARGET; lun++)
  8349. scsi_add_device(ioa_cfg->host, IPR_VSET_BUS, target, lun);
  8350. }
  8351. /**
  8352. * ipr_initiate_ioa_bringdown - Bring down an adapter
  8353. * @ioa_cfg: ioa config struct
  8354. * @shutdown_type: shutdown type
  8355. *
  8356. * Description: This function will initiate bringing down the adapter.
  8357. * This consists of issuing an IOA shutdown to the adapter
  8358. * to flush the cache, and running BIST.
  8359. * If the caller needs to wait on the completion of the reset,
  8360. * the caller must sleep on the reset_wait_q.
  8361. *
  8362. * Return value:
  8363. * none
  8364. **/
  8365. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  8366. enum ipr_shutdown_type shutdown_type)
  8367. {
  8368. ENTER;
  8369. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8370. ioa_cfg->sdt_state = ABORT_DUMP;
  8371. ioa_cfg->reset_retries = 0;
  8372. ioa_cfg->in_ioa_bringdown = 1;
  8373. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  8374. LEAVE;
  8375. }
  8376. /**
  8377. * __ipr_remove - Remove a single adapter
  8378. * @pdev: pci device struct
  8379. *
  8380. * Adapter hot plug remove entry point.
  8381. *
  8382. * Return value:
  8383. * none
  8384. **/
  8385. static void __ipr_remove(struct pci_dev *pdev)
  8386. {
  8387. unsigned long host_lock_flags = 0;
  8388. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8389. ENTER;
  8390. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8391. while (ioa_cfg->in_reset_reload) {
  8392. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8393. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8394. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8395. }
  8396. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  8397. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8398. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8399. flush_work(&ioa_cfg->work_q);
  8400. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8401. spin_lock(&ipr_driver_lock);
  8402. list_del(&ioa_cfg->queue);
  8403. spin_unlock(&ipr_driver_lock);
  8404. if (ioa_cfg->sdt_state == ABORT_DUMP)
  8405. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  8406. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8407. ipr_free_all_resources(ioa_cfg);
  8408. LEAVE;
  8409. }
  8410. /**
  8411. * ipr_remove - IOA hot plug remove entry point
  8412. * @pdev: pci device struct
  8413. *
  8414. * Adapter hot plug remove entry point.
  8415. *
  8416. * Return value:
  8417. * none
  8418. **/
  8419. static void ipr_remove(struct pci_dev *pdev)
  8420. {
  8421. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8422. ENTER;
  8423. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8424. &ipr_trace_attr);
  8425. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8426. &ipr_dump_attr);
  8427. scsi_remove_host(ioa_cfg->host);
  8428. __ipr_remove(pdev);
  8429. LEAVE;
  8430. }
  8431. /**
  8432. * ipr_probe - Adapter hot plug add entry point
  8433. *
  8434. * Return value:
  8435. * 0 on success / non-zero on failure
  8436. **/
  8437. static int ipr_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
  8438. {
  8439. struct ipr_ioa_cfg *ioa_cfg;
  8440. int rc;
  8441. rc = ipr_probe_ioa(pdev, dev_id);
  8442. if (rc)
  8443. return rc;
  8444. ioa_cfg = pci_get_drvdata(pdev);
  8445. rc = ipr_probe_ioa_part2(ioa_cfg);
  8446. if (rc) {
  8447. __ipr_remove(pdev);
  8448. return rc;
  8449. }
  8450. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  8451. if (rc) {
  8452. __ipr_remove(pdev);
  8453. return rc;
  8454. }
  8455. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8456. &ipr_trace_attr);
  8457. if (rc) {
  8458. scsi_remove_host(ioa_cfg->host);
  8459. __ipr_remove(pdev);
  8460. return rc;
  8461. }
  8462. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8463. &ipr_dump_attr);
  8464. if (rc) {
  8465. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8466. &ipr_trace_attr);
  8467. scsi_remove_host(ioa_cfg->host);
  8468. __ipr_remove(pdev);
  8469. return rc;
  8470. }
  8471. scsi_scan_host(ioa_cfg->host);
  8472. ipr_scan_vsets(ioa_cfg);
  8473. scsi_add_device(ioa_cfg->host, IPR_IOA_BUS, IPR_IOA_TARGET, IPR_IOA_LUN);
  8474. ioa_cfg->allow_ml_add_del = 1;
  8475. ioa_cfg->host->max_channel = IPR_VSET_BUS;
  8476. schedule_work(&ioa_cfg->work_q);
  8477. return 0;
  8478. }
  8479. /**
  8480. * ipr_shutdown - Shutdown handler.
  8481. * @pdev: pci device struct
  8482. *
  8483. * This function is invoked upon system shutdown/reboot. It will issue
  8484. * an adapter shutdown to the adapter to flush the write cache.
  8485. *
  8486. * Return value:
  8487. * none
  8488. **/
  8489. static void ipr_shutdown(struct pci_dev *pdev)
  8490. {
  8491. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8492. unsigned long lock_flags = 0;
  8493. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8494. while (ioa_cfg->in_reset_reload) {
  8495. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8496. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8497. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8498. }
  8499. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  8500. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8501. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8502. }
  8503. static struct pci_device_id ipr_pci_table[] = {
  8504. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8505. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  8506. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8507. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  8508. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8509. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  8510. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8511. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  8512. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8513. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  8514. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8515. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  8516. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8517. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  8518. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8519. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  8520. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8521. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8522. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8523. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8524. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8525. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8526. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8527. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8528. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8529. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8530. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8531. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8532. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8533. IPR_USE_LONG_TRANSOP_TIMEOUT},
  8534. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8535. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8536. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8537. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8538. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  8539. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8540. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8541. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  8542. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8543. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  8544. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8545. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  8546. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  8547. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  8548. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  8549. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8550. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  8551. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8552. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  8553. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8554. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8555. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  8556. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8557. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8558. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  8559. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8560. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  8561. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8562. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  8563. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8564. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
  8565. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8566. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  8567. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8568. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  8569. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8570. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  8571. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8572. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  8573. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8574. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  8575. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8576. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
  8577. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8578. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  8579. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8580. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
  8581. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8582. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
  8583. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8584. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
  8585. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8586. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
  8587. { }
  8588. };
  8589. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  8590. static const struct pci_error_handlers ipr_err_handler = {
  8591. .error_detected = ipr_pci_error_detected,
  8592. .slot_reset = ipr_pci_slot_reset,
  8593. };
  8594. static struct pci_driver ipr_driver = {
  8595. .name = IPR_NAME,
  8596. .id_table = ipr_pci_table,
  8597. .probe = ipr_probe,
  8598. .remove = ipr_remove,
  8599. .shutdown = ipr_shutdown,
  8600. .err_handler = &ipr_err_handler,
  8601. };
  8602. /**
  8603. * ipr_halt_done - Shutdown prepare completion
  8604. *
  8605. * Return value:
  8606. * none
  8607. **/
  8608. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  8609. {
  8610. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  8611. }
  8612. /**
  8613. * ipr_halt - Issue shutdown prepare to all adapters
  8614. *
  8615. * Return value:
  8616. * NOTIFY_OK on success / NOTIFY_DONE on failure
  8617. **/
  8618. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  8619. {
  8620. struct ipr_cmnd *ipr_cmd;
  8621. struct ipr_ioa_cfg *ioa_cfg;
  8622. unsigned long flags = 0;
  8623. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  8624. return NOTIFY_DONE;
  8625. spin_lock(&ipr_driver_lock);
  8626. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  8627. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8628. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  8629. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8630. continue;
  8631. }
  8632. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  8633. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  8634. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  8635. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  8636. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  8637. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  8638. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8639. }
  8640. spin_unlock(&ipr_driver_lock);
  8641. return NOTIFY_OK;
  8642. }
  8643. static struct notifier_block ipr_notifier = {
  8644. ipr_halt, NULL, 0
  8645. };
  8646. /**
  8647. * ipr_init - Module entry point
  8648. *
  8649. * Return value:
  8650. * 0 on success / negative value on failure
  8651. **/
  8652. static int __init ipr_init(void)
  8653. {
  8654. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  8655. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  8656. register_reboot_notifier(&ipr_notifier);
  8657. return pci_register_driver(&ipr_driver);
  8658. }
  8659. /**
  8660. * ipr_exit - Module unload
  8661. *
  8662. * Module unload entry point.
  8663. *
  8664. * Return value:
  8665. * none
  8666. **/
  8667. static void __exit ipr_exit(void)
  8668. {
  8669. unregister_reboot_notifier(&ipr_notifier);
  8670. pci_unregister_driver(&ipr_driver);
  8671. }
  8672. module_init(ipr_init);
  8673. module_exit(ipr_exit);