enic_main.c 49 KB

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  1. /*
  2. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/workqueue.h>
  26. #include <linux/pci.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/if_ether.h>
  30. #include <linux/if_vlan.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/in.h>
  33. #include <linux/ip.h>
  34. #include <linux/ipv6.h>
  35. #include <linux/tcp.h>
  36. #include <net/ip6_checksum.h>
  37. #include "cq_enet_desc.h"
  38. #include "vnic_dev.h"
  39. #include "vnic_intr.h"
  40. #include "vnic_stats.h"
  41. #include "enic_res.h"
  42. #include "enic.h"
  43. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  44. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  45. #define MAX_TSO (1 << 16)
  46. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  47. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  48. /* Supported devices */
  49. static struct pci_device_id enic_id_table[] = {
  50. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  51. { 0, } /* end of table */
  52. };
  53. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  54. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  55. MODULE_LICENSE("GPL");
  56. MODULE_VERSION(DRV_VERSION);
  57. MODULE_DEVICE_TABLE(pci, enic_id_table);
  58. struct enic_stat {
  59. char name[ETH_GSTRING_LEN];
  60. unsigned int offset;
  61. };
  62. #define ENIC_TX_STAT(stat) \
  63. { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
  64. #define ENIC_RX_STAT(stat) \
  65. { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
  66. static const struct enic_stat enic_tx_stats[] = {
  67. ENIC_TX_STAT(tx_frames_ok),
  68. ENIC_TX_STAT(tx_unicast_frames_ok),
  69. ENIC_TX_STAT(tx_multicast_frames_ok),
  70. ENIC_TX_STAT(tx_broadcast_frames_ok),
  71. ENIC_TX_STAT(tx_bytes_ok),
  72. ENIC_TX_STAT(tx_unicast_bytes_ok),
  73. ENIC_TX_STAT(tx_multicast_bytes_ok),
  74. ENIC_TX_STAT(tx_broadcast_bytes_ok),
  75. ENIC_TX_STAT(tx_drops),
  76. ENIC_TX_STAT(tx_errors),
  77. ENIC_TX_STAT(tx_tso),
  78. };
  79. static const struct enic_stat enic_rx_stats[] = {
  80. ENIC_RX_STAT(rx_frames_ok),
  81. ENIC_RX_STAT(rx_frames_total),
  82. ENIC_RX_STAT(rx_unicast_frames_ok),
  83. ENIC_RX_STAT(rx_multicast_frames_ok),
  84. ENIC_RX_STAT(rx_broadcast_frames_ok),
  85. ENIC_RX_STAT(rx_bytes_ok),
  86. ENIC_RX_STAT(rx_unicast_bytes_ok),
  87. ENIC_RX_STAT(rx_multicast_bytes_ok),
  88. ENIC_RX_STAT(rx_broadcast_bytes_ok),
  89. ENIC_RX_STAT(rx_drop),
  90. ENIC_RX_STAT(rx_no_bufs),
  91. ENIC_RX_STAT(rx_errors),
  92. ENIC_RX_STAT(rx_rss),
  93. ENIC_RX_STAT(rx_crc_errors),
  94. ENIC_RX_STAT(rx_frames_64),
  95. ENIC_RX_STAT(rx_frames_127),
  96. ENIC_RX_STAT(rx_frames_255),
  97. ENIC_RX_STAT(rx_frames_511),
  98. ENIC_RX_STAT(rx_frames_1023),
  99. ENIC_RX_STAT(rx_frames_1518),
  100. ENIC_RX_STAT(rx_frames_to_max),
  101. };
  102. static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
  103. static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
  104. static int enic_get_settings(struct net_device *netdev,
  105. struct ethtool_cmd *ecmd)
  106. {
  107. struct enic *enic = netdev_priv(netdev);
  108. ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
  109. ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
  110. ecmd->port = PORT_FIBRE;
  111. ecmd->transceiver = XCVR_EXTERNAL;
  112. if (netif_carrier_ok(netdev)) {
  113. ecmd->speed = vnic_dev_port_speed(enic->vdev);
  114. ecmd->duplex = DUPLEX_FULL;
  115. } else {
  116. ecmd->speed = -1;
  117. ecmd->duplex = -1;
  118. }
  119. ecmd->autoneg = AUTONEG_DISABLE;
  120. return 0;
  121. }
  122. static void enic_get_drvinfo(struct net_device *netdev,
  123. struct ethtool_drvinfo *drvinfo)
  124. {
  125. struct enic *enic = netdev_priv(netdev);
  126. struct vnic_devcmd_fw_info *fw_info;
  127. spin_lock(&enic->devcmd_lock);
  128. vnic_dev_fw_info(enic->vdev, &fw_info);
  129. spin_unlock(&enic->devcmd_lock);
  130. strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  131. strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
  132. strncpy(drvinfo->fw_version, fw_info->fw_version,
  133. sizeof(drvinfo->fw_version));
  134. strncpy(drvinfo->bus_info, pci_name(enic->pdev),
  135. sizeof(drvinfo->bus_info));
  136. }
  137. static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
  138. {
  139. unsigned int i;
  140. switch (stringset) {
  141. case ETH_SS_STATS:
  142. for (i = 0; i < enic_n_tx_stats; i++) {
  143. memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
  144. data += ETH_GSTRING_LEN;
  145. }
  146. for (i = 0; i < enic_n_rx_stats; i++) {
  147. memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
  148. data += ETH_GSTRING_LEN;
  149. }
  150. break;
  151. }
  152. }
  153. static int enic_get_sset_count(struct net_device *netdev, int sset)
  154. {
  155. switch (sset) {
  156. case ETH_SS_STATS:
  157. return enic_n_tx_stats + enic_n_rx_stats;
  158. default:
  159. return -EOPNOTSUPP;
  160. }
  161. }
  162. static void enic_get_ethtool_stats(struct net_device *netdev,
  163. struct ethtool_stats *stats, u64 *data)
  164. {
  165. struct enic *enic = netdev_priv(netdev);
  166. struct vnic_stats *vstats;
  167. unsigned int i;
  168. spin_lock(&enic->devcmd_lock);
  169. vnic_dev_stats_dump(enic->vdev, &vstats);
  170. spin_unlock(&enic->devcmd_lock);
  171. for (i = 0; i < enic_n_tx_stats; i++)
  172. *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
  173. for (i = 0; i < enic_n_rx_stats; i++)
  174. *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
  175. }
  176. static u32 enic_get_rx_csum(struct net_device *netdev)
  177. {
  178. struct enic *enic = netdev_priv(netdev);
  179. return enic->csum_rx_enabled;
  180. }
  181. static int enic_set_rx_csum(struct net_device *netdev, u32 data)
  182. {
  183. struct enic *enic = netdev_priv(netdev);
  184. if (data && !ENIC_SETTING(enic, RXCSUM))
  185. return -EINVAL;
  186. enic->csum_rx_enabled = !!data;
  187. return 0;
  188. }
  189. static int enic_set_tx_csum(struct net_device *netdev, u32 data)
  190. {
  191. struct enic *enic = netdev_priv(netdev);
  192. if (data && !ENIC_SETTING(enic, TXCSUM))
  193. return -EINVAL;
  194. if (data)
  195. netdev->features |= NETIF_F_HW_CSUM;
  196. else
  197. netdev->features &= ~NETIF_F_HW_CSUM;
  198. return 0;
  199. }
  200. static int enic_set_tso(struct net_device *netdev, u32 data)
  201. {
  202. struct enic *enic = netdev_priv(netdev);
  203. if (data && !ENIC_SETTING(enic, TSO))
  204. return -EINVAL;
  205. if (data)
  206. netdev->features |=
  207. NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  208. else
  209. netdev->features &=
  210. ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
  211. return 0;
  212. }
  213. static u32 enic_get_msglevel(struct net_device *netdev)
  214. {
  215. struct enic *enic = netdev_priv(netdev);
  216. return enic->msg_enable;
  217. }
  218. static void enic_set_msglevel(struct net_device *netdev, u32 value)
  219. {
  220. struct enic *enic = netdev_priv(netdev);
  221. enic->msg_enable = value;
  222. }
  223. static const struct ethtool_ops enic_ethtool_ops = {
  224. .get_settings = enic_get_settings,
  225. .get_drvinfo = enic_get_drvinfo,
  226. .get_msglevel = enic_get_msglevel,
  227. .set_msglevel = enic_set_msglevel,
  228. .get_link = ethtool_op_get_link,
  229. .get_strings = enic_get_strings,
  230. .get_sset_count = enic_get_sset_count,
  231. .get_ethtool_stats = enic_get_ethtool_stats,
  232. .get_rx_csum = enic_get_rx_csum,
  233. .set_rx_csum = enic_set_rx_csum,
  234. .get_tx_csum = ethtool_op_get_tx_csum,
  235. .set_tx_csum = enic_set_tx_csum,
  236. .get_sg = ethtool_op_get_sg,
  237. .set_sg = ethtool_op_set_sg,
  238. .get_tso = ethtool_op_get_tso,
  239. .set_tso = enic_set_tso,
  240. .get_flags = ethtool_op_get_flags,
  241. .set_flags = ethtool_op_set_flags,
  242. };
  243. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  244. {
  245. struct enic *enic = vnic_dev_priv(wq->vdev);
  246. if (buf->sop)
  247. pci_unmap_single(enic->pdev, buf->dma_addr,
  248. buf->len, PCI_DMA_TODEVICE);
  249. else
  250. pci_unmap_page(enic->pdev, buf->dma_addr,
  251. buf->len, PCI_DMA_TODEVICE);
  252. if (buf->os_buf)
  253. dev_kfree_skb_any(buf->os_buf);
  254. }
  255. static void enic_wq_free_buf(struct vnic_wq *wq,
  256. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  257. {
  258. enic_free_wq_buf(wq, buf);
  259. }
  260. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  261. u8 type, u16 q_number, u16 completed_index, void *opaque)
  262. {
  263. struct enic *enic = vnic_dev_priv(vdev);
  264. spin_lock(&enic->wq_lock[q_number]);
  265. vnic_wq_service(&enic->wq[q_number], cq_desc,
  266. completed_index, enic_wq_free_buf,
  267. opaque);
  268. if (netif_queue_stopped(enic->netdev) &&
  269. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  270. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  271. netif_wake_queue(enic->netdev);
  272. spin_unlock(&enic->wq_lock[q_number]);
  273. return 0;
  274. }
  275. static void enic_log_q_error(struct enic *enic)
  276. {
  277. unsigned int i;
  278. u32 error_status;
  279. for (i = 0; i < enic->wq_count; i++) {
  280. error_status = vnic_wq_error_status(&enic->wq[i]);
  281. if (error_status)
  282. printk(KERN_ERR PFX "%s: WQ[%d] error_status %d\n",
  283. enic->netdev->name, i, error_status);
  284. }
  285. for (i = 0; i < enic->rq_count; i++) {
  286. error_status = vnic_rq_error_status(&enic->rq[i]);
  287. if (error_status)
  288. printk(KERN_ERR PFX "%s: RQ[%d] error_status %d\n",
  289. enic->netdev->name, i, error_status);
  290. }
  291. }
  292. static void enic_link_check(struct enic *enic)
  293. {
  294. int link_status = vnic_dev_link_status(enic->vdev);
  295. int carrier_ok = netif_carrier_ok(enic->netdev);
  296. if (link_status && !carrier_ok) {
  297. printk(KERN_INFO PFX "%s: Link UP\n", enic->netdev->name);
  298. netif_carrier_on(enic->netdev);
  299. } else if (!link_status && carrier_ok) {
  300. printk(KERN_INFO PFX "%s: Link DOWN\n", enic->netdev->name);
  301. netif_carrier_off(enic->netdev);
  302. }
  303. }
  304. static void enic_mtu_check(struct enic *enic)
  305. {
  306. u32 mtu = vnic_dev_mtu(enic->vdev);
  307. if (mtu != enic->port_mtu) {
  308. if (mtu < enic->netdev->mtu)
  309. printk(KERN_WARNING PFX
  310. "%s: interface MTU (%d) set higher "
  311. "than switch port MTU (%d)\n",
  312. enic->netdev->name, enic->netdev->mtu, mtu);
  313. enic->port_mtu = mtu;
  314. }
  315. }
  316. static void enic_msglvl_check(struct enic *enic)
  317. {
  318. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  319. if (msg_enable != enic->msg_enable) {
  320. printk(KERN_INFO PFX "%s: msg lvl changed from 0x%x to 0x%x\n",
  321. enic->netdev->name, enic->msg_enable, msg_enable);
  322. enic->msg_enable = msg_enable;
  323. }
  324. }
  325. static void enic_notify_check(struct enic *enic)
  326. {
  327. enic_msglvl_check(enic);
  328. enic_mtu_check(enic);
  329. enic_link_check(enic);
  330. }
  331. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  332. static irqreturn_t enic_isr_legacy(int irq, void *data)
  333. {
  334. struct net_device *netdev = data;
  335. struct enic *enic = netdev_priv(netdev);
  336. u32 pba;
  337. vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]);
  338. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  339. if (!pba) {
  340. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  341. return IRQ_NONE; /* not our interrupt */
  342. }
  343. if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) {
  344. vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_NOTIFY]);
  345. enic_notify_check(enic);
  346. }
  347. if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) {
  348. vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_ERR]);
  349. enic_log_q_error(enic);
  350. /* schedule recovery from WQ/RQ error */
  351. schedule_work(&enic->reset);
  352. return IRQ_HANDLED;
  353. }
  354. if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) {
  355. if (napi_schedule_prep(&enic->napi))
  356. __napi_schedule(&enic->napi);
  357. } else {
  358. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  359. }
  360. return IRQ_HANDLED;
  361. }
  362. static irqreturn_t enic_isr_msi(int irq, void *data)
  363. {
  364. struct enic *enic = data;
  365. /* With MSI, there is no sharing of interrupts, so this is
  366. * our interrupt and there is no need to ack it. The device
  367. * is not providing per-vector masking, so the OS will not
  368. * write to PCI config space to mask/unmask the interrupt.
  369. * We're using mask_on_assertion for MSI, so the device
  370. * automatically masks the interrupt when the interrupt is
  371. * generated. Later, when exiting polling, the interrupt
  372. * will be unmasked (see enic_poll).
  373. *
  374. * Also, the device uses the same PCIe Traffic Class (TC)
  375. * for Memory Write data and MSI, so there are no ordering
  376. * issues; the MSI will always arrive at the Root Complex
  377. * _after_ corresponding Memory Writes (i.e. descriptor
  378. * writes).
  379. */
  380. napi_schedule(&enic->napi);
  381. return IRQ_HANDLED;
  382. }
  383. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  384. {
  385. struct enic *enic = data;
  386. /* schedule NAPI polling for RQ cleanup */
  387. napi_schedule(&enic->napi);
  388. return IRQ_HANDLED;
  389. }
  390. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  391. {
  392. struct enic *enic = data;
  393. unsigned int wq_work_to_do = -1; /* no limit */
  394. unsigned int wq_work_done;
  395. wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  396. wq_work_to_do, enic_wq_service, NULL);
  397. vnic_intr_return_credits(&enic->intr[ENIC_MSIX_WQ],
  398. wq_work_done,
  399. 1 /* unmask intr */,
  400. 1 /* reset intr timer */);
  401. return IRQ_HANDLED;
  402. }
  403. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  404. {
  405. struct enic *enic = data;
  406. vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_ERR]);
  407. enic_log_q_error(enic);
  408. /* schedule recovery from WQ/RQ error */
  409. schedule_work(&enic->reset);
  410. return IRQ_HANDLED;
  411. }
  412. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  413. {
  414. struct enic *enic = data;
  415. vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_NOTIFY]);
  416. enic_notify_check(enic);
  417. return IRQ_HANDLED;
  418. }
  419. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  420. struct vnic_wq *wq, struct sk_buff *skb,
  421. unsigned int len_left)
  422. {
  423. skb_frag_t *frag;
  424. /* Queue additional data fragments */
  425. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  426. len_left -= frag->size;
  427. enic_queue_wq_desc_cont(wq, skb,
  428. pci_map_page(enic->pdev, frag->page,
  429. frag->page_offset, frag->size,
  430. PCI_DMA_TODEVICE),
  431. frag->size,
  432. (len_left == 0)); /* EOP? */
  433. }
  434. }
  435. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  436. struct vnic_wq *wq, struct sk_buff *skb,
  437. int vlan_tag_insert, unsigned int vlan_tag)
  438. {
  439. unsigned int head_len = skb_headlen(skb);
  440. unsigned int len_left = skb->len - head_len;
  441. int eop = (len_left == 0);
  442. /* Queue the main skb fragment. The fragments are no larger
  443. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  444. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  445. * per fragment is queued.
  446. */
  447. enic_queue_wq_desc(wq, skb,
  448. pci_map_single(enic->pdev, skb->data,
  449. head_len, PCI_DMA_TODEVICE),
  450. head_len,
  451. vlan_tag_insert, vlan_tag,
  452. eop);
  453. if (!eop)
  454. enic_queue_wq_skb_cont(enic, wq, skb, len_left);
  455. }
  456. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  457. struct vnic_wq *wq, struct sk_buff *skb,
  458. int vlan_tag_insert, unsigned int vlan_tag)
  459. {
  460. unsigned int head_len = skb_headlen(skb);
  461. unsigned int len_left = skb->len - head_len;
  462. unsigned int hdr_len = skb_transport_offset(skb);
  463. unsigned int csum_offset = hdr_len + skb->csum_offset;
  464. int eop = (len_left == 0);
  465. /* Queue the main skb fragment. The fragments are no larger
  466. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  467. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  468. * per fragment is queued.
  469. */
  470. enic_queue_wq_desc_csum_l4(wq, skb,
  471. pci_map_single(enic->pdev, skb->data,
  472. head_len, PCI_DMA_TODEVICE),
  473. head_len,
  474. csum_offset,
  475. hdr_len,
  476. vlan_tag_insert, vlan_tag,
  477. eop);
  478. if (!eop)
  479. enic_queue_wq_skb_cont(enic, wq, skb, len_left);
  480. }
  481. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  482. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  483. int vlan_tag_insert, unsigned int vlan_tag)
  484. {
  485. unsigned int frag_len_left = skb_headlen(skb);
  486. unsigned int len_left = skb->len - frag_len_left;
  487. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  488. int eop = (len_left == 0);
  489. unsigned int len;
  490. dma_addr_t dma_addr;
  491. unsigned int offset = 0;
  492. skb_frag_t *frag;
  493. /* Preload TCP csum field with IP pseudo hdr calculated
  494. * with IP length set to zero. HW will later add in length
  495. * to each TCP segment resulting from the TSO.
  496. */
  497. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  498. ip_hdr(skb)->check = 0;
  499. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  500. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  501. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  502. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  503. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  504. }
  505. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  506. * for the main skb fragment
  507. */
  508. while (frag_len_left) {
  509. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  510. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  511. len, PCI_DMA_TODEVICE);
  512. enic_queue_wq_desc_tso(wq, skb,
  513. dma_addr,
  514. len,
  515. mss, hdr_len,
  516. vlan_tag_insert, vlan_tag,
  517. eop && (len == frag_len_left));
  518. frag_len_left -= len;
  519. offset += len;
  520. }
  521. if (eop)
  522. return;
  523. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  524. * for additional data fragments
  525. */
  526. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  527. len_left -= frag->size;
  528. frag_len_left = frag->size;
  529. offset = frag->page_offset;
  530. while (frag_len_left) {
  531. len = min(frag_len_left,
  532. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  533. dma_addr = pci_map_page(enic->pdev, frag->page,
  534. offset, len,
  535. PCI_DMA_TODEVICE);
  536. enic_queue_wq_desc_cont(wq, skb,
  537. dma_addr,
  538. len,
  539. (len_left == 0) &&
  540. (len == frag_len_left)); /* EOP? */
  541. frag_len_left -= len;
  542. offset += len;
  543. }
  544. }
  545. }
  546. static inline void enic_queue_wq_skb(struct enic *enic,
  547. struct vnic_wq *wq, struct sk_buff *skb)
  548. {
  549. unsigned int mss = skb_shinfo(skb)->gso_size;
  550. unsigned int vlan_tag = 0;
  551. int vlan_tag_insert = 0;
  552. if (enic->vlan_group && vlan_tx_tag_present(skb)) {
  553. /* VLAN tag from trunking driver */
  554. vlan_tag_insert = 1;
  555. vlan_tag = vlan_tx_tag_get(skb);
  556. }
  557. if (mss)
  558. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  559. vlan_tag_insert, vlan_tag);
  560. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  561. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  562. vlan_tag_insert, vlan_tag);
  563. else
  564. enic_queue_wq_skb_vlan(enic, wq, skb,
  565. vlan_tag_insert, vlan_tag);
  566. }
  567. /* netif_tx_lock held, process context with BHs disabled, or BH */
  568. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  569. struct net_device *netdev)
  570. {
  571. struct enic *enic = netdev_priv(netdev);
  572. struct vnic_wq *wq = &enic->wq[0];
  573. unsigned long flags;
  574. if (skb->len <= 0) {
  575. dev_kfree_skb(skb);
  576. return NETDEV_TX_OK;
  577. }
  578. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  579. * which is very likely. In the off chance it's going to take
  580. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  581. */
  582. if (skb_shinfo(skb)->gso_size == 0 &&
  583. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  584. skb_linearize(skb)) {
  585. dev_kfree_skb(skb);
  586. return NETDEV_TX_OK;
  587. }
  588. spin_lock_irqsave(&enic->wq_lock[0], flags);
  589. if (vnic_wq_desc_avail(wq) <
  590. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  591. netif_stop_queue(netdev);
  592. /* This is a hard error, log it */
  593. printk(KERN_ERR PFX "%s: BUG! Tx ring full when "
  594. "queue awake!\n", netdev->name);
  595. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  596. return NETDEV_TX_BUSY;
  597. }
  598. enic_queue_wq_skb(enic, wq, skb);
  599. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  600. netif_stop_queue(netdev);
  601. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  602. return NETDEV_TX_OK;
  603. }
  604. /* dev_base_lock rwlock held, nominally process context */
  605. static struct net_device_stats *enic_get_stats(struct net_device *netdev)
  606. {
  607. struct enic *enic = netdev_priv(netdev);
  608. struct net_device_stats *net_stats = &netdev->stats;
  609. struct vnic_stats *stats;
  610. spin_lock(&enic->devcmd_lock);
  611. vnic_dev_stats_dump(enic->vdev, &stats);
  612. spin_unlock(&enic->devcmd_lock);
  613. net_stats->tx_packets = stats->tx.tx_frames_ok;
  614. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  615. net_stats->tx_errors = stats->tx.tx_errors;
  616. net_stats->tx_dropped = stats->tx.tx_drops;
  617. net_stats->rx_packets = stats->rx.rx_frames_ok;
  618. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  619. net_stats->rx_errors = stats->rx.rx_errors;
  620. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  621. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  622. net_stats->rx_dropped = stats->rx.rx_no_bufs;
  623. return net_stats;
  624. }
  625. static void enic_reset_mcaddrs(struct enic *enic)
  626. {
  627. enic->mc_count = 0;
  628. }
  629. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  630. {
  631. if (!is_valid_ether_addr(addr))
  632. return -EADDRNOTAVAIL;
  633. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  634. return 0;
  635. }
  636. /* netif_tx_lock held, BHs disabled */
  637. static void enic_set_multicast_list(struct net_device *netdev)
  638. {
  639. struct enic *enic = netdev_priv(netdev);
  640. struct dev_mc_list *list = netdev->mc_list;
  641. int directed = 1;
  642. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  643. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  644. int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
  645. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  646. (netdev->mc_count > ENIC_MULTICAST_PERFECT_FILTERS);
  647. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  648. unsigned int mc_count = netdev->mc_count;
  649. unsigned int i, j;
  650. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
  651. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  652. spin_lock(&enic->devcmd_lock);
  653. vnic_dev_packet_filter(enic->vdev, directed,
  654. multicast, broadcast, promisc, allmulti);
  655. /* Is there an easier way? Trying to minimize to
  656. * calls to add/del multicast addrs. We keep the
  657. * addrs from the last call in enic->mc_addr and
  658. * look for changes to add/del.
  659. */
  660. for (i = 0; list && i < mc_count; i++) {
  661. memcpy(mc_addr[i], list->dmi_addr, ETH_ALEN);
  662. list = list->next;
  663. }
  664. for (i = 0; i < enic->mc_count; i++) {
  665. for (j = 0; j < mc_count; j++)
  666. if (compare_ether_addr(enic->mc_addr[i],
  667. mc_addr[j]) == 0)
  668. break;
  669. if (j == mc_count)
  670. enic_del_multicast_addr(enic, enic->mc_addr[i]);
  671. }
  672. for (i = 0; i < mc_count; i++) {
  673. for (j = 0; j < enic->mc_count; j++)
  674. if (compare_ether_addr(mc_addr[i],
  675. enic->mc_addr[j]) == 0)
  676. break;
  677. if (j == enic->mc_count)
  678. enic_add_multicast_addr(enic, mc_addr[i]);
  679. }
  680. /* Save the list to compare against next time
  681. */
  682. for (i = 0; i < mc_count; i++)
  683. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  684. enic->mc_count = mc_count;
  685. spin_unlock(&enic->devcmd_lock);
  686. }
  687. /* rtnl lock is held */
  688. static void enic_vlan_rx_register(struct net_device *netdev,
  689. struct vlan_group *vlan_group)
  690. {
  691. struct enic *enic = netdev_priv(netdev);
  692. enic->vlan_group = vlan_group;
  693. }
  694. /* rtnl lock is held */
  695. static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
  696. {
  697. struct enic *enic = netdev_priv(netdev);
  698. spin_lock(&enic->devcmd_lock);
  699. enic_add_vlan(enic, vid);
  700. spin_unlock(&enic->devcmd_lock);
  701. }
  702. /* rtnl lock is held */
  703. static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
  704. {
  705. struct enic *enic = netdev_priv(netdev);
  706. spin_lock(&enic->devcmd_lock);
  707. enic_del_vlan(enic, vid);
  708. spin_unlock(&enic->devcmd_lock);
  709. }
  710. /* netif_tx_lock held, BHs disabled */
  711. static void enic_tx_timeout(struct net_device *netdev)
  712. {
  713. struct enic *enic = netdev_priv(netdev);
  714. schedule_work(&enic->reset);
  715. }
  716. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  717. {
  718. struct enic *enic = vnic_dev_priv(rq->vdev);
  719. if (!buf->os_buf)
  720. return;
  721. pci_unmap_single(enic->pdev, buf->dma_addr,
  722. buf->len, PCI_DMA_FROMDEVICE);
  723. dev_kfree_skb_any(buf->os_buf);
  724. }
  725. static inline struct sk_buff *enic_rq_alloc_skb(struct net_device *netdev,
  726. unsigned int size)
  727. {
  728. struct sk_buff *skb;
  729. skb = netdev_alloc_skb(netdev, size + NET_IP_ALIGN);
  730. if (skb)
  731. skb_reserve(skb, NET_IP_ALIGN);
  732. return skb;
  733. }
  734. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  735. {
  736. struct enic *enic = vnic_dev_priv(rq->vdev);
  737. struct net_device *netdev = enic->netdev;
  738. struct sk_buff *skb;
  739. unsigned int len = netdev->mtu + ETH_HLEN;
  740. unsigned int os_buf_index = 0;
  741. dma_addr_t dma_addr;
  742. skb = enic_rq_alloc_skb(netdev, len);
  743. if (!skb)
  744. return -ENOMEM;
  745. dma_addr = pci_map_single(enic->pdev, skb->data,
  746. len, PCI_DMA_FROMDEVICE);
  747. enic_queue_rq_desc(rq, skb, os_buf_index,
  748. dma_addr, len);
  749. return 0;
  750. }
  751. static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
  752. {
  753. struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
  754. if (vnic_rq_posting_soon(rq)) {
  755. /* SW workaround for A0 HW erratum: if we're just about
  756. * to write posted_index, insert a dummy desc
  757. * of type resvd
  758. */
  759. rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
  760. vnic_rq_post(rq, 0, 0, 0, 0);
  761. } else {
  762. return enic_rq_alloc_buf(rq);
  763. }
  764. return 0;
  765. }
  766. static int enic_set_rq_alloc_buf(struct enic *enic)
  767. {
  768. enum vnic_dev_hw_version hw_ver;
  769. int err;
  770. err = vnic_dev_hw_version(enic->vdev, &hw_ver);
  771. if (err)
  772. return err;
  773. switch (hw_ver) {
  774. case VNIC_DEV_HW_VER_A1:
  775. enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
  776. break;
  777. case VNIC_DEV_HW_VER_A2:
  778. case VNIC_DEV_HW_VER_UNKNOWN:
  779. enic->rq_alloc_buf = enic_rq_alloc_buf;
  780. break;
  781. default:
  782. return -ENODEV;
  783. }
  784. return 0;
  785. }
  786. static int enic_get_skb_header(struct sk_buff *skb, void **iphdr,
  787. void **tcph, u64 *hdr_flags, void *priv)
  788. {
  789. struct cq_enet_rq_desc *cq_desc = priv;
  790. unsigned int ip_len;
  791. struct iphdr *iph;
  792. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  793. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  794. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  795. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  796. u8 packet_error;
  797. u16 q_number, completed_index, bytes_written, vlan, checksum;
  798. u32 rss_hash;
  799. cq_enet_rq_desc_dec(cq_desc,
  800. &type, &color, &q_number, &completed_index,
  801. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  802. &csum_not_calc, &rss_hash, &bytes_written,
  803. &packet_error, &vlan_stripped, &vlan, &checksum,
  804. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  805. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  806. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  807. &fcs_ok);
  808. if (!(ipv4 && tcp && !ipv4_fragment))
  809. return -1;
  810. skb_reset_network_header(skb);
  811. iph = ip_hdr(skb);
  812. ip_len = ip_hdrlen(skb);
  813. skb_set_transport_header(skb, ip_len);
  814. /* check if ip header and tcp header are complete */
  815. if (ntohs(iph->tot_len) < ip_len + tcp_hdrlen(skb))
  816. return -1;
  817. *hdr_flags = LRO_IPV4 | LRO_TCP;
  818. *tcph = tcp_hdr(skb);
  819. *iphdr = iph;
  820. return 0;
  821. }
  822. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  823. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  824. int skipped, void *opaque)
  825. {
  826. struct enic *enic = vnic_dev_priv(rq->vdev);
  827. struct net_device *netdev = enic->netdev;
  828. struct sk_buff *skb;
  829. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  830. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  831. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  832. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  833. u8 packet_error;
  834. u16 q_number, completed_index, bytes_written, vlan, checksum;
  835. u32 rss_hash;
  836. if (skipped)
  837. return;
  838. skb = buf->os_buf;
  839. prefetch(skb->data - NET_IP_ALIGN);
  840. pci_unmap_single(enic->pdev, buf->dma_addr,
  841. buf->len, PCI_DMA_FROMDEVICE);
  842. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  843. &type, &color, &q_number, &completed_index,
  844. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  845. &csum_not_calc, &rss_hash, &bytes_written,
  846. &packet_error, &vlan_stripped, &vlan, &checksum,
  847. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  848. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  849. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  850. &fcs_ok);
  851. if (packet_error) {
  852. if (bytes_written > 0 && !fcs_ok)
  853. enic->rq_bad_fcs++;
  854. dev_kfree_skb_any(skb);
  855. return;
  856. }
  857. if (eop && bytes_written > 0) {
  858. /* Good receive
  859. */
  860. skb_put(skb, bytes_written);
  861. skb->protocol = eth_type_trans(skb, netdev);
  862. if (enic->csum_rx_enabled && !csum_not_calc) {
  863. skb->csum = htons(checksum);
  864. skb->ip_summed = CHECKSUM_COMPLETE;
  865. }
  866. skb->dev = netdev;
  867. if (enic->vlan_group && vlan_stripped) {
  868. if ((netdev->features & NETIF_F_LRO) && ipv4)
  869. lro_vlan_hwaccel_receive_skb(&enic->lro_mgr,
  870. skb, enic->vlan_group,
  871. vlan, cq_desc);
  872. else
  873. vlan_hwaccel_receive_skb(skb,
  874. enic->vlan_group, vlan);
  875. } else {
  876. if ((netdev->features & NETIF_F_LRO) && ipv4)
  877. lro_receive_skb(&enic->lro_mgr, skb, cq_desc);
  878. else
  879. netif_receive_skb(skb);
  880. }
  881. } else {
  882. /* Buffer overflow
  883. */
  884. dev_kfree_skb_any(skb);
  885. }
  886. }
  887. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  888. u8 type, u16 q_number, u16 completed_index, void *opaque)
  889. {
  890. struct enic *enic = vnic_dev_priv(vdev);
  891. vnic_rq_service(&enic->rq[q_number], cq_desc,
  892. completed_index, VNIC_RQ_RETURN_DESC,
  893. enic_rq_indicate_buf, opaque);
  894. return 0;
  895. }
  896. static void enic_rq_drop_buf(struct vnic_rq *rq,
  897. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  898. int skipped, void *opaque)
  899. {
  900. struct enic *enic = vnic_dev_priv(rq->vdev);
  901. struct sk_buff *skb = buf->os_buf;
  902. if (skipped)
  903. return;
  904. pci_unmap_single(enic->pdev, buf->dma_addr,
  905. buf->len, PCI_DMA_FROMDEVICE);
  906. dev_kfree_skb_any(skb);
  907. }
  908. static int enic_rq_service_drop(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  909. u8 type, u16 q_number, u16 completed_index, void *opaque)
  910. {
  911. struct enic *enic = vnic_dev_priv(vdev);
  912. vnic_rq_service(&enic->rq[q_number], cq_desc,
  913. completed_index, VNIC_RQ_RETURN_DESC,
  914. enic_rq_drop_buf, opaque);
  915. return 0;
  916. }
  917. static int enic_poll(struct napi_struct *napi, int budget)
  918. {
  919. struct enic *enic = container_of(napi, struct enic, napi);
  920. struct net_device *netdev = enic->netdev;
  921. unsigned int rq_work_to_do = budget;
  922. unsigned int wq_work_to_do = -1; /* no limit */
  923. unsigned int work_done, rq_work_done, wq_work_done;
  924. /* Service RQ (first) and WQ
  925. */
  926. rq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  927. rq_work_to_do, enic_rq_service, NULL);
  928. wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  929. wq_work_to_do, enic_wq_service, NULL);
  930. /* Accumulate intr event credits for this polling
  931. * cycle. An intr event is the completion of a
  932. * a WQ or RQ packet.
  933. */
  934. work_done = rq_work_done + wq_work_done;
  935. if (work_done > 0)
  936. vnic_intr_return_credits(&enic->intr[ENIC_INTX_WQ_RQ],
  937. work_done,
  938. 0 /* don't unmask intr */,
  939. 0 /* don't reset intr timer */);
  940. if (rq_work_done > 0) {
  941. /* Replenish RQ
  942. */
  943. vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
  944. } else {
  945. /* If no work done, flush all LROs and exit polling
  946. */
  947. if (netdev->features & NETIF_F_LRO)
  948. lro_flush_all(&enic->lro_mgr);
  949. napi_complete(napi);
  950. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  951. }
  952. return rq_work_done;
  953. }
  954. static int enic_poll_msix(struct napi_struct *napi, int budget)
  955. {
  956. struct enic *enic = container_of(napi, struct enic, napi);
  957. struct net_device *netdev = enic->netdev;
  958. unsigned int work_to_do = budget;
  959. unsigned int work_done;
  960. /* Service RQ
  961. */
  962. work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  963. work_to_do, enic_rq_service, NULL);
  964. if (work_done > 0) {
  965. /* Replenish RQ
  966. */
  967. vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
  968. /* Return intr event credits for this polling
  969. * cycle. An intr event is the completion of a
  970. * RQ packet.
  971. */
  972. vnic_intr_return_credits(&enic->intr[ENIC_MSIX_RQ],
  973. work_done,
  974. 0 /* don't unmask intr */,
  975. 0 /* don't reset intr timer */);
  976. } else {
  977. /* If no work done, flush all LROs and exit polling
  978. */
  979. if (netdev->features & NETIF_F_LRO)
  980. lro_flush_all(&enic->lro_mgr);
  981. napi_complete(napi);
  982. vnic_intr_unmask(&enic->intr[ENIC_MSIX_RQ]);
  983. }
  984. return work_done;
  985. }
  986. static void enic_notify_timer(unsigned long data)
  987. {
  988. struct enic *enic = (struct enic *)data;
  989. enic_notify_check(enic);
  990. mod_timer(&enic->notify_timer,
  991. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  992. }
  993. static void enic_free_intr(struct enic *enic)
  994. {
  995. struct net_device *netdev = enic->netdev;
  996. unsigned int i;
  997. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  998. case VNIC_DEV_INTR_MODE_INTX:
  999. free_irq(enic->pdev->irq, netdev);
  1000. break;
  1001. case VNIC_DEV_INTR_MODE_MSI:
  1002. free_irq(enic->pdev->irq, enic);
  1003. break;
  1004. case VNIC_DEV_INTR_MODE_MSIX:
  1005. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1006. if (enic->msix[i].requested)
  1007. free_irq(enic->msix_entry[i].vector,
  1008. enic->msix[i].devid);
  1009. break;
  1010. default:
  1011. break;
  1012. }
  1013. }
  1014. static int enic_request_intr(struct enic *enic)
  1015. {
  1016. struct net_device *netdev = enic->netdev;
  1017. unsigned int i;
  1018. int err = 0;
  1019. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1020. case VNIC_DEV_INTR_MODE_INTX:
  1021. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1022. IRQF_SHARED, netdev->name, netdev);
  1023. break;
  1024. case VNIC_DEV_INTR_MODE_MSI:
  1025. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1026. 0, netdev->name, enic);
  1027. break;
  1028. case VNIC_DEV_INTR_MODE_MSIX:
  1029. sprintf(enic->msix[ENIC_MSIX_RQ].devname,
  1030. "%.11s-rx-0", netdev->name);
  1031. enic->msix[ENIC_MSIX_RQ].isr = enic_isr_msix_rq;
  1032. enic->msix[ENIC_MSIX_RQ].devid = enic;
  1033. sprintf(enic->msix[ENIC_MSIX_WQ].devname,
  1034. "%.11s-tx-0", netdev->name);
  1035. enic->msix[ENIC_MSIX_WQ].isr = enic_isr_msix_wq;
  1036. enic->msix[ENIC_MSIX_WQ].devid = enic;
  1037. sprintf(enic->msix[ENIC_MSIX_ERR].devname,
  1038. "%.11s-err", netdev->name);
  1039. enic->msix[ENIC_MSIX_ERR].isr = enic_isr_msix_err;
  1040. enic->msix[ENIC_MSIX_ERR].devid = enic;
  1041. sprintf(enic->msix[ENIC_MSIX_NOTIFY].devname,
  1042. "%.11s-notify", netdev->name);
  1043. enic->msix[ENIC_MSIX_NOTIFY].isr = enic_isr_msix_notify;
  1044. enic->msix[ENIC_MSIX_NOTIFY].devid = enic;
  1045. for (i = 0; i < ARRAY_SIZE(enic->msix); i++) {
  1046. err = request_irq(enic->msix_entry[i].vector,
  1047. enic->msix[i].isr, 0,
  1048. enic->msix[i].devname,
  1049. enic->msix[i].devid);
  1050. if (err) {
  1051. enic_free_intr(enic);
  1052. break;
  1053. }
  1054. enic->msix[i].requested = 1;
  1055. }
  1056. break;
  1057. default:
  1058. break;
  1059. }
  1060. return err;
  1061. }
  1062. static int enic_notify_set(struct enic *enic)
  1063. {
  1064. int err;
  1065. spin_lock(&enic->devcmd_lock);
  1066. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1067. case VNIC_DEV_INTR_MODE_INTX:
  1068. err = vnic_dev_notify_set(enic->vdev, ENIC_INTX_NOTIFY);
  1069. break;
  1070. case VNIC_DEV_INTR_MODE_MSIX:
  1071. err = vnic_dev_notify_set(enic->vdev, ENIC_MSIX_NOTIFY);
  1072. break;
  1073. default:
  1074. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1075. break;
  1076. }
  1077. spin_unlock(&enic->devcmd_lock);
  1078. return err;
  1079. }
  1080. static void enic_notify_timer_start(struct enic *enic)
  1081. {
  1082. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1083. case VNIC_DEV_INTR_MODE_MSI:
  1084. mod_timer(&enic->notify_timer, jiffies);
  1085. break;
  1086. default:
  1087. /* Using intr for notification for INTx/MSI-X */
  1088. break;
  1089. };
  1090. }
  1091. /* rtnl lock is held, process context */
  1092. static int enic_open(struct net_device *netdev)
  1093. {
  1094. struct enic *enic = netdev_priv(netdev);
  1095. unsigned int i;
  1096. int err;
  1097. err = enic_request_intr(enic);
  1098. if (err) {
  1099. printk(KERN_ERR PFX "%s: Unable to request irq.\n",
  1100. netdev->name);
  1101. return err;
  1102. }
  1103. err = enic_notify_set(enic);
  1104. if (err) {
  1105. printk(KERN_ERR PFX
  1106. "%s: Failed to alloc notify buffer, aborting.\n",
  1107. netdev->name);
  1108. goto err_out_free_intr;
  1109. }
  1110. for (i = 0; i < enic->rq_count; i++) {
  1111. err = vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
  1112. if (err) {
  1113. printk(KERN_ERR PFX
  1114. "%s: Unable to alloc receive buffers.\n",
  1115. netdev->name);
  1116. goto err_out_notify_unset;
  1117. }
  1118. }
  1119. for (i = 0; i < enic->wq_count; i++)
  1120. vnic_wq_enable(&enic->wq[i]);
  1121. for (i = 0; i < enic->rq_count; i++)
  1122. vnic_rq_enable(&enic->rq[i]);
  1123. spin_lock(&enic->devcmd_lock);
  1124. enic_add_station_addr(enic);
  1125. spin_unlock(&enic->devcmd_lock);
  1126. enic_set_multicast_list(netdev);
  1127. netif_wake_queue(netdev);
  1128. napi_enable(&enic->napi);
  1129. spin_lock(&enic->devcmd_lock);
  1130. vnic_dev_enable(enic->vdev);
  1131. spin_unlock(&enic->devcmd_lock);
  1132. for (i = 0; i < enic->intr_count; i++)
  1133. vnic_intr_unmask(&enic->intr[i]);
  1134. enic_notify_timer_start(enic);
  1135. return 0;
  1136. err_out_notify_unset:
  1137. spin_lock(&enic->devcmd_lock);
  1138. vnic_dev_notify_unset(enic->vdev);
  1139. spin_unlock(&enic->devcmd_lock);
  1140. err_out_free_intr:
  1141. enic_free_intr(enic);
  1142. return err;
  1143. }
  1144. /* rtnl lock is held, process context */
  1145. static int enic_stop(struct net_device *netdev)
  1146. {
  1147. struct enic *enic = netdev_priv(netdev);
  1148. unsigned int i;
  1149. int err;
  1150. del_timer_sync(&enic->notify_timer);
  1151. spin_lock(&enic->devcmd_lock);
  1152. vnic_dev_disable(enic->vdev);
  1153. spin_unlock(&enic->devcmd_lock);
  1154. napi_disable(&enic->napi);
  1155. netif_stop_queue(netdev);
  1156. for (i = 0; i < enic->intr_count; i++)
  1157. vnic_intr_mask(&enic->intr[i]);
  1158. for (i = 0; i < enic->wq_count; i++) {
  1159. err = vnic_wq_disable(&enic->wq[i]);
  1160. if (err)
  1161. return err;
  1162. }
  1163. for (i = 0; i < enic->rq_count; i++) {
  1164. err = vnic_rq_disable(&enic->rq[i]);
  1165. if (err)
  1166. return err;
  1167. }
  1168. spin_lock(&enic->devcmd_lock);
  1169. vnic_dev_notify_unset(enic->vdev);
  1170. spin_unlock(&enic->devcmd_lock);
  1171. enic_free_intr(enic);
  1172. (void)vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  1173. -1, enic_rq_service_drop, NULL);
  1174. (void)vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  1175. -1, enic_wq_service, NULL);
  1176. for (i = 0; i < enic->wq_count; i++)
  1177. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1178. for (i = 0; i < enic->rq_count; i++)
  1179. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1180. for (i = 0; i < enic->cq_count; i++)
  1181. vnic_cq_clean(&enic->cq[i]);
  1182. for (i = 0; i < enic->intr_count; i++)
  1183. vnic_intr_clean(&enic->intr[i]);
  1184. return 0;
  1185. }
  1186. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1187. {
  1188. struct enic *enic = netdev_priv(netdev);
  1189. int running = netif_running(netdev);
  1190. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1191. return -EINVAL;
  1192. if (running)
  1193. enic_stop(netdev);
  1194. netdev->mtu = new_mtu;
  1195. if (netdev->mtu > enic->port_mtu)
  1196. printk(KERN_WARNING PFX
  1197. "%s: interface MTU (%d) set higher "
  1198. "than port MTU (%d)\n",
  1199. netdev->name, netdev->mtu, enic->port_mtu);
  1200. if (running)
  1201. enic_open(netdev);
  1202. return 0;
  1203. }
  1204. #ifdef CONFIG_NET_POLL_CONTROLLER
  1205. static void enic_poll_controller(struct net_device *netdev)
  1206. {
  1207. struct enic *enic = netdev_priv(netdev);
  1208. struct vnic_dev *vdev = enic->vdev;
  1209. switch (vnic_dev_get_intr_mode(vdev)) {
  1210. case VNIC_DEV_INTR_MODE_MSIX:
  1211. enic_isr_msix_rq(enic->pdev->irq, enic);
  1212. enic_isr_msix_wq(enic->pdev->irq, enic);
  1213. break;
  1214. case VNIC_DEV_INTR_MODE_MSI:
  1215. enic_isr_msi(enic->pdev->irq, enic);
  1216. break;
  1217. case VNIC_DEV_INTR_MODE_INTX:
  1218. enic_isr_legacy(enic->pdev->irq, netdev);
  1219. break;
  1220. default:
  1221. break;
  1222. }
  1223. }
  1224. #endif
  1225. static int enic_dev_wait(struct vnic_dev *vdev,
  1226. int (*start)(struct vnic_dev *, int),
  1227. int (*finished)(struct vnic_dev *, int *),
  1228. int arg)
  1229. {
  1230. unsigned long time;
  1231. int done;
  1232. int err;
  1233. BUG_ON(in_interrupt());
  1234. err = start(vdev, arg);
  1235. if (err)
  1236. return err;
  1237. /* Wait for func to complete...2 seconds max
  1238. */
  1239. time = jiffies + (HZ * 2);
  1240. do {
  1241. err = finished(vdev, &done);
  1242. if (err)
  1243. return err;
  1244. if (done)
  1245. return 0;
  1246. schedule_timeout_uninterruptible(HZ / 10);
  1247. } while (time_after(time, jiffies));
  1248. return -ETIMEDOUT;
  1249. }
  1250. static int enic_dev_open(struct enic *enic)
  1251. {
  1252. int err;
  1253. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1254. vnic_dev_open_done, 0);
  1255. if (err)
  1256. printk(KERN_ERR PFX
  1257. "vNIC device open failed, err %d.\n", err);
  1258. return err;
  1259. }
  1260. static int enic_dev_soft_reset(struct enic *enic)
  1261. {
  1262. int err;
  1263. err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
  1264. vnic_dev_soft_reset_done, 0);
  1265. if (err)
  1266. printk(KERN_ERR PFX
  1267. "vNIC soft reset failed, err %d.\n", err);
  1268. return err;
  1269. }
  1270. static int enic_set_niccfg(struct enic *enic)
  1271. {
  1272. const u8 rss_default_cpu = 0;
  1273. const u8 rss_hash_type = 0;
  1274. const u8 rss_hash_bits = 0;
  1275. const u8 rss_base_cpu = 0;
  1276. const u8 rss_enable = 0;
  1277. const u8 tso_ipid_split_en = 0;
  1278. const u8 ig_vlan_strip_en = 1;
  1279. /* Enable VLAN tag stripping. RSS not enabled (yet).
  1280. */
  1281. return enic_set_nic_cfg(enic,
  1282. rss_default_cpu, rss_hash_type,
  1283. rss_hash_bits, rss_base_cpu,
  1284. rss_enable, tso_ipid_split_en,
  1285. ig_vlan_strip_en);
  1286. }
  1287. static void enic_reset(struct work_struct *work)
  1288. {
  1289. struct enic *enic = container_of(work, struct enic, reset);
  1290. if (!netif_running(enic->netdev))
  1291. return;
  1292. rtnl_lock();
  1293. spin_lock(&enic->devcmd_lock);
  1294. vnic_dev_hang_notify(enic->vdev);
  1295. spin_unlock(&enic->devcmd_lock);
  1296. enic_stop(enic->netdev);
  1297. enic_dev_soft_reset(enic);
  1298. vnic_dev_init(enic->vdev, 0);
  1299. enic_reset_mcaddrs(enic);
  1300. enic_init_vnic_resources(enic);
  1301. enic_set_niccfg(enic);
  1302. enic_open(enic->netdev);
  1303. rtnl_unlock();
  1304. }
  1305. static int enic_set_intr_mode(struct enic *enic)
  1306. {
  1307. unsigned int n = ARRAY_SIZE(enic->rq);
  1308. unsigned int m = ARRAY_SIZE(enic->wq);
  1309. unsigned int i;
  1310. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1311. * system capabilities.
  1312. *
  1313. * Try MSI-X first
  1314. *
  1315. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1316. * (the second to last INTR is used for WQ/RQ errors)
  1317. * (the last INTR is used for notifications)
  1318. */
  1319. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1320. for (i = 0; i < n + m + 2; i++)
  1321. enic->msix_entry[i].entry = i;
  1322. if (enic->config.intr_mode < 1 &&
  1323. enic->rq_count >= n &&
  1324. enic->wq_count >= m &&
  1325. enic->cq_count >= n + m &&
  1326. enic->intr_count >= n + m + 2 &&
  1327. !pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1328. enic->rq_count = n;
  1329. enic->wq_count = m;
  1330. enic->cq_count = n + m;
  1331. enic->intr_count = n + m + 2;
  1332. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSIX);
  1333. return 0;
  1334. }
  1335. /* Next try MSI
  1336. *
  1337. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1338. */
  1339. if (enic->config.intr_mode < 2 &&
  1340. enic->rq_count >= 1 &&
  1341. enic->wq_count >= 1 &&
  1342. enic->cq_count >= 2 &&
  1343. enic->intr_count >= 1 &&
  1344. !pci_enable_msi(enic->pdev)) {
  1345. enic->rq_count = 1;
  1346. enic->wq_count = 1;
  1347. enic->cq_count = 2;
  1348. enic->intr_count = 1;
  1349. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1350. return 0;
  1351. }
  1352. /* Next try INTx
  1353. *
  1354. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1355. * (the first INTR is used for WQ/RQ)
  1356. * (the second INTR is used for WQ/RQ errors)
  1357. * (the last INTR is used for notifications)
  1358. */
  1359. if (enic->config.intr_mode < 3 &&
  1360. enic->rq_count >= 1 &&
  1361. enic->wq_count >= 1 &&
  1362. enic->cq_count >= 2 &&
  1363. enic->intr_count >= 3) {
  1364. enic->rq_count = 1;
  1365. enic->wq_count = 1;
  1366. enic->cq_count = 2;
  1367. enic->intr_count = 3;
  1368. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1369. return 0;
  1370. }
  1371. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1372. return -EINVAL;
  1373. }
  1374. static void enic_clear_intr_mode(struct enic *enic)
  1375. {
  1376. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1377. case VNIC_DEV_INTR_MODE_MSIX:
  1378. pci_disable_msix(enic->pdev);
  1379. break;
  1380. case VNIC_DEV_INTR_MODE_MSI:
  1381. pci_disable_msi(enic->pdev);
  1382. break;
  1383. default:
  1384. break;
  1385. }
  1386. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1387. }
  1388. static const struct net_device_ops enic_netdev_ops = {
  1389. .ndo_open = enic_open,
  1390. .ndo_stop = enic_stop,
  1391. .ndo_start_xmit = enic_hard_start_xmit,
  1392. .ndo_get_stats = enic_get_stats,
  1393. .ndo_validate_addr = eth_validate_addr,
  1394. .ndo_set_mac_address = eth_mac_addr,
  1395. .ndo_set_multicast_list = enic_set_multicast_list,
  1396. .ndo_change_mtu = enic_change_mtu,
  1397. .ndo_vlan_rx_register = enic_vlan_rx_register,
  1398. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1399. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1400. .ndo_tx_timeout = enic_tx_timeout,
  1401. #ifdef CONFIG_NET_POLL_CONTROLLER
  1402. .ndo_poll_controller = enic_poll_controller,
  1403. #endif
  1404. };
  1405. static void enic_iounmap(struct enic *enic)
  1406. {
  1407. unsigned int i;
  1408. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1409. if (enic->bar[i].vaddr)
  1410. iounmap(enic->bar[i].vaddr);
  1411. }
  1412. static int __devinit enic_probe(struct pci_dev *pdev,
  1413. const struct pci_device_id *ent)
  1414. {
  1415. struct net_device *netdev;
  1416. struct enic *enic;
  1417. int using_dac = 0;
  1418. unsigned int i;
  1419. int err;
  1420. /* Allocate net device structure and initialize. Private
  1421. * instance data is initialized to zero.
  1422. */
  1423. netdev = alloc_etherdev(sizeof(struct enic));
  1424. if (!netdev) {
  1425. printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");
  1426. return -ENOMEM;
  1427. }
  1428. pci_set_drvdata(pdev, netdev);
  1429. SET_NETDEV_DEV(netdev, &pdev->dev);
  1430. enic = netdev_priv(netdev);
  1431. enic->netdev = netdev;
  1432. enic->pdev = pdev;
  1433. /* Setup PCI resources
  1434. */
  1435. err = pci_enable_device(pdev);
  1436. if (err) {
  1437. printk(KERN_ERR PFX
  1438. "Cannot enable PCI device, aborting.\n");
  1439. goto err_out_free_netdev;
  1440. }
  1441. err = pci_request_regions(pdev, DRV_NAME);
  1442. if (err) {
  1443. printk(KERN_ERR PFX
  1444. "Cannot request PCI regions, aborting.\n");
  1445. goto err_out_disable_device;
  1446. }
  1447. pci_set_master(pdev);
  1448. /* Query PCI controller on system for DMA addressing
  1449. * limitation for the device. Try 40-bit first, and
  1450. * fail to 32-bit.
  1451. */
  1452. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
  1453. if (err) {
  1454. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1455. if (err) {
  1456. printk(KERN_ERR PFX
  1457. "No usable DMA configuration, aborting.\n");
  1458. goto err_out_release_regions;
  1459. }
  1460. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1461. if (err) {
  1462. printk(KERN_ERR PFX
  1463. "Unable to obtain 32-bit DMA "
  1464. "for consistent allocations, aborting.\n");
  1465. goto err_out_release_regions;
  1466. }
  1467. } else {
  1468. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
  1469. if (err) {
  1470. printk(KERN_ERR PFX
  1471. "Unable to obtain 40-bit DMA "
  1472. "for consistent allocations, aborting.\n");
  1473. goto err_out_release_regions;
  1474. }
  1475. using_dac = 1;
  1476. }
  1477. /* Map vNIC resources from BAR0-5
  1478. */
  1479. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1480. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1481. continue;
  1482. enic->bar[i].len = pci_resource_len(pdev, i);
  1483. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1484. if (!enic->bar[i].vaddr) {
  1485. printk(KERN_ERR PFX
  1486. "Cannot memory-map BAR %d, aborting.\n", i);
  1487. err = -ENODEV;
  1488. goto err_out_iounmap;
  1489. }
  1490. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1491. }
  1492. /* Register vNIC device
  1493. */
  1494. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1495. ARRAY_SIZE(enic->bar));
  1496. if (!enic->vdev) {
  1497. printk(KERN_ERR PFX
  1498. "vNIC registration failed, aborting.\n");
  1499. err = -ENODEV;
  1500. goto err_out_iounmap;
  1501. }
  1502. /* Issue device open to get device in known state
  1503. */
  1504. err = enic_dev_open(enic);
  1505. if (err) {
  1506. printk(KERN_ERR PFX
  1507. "vNIC dev open failed, aborting.\n");
  1508. goto err_out_vnic_unregister;
  1509. }
  1510. /* Issue device init to initialize the vnic-to-switch link.
  1511. * We'll start with carrier off and wait for link UP
  1512. * notification later to turn on carrier. We don't need
  1513. * to wait here for the vnic-to-switch link initialization
  1514. * to complete; link UP notification is the indication that
  1515. * the process is complete.
  1516. */
  1517. netif_carrier_off(netdev);
  1518. err = vnic_dev_init(enic->vdev, 0);
  1519. if (err) {
  1520. printk(KERN_ERR PFX
  1521. "vNIC dev init failed, aborting.\n");
  1522. goto err_out_dev_close;
  1523. }
  1524. /* Get vNIC configuration
  1525. */
  1526. err = enic_get_vnic_config(enic);
  1527. if (err) {
  1528. printk(KERN_ERR PFX
  1529. "Get vNIC configuration failed, aborting.\n");
  1530. goto err_out_dev_close;
  1531. }
  1532. /* Get available resource counts
  1533. */
  1534. enic_get_res_counts(enic);
  1535. /* Set interrupt mode based on resource counts and system
  1536. * capabilities
  1537. */
  1538. err = enic_set_intr_mode(enic);
  1539. if (err) {
  1540. printk(KERN_ERR PFX
  1541. "Failed to set intr mode, aborting.\n");
  1542. goto err_out_dev_close;
  1543. }
  1544. /* Allocate and configure vNIC resources
  1545. */
  1546. err = enic_alloc_vnic_resources(enic);
  1547. if (err) {
  1548. printk(KERN_ERR PFX
  1549. "Failed to alloc vNIC resources, aborting.\n");
  1550. goto err_out_free_vnic_resources;
  1551. }
  1552. enic_init_vnic_resources(enic);
  1553. err = enic_set_niccfg(enic);
  1554. if (err) {
  1555. printk(KERN_ERR PFX
  1556. "Failed to config nic, aborting.\n");
  1557. goto err_out_free_vnic_resources;
  1558. }
  1559. /* Setup notification timer, HW reset task, and locks
  1560. */
  1561. init_timer(&enic->notify_timer);
  1562. enic->notify_timer.function = enic_notify_timer;
  1563. enic->notify_timer.data = (unsigned long)enic;
  1564. INIT_WORK(&enic->reset, enic_reset);
  1565. for (i = 0; i < enic->wq_count; i++)
  1566. spin_lock_init(&enic->wq_lock[i]);
  1567. spin_lock_init(&enic->devcmd_lock);
  1568. /* Register net device
  1569. */
  1570. enic->port_mtu = enic->config.mtu;
  1571. (void)enic_change_mtu(netdev, enic->port_mtu);
  1572. err = enic_set_mac_addr(netdev, enic->mac_addr);
  1573. if (err) {
  1574. printk(KERN_ERR PFX
  1575. "Invalid MAC address, aborting.\n");
  1576. goto err_out_free_vnic_resources;
  1577. }
  1578. netdev->netdev_ops = &enic_netdev_ops;
  1579. netdev->watchdog_timeo = 2 * HZ;
  1580. netdev->ethtool_ops = &enic_ethtool_ops;
  1581. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1582. default:
  1583. netif_napi_add(netdev, &enic->napi, enic_poll, 64);
  1584. break;
  1585. case VNIC_DEV_INTR_MODE_MSIX:
  1586. netif_napi_add(netdev, &enic->napi, enic_poll_msix, 64);
  1587. break;
  1588. }
  1589. netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
  1590. if (ENIC_SETTING(enic, TXCSUM))
  1591. netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  1592. if (ENIC_SETTING(enic, TSO))
  1593. netdev->features |= NETIF_F_TSO |
  1594. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  1595. if (ENIC_SETTING(enic, LRO))
  1596. netdev->features |= NETIF_F_LRO;
  1597. if (using_dac)
  1598. netdev->features |= NETIF_F_HIGHDMA;
  1599. enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
  1600. enic->lro_mgr.max_aggr = ENIC_LRO_MAX_AGGR;
  1601. enic->lro_mgr.max_desc = ENIC_LRO_MAX_DESC;
  1602. enic->lro_mgr.lro_arr = enic->lro_desc;
  1603. enic->lro_mgr.get_skb_header = enic_get_skb_header;
  1604. enic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
  1605. enic->lro_mgr.dev = netdev;
  1606. enic->lro_mgr.ip_summed = CHECKSUM_COMPLETE;
  1607. enic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
  1608. err = register_netdev(netdev);
  1609. if (err) {
  1610. printk(KERN_ERR PFX
  1611. "Cannot register net device, aborting.\n");
  1612. goto err_out_free_vnic_resources;
  1613. }
  1614. return 0;
  1615. err_out_free_vnic_resources:
  1616. enic_free_vnic_resources(enic);
  1617. err_out_dev_close:
  1618. vnic_dev_close(enic->vdev);
  1619. err_out_vnic_unregister:
  1620. enic_clear_intr_mode(enic);
  1621. vnic_dev_unregister(enic->vdev);
  1622. err_out_iounmap:
  1623. enic_iounmap(enic);
  1624. err_out_release_regions:
  1625. pci_release_regions(pdev);
  1626. err_out_disable_device:
  1627. pci_disable_device(pdev);
  1628. err_out_free_netdev:
  1629. pci_set_drvdata(pdev, NULL);
  1630. free_netdev(netdev);
  1631. return err;
  1632. }
  1633. static void __devexit enic_remove(struct pci_dev *pdev)
  1634. {
  1635. struct net_device *netdev = pci_get_drvdata(pdev);
  1636. if (netdev) {
  1637. struct enic *enic = netdev_priv(netdev);
  1638. flush_scheduled_work();
  1639. unregister_netdev(netdev);
  1640. enic_free_vnic_resources(enic);
  1641. vnic_dev_close(enic->vdev);
  1642. enic_clear_intr_mode(enic);
  1643. vnic_dev_unregister(enic->vdev);
  1644. enic_iounmap(enic);
  1645. pci_release_regions(pdev);
  1646. pci_disable_device(pdev);
  1647. pci_set_drvdata(pdev, NULL);
  1648. free_netdev(netdev);
  1649. }
  1650. }
  1651. static struct pci_driver enic_driver = {
  1652. .name = DRV_NAME,
  1653. .id_table = enic_id_table,
  1654. .probe = enic_probe,
  1655. .remove = __devexit_p(enic_remove),
  1656. };
  1657. static int __init enic_init_module(void)
  1658. {
  1659. printk(KERN_INFO PFX "%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  1660. return pci_register_driver(&enic_driver);
  1661. }
  1662. static void __exit enic_cleanup_module(void)
  1663. {
  1664. pci_unregister_driver(&enic_driver);
  1665. }
  1666. module_init(enic_init_module);
  1667. module_exit(enic_cleanup_module);