es7000_32.c 7.9 KB

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  1. /*
  2. * Written by: Garry Forsgren, Unisys Corporation
  3. * Natalie Protasevich, Unisys Corporation
  4. * This file contains the code to configure and interface
  5. * with Unisys ES7000 series hardware system manager.
  6. *
  7. * Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it would be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston MA 02111-1307, USA.
  20. *
  21. * Contact information: Unisys Corporation, Township Line & Union Meeting
  22. * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
  23. *
  24. * http://www.unisys.com
  25. */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/kernel.h>
  29. #include <linux/smp.h>
  30. #include <linux/string.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/errno.h>
  33. #include <linux/notifier.h>
  34. #include <linux/reboot.h>
  35. #include <linux/init.h>
  36. #include <linux/acpi.h>
  37. #include <asm/io.h>
  38. #include <asm/nmi.h>
  39. #include <asm/smp.h>
  40. #include <asm/apicdef.h>
  41. #include <mach_mpparse.h>
  42. #include <asm/setup.h>
  43. /*
  44. * ES7000 chipsets
  45. */
  46. #define NON_UNISYS 0
  47. #define ES7000_CLASSIC 1
  48. #define ES7000_ZORRO 2
  49. #define MIP_REG 1
  50. #define MIP_PSAI_REG 4
  51. #define MIP_BUSY 1
  52. #define MIP_SPIN 0xf0000
  53. #define MIP_VALID 0x0100000000000000ULL
  54. #define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
  55. #define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
  56. struct mip_reg_info {
  57. unsigned long long mip_info;
  58. unsigned long long delivery_info;
  59. unsigned long long host_reg;
  60. unsigned long long mip_reg;
  61. };
  62. struct part_info {
  63. unsigned char type;
  64. unsigned char length;
  65. unsigned char part_id;
  66. unsigned char apic_mode;
  67. unsigned long snum;
  68. char ptype[16];
  69. char sname[64];
  70. char pname[64];
  71. };
  72. struct psai {
  73. unsigned long long entry_type;
  74. unsigned long long addr;
  75. unsigned long long bep_addr;
  76. };
  77. struct es7000_mem_info {
  78. unsigned char type;
  79. unsigned char length;
  80. unsigned char resv[6];
  81. unsigned long long start;
  82. unsigned long long size;
  83. };
  84. struct es7000_oem_table {
  85. unsigned long long hdr;
  86. struct mip_reg_info mip;
  87. struct part_info pif;
  88. struct es7000_mem_info shm;
  89. struct psai psai;
  90. };
  91. #ifdef CONFIG_ACPI
  92. struct oem_table {
  93. struct acpi_table_header Header;
  94. u32 OEMTableAddr;
  95. u32 OEMTableSize;
  96. };
  97. extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
  98. extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
  99. #endif
  100. struct mip_reg {
  101. unsigned long long off_0;
  102. unsigned long long off_8;
  103. unsigned long long off_10;
  104. unsigned long long off_18;
  105. unsigned long long off_20;
  106. unsigned long long off_28;
  107. unsigned long long off_30;
  108. unsigned long long off_38;
  109. };
  110. #define MIP_SW_APIC 0x1020b
  111. #define MIP_FUNC(VALUE) (VALUE & 0xff)
  112. /*
  113. * ES7000 Globals
  114. */
  115. static volatile unsigned long *psai = NULL;
  116. static struct mip_reg *mip_reg;
  117. static struct mip_reg *host_reg;
  118. static int mip_port;
  119. static unsigned long mip_addr, host_addr;
  120. int es7000_plat;
  121. /*
  122. * GSI override for ES7000 platforms.
  123. */
  124. static unsigned int base;
  125. static int
  126. es7000_rename_gsi(int ioapic, int gsi)
  127. {
  128. if (es7000_plat == ES7000_ZORRO)
  129. return gsi;
  130. if (!base) {
  131. int i;
  132. for (i = 0; i < nr_ioapics; i++)
  133. base += nr_ioapic_registers[i];
  134. }
  135. if (!ioapic && (gsi < 16))
  136. gsi += base;
  137. return gsi;
  138. }
  139. #ifdef CONFIG_ES7000_CLUSTERED_APIC
  140. static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
  141. {
  142. unsigned long vect = 0, psaival = 0;
  143. if (psai == NULL)
  144. return -1;
  145. vect = ((unsigned long)__pa(eip)/0x1000) << 16;
  146. psaival = (0x1000000 | vect | cpu);
  147. while (*psai & 0x1000000)
  148. ;
  149. *psai = psaival;
  150. return 0;
  151. }
  152. #endif
  153. void __init
  154. setup_unisys(void)
  155. {
  156. /*
  157. * Determine the generation of the ES7000 currently running.
  158. *
  159. * es7000_plat = 1 if the machine is a 5xx ES7000 box
  160. * es7000_plat = 2 if the machine is a x86_64 ES7000 box
  161. *
  162. */
  163. if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
  164. es7000_plat = ES7000_ZORRO;
  165. else
  166. es7000_plat = ES7000_CLASSIC;
  167. ioapic_renumber_irq = es7000_rename_gsi;
  168. #ifdef CONFIG_ES7000_CLUSTERED_APIC
  169. x86_quirks->wakeup_secondary_cpu = wakeup_secondary_cpu_via_mip;
  170. #endif
  171. }
  172. /*
  173. * Parse the OEM Table
  174. */
  175. int __init
  176. parse_unisys_oem (char *oemptr)
  177. {
  178. int i;
  179. int success = 0;
  180. unsigned char type, size;
  181. unsigned long val;
  182. char *tp = NULL;
  183. struct psai *psaip = NULL;
  184. struct mip_reg_info *mi;
  185. struct mip_reg *host, *mip;
  186. tp = oemptr;
  187. tp += 8;
  188. for (i=0; i <= 6; i++) {
  189. type = *tp++;
  190. size = *tp++;
  191. tp -= 2;
  192. switch (type) {
  193. case MIP_REG:
  194. mi = (struct mip_reg_info *)tp;
  195. val = MIP_RD_LO(mi->host_reg);
  196. host_addr = val;
  197. host = (struct mip_reg *)val;
  198. host_reg = __va(host);
  199. val = MIP_RD_LO(mi->mip_reg);
  200. mip_port = MIP_PORT(mi->mip_info);
  201. mip_addr = val;
  202. mip = (struct mip_reg *)val;
  203. mip_reg = __va(mip);
  204. pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
  205. (unsigned long)host_reg);
  206. pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
  207. (unsigned long)mip_reg);
  208. success++;
  209. break;
  210. case MIP_PSAI_REG:
  211. psaip = (struct psai *)tp;
  212. if (tp != NULL) {
  213. if (psaip->addr)
  214. psai = __va(psaip->addr);
  215. else
  216. psai = NULL;
  217. success++;
  218. }
  219. break;
  220. default:
  221. break;
  222. }
  223. tp += size;
  224. }
  225. if (success < 2) {
  226. es7000_plat = NON_UNISYS;
  227. } else
  228. setup_unisys();
  229. return es7000_plat;
  230. }
  231. #ifdef CONFIG_ACPI
  232. static unsigned long oem_addrX;
  233. static unsigned long oem_size;
  234. int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
  235. {
  236. struct acpi_table_header *header = NULL;
  237. int i = 0;
  238. acpi_size tbl_size;
  239. while (ACPI_SUCCESS(acpi_get_table_with_size("OEM1", i++, &header, &tbl_size))) {
  240. if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
  241. struct oem_table *t = (struct oem_table *)header;
  242. oem_addrX = t->OEMTableAddr;
  243. oem_size = t->OEMTableSize;
  244. early_acpi_os_unmap_memory(header, tbl_size);
  245. *oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
  246. oem_size);
  247. return 0;
  248. }
  249. early_acpi_os_unmap_memory(header, tbl_size);
  250. }
  251. return -1;
  252. }
  253. void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
  254. {
  255. if (!oem_addr)
  256. return;
  257. __acpi_unmap_table((char *)oem_addr, oem_size);
  258. }
  259. #endif
  260. static void
  261. es7000_spin(int n)
  262. {
  263. int i = 0;
  264. while (i++ < n)
  265. rep_nop();
  266. }
  267. static int __init
  268. es7000_mip_write(struct mip_reg *mip_reg)
  269. {
  270. int status = 0;
  271. int spin;
  272. spin = MIP_SPIN;
  273. while (((unsigned long long)host_reg->off_38 &
  274. (unsigned long long)MIP_VALID) != 0) {
  275. if (--spin <= 0) {
  276. printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
  277. return -1;
  278. }
  279. es7000_spin(MIP_SPIN);
  280. }
  281. memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
  282. outb(1, mip_port);
  283. spin = MIP_SPIN;
  284. while (((unsigned long long)mip_reg->off_38 &
  285. (unsigned long long)MIP_VALID) == 0) {
  286. if (--spin <= 0) {
  287. printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
  288. return -1;
  289. }
  290. es7000_spin(MIP_SPIN);
  291. }
  292. status = ((unsigned long long)mip_reg->off_0 &
  293. (unsigned long long)0xffff0000000000ULL) >> 48;
  294. mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
  295. (unsigned long long)~MIP_VALID);
  296. return status;
  297. }
  298. void __init
  299. es7000_sw_apic(void)
  300. {
  301. if (es7000_plat) {
  302. int mip_status;
  303. struct mip_reg es7000_mip_reg;
  304. printk("ES7000: Enabling APIC mode.\n");
  305. memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
  306. es7000_mip_reg.off_0 = MIP_SW_APIC;
  307. es7000_mip_reg.off_38 = (MIP_VALID);
  308. while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
  309. printk("es7000_sw_apic: command failed, status = %x\n",
  310. mip_status);
  311. return;
  312. }
  313. }