mach-smdkv310.c 8.2 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
  2. *
  3. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/gpio.h>
  12. #include <linux/mmc/host.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/smsc911x.h>
  15. #include <linux/io.h>
  16. #include <linux/i2c.h>
  17. #include <linux/input.h>
  18. #include <linux/pwm_backlight.h>
  19. #include <asm/mach/arch.h>
  20. #include <asm/mach-types.h>
  21. #include <plat/regs-serial.h>
  22. #include <plat/regs-srom.h>
  23. #include <plat/exynos4.h>
  24. #include <plat/cpu.h>
  25. #include <plat/devs.h>
  26. #include <plat/keypad.h>
  27. #include <plat/sdhci.h>
  28. #include <plat/iic.h>
  29. #include <plat/pd.h>
  30. #include <plat/gpio-cfg.h>
  31. #include <plat/backlight.h>
  32. #include <plat/mfc.h>
  33. #include <plat/ehci.h>
  34. #include <plat/clock.h>
  35. #include <mach/map.h>
  36. /* Following are default values for UCON, ULCON and UFCON UART registers */
  37. #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  38. S3C2410_UCON_RXILEVEL | \
  39. S3C2410_UCON_TXIRQMODE | \
  40. S3C2410_UCON_RXIRQMODE | \
  41. S3C2410_UCON_RXFIFO_TOI | \
  42. S3C2443_UCON_RXERR_IRQEN)
  43. #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
  44. #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  45. S5PV210_UFCON_TXTRIG4 | \
  46. S5PV210_UFCON_RXTRIG4)
  47. static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  48. [0] = {
  49. .hwport = 0,
  50. .flags = 0,
  51. .ucon = SMDKV310_UCON_DEFAULT,
  52. .ulcon = SMDKV310_ULCON_DEFAULT,
  53. .ufcon = SMDKV310_UFCON_DEFAULT,
  54. },
  55. [1] = {
  56. .hwport = 1,
  57. .flags = 0,
  58. .ucon = SMDKV310_UCON_DEFAULT,
  59. .ulcon = SMDKV310_ULCON_DEFAULT,
  60. .ufcon = SMDKV310_UFCON_DEFAULT,
  61. },
  62. [2] = {
  63. .hwport = 2,
  64. .flags = 0,
  65. .ucon = SMDKV310_UCON_DEFAULT,
  66. .ulcon = SMDKV310_ULCON_DEFAULT,
  67. .ufcon = SMDKV310_UFCON_DEFAULT,
  68. },
  69. [3] = {
  70. .hwport = 3,
  71. .flags = 0,
  72. .ucon = SMDKV310_UCON_DEFAULT,
  73. .ulcon = SMDKV310_ULCON_DEFAULT,
  74. .ufcon = SMDKV310_UFCON_DEFAULT,
  75. },
  76. };
  77. static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  78. .cd_type = S3C_SDHCI_CD_INTERNAL,
  79. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  80. #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  81. .max_width = 8,
  82. .host_caps = MMC_CAP_8_BIT_DATA,
  83. #endif
  84. };
  85. static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  86. .cd_type = S3C_SDHCI_CD_GPIO,
  87. .ext_cd_gpio = EXYNOS4_GPK0(2),
  88. .ext_cd_gpio_invert = 1,
  89. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  90. };
  91. static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  92. .cd_type = S3C_SDHCI_CD_INTERNAL,
  93. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  94. #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
  95. .max_width = 8,
  96. .host_caps = MMC_CAP_8_BIT_DATA,
  97. #endif
  98. };
  99. static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
  100. .cd_type = S3C_SDHCI_CD_GPIO,
  101. .ext_cd_gpio = EXYNOS4_GPK2(2),
  102. .ext_cd_gpio_invert = 1,
  103. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  104. };
  105. static struct resource smdkv310_smsc911x_resources[] = {
  106. [0] = {
  107. .start = EXYNOS4_PA_SROM_BANK(1),
  108. .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
  109. .flags = IORESOURCE_MEM,
  110. },
  111. [1] = {
  112. .start = IRQ_EINT(5),
  113. .end = IRQ_EINT(5),
  114. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  115. },
  116. };
  117. static struct smsc911x_platform_config smsc9215_config = {
  118. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  119. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  120. .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
  121. .phy_interface = PHY_INTERFACE_MODE_MII,
  122. .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
  123. };
  124. static struct platform_device smdkv310_smsc911x = {
  125. .name = "smsc911x",
  126. .id = -1,
  127. .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
  128. .resource = smdkv310_smsc911x_resources,
  129. .dev = {
  130. .platform_data = &smsc9215_config,
  131. },
  132. };
  133. static uint32_t smdkv310_keymap[] __initdata = {
  134. /* KEY(row, col, keycode) */
  135. KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
  136. KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
  137. KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
  138. KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
  139. };
  140. static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
  141. .keymap = smdkv310_keymap,
  142. .keymap_size = ARRAY_SIZE(smdkv310_keymap),
  143. };
  144. static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
  145. .keymap_data = &smdkv310_keymap_data,
  146. .rows = 2,
  147. .cols = 8,
  148. };
  149. static struct i2c_board_info i2c_devs1[] __initdata = {
  150. {I2C_BOARD_INFO("wm8994", 0x1a),},
  151. };
  152. /* USB EHCI */
  153. static struct s5p_ehci_platdata smdkv310_ehci_pdata;
  154. static void __init smdkv310_ehci_init(void)
  155. {
  156. struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
  157. s5p_ehci_set_platdata(pdata);
  158. }
  159. static struct platform_device *smdkv310_devices[] __initdata = {
  160. &s3c_device_hsmmc0,
  161. &s3c_device_hsmmc1,
  162. &s3c_device_hsmmc2,
  163. &s3c_device_hsmmc3,
  164. &s3c_device_i2c1,
  165. &s5p_device_i2c_hdmiphy,
  166. &s3c_device_rtc,
  167. &s3c_device_wdt,
  168. &s5p_device_ehci,
  169. &s5p_device_fimc0,
  170. &s5p_device_fimc1,
  171. &s5p_device_fimc2,
  172. &s5p_device_fimc3,
  173. &exynos4_device_ac97,
  174. &exynos4_device_i2s0,
  175. &samsung_device_keypad,
  176. &s5p_device_mfc,
  177. &s5p_device_mfc_l,
  178. &s5p_device_mfc_r,
  179. &exynos4_device_pd[PD_MFC],
  180. &exynos4_device_pd[PD_G3D],
  181. &exynos4_device_pd[PD_LCD0],
  182. &exynos4_device_pd[PD_LCD1],
  183. &exynos4_device_pd[PD_CAM],
  184. &exynos4_device_pd[PD_TV],
  185. &exynos4_device_pd[PD_GPS],
  186. &exynos4_device_spdif,
  187. &exynos4_device_sysmmu,
  188. &samsung_asoc_dma,
  189. &samsung_asoc_idma,
  190. &smdkv310_smsc911x,
  191. &exynos4_device_ahci,
  192. &s5p_device_hdmi,
  193. &s5p_device_mixer,
  194. };
  195. static void __init smdkv310_smsc911x_init(void)
  196. {
  197. u32 cs1;
  198. /* configure nCS1 width to 16 bits */
  199. cs1 = __raw_readl(S5P_SROM_BW) &
  200. ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
  201. cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
  202. (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
  203. (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
  204. S5P_SROM_BW__NCS1__SHIFT;
  205. __raw_writel(cs1, S5P_SROM_BW);
  206. /* set timing for nCS1 suitable for ethernet chip */
  207. __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
  208. (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
  209. (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
  210. (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
  211. (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
  212. (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
  213. (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
  214. }
  215. /* LCD Backlight data */
  216. static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
  217. .no = EXYNOS4_GPD0(1),
  218. .func = S3C_GPIO_SFN(2),
  219. };
  220. static struct platform_pwm_backlight_data smdkv310_bl_data = {
  221. .pwm_id = 1,
  222. .pwm_period_ns = 1000,
  223. };
  224. static void s5p_tv_setup(void)
  225. {
  226. /* direct HPD to HDMI chip */
  227. WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
  228. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  229. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  230. /* setup dependencies between TV devices */
  231. s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
  232. s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
  233. }
  234. static void __init smdkv310_map_io(void)
  235. {
  236. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  237. s3c24xx_init_clocks(24000000);
  238. s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
  239. }
  240. static void __init smdkv310_reserve(void)
  241. {
  242. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  243. }
  244. static void __init smdkv310_machine_init(void)
  245. {
  246. s3c_i2c1_set_platdata(NULL);
  247. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  248. smdkv310_smsc911x_init();
  249. s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
  250. s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
  251. s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
  252. s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
  253. s5p_tv_setup();
  254. s5p_i2c_hdmiphy_set_platdata(NULL);
  255. samsung_keypad_set_platdata(&smdkv310_keypad_data);
  256. samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
  257. smdkv310_ehci_init();
  258. clk_xusbxti.rate = 24000000;
  259. platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
  260. s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
  261. }
  262. MACHINE_START(SMDKV310, "SMDKV310")
  263. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  264. /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
  265. .boot_params = S5P_PA_SDRAM + 0x100,
  266. .init_irq = exynos4_init_irq,
  267. .map_io = smdkv310_map_io,
  268. .init_machine = smdkv310_machine_init,
  269. .timer = &exynos4_timer,
  270. .reserve = &smdkv310_reserve,
  271. MACHINE_END