fimc-lite.c 40 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/slab.h>
  23. #include <linux/videodev2.h>
  24. #include <media/v4l2-device.h>
  25. #include <media/v4l2-ioctl.h>
  26. #include <media/v4l2-mem2mem.h>
  27. #include <media/videobuf2-core.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include "fimc-mdevice.h"
  30. #include "fimc-core.h"
  31. #include "fimc-lite-reg.h"
  32. static int debug;
  33. module_param(debug, int, 0644);
  34. static const struct fimc_fmt fimc_lite_formats[] = {
  35. {
  36. .name = "YUV 4:2:2 packed, YCbYCr",
  37. .fourcc = V4L2_PIX_FMT_YUYV,
  38. .depth = { 16 },
  39. .color = FIMC_FMT_YCBYCR422,
  40. .memplanes = 1,
  41. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  42. }, {
  43. .name = "YUV 4:2:2 packed, CbYCrY",
  44. .fourcc = V4L2_PIX_FMT_UYVY,
  45. .depth = { 16 },
  46. .color = FIMC_FMT_CBYCRY422,
  47. .memplanes = 1,
  48. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  49. }, {
  50. .name = "YUV 4:2:2 packed, CrYCbY",
  51. .fourcc = V4L2_PIX_FMT_VYUY,
  52. .depth = { 16 },
  53. .color = FIMC_FMT_CRYCBY422,
  54. .memplanes = 1,
  55. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  56. }, {
  57. .name = "YUV 4:2:2 packed, YCrYCb",
  58. .fourcc = V4L2_PIX_FMT_YVYU,
  59. .depth = { 16 },
  60. .color = FIMC_FMT_YCRYCB422,
  61. .memplanes = 1,
  62. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  63. }, {
  64. .name = "RAW8 (GRBG)",
  65. .fourcc = V4L2_PIX_FMT_SGRBG8,
  66. .depth = { 8 },
  67. .color = FIMC_FMT_RAW8,
  68. .memplanes = 1,
  69. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  70. }, {
  71. .name = "RAW10 (GRBG)",
  72. .fourcc = V4L2_PIX_FMT_SGRBG10,
  73. .depth = { 10 },
  74. .color = FIMC_FMT_RAW10,
  75. .memplanes = 1,
  76. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  77. }, {
  78. .name = "RAW12 (GRBG)",
  79. .fourcc = V4L2_PIX_FMT_SGRBG12,
  80. .depth = { 12 },
  81. .color = FIMC_FMT_RAW12,
  82. .memplanes = 1,
  83. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  84. },
  85. };
  86. /**
  87. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  88. * @pixelformat: fourcc to match, ignored if null
  89. * @mbus_code: media bus code to match, ignored if null
  90. * @index: index to the fimc_lite_formats array, ignored if negative
  91. */
  92. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  93. const u32 *mbus_code, int index)
  94. {
  95. const struct fimc_fmt *fmt, *def_fmt = NULL;
  96. unsigned int i;
  97. int id = 0;
  98. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  99. return NULL;
  100. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  101. fmt = &fimc_lite_formats[i];
  102. if (pixelformat && fmt->fourcc == *pixelformat)
  103. return fmt;
  104. if (mbus_code && fmt->mbus_code == *mbus_code)
  105. return fmt;
  106. if (index == id)
  107. def_fmt = fmt;
  108. id++;
  109. }
  110. return def_fmt;
  111. }
  112. static int fimc_lite_hw_init(struct fimc_lite *fimc)
  113. {
  114. struct fimc_pipeline *pipeline = &fimc->pipeline;
  115. struct fimc_sensor_info *sensor;
  116. unsigned long flags;
  117. if (pipeline->subdevs[IDX_SENSOR] == NULL)
  118. return -ENXIO;
  119. if (fimc->fmt == NULL)
  120. return -EINVAL;
  121. sensor = v4l2_get_subdev_hostdata(pipeline->subdevs[IDX_SENSOR]);
  122. spin_lock_irqsave(&fimc->slock, flags);
  123. flite_hw_set_camera_bus(fimc, sensor->pdata);
  124. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  125. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  126. flite_hw_set_output_dma(fimc, &fimc->out_frame, true);
  127. flite_hw_set_interrupt_mask(fimc);
  128. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  129. if (debug > 0)
  130. flite_hw_dump_regs(fimc, __func__);
  131. spin_unlock_irqrestore(&fimc->slock, flags);
  132. return 0;
  133. }
  134. /*
  135. * Reinitialize the driver so it is ready to start the streaming again.
  136. * Set fimc->state to indicate stream off and the hardware shut down state.
  137. * If not suspending (@suspend is false), return any buffers to videobuf2.
  138. * Otherwise put any owned buffers onto the pending buffers queue, so they
  139. * can be re-spun when the device is being resumed. Also perform FIMC
  140. * software reset and disable streaming on the whole pipeline if required.
  141. */
  142. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  143. {
  144. struct flite_buffer *buf;
  145. unsigned long flags;
  146. bool streaming;
  147. spin_lock_irqsave(&fimc->slock, flags);
  148. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  149. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  150. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  151. if (suspend)
  152. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  153. else
  154. fimc->state &= ~(1 << ST_FLITE_PENDING |
  155. 1 << ST_FLITE_SUSPENDED);
  156. /* Release unused buffers */
  157. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  158. buf = fimc_lite_pending_queue_pop(fimc);
  159. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  160. }
  161. /* If suspending put unused buffers onto pending queue */
  162. while (!list_empty(&fimc->active_buf_q)) {
  163. buf = fimc_lite_active_queue_pop(fimc);
  164. if (suspend)
  165. fimc_lite_pending_queue_add(fimc, buf);
  166. else
  167. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  168. }
  169. spin_unlock_irqrestore(&fimc->slock, flags);
  170. flite_hw_reset(fimc);
  171. if (!streaming)
  172. return 0;
  173. return fimc_pipeline_s_stream(&fimc->pipeline, 0);
  174. }
  175. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  176. {
  177. unsigned long flags;
  178. if (!fimc_lite_active(fimc))
  179. return 0;
  180. spin_lock_irqsave(&fimc->slock, flags);
  181. set_bit(ST_FLITE_OFF, &fimc->state);
  182. flite_hw_capture_stop(fimc);
  183. spin_unlock_irqrestore(&fimc->slock, flags);
  184. wait_event_timeout(fimc->irq_queue,
  185. !test_bit(ST_FLITE_OFF, &fimc->state),
  186. (2*HZ/10)); /* 200 ms */
  187. return fimc_lite_reinit(fimc, suspend);
  188. }
  189. /* Must be called with fimc.slock spinlock held. */
  190. static void fimc_lite_config_update(struct fimc_lite *fimc)
  191. {
  192. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  193. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  194. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  195. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  196. }
  197. static irqreturn_t flite_irq_handler(int irq, void *priv)
  198. {
  199. struct fimc_lite *fimc = priv;
  200. struct flite_buffer *vbuf;
  201. unsigned long flags;
  202. struct timeval *tv;
  203. struct timespec ts;
  204. u32 intsrc;
  205. spin_lock_irqsave(&fimc->slock, flags);
  206. intsrc = flite_hw_get_interrupt_source(fimc);
  207. flite_hw_clear_pending_irq(fimc);
  208. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  209. wake_up(&fimc->irq_queue);
  210. goto done;
  211. }
  212. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  213. clear_bit(ST_FLITE_RUN, &fimc->state);
  214. fimc->events.data_overflow++;
  215. }
  216. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  217. flite_hw_clear_last_capture_end(fimc);
  218. clear_bit(ST_FLITE_STREAM, &fimc->state);
  219. wake_up(&fimc->irq_queue);
  220. }
  221. if (fimc->out_path != FIMC_IO_DMA)
  222. goto done;
  223. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  224. test_bit(ST_FLITE_RUN, &fimc->state) &&
  225. !list_empty(&fimc->active_buf_q) &&
  226. !list_empty(&fimc->pending_buf_q)) {
  227. vbuf = fimc_lite_active_queue_pop(fimc);
  228. ktime_get_ts(&ts);
  229. tv = &vbuf->vb.v4l2_buf.timestamp;
  230. tv->tv_sec = ts.tv_sec;
  231. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  232. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  233. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  234. vbuf = fimc_lite_pending_queue_pop(fimc);
  235. flite_hw_set_output_addr(fimc, vbuf->paddr);
  236. fimc_lite_active_queue_add(fimc, vbuf);
  237. }
  238. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  239. fimc_lite_config_update(fimc);
  240. if (list_empty(&fimc->pending_buf_q)) {
  241. flite_hw_capture_stop(fimc);
  242. clear_bit(ST_FLITE_STREAM, &fimc->state);
  243. }
  244. done:
  245. set_bit(ST_FLITE_RUN, &fimc->state);
  246. spin_unlock_irqrestore(&fimc->slock, flags);
  247. return IRQ_HANDLED;
  248. }
  249. static int start_streaming(struct vb2_queue *q, unsigned int count)
  250. {
  251. struct fimc_lite *fimc = q->drv_priv;
  252. int ret;
  253. fimc->frame_count = 0;
  254. ret = fimc_lite_hw_init(fimc);
  255. if (ret) {
  256. fimc_lite_reinit(fimc, false);
  257. return ret;
  258. }
  259. set_bit(ST_FLITE_PENDING, &fimc->state);
  260. if (!list_empty(&fimc->active_buf_q) &&
  261. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  262. flite_hw_capture_start(fimc);
  263. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  264. fimc_pipeline_s_stream(&fimc->pipeline, 1);
  265. }
  266. if (debug > 0)
  267. flite_hw_dump_regs(fimc, __func__);
  268. return 0;
  269. }
  270. static int stop_streaming(struct vb2_queue *q)
  271. {
  272. struct fimc_lite *fimc = q->drv_priv;
  273. if (!fimc_lite_active(fimc))
  274. return -EINVAL;
  275. return fimc_lite_stop_capture(fimc, false);
  276. }
  277. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  278. unsigned int *num_buffers, unsigned int *num_planes,
  279. unsigned int sizes[], void *allocators[])
  280. {
  281. const struct v4l2_pix_format_mplane *pixm = NULL;
  282. struct fimc_lite *fimc = vq->drv_priv;
  283. struct flite_frame *frame = &fimc->out_frame;
  284. const struct fimc_fmt *fmt = fimc->fmt;
  285. unsigned long wh;
  286. int i;
  287. if (pfmt) {
  288. pixm = &pfmt->fmt.pix_mp;
  289. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, -1);
  290. wh = pixm->width * pixm->height;
  291. } else {
  292. wh = frame->f_width * frame->f_height;
  293. }
  294. if (fmt == NULL)
  295. return -EINVAL;
  296. *num_planes = fmt->memplanes;
  297. for (i = 0; i < fmt->memplanes; i++) {
  298. unsigned int size = (wh * fmt->depth[i]) / 8;
  299. if (pixm)
  300. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  301. else
  302. sizes[i] = size;
  303. allocators[i] = fimc->alloc_ctx;
  304. }
  305. return 0;
  306. }
  307. static int buffer_prepare(struct vb2_buffer *vb)
  308. {
  309. struct vb2_queue *vq = vb->vb2_queue;
  310. struct fimc_lite *fimc = vq->drv_priv;
  311. int i;
  312. if (fimc->fmt == NULL)
  313. return -EINVAL;
  314. for (i = 0; i < fimc->fmt->memplanes; i++) {
  315. unsigned long size = fimc->payload[i];
  316. if (vb2_plane_size(vb, i) < size) {
  317. v4l2_err(fimc->vfd,
  318. "User buffer too small (%ld < %ld)\n",
  319. vb2_plane_size(vb, i), size);
  320. return -EINVAL;
  321. }
  322. vb2_set_plane_payload(vb, i, size);
  323. }
  324. return 0;
  325. }
  326. static void buffer_queue(struct vb2_buffer *vb)
  327. {
  328. struct flite_buffer *buf
  329. = container_of(vb, struct flite_buffer, vb);
  330. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  331. unsigned long flags;
  332. spin_lock_irqsave(&fimc->slock, flags);
  333. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  334. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  335. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  336. list_empty(&fimc->active_buf_q)) {
  337. flite_hw_set_output_addr(fimc, buf->paddr);
  338. fimc_lite_active_queue_add(fimc, buf);
  339. } else {
  340. fimc_lite_pending_queue_add(fimc, buf);
  341. }
  342. if (vb2_is_streaming(&fimc->vb_queue) &&
  343. !list_empty(&fimc->pending_buf_q) &&
  344. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  345. flite_hw_capture_start(fimc);
  346. spin_unlock_irqrestore(&fimc->slock, flags);
  347. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  348. fimc_pipeline_s_stream(&fimc->pipeline, 1);
  349. return;
  350. }
  351. spin_unlock_irqrestore(&fimc->slock, flags);
  352. }
  353. static void fimc_lock(struct vb2_queue *vq)
  354. {
  355. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  356. mutex_lock(&fimc->lock);
  357. }
  358. static void fimc_unlock(struct vb2_queue *vq)
  359. {
  360. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  361. mutex_unlock(&fimc->lock);
  362. }
  363. static const struct vb2_ops fimc_lite_qops = {
  364. .queue_setup = queue_setup,
  365. .buf_prepare = buffer_prepare,
  366. .buf_queue = buffer_queue,
  367. .wait_prepare = fimc_unlock,
  368. .wait_finish = fimc_lock,
  369. .start_streaming = start_streaming,
  370. .stop_streaming = stop_streaming,
  371. };
  372. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  373. {
  374. unsigned long flags;
  375. spin_lock_irqsave(&fimc->slock, flags);
  376. memset(&fimc->events, 0, sizeof(fimc->events));
  377. spin_unlock_irqrestore(&fimc->slock, flags);
  378. }
  379. static int fimc_lite_open(struct file *file)
  380. {
  381. struct fimc_lite *fimc = video_drvdata(file);
  382. int ret = v4l2_fh_open(file);
  383. if (ret)
  384. return ret;
  385. set_bit(ST_FLITE_IN_USE, &fimc->state);
  386. pm_runtime_get_sync(&fimc->pdev->dev);
  387. if (++fimc->ref_count != 1 || fimc->out_path != FIMC_IO_DMA)
  388. return ret;
  389. ret = fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity,
  390. true);
  391. if (ret < 0) {
  392. v4l2_err(fimc->vfd, "Video pipeline initialization failed\n");
  393. pm_runtime_put_sync(&fimc->pdev->dev);
  394. fimc->ref_count--;
  395. v4l2_fh_release(file);
  396. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  397. }
  398. fimc_lite_clear_event_counters(fimc);
  399. return ret;
  400. }
  401. static int fimc_lite_close(struct file *file)
  402. {
  403. struct fimc_lite *fimc = video_drvdata(file);
  404. if (--fimc->ref_count == 0 && fimc->out_path == FIMC_IO_DMA) {
  405. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  406. fimc_lite_stop_capture(fimc, false);
  407. fimc_pipeline_shutdown(&fimc->pipeline);
  408. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  409. }
  410. pm_runtime_put(&fimc->pdev->dev);
  411. if (fimc->ref_count == 0)
  412. vb2_queue_release(&fimc->vb_queue);
  413. return v4l2_fh_release(file);
  414. }
  415. static unsigned int fimc_lite_poll(struct file *file,
  416. struct poll_table_struct *wait)
  417. {
  418. struct fimc_lite *fimc = video_drvdata(file);
  419. return vb2_poll(&fimc->vb_queue, file, wait);
  420. }
  421. static int fimc_lite_mmap(struct file *file, struct vm_area_struct *vma)
  422. {
  423. struct fimc_lite *fimc = video_drvdata(file);
  424. return vb2_mmap(&fimc->vb_queue, vma);
  425. }
  426. static const struct v4l2_file_operations fimc_lite_fops = {
  427. .owner = THIS_MODULE,
  428. .open = fimc_lite_open,
  429. .release = fimc_lite_close,
  430. .poll = fimc_lite_poll,
  431. .unlocked_ioctl = video_ioctl2,
  432. .mmap = fimc_lite_mmap,
  433. };
  434. /*
  435. * Format and crop negotiation helpers
  436. */
  437. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  438. u32 *width, u32 *height,
  439. u32 *code, u32 *fourcc, int pad)
  440. {
  441. struct flite_variant *variant = fimc->variant;
  442. const struct fimc_fmt *fmt;
  443. fmt = fimc_lite_find_format(fourcc, code, 0);
  444. if (WARN_ON(!fmt))
  445. return NULL;
  446. if (code)
  447. *code = fmt->mbus_code;
  448. if (fourcc)
  449. *fourcc = fmt->fourcc;
  450. if (pad == FLITE_SD_PAD_SINK) {
  451. v4l_bound_align_image(width, 8, variant->max_width,
  452. ffs(variant->out_width_align) - 1,
  453. height, 0, variant->max_height, 0, 0);
  454. } else {
  455. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  456. ffs(variant->out_width_align) - 1,
  457. height, 0, fimc->inp_frame.rect.height,
  458. 0, 0);
  459. }
  460. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  461. code ? *code : 0, *width, *height);
  462. return fmt;
  463. }
  464. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  465. {
  466. struct flite_frame *frame = &fimc->inp_frame;
  467. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  468. &r->height, 0, frame->f_height, 0, 0);
  469. /* Adjust left/top if cropping rectangle got out of bounds */
  470. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  471. r->left = round_down(r->left, fimc->variant->win_hor_offs_align);
  472. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  473. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d",
  474. r->left, r->top, r->width, r->height,
  475. frame->f_width, frame->f_height);
  476. }
  477. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  478. {
  479. struct flite_frame *frame = &fimc->out_frame;
  480. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  481. /* Scaling is not supported so we enforce compose rectangle size
  482. same as size of the sink crop rectangle. */
  483. r->width = crop_rect->width;
  484. r->height = crop_rect->height;
  485. /* Adjust left/top if the composing rectangle got out of bounds */
  486. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  487. r->left = round_down(r->left, fimc->variant->out_hor_offs_align);
  488. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  489. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d",
  490. r->left, r->top, r->width, r->height,
  491. frame->f_width, frame->f_height);
  492. }
  493. /*
  494. * Video node ioctl operations
  495. */
  496. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  497. struct v4l2_capability *cap)
  498. {
  499. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  500. cap->bus_info[0] = 0;
  501. cap->card[0] = 0;
  502. cap->capabilities = V4L2_CAP_STREAMING;
  503. return 0;
  504. }
  505. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  506. struct v4l2_fmtdesc *f)
  507. {
  508. const struct fimc_fmt *fmt;
  509. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  510. return -EINVAL;
  511. fmt = &fimc_lite_formats[f->index];
  512. strlcpy(f->description, fmt->name, sizeof(f->description));
  513. f->pixelformat = fmt->fourcc;
  514. return 0;
  515. }
  516. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  517. struct v4l2_format *f)
  518. {
  519. struct fimc_lite *fimc = video_drvdata(file);
  520. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  521. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  522. struct flite_frame *frame = &fimc->out_frame;
  523. const struct fimc_fmt *fmt = fimc->fmt;
  524. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  525. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  526. pixm->num_planes = fmt->memplanes;
  527. pixm->pixelformat = fmt->fourcc;
  528. pixm->width = frame->f_width;
  529. pixm->height = frame->f_height;
  530. pixm->field = V4L2_FIELD_NONE;
  531. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  532. return 0;
  533. }
  534. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  535. struct v4l2_pix_format_mplane *pixm,
  536. const struct fimc_fmt **ffmt)
  537. {
  538. struct flite_variant *variant = fimc->variant;
  539. u32 bpl = pixm->plane_fmt[0].bytesperline;
  540. const struct fimc_fmt *fmt;
  541. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0);
  542. if (WARN_ON(fmt == NULL))
  543. return -EINVAL;
  544. if (ffmt)
  545. *ffmt = fmt;
  546. v4l_bound_align_image(&pixm->width, 8, variant->max_width,
  547. ffs(variant->out_width_align) - 1,
  548. &pixm->height, 0, variant->max_height, 0, 0);
  549. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  550. pixm->plane_fmt[0].bytesperline = (pixm->width *
  551. fmt->depth[0]) / 8;
  552. if (pixm->plane_fmt[0].sizeimage == 0)
  553. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  554. fmt->depth[0]) / 8;
  555. pixm->num_planes = fmt->memplanes;
  556. pixm->pixelformat = fmt->fourcc;
  557. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  558. pixm->field = V4L2_FIELD_NONE;
  559. return 0;
  560. }
  561. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  562. struct v4l2_format *f)
  563. {
  564. struct fimc_lite *fimc = video_drvdata(file);
  565. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  566. }
  567. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  568. struct v4l2_format *f)
  569. {
  570. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  571. struct fimc_lite *fimc = video_drvdata(file);
  572. struct flite_frame *frame = &fimc->out_frame;
  573. const struct fimc_fmt *fmt = NULL;
  574. int ret;
  575. if (vb2_is_busy(&fimc->vb_queue))
  576. return -EBUSY;
  577. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  578. if (ret < 0)
  579. return ret;
  580. fimc->fmt = fmt;
  581. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  582. pixm->plane_fmt[0].sizeimage);
  583. frame->f_width = pixm->width;
  584. frame->f_height = pixm->height;
  585. return 0;
  586. }
  587. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  588. {
  589. struct v4l2_subdev *sd = &fimc->subdev;
  590. struct v4l2_subdev_format sink_fmt, src_fmt;
  591. struct media_pad *pad;
  592. int ret;
  593. while (1) {
  594. /* Retrieve format at the sink pad */
  595. pad = &sd->entity.pads[0];
  596. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  597. break;
  598. /* Don't call FIMC subdev operation to avoid nested locking */
  599. if (sd == &fimc->subdev) {
  600. struct flite_frame *ff = &fimc->out_frame;
  601. sink_fmt.format.width = ff->f_width;
  602. sink_fmt.format.height = ff->f_height;
  603. sink_fmt.format.code = fimc->fmt->mbus_code;
  604. } else {
  605. sink_fmt.pad = pad->index;
  606. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  607. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  608. &sink_fmt);
  609. if (ret < 0 && ret != -ENOIOCTLCMD)
  610. return -EPIPE;
  611. }
  612. /* Retrieve format at the source pad */
  613. pad = media_entity_remote_source(pad);
  614. if (pad == NULL ||
  615. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  616. break;
  617. sd = media_entity_to_v4l2_subdev(pad->entity);
  618. src_fmt.pad = pad->index;
  619. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  620. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  621. if (ret < 0 && ret != -ENOIOCTLCMD)
  622. return -EPIPE;
  623. if (src_fmt.format.width != sink_fmt.format.width ||
  624. src_fmt.format.height != sink_fmt.format.height ||
  625. src_fmt.format.code != sink_fmt.format.code)
  626. return -EPIPE;
  627. }
  628. return 0;
  629. }
  630. static int fimc_lite_streamon(struct file *file, void *priv,
  631. enum v4l2_buf_type type)
  632. {
  633. struct fimc_lite *fimc = video_drvdata(file);
  634. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  635. struct fimc_pipeline *p = &fimc->pipeline;
  636. int ret;
  637. if (fimc_lite_active(fimc))
  638. return -EBUSY;
  639. media_entity_pipeline_start(&sensor->entity, p->m_pipeline);
  640. ret = fimc_pipeline_validate(fimc);
  641. if (ret) {
  642. media_entity_pipeline_stop(&sensor->entity);
  643. return ret;
  644. }
  645. return vb2_streamon(&fimc->vb_queue, type);
  646. }
  647. static int fimc_lite_streamoff(struct file *file, void *priv,
  648. enum v4l2_buf_type type)
  649. {
  650. struct fimc_lite *fimc = video_drvdata(file);
  651. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  652. int ret;
  653. ret = vb2_streamoff(&fimc->vb_queue, type);
  654. if (ret == 0)
  655. media_entity_pipeline_stop(&sd->entity);
  656. return ret;
  657. }
  658. static int fimc_lite_reqbufs(struct file *file, void *priv,
  659. struct v4l2_requestbuffers *reqbufs)
  660. {
  661. struct fimc_lite *fimc = video_drvdata(file);
  662. int ret;
  663. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  664. ret = vb2_reqbufs(&fimc->vb_queue, reqbufs);
  665. if (!ret < 0)
  666. fimc->reqbufs_count = reqbufs->count;
  667. return ret;
  668. }
  669. static int fimc_lite_querybuf(struct file *file, void *priv,
  670. struct v4l2_buffer *buf)
  671. {
  672. struct fimc_lite *fimc = video_drvdata(file);
  673. return vb2_querybuf(&fimc->vb_queue, buf);
  674. }
  675. static int fimc_lite_qbuf(struct file *file, void *priv,
  676. struct v4l2_buffer *buf)
  677. {
  678. struct fimc_lite *fimc = video_drvdata(file);
  679. return vb2_qbuf(&fimc->vb_queue, buf);
  680. }
  681. static int fimc_lite_dqbuf(struct file *file, void *priv,
  682. struct v4l2_buffer *buf)
  683. {
  684. struct fimc_lite *fimc = video_drvdata(file);
  685. return vb2_dqbuf(&fimc->vb_queue, buf, file->f_flags & O_NONBLOCK);
  686. }
  687. static int fimc_lite_create_bufs(struct file *file, void *priv,
  688. struct v4l2_create_buffers *create)
  689. {
  690. struct fimc_lite *fimc = video_drvdata(file);
  691. return vb2_create_bufs(&fimc->vb_queue, create);
  692. }
  693. static int fimc_lite_prepare_buf(struct file *file, void *priv,
  694. struct v4l2_buffer *b)
  695. {
  696. struct fimc_lite *fimc = video_drvdata(file);
  697. return vb2_prepare_buf(&fimc->vb_queue, b);
  698. }
  699. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  700. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  701. {
  702. if (a->left < b->left || a->top < b->top)
  703. return 0;
  704. if (a->left + a->width > b->left + b->width)
  705. return 0;
  706. if (a->top + a->height > b->top + b->height)
  707. return 0;
  708. return 1;
  709. }
  710. static int fimc_lite_g_selection(struct file *file, void *fh,
  711. struct v4l2_selection *sel)
  712. {
  713. struct fimc_lite *fimc = video_drvdata(file);
  714. struct flite_frame *f = &fimc->out_frame;
  715. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  716. return -EINVAL;
  717. switch (sel->target) {
  718. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  719. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  720. sel->r.left = 0;
  721. sel->r.top = 0;
  722. sel->r.width = f->f_width;
  723. sel->r.height = f->f_height;
  724. return 0;
  725. case V4L2_SEL_TGT_COMPOSE:
  726. sel->r = f->rect;
  727. return 0;
  728. }
  729. return -EINVAL;
  730. }
  731. static int fimc_lite_s_selection(struct file *file, void *fh,
  732. struct v4l2_selection *sel)
  733. {
  734. struct fimc_lite *fimc = video_drvdata(file);
  735. struct flite_frame *f = &fimc->out_frame;
  736. struct v4l2_rect rect = sel->r;
  737. unsigned long flags;
  738. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  739. sel->target != V4L2_SEL_TGT_COMPOSE)
  740. return -EINVAL;
  741. fimc_lite_try_compose(fimc, &rect);
  742. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  743. !enclosed_rectangle(&rect, &sel->r))
  744. return -ERANGE;
  745. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  746. !enclosed_rectangle(&sel->r, &rect))
  747. return -ERANGE;
  748. sel->r = rect;
  749. spin_lock_irqsave(&fimc->slock, flags);
  750. f->rect = rect;
  751. set_bit(ST_FLITE_CONFIG, &fimc->state);
  752. spin_unlock_irqrestore(&fimc->slock, flags);
  753. return 0;
  754. }
  755. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  756. .vidioc_querycap = fimc_vidioc_querycap_capture,
  757. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  758. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  759. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  760. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  761. .vidioc_g_selection = fimc_lite_g_selection,
  762. .vidioc_s_selection = fimc_lite_s_selection,
  763. .vidioc_reqbufs = fimc_lite_reqbufs,
  764. .vidioc_querybuf = fimc_lite_querybuf,
  765. .vidioc_prepare_buf = fimc_lite_prepare_buf,
  766. .vidioc_create_bufs = fimc_lite_create_bufs,
  767. .vidioc_qbuf = fimc_lite_qbuf,
  768. .vidioc_dqbuf = fimc_lite_dqbuf,
  769. .vidioc_streamon = fimc_lite_streamon,
  770. .vidioc_streamoff = fimc_lite_streamoff,
  771. };
  772. /* Capture subdev media entity operations */
  773. static int fimc_lite_link_setup(struct media_entity *entity,
  774. const struct media_pad *local,
  775. const struct media_pad *remote, u32 flags)
  776. {
  777. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  778. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  779. unsigned int remote_ent_type = media_entity_type(remote->entity);
  780. if (WARN_ON(fimc == NULL))
  781. return 0;
  782. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x",
  783. __func__, local->entity->name, remote->entity->name,
  784. flags, fimc->source_subdev_grp_id);
  785. switch (local->index) {
  786. case FIMC_SD_PAD_SINK:
  787. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV)
  788. return -EINVAL;
  789. if (flags & MEDIA_LNK_FL_ENABLED) {
  790. if (fimc->source_subdev_grp_id != 0)
  791. return -EBUSY;
  792. fimc->source_subdev_grp_id = sd->grp_id;
  793. return 0;
  794. }
  795. fimc->source_subdev_grp_id = 0;
  796. break;
  797. case FIMC_SD_PAD_SOURCE:
  798. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  799. fimc->out_path = FIMC_IO_NONE;
  800. return 0;
  801. }
  802. if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  803. fimc->out_path = FIMC_IO_ISP;
  804. else
  805. fimc->out_path = FIMC_IO_DMA;
  806. break;
  807. default:
  808. v4l2_err(sd, "Invalid pad index\n");
  809. return -EINVAL;
  810. }
  811. return 0;
  812. }
  813. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  814. .link_setup = fimc_lite_link_setup,
  815. };
  816. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  817. struct v4l2_subdev_fh *fh,
  818. struct v4l2_subdev_mbus_code_enum *code)
  819. {
  820. const struct fimc_fmt *fmt;
  821. fmt = fimc_lite_find_format(NULL, NULL, code->index);
  822. if (!fmt)
  823. return -EINVAL;
  824. code->code = fmt->mbus_code;
  825. return 0;
  826. }
  827. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  828. struct v4l2_subdev_fh *fh,
  829. struct v4l2_subdev_format *fmt)
  830. {
  831. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  832. struct v4l2_mbus_framefmt *mf = &fmt->format;
  833. struct flite_frame *f = &fimc->out_frame;
  834. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  835. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  836. fmt->format = *mf;
  837. return 0;
  838. }
  839. mf->colorspace = V4L2_COLORSPACE_JPEG;
  840. mutex_lock(&fimc->lock);
  841. mf->code = fimc->fmt->mbus_code;
  842. if (fmt->pad == FLITE_SD_PAD_SINK) {
  843. /* full camera input frame size */
  844. mf->width = f->f_width;
  845. mf->height = f->f_height;
  846. } else {
  847. /* crop size */
  848. mf->width = f->rect.width;
  849. mf->height = f->rect.height;
  850. }
  851. mutex_unlock(&fimc->lock);
  852. return 0;
  853. }
  854. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  855. struct v4l2_subdev_fh *fh,
  856. struct v4l2_subdev_format *fmt)
  857. {
  858. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  859. struct v4l2_mbus_framefmt *mf = &fmt->format;
  860. struct flite_frame *sink = &fimc->inp_frame;
  861. const struct fimc_fmt *ffmt;
  862. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d",
  863. fmt->pad, mf->code, mf->width, mf->height);
  864. mf->colorspace = V4L2_COLORSPACE_JPEG;
  865. mutex_lock(&fimc->lock);
  866. if ((fimc->out_path == FIMC_IO_ISP && sd->entity.stream_count > 0) ||
  867. (fimc->out_path == FIMC_IO_DMA && vb2_is_busy(&fimc->vb_queue))) {
  868. mutex_unlock(&fimc->lock);
  869. return -EBUSY;
  870. }
  871. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  872. &mf->code, NULL, fmt->pad);
  873. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  874. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  875. *mf = fmt->format;
  876. mutex_unlock(&fimc->lock);
  877. return 0;
  878. }
  879. if (fmt->pad == FLITE_SD_PAD_SINK) {
  880. sink->f_width = mf->width;
  881. sink->f_height = mf->height;
  882. fimc->fmt = ffmt;
  883. /* Set sink crop rectangle */
  884. sink->rect.width = mf->width;
  885. sink->rect.height = mf->height;
  886. sink->rect.left = 0;
  887. sink->rect.top = 0;
  888. /* Reset source crop rectangle */
  889. fimc->out_frame.rect = sink->rect;
  890. } else {
  891. /* Allow changing format only on sink pad */
  892. mf->code = fimc->fmt->mbus_code;
  893. mf->width = sink->rect.width;
  894. mf->height = sink->rect.height;
  895. }
  896. mutex_unlock(&fimc->lock);
  897. return 0;
  898. }
  899. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  900. struct v4l2_subdev_fh *fh,
  901. struct v4l2_subdev_selection *sel)
  902. {
  903. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  904. struct flite_frame *f = &fimc->inp_frame;
  905. if ((sel->target != V4L2_SEL_TGT_CROP &&
  906. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  907. sel->pad != FLITE_SD_PAD_SINK)
  908. return -EINVAL;
  909. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  910. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  911. return 0;
  912. }
  913. mutex_lock(&fimc->lock);
  914. if (sel->target == V4L2_SEL_TGT_CROP) {
  915. sel->r = f->rect;
  916. } else {
  917. sel->r.left = 0;
  918. sel->r.top = 0;
  919. sel->r.width = f->f_width;
  920. sel->r.height = f->f_height;
  921. }
  922. mutex_unlock(&fimc->lock);
  923. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  924. __func__, f->rect.left, f->rect.top, f->rect.width,
  925. f->rect.height, f->f_width, f->f_height);
  926. return 0;
  927. }
  928. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  929. struct v4l2_subdev_fh *fh,
  930. struct v4l2_subdev_selection *sel)
  931. {
  932. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  933. struct flite_frame *f = &fimc->inp_frame;
  934. int ret = 0;
  935. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  936. return -EINVAL;
  937. mutex_lock(&fimc->lock);
  938. fimc_lite_try_crop(fimc, &sel->r);
  939. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  940. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  941. } else {
  942. unsigned long flags;
  943. spin_lock_irqsave(&fimc->slock, flags);
  944. f->rect = sel->r;
  945. /* Same crop rectangle on the source pad */
  946. fimc->out_frame.rect = sel->r;
  947. set_bit(ST_FLITE_CONFIG, &fimc->state);
  948. spin_unlock_irqrestore(&fimc->slock, flags);
  949. }
  950. mutex_unlock(&fimc->lock);
  951. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  952. __func__, f->rect.left, f->rect.top, f->rect.width,
  953. f->rect.height, f->f_width, f->f_height);
  954. return ret;
  955. }
  956. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  957. {
  958. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  959. if (fimc->out_path == FIMC_IO_DMA)
  960. return -ENOIOCTLCMD;
  961. /* TODO: */
  962. return 0;
  963. }
  964. static int fimc_lite_subdev_s_power(struct v4l2_subdev *sd, int on)
  965. {
  966. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  967. if (fimc->out_path == FIMC_IO_DMA)
  968. return -ENOIOCTLCMD;
  969. /* TODO: */
  970. return 0;
  971. }
  972. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  973. {
  974. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  975. flite_hw_dump_regs(fimc, __func__);
  976. return 0;
  977. }
  978. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  979. {
  980. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  981. struct vb2_queue *q = &fimc->vb_queue;
  982. struct video_device *vfd;
  983. int ret;
  984. fimc->fmt = &fimc_lite_formats[0];
  985. fimc->out_path = FIMC_IO_DMA;
  986. vfd = video_device_alloc();
  987. if (!vfd) {
  988. v4l2_err(sd->v4l2_dev, "Failed to allocate video device\n");
  989. return -ENOMEM;
  990. }
  991. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  992. fimc->index);
  993. vfd->fops = &fimc_lite_fops;
  994. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  995. vfd->v4l2_dev = sd->v4l2_dev;
  996. vfd->minor = -1;
  997. vfd->release = video_device_release;
  998. vfd->lock = &fimc->lock;
  999. fimc->vfd = vfd;
  1000. fimc->ref_count = 0;
  1001. fimc->reqbufs_count = 0;
  1002. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1003. INIT_LIST_HEAD(&fimc->active_buf_q);
  1004. memset(q, 0, sizeof(*q));
  1005. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1006. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1007. q->ops = &fimc_lite_qops;
  1008. q->mem_ops = &vb2_dma_contig_memops;
  1009. q->buf_struct_size = sizeof(struct flite_buffer);
  1010. q->drv_priv = fimc;
  1011. vb2_queue_init(q);
  1012. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1013. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1014. if (ret)
  1015. goto err;
  1016. video_set_drvdata(vfd, fimc);
  1017. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1018. if (ret)
  1019. goto err_vd;
  1020. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1021. vfd->name, video_device_node_name(vfd));
  1022. return 0;
  1023. err_vd:
  1024. media_entity_cleanup(&vfd->entity);
  1025. err:
  1026. video_device_release(vfd);
  1027. return ret;
  1028. }
  1029. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1030. {
  1031. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1032. if (fimc == NULL)
  1033. return;
  1034. if (fimc->vfd) {
  1035. video_unregister_device(fimc->vfd);
  1036. media_entity_cleanup(&fimc->vfd->entity);
  1037. fimc->vfd = NULL;
  1038. }
  1039. }
  1040. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1041. .registered = fimc_lite_subdev_registered,
  1042. .unregistered = fimc_lite_subdev_unregistered,
  1043. };
  1044. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1045. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1046. .get_selection = fimc_lite_subdev_get_selection,
  1047. .set_selection = fimc_lite_subdev_set_selection,
  1048. .get_fmt = fimc_lite_subdev_get_fmt,
  1049. .set_fmt = fimc_lite_subdev_set_fmt,
  1050. };
  1051. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1052. .s_stream = fimc_lite_subdev_s_stream,
  1053. };
  1054. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1055. .s_power = fimc_lite_subdev_s_power,
  1056. .log_status = fimc_lite_log_status,
  1057. };
  1058. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1059. .core = &fimc_lite_core_ops,
  1060. .video = &fimc_lite_subdev_video_ops,
  1061. .pad = &fimc_lite_subdev_pad_ops,
  1062. };
  1063. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1064. {
  1065. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1066. ctrl_handler);
  1067. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1068. return 0;
  1069. }
  1070. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1071. .s_ctrl = fimc_lite_s_ctrl,
  1072. };
  1073. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1074. .ops = &fimc_lite_ctrl_ops,
  1075. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1076. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1077. .name = "Test Pattern 640x480",
  1078. };
  1079. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1080. {
  1081. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1082. struct v4l2_subdev *sd = &fimc->subdev;
  1083. int ret;
  1084. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1085. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1086. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1087. fimc->subdev_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1088. fimc->subdev_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1089. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1090. fimc->subdev_pads, 0);
  1091. if (ret)
  1092. return ret;
  1093. v4l2_ctrl_handler_init(handler, 1);
  1094. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1095. NULL);
  1096. if (handler->error) {
  1097. media_entity_cleanup(&sd->entity);
  1098. return handler->error;
  1099. }
  1100. sd->ctrl_handler = handler;
  1101. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1102. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1103. v4l2_set_subdevdata(sd, fimc);
  1104. return 0;
  1105. }
  1106. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1107. {
  1108. struct v4l2_subdev *sd = &fimc->subdev;
  1109. v4l2_device_unregister_subdev(sd);
  1110. media_entity_cleanup(&sd->entity);
  1111. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1112. v4l2_set_subdevdata(sd, NULL);
  1113. }
  1114. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1115. {
  1116. if (IS_ERR_OR_NULL(fimc->clock))
  1117. return;
  1118. clk_unprepare(fimc->clock);
  1119. clk_put(fimc->clock);
  1120. fimc->clock = NULL;
  1121. }
  1122. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1123. {
  1124. int ret;
  1125. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1126. if (IS_ERR(fimc->clock))
  1127. return PTR_ERR(fimc->clock);
  1128. ret = clk_prepare(fimc->clock);
  1129. if (ret < 0) {
  1130. clk_put(fimc->clock);
  1131. fimc->clock = NULL;
  1132. }
  1133. return ret;
  1134. }
  1135. static int __devinit fimc_lite_probe(struct platform_device *pdev)
  1136. {
  1137. struct flite_drvdata *drv_data = fimc_lite_get_drvdata(pdev);
  1138. struct fimc_lite *fimc;
  1139. struct resource *res;
  1140. int ret;
  1141. fimc = devm_kzalloc(&pdev->dev, sizeof(*fimc), GFP_KERNEL);
  1142. if (!fimc)
  1143. return -ENOMEM;
  1144. fimc->index = pdev->id;
  1145. fimc->variant = drv_data->variant[fimc->index];
  1146. fimc->pdev = pdev;
  1147. init_waitqueue_head(&fimc->irq_queue);
  1148. spin_lock_init(&fimc->slock);
  1149. mutex_init(&fimc->lock);
  1150. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1151. fimc->regs = devm_request_and_ioremap(&pdev->dev, res);
  1152. if (fimc->regs == NULL) {
  1153. dev_err(&pdev->dev, "Failed to obtain io memory\n");
  1154. return -ENOENT;
  1155. }
  1156. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1157. if (res == NULL) {
  1158. dev_err(&pdev->dev, "Failed to get IRQ resource\n");
  1159. return -ENXIO;
  1160. }
  1161. ret = fimc_lite_clk_get(fimc);
  1162. if (ret)
  1163. return ret;
  1164. ret = devm_request_irq(&pdev->dev, res->start, flite_irq_handler,
  1165. 0, dev_name(&pdev->dev), fimc);
  1166. if (ret) {
  1167. dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret);
  1168. goto err_clk;
  1169. }
  1170. /* The video node will be created within the subdev's registered() op */
  1171. ret = fimc_lite_create_capture_subdev(fimc);
  1172. if (ret)
  1173. goto err_clk;
  1174. platform_set_drvdata(pdev, fimc);
  1175. pm_runtime_enable(&pdev->dev);
  1176. ret = pm_runtime_get_sync(&pdev->dev);
  1177. if (ret < 0)
  1178. goto err_sd;
  1179. fimc->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  1180. if (IS_ERR(fimc->alloc_ctx)) {
  1181. ret = PTR_ERR(fimc->alloc_ctx);
  1182. goto err_pm;
  1183. }
  1184. pm_runtime_put(&pdev->dev);
  1185. dev_dbg(&pdev->dev, "FIMC-LITE.%d registered successfully\n",
  1186. fimc->index);
  1187. return 0;
  1188. err_pm:
  1189. pm_runtime_put(&pdev->dev);
  1190. err_sd:
  1191. fimc_lite_unregister_capture_subdev(fimc);
  1192. err_clk:
  1193. fimc_lite_clk_put(fimc);
  1194. return ret;
  1195. }
  1196. static int fimc_lite_runtime_resume(struct device *dev)
  1197. {
  1198. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1199. clk_enable(fimc->clock);
  1200. return 0;
  1201. }
  1202. static int fimc_lite_runtime_suspend(struct device *dev)
  1203. {
  1204. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1205. clk_disable(fimc->clock);
  1206. return 0;
  1207. }
  1208. #ifdef CONFIG_PM_SLEEP
  1209. static int fimc_lite_resume(struct device *dev)
  1210. {
  1211. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1212. struct flite_buffer *buf;
  1213. unsigned long flags;
  1214. int i;
  1215. spin_lock_irqsave(&fimc->slock, flags);
  1216. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1217. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1218. spin_unlock_irqrestore(&fimc->slock, flags);
  1219. return 0;
  1220. }
  1221. flite_hw_reset(fimc);
  1222. spin_unlock_irqrestore(&fimc->slock, flags);
  1223. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1224. return 0;
  1225. INIT_LIST_HEAD(&fimc->active_buf_q);
  1226. fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity, false);
  1227. fimc_lite_hw_init(fimc);
  1228. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1229. for (i = 0; i < fimc->reqbufs_count; i++) {
  1230. if (list_empty(&fimc->pending_buf_q))
  1231. break;
  1232. buf = fimc_lite_pending_queue_pop(fimc);
  1233. buffer_queue(&buf->vb);
  1234. }
  1235. return 0;
  1236. }
  1237. static int fimc_lite_suspend(struct device *dev)
  1238. {
  1239. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1240. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1241. int ret;
  1242. if (test_and_set_bit(ST_LPM, &fimc->state))
  1243. return 0;
  1244. ret = fimc_lite_stop_capture(fimc, suspend);
  1245. if (ret)
  1246. return ret;
  1247. return fimc_pipeline_shutdown(&fimc->pipeline);
  1248. }
  1249. #endif /* CONFIG_PM_SLEEP */
  1250. static int __devexit fimc_lite_remove(struct platform_device *pdev)
  1251. {
  1252. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1253. struct device *dev = &pdev->dev;
  1254. pm_runtime_disable(dev);
  1255. pm_runtime_set_suspended(dev);
  1256. fimc_lite_unregister_capture_subdev(fimc);
  1257. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1258. fimc_lite_clk_put(fimc);
  1259. dev_info(dev, "Driver unloaded\n");
  1260. return 0;
  1261. }
  1262. static struct flite_variant fimc_lite0_variant_exynos4 = {
  1263. .max_width = 8192,
  1264. .max_height = 8192,
  1265. .out_width_align = 8,
  1266. .win_hor_offs_align = 2,
  1267. .out_hor_offs_align = 8,
  1268. };
  1269. /* EXYNOS4212, EXYNOS4412 */
  1270. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1271. .variant = {
  1272. [0] = &fimc_lite0_variant_exynos4,
  1273. [1] = &fimc_lite0_variant_exynos4,
  1274. },
  1275. };
  1276. static struct platform_device_id fimc_lite_driver_ids[] = {
  1277. {
  1278. .name = "exynos-fimc-lite",
  1279. .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
  1280. },
  1281. { /* sentinel */ },
  1282. };
  1283. MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
  1284. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1285. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1286. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1287. NULL)
  1288. };
  1289. static struct platform_driver fimc_lite_driver = {
  1290. .probe = fimc_lite_probe,
  1291. .remove = __devexit_p(fimc_lite_remove),
  1292. .id_table = fimc_lite_driver_ids,
  1293. .driver = {
  1294. .name = FIMC_LITE_DRV_NAME,
  1295. .owner = THIS_MODULE,
  1296. .pm = &fimc_lite_pm_ops,
  1297. }
  1298. };
  1299. module_platform_driver(fimc_lite_driver);
  1300. MODULE_LICENSE("GPL");
  1301. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);