wss.h 8.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228
  1. #ifndef __SOUND_WSS_H
  2. #define __SOUND_WSS_H
  3. /*
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. * Definitions for CS4231 & InterWave chips & compatible chips
  6. *
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include "control.h"
  24. #include "pcm.h"
  25. #include "timer.h"
  26. #include "cs4231-regs.h"
  27. /* defines for codec.mode */
  28. #define WSS_MODE_NONE 0x0000
  29. #define WSS_MODE_PLAY 0x0001
  30. #define WSS_MODE_RECORD 0x0002
  31. #define WSS_MODE_TIMER 0x0004
  32. #define WSS_MODE_OPEN (WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
  33. /* defines for codec.hardware */
  34. #define WSS_HW_DETECT 0x0000 /* let CS4231 driver detect chip */
  35. #define WSS_HW_DETECT3 0x0001 /* allow mode 3 */
  36. #define WSS_HW_TYPE_MASK 0xff00 /* type mask */
  37. #define WSS_HW_CS4231_MASK 0x0100 /* CS4231 serie */
  38. #define WSS_HW_CS4231 0x0100 /* CS4231 chip */
  39. #define WSS_HW_CS4231A 0x0101 /* CS4231A chip */
  40. #define WSS_HW_AD1845 0x0102 /* AD1845 chip */
  41. #define WSS_HW_CS4232_MASK 0x0200 /* CS4232 serie (has control ports) */
  42. #define WSS_HW_CS4232 0x0200 /* CS4232 */
  43. #define WSS_HW_CS4232A 0x0201 /* CS4232A */
  44. #define WSS_HW_CS4236 0x0202 /* CS4236 */
  45. #define WSS_HW_CS4236B_MASK 0x0400 /* CS4236B serie (has extended control regs) */
  46. #define WSS_HW_CS4235 0x0400 /* CS4235 - Crystal Clear (tm) stereo enhancement */
  47. #define WSS_HW_CS4236B 0x0401 /* CS4236B */
  48. #define WSS_HW_CS4237B 0x0402 /* CS4237B - SRS 3D */
  49. #define WSS_HW_CS4238B 0x0403 /* CS4238B - QSOUND 3D */
  50. #define WSS_HW_CS4239 0x0404 /* CS4239 - Crystal Clear (tm) stereo enhancement */
  51. #define WSS_HW_AD1848_MASK 0x0800 /* AD1848 serie (half duplex) */
  52. #define WSS_HW_AD1847 0x0801 /* AD1847 chip */
  53. #define WSS_HW_AD1848 0x0802 /* AD1848 chip */
  54. #define WSS_HW_CS4248 0x0803 /* CS4248 chip */
  55. #define WSS_HW_CMI8330 0x0804 /* CMI8330 chip */
  56. #define WSS_HW_THINKPAD 0x0805 /* Thinkpad 360/750/755 */
  57. /* compatible, but clones */
  58. #define WSS_HW_INTERWAVE 0x1000 /* InterWave chip */
  59. #define WSS_HW_OPL3SA2 0x1101 /* OPL3-SA2 chip, similar to cs4231 */
  60. #define WSS_HW_OPTI93X 0x1102 /* Opti 930/931/933 */
  61. /* defines for codec.hwshare */
  62. #define WSS_HWSHARE_IRQ (1<<0)
  63. #define WSS_HWSHARE_DMA1 (1<<1)
  64. #define WSS_HWSHARE_DMA2 (1<<2)
  65. struct snd_wss {
  66. unsigned long port; /* base i/o port */
  67. struct resource *res_port;
  68. unsigned long cport; /* control base i/o port (CS4236) */
  69. struct resource *res_cport;
  70. int irq; /* IRQ line */
  71. int dma1; /* playback DMA */
  72. int dma2; /* record DMA */
  73. unsigned short version; /* version of CODEC chip */
  74. unsigned short mode; /* see to WSS_MODE_XXXX */
  75. unsigned short hardware; /* see to WSS_HW_XXXX */
  76. unsigned short hwshare; /* shared resources */
  77. unsigned short single_dma:1, /* forced single DMA mode (GUS 16-bit */
  78. /* daughter board) or dma1 == dma2 */
  79. ebus_flag:1, /* SPARC: EBUS present */
  80. thinkpad_flag:1; /* Thinkpad CS4248 needs extra help */
  81. struct snd_card *card;
  82. struct snd_pcm *pcm;
  83. struct snd_pcm_substream *playback_substream;
  84. struct snd_pcm_substream *capture_substream;
  85. struct snd_timer *timer;
  86. unsigned char image[32]; /* registers image */
  87. unsigned char eimage[32]; /* extended registers image */
  88. unsigned char cimage[16]; /* control registers image */
  89. int mce_bit;
  90. int calibrate_mute;
  91. int sw_3d_bit;
  92. unsigned int p_dma_size;
  93. unsigned int c_dma_size;
  94. spinlock_t reg_lock;
  95. struct mutex mce_mutex;
  96. struct mutex open_mutex;
  97. int (*rate_constraint) (struct snd_pcm_runtime *runtime);
  98. void (*set_playback_format) (struct snd_wss *chip,
  99. struct snd_pcm_hw_params *hw_params,
  100. unsigned char pdfr);
  101. void (*set_capture_format) (struct snd_wss *chip,
  102. struct snd_pcm_hw_params *hw_params,
  103. unsigned char cdfr);
  104. void (*trigger) (struct snd_wss *chip, unsigned int what, int start);
  105. #ifdef CONFIG_PM
  106. void (*suspend) (struct snd_wss *chip);
  107. void (*resume) (struct snd_wss *chip);
  108. #endif
  109. void *dma_private_data;
  110. int (*claim_dma) (struct snd_wss *chip,
  111. void *dma_private_data, int dma);
  112. int (*release_dma) (struct snd_wss *chip,
  113. void *dma_private_data, int dma);
  114. };
  115. /* exported functions */
  116. void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char val);
  117. unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg);
  118. void snd_cs4236_ext_out(struct snd_wss *chip,
  119. unsigned char reg, unsigned char val);
  120. unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg);
  121. void snd_wss_mce_up(struct snd_wss *chip);
  122. void snd_wss_mce_down(struct snd_wss *chip);
  123. void snd_wss_overrange(struct snd_wss *chip);
  124. irqreturn_t snd_wss_interrupt(int irq, void *dev_id);
  125. const char *snd_wss_chip_id(struct snd_wss *chip);
  126. int snd_wss_create(struct snd_card *card,
  127. unsigned long port,
  128. unsigned long cport,
  129. int irq, int dma1, int dma2,
  130. unsigned short hardware,
  131. unsigned short hwshare,
  132. struct snd_wss **rchip);
  133. int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
  134. int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer);
  135. int snd_wss_mixer(struct snd_wss *chip);
  136. int snd_cs4236_create(struct snd_card *card,
  137. unsigned long port,
  138. unsigned long cport,
  139. int irq, int dma1, int dma2,
  140. unsigned short hardware,
  141. unsigned short hwshare,
  142. struct snd_wss **rchip);
  143. int snd_cs4236_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
  144. int snd_cs4236_mixer(struct snd_wss *chip);
  145. /*
  146. * mixer library
  147. */
  148. #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
  149. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  150. .name = xname, \
  151. .index = xindex, \
  152. .info = snd_wss_info_single, \
  153. .get = snd_wss_get_single, \
  154. .put = snd_wss_put_single, \
  155. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  156. int snd_wss_info_single(struct snd_kcontrol *kcontrol,
  157. struct snd_ctl_elem_info *uinfo);
  158. int snd_wss_get_single(struct snd_kcontrol *kcontrol,
  159. struct snd_ctl_elem_value *ucontrol);
  160. int snd_wss_put_single(struct snd_kcontrol *kcontrol,
  161. struct snd_ctl_elem_value *ucontrol);
  162. #define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  163. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  164. .name = xname, \
  165. .index = xindex, \
  166. .info = snd_wss_info_double, \
  167. .get = snd_wss_get_double, \
  168. .put = snd_wss_put_double, \
  169. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
  170. (shift_right << 19) | (mask << 24) | (invert << 22) }
  171. #define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
  172. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  173. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  174. .name = xname, \
  175. .index = xindex, \
  176. .info = snd_wss_info_single, \
  177. .get = snd_wss_get_single, \
  178. .put = snd_wss_put_single, \
  179. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  180. .tlv = { .p = (xtlv) } }
  181. #define WSS_DOUBLE_TLV(xname, xindex, left_reg, right_reg, \
  182. shift_left, shift_right, mask, invert, xtlv) \
  183. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  184. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  185. .name = xname, \
  186. .index = xindex, \
  187. .info = snd_wss_info_double, \
  188. .get = snd_wss_get_double, \
  189. .put = snd_wss_put_double, \
  190. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
  191. (shift_right << 19) | (mask << 24) | (invert << 22), \
  192. .tlv = { .p = (xtlv) } }
  193. int snd_wss_info_double(struct snd_kcontrol *kcontrol,
  194. struct snd_ctl_elem_info *uinfo);
  195. int snd_wss_get_double(struct snd_kcontrol *kcontrol,
  196. struct snd_ctl_elem_value *ucontrol);
  197. int snd_wss_put_double(struct snd_kcontrol *kcontrol,
  198. struct snd_ctl_elem_value *ucontrol);
  199. #endif /* __SOUND_WSS_H */